sunxi: initial 3.13 support
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.13 / 140-sun47i-rtc-driver.patch
1 From c6890cadc2129a07d69f3dcbfca66522c27b8069 Mon Sep 17 00:00:00 2001
2 From: Carlo Caione <carlo.caione@gmail.com>
3 Date: Sat, 16 Nov 2013 18:33:54 +0100
4 Subject: [PATCH] ARM: sun4i/sun7i: RTC driver
5
6 This patch introduces the driver for the RTC in the Allwinner A10 and
7 A20 SoCs.
8
9 Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
10 Acked-by: Alessandro Zummo <a.zummo@towertech.it>
11 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
12 ---
13 drivers/rtc/Kconfig | 7 +
14 drivers/rtc/Makefile | 1 +
15 drivers/rtc/rtc-sunxi.c | 523 ++++++++++++++++++++++++++++++++++++++++++++++++
16 3 files changed, 531 insertions(+)
17 create mode 100644 drivers/rtc/rtc-sunxi.c
18
19 diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
20 index 0077302..c2fa86c 100644
21 --- a/drivers/rtc/Kconfig
22 +++ b/drivers/rtc/Kconfig
23 @@ -1104,6 +1104,13 @@ config RTC_DRV_SUN4V
24 If you say Y here you will get support for the Hypervisor
25 based RTC on SUN4V systems.
26
27 +config RTC_DRV_SUNXI
28 + tristate "Allwinner sun4i/sun7i RTC"
29 + depends on ARCH_SUNXI
30 + help
31 + If you say Y here you will get support for the RTC found on
32 + Allwinner A10/A20.
33 +
34 config RTC_DRV_STARFIRE
35 bool "Starfire RTC"
36 depends on SPARC64
37 diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
38 index 27b4bd8..63f3e99 100644
39 --- a/drivers/rtc/Makefile
40 +++ b/drivers/rtc/Makefile
41 @@ -117,6 +117,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o
42 obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o
43 obj-$(CONFIG_RTC_DRV_STMP) += rtc-stmp3xxx.o
44 obj-$(CONFIG_RTC_DRV_SUN4V) += rtc-sun4v.o
45 +obj-$(CONFIG_RTC_DRV_SUNXI) += rtc-sunxi.o
46 obj-$(CONFIG_RTC_DRV_TEGRA) += rtc-tegra.o
47 obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o
48 obj-$(CONFIG_RTC_DRV_TILE) += rtc-tile.o
49 diff --git a/drivers/rtc/rtc-sunxi.c b/drivers/rtc/rtc-sunxi.c
50 new file mode 100644
51 index 0000000..68a3528
52 --- /dev/null
53 +++ b/drivers/rtc/rtc-sunxi.c
54 @@ -0,0 +1,523 @@
55 +/*
56 + * An RTC driver for Allwinner A10/A20
57 + *
58 + * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
59 + *
60 + * This program is free software; you can redistribute it and/or modify
61 + * it under the terms of the GNU General Public License as published by
62 + * the Free Software Foundation; either version 2 of the License, or
63 + * (at your option) any later version.
64 + *
65 + * This program is distributed in the hope that it will be useful, but WITHOUT
66 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
67 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
68 + * more details.
69 + *
70 + * You should have received a copy of the GNU General Public License along
71 + * with this program; if not, write to the Free Software Foundation, Inc.,
72 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
73 + */
74 +
75 +#include <linux/delay.h>
76 +#include <linux/err.h>
77 +#include <linux/fs.h>
78 +#include <linux/init.h>
79 +#include <linux/interrupt.h>
80 +#include <linux/io.h>
81 +#include <linux/kernel.h>
82 +#include <linux/module.h>
83 +#include <linux/of.h>
84 +#include <linux/of_address.h>
85 +#include <linux/of_device.h>
86 +#include <linux/platform_device.h>
87 +#include <linux/rtc.h>
88 +#include <linux/types.h>
89 +
90 +#define SUNXI_LOSC_CTRL 0x0000
91 +#define SUNXI_LOSC_CTRL_RTC_HMS_ACC BIT(8)
92 +#define SUNXI_LOSC_CTRL_RTC_YMD_ACC BIT(7)
93 +
94 +#define SUNXI_RTC_YMD 0x0004
95 +
96 +#define SUNXI_RTC_HMS 0x0008
97 +
98 +#define SUNXI_ALRM_DHMS 0x000c
99 +
100 +#define SUNXI_ALRM_EN 0x0014
101 +#define SUNXI_ALRM_EN_CNT_EN BIT(8)
102 +
103 +#define SUNXI_ALRM_IRQ_EN 0x0018
104 +#define SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN BIT(0)
105 +
106 +#define SUNXI_ALRM_IRQ_STA 0x001c
107 +#define SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND BIT(0)
108 +
109 +#define SUNXI_MASK_DH 0x0000001f
110 +#define SUNXI_MASK_SM 0x0000003f
111 +#define SUNXI_MASK_M 0x0000000f
112 +#define SUNXI_MASK_LY 0x00000001
113 +#define SUNXI_MASK_D 0x00000ffe
114 +#define SUNXI_MASK_M 0x0000000f
115 +
116 +#define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \
117 + >> (shift))
118 +
119 +#define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift))
120 +
121 +/*
122 + * Get date values
123 + */
124 +#define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0)
125 +#define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8)
126 +#define SUNXI_DATE_GET_YEAR_VALUE(x, mask) SUNXI_GET(x, mask, 16)
127 +
128 +/*
129 + * Get time values
130 + */
131 +#define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
132 +#define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
133 +#define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
134 +
135 +/*
136 + * Get alarm values
137 + */
138 +#define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0)
139 +#define SUNXI_ALRM_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8)
140 +#define SUNXI_ALRM_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16)
141 +
142 +/*
143 + * Set date values
144 + */
145 +#define SUNXI_DATE_SET_DAY_VALUE(x) SUNXI_DATE_GET_DAY_VALUE(x)
146 +#define SUNXI_DATE_SET_MON_VALUE(x) SUNXI_SET(x, SUNXI_MASK_M, 8)
147 +#define SUNXI_DATE_SET_YEAR_VALUE(x, mask) SUNXI_SET(x, mask, 16)
148 +#define SUNXI_LEAP_SET_VALUE(x, shift) SUNXI_SET(x, SUNXI_MASK_LY, shift)
149 +
150 +/*
151 + * Set time values
152 + */
153 +#define SUNXI_TIME_SET_SEC_VALUE(x) SUNXI_TIME_GET_SEC_VALUE(x)
154 +#define SUNXI_TIME_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
155 +#define SUNXI_TIME_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
156 +
157 +/*
158 + * Set alarm values
159 + */
160 +#define SUNXI_ALRM_SET_SEC_VALUE(x) SUNXI_ALRM_GET_SEC_VALUE(x)
161 +#define SUNXI_ALRM_SET_MIN_VALUE(x) SUNXI_SET(x, SUNXI_MASK_SM, 8)
162 +#define SUNXI_ALRM_SET_HOUR_VALUE(x) SUNXI_SET(x, SUNXI_MASK_DH, 16)
163 +#define SUNXI_ALRM_SET_DAY_VALUE(x) SUNXI_SET(x, SUNXI_MASK_D, 21)
164 +
165 +/*
166 + * Time unit conversions
167 + */
168 +#define SEC_IN_MIN 60
169 +#define SEC_IN_HOUR (60 * SEC_IN_MIN)
170 +#define SEC_IN_DAY (24 * SEC_IN_HOUR)
171 +
172 +/*
173 + * The year parameter passed to the driver is usually an offset relative to
174 + * the year 1900. This macro is used to convert this offset to another one
175 + * relative to the minimum year allowed by the hardware.
176 + */
177 +#define SUNXI_YEAR_OFF(x) ((x)->min - 1900)
178 +
179 +/*
180 + * min and max year are arbitrary set considering the limited range of the
181 + * hardware register field
182 + */
183 +struct sunxi_rtc_data_year {
184 + unsigned int min; /* min year allowed */
185 + unsigned int max; /* max year allowed */
186 + unsigned int mask; /* mask for the year field */
187 + unsigned char leap_shift; /* bit shift to get the leap year */
188 +};
189 +
190 +static struct sunxi_rtc_data_year data_year_param[] = {
191 + [0] = {
192 + .min = 2010,
193 + .max = 2073,
194 + .mask = 0x3f,
195 + .leap_shift = 22,
196 + },
197 + [1] = {
198 + .min = 1970,
199 + .max = 2225,
200 + .mask = 0xff,
201 + .leap_shift = 24,
202 + },
203 +};
204 +
205 +struct sunxi_rtc_dev {
206 + struct rtc_device *rtc;
207 + struct device *dev;
208 + struct sunxi_rtc_data_year *data_year;
209 + void __iomem *base;
210 + int irq;
211 +};
212 +
213 +static irqreturn_t sunxi_rtc_alarmirq(int irq, void *id)
214 +{
215 + struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id;
216 + u32 val;
217 +
218 + val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
219 +
220 + if (val & SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND) {
221 + val |= SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND;
222 + writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
223 +
224 + rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
225 +
226 + return IRQ_HANDLED;
227 + }
228 +
229 + return IRQ_NONE;
230 +}
231 +
232 +static void sunxi_rtc_setaie(int to, struct sunxi_rtc_dev *chip)
233 +{
234 + u32 alrm_val = 0;
235 + u32 alrm_irq_val = 0;
236 +
237 + if (to) {
238 + alrm_val = readl(chip->base + SUNXI_ALRM_EN);
239 + alrm_val |= SUNXI_ALRM_EN_CNT_EN;
240 +
241 + alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
242 + alrm_irq_val |= SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN;
243 + } else {
244 + writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
245 + chip->base + SUNXI_ALRM_IRQ_STA);
246 + }
247 +
248 + writel(alrm_val, chip->base + SUNXI_ALRM_EN);
249 + writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
250 +}
251 +
252 +static int sunxi_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
253 +{
254 + struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
255 + struct rtc_time *alrm_tm = &wkalrm->time;
256 + u32 alrm;
257 + u32 alrm_en;
258 + u32 date;
259 +
260 + alrm = readl(chip->base + SUNXI_ALRM_DHMS);
261 + date = readl(chip->base + SUNXI_RTC_YMD);
262 +
263 + alrm_tm->tm_sec = SUNXI_ALRM_GET_SEC_VALUE(alrm);
264 + alrm_tm->tm_min = SUNXI_ALRM_GET_MIN_VALUE(alrm);
265 + alrm_tm->tm_hour = SUNXI_ALRM_GET_HOUR_VALUE(alrm);
266 +
267 + alrm_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
268 + alrm_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
269 + alrm_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
270 + chip->data_year->mask);
271 +
272 + alrm_tm->tm_mon -= 1;
273 +
274 + /*
275 + * switch from (data_year->min)-relative offset to
276 + * a (1900)-relative one
277 + */
278 + alrm_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
279 +
280 + alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
281 + if (alrm_en & SUNXI_ALRM_EN_CNT_EN)
282 + wkalrm->enabled = 1;
283 +
284 + return 0;
285 +}
286 +
287 +static int sunxi_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
288 +{
289 + struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
290 + u32 date, time;
291 +
292 + /*
293 + * read again in case it changes
294 + */
295 + do {
296 + date = readl(chip->base + SUNXI_RTC_YMD);
297 + time = readl(chip->base + SUNXI_RTC_HMS);
298 + } while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
299 + (time != readl(chip->base + SUNXI_RTC_HMS)));
300 +
301 + rtc_tm->tm_sec = SUNXI_TIME_GET_SEC_VALUE(time);
302 + rtc_tm->tm_min = SUNXI_TIME_GET_MIN_VALUE(time);
303 + rtc_tm->tm_hour = SUNXI_TIME_GET_HOUR_VALUE(time);
304 +
305 + rtc_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
306 + rtc_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
307 + rtc_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
308 + chip->data_year->mask);
309 +
310 + rtc_tm->tm_mon -= 1;
311 +
312 + /*
313 + * switch from (data_year->min)-relative offset to
314 + * a (1900)-relative one
315 + */
316 + rtc_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
317 +
318 + return rtc_valid_tm(rtc_tm);
319 +}
320 +
321 +static int sunxi_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
322 +{
323 + struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
324 + struct rtc_time *alrm_tm = &wkalrm->time;
325 + struct rtc_time tm_now;
326 + u32 alrm = 0;
327 + unsigned long time_now = 0;
328 + unsigned long time_set = 0;
329 + unsigned long time_gap = 0;
330 + unsigned long time_gap_day = 0;
331 + unsigned long time_gap_hour = 0;
332 + unsigned long time_gap_min = 0;
333 + int ret = 0;
334 +
335 + ret = sunxi_rtc_gettime(dev, &tm_now);
336 + if (ret < 0) {
337 + dev_err(dev, "Error in getting time\n");
338 + return -EINVAL;
339 + }
340 +
341 + rtc_tm_to_time(alrm_tm, &time_set);
342 + rtc_tm_to_time(&tm_now, &time_now);
343 + if (time_set <= time_now) {
344 + dev_err(dev, "Date to set in the past\n");
345 + return -EINVAL;
346 + }
347 +
348 + time_gap = time_set - time_now;
349 + time_gap_day = time_gap / SEC_IN_DAY;
350 + time_gap -= time_gap_day * SEC_IN_DAY;
351 + time_gap_hour = time_gap / SEC_IN_HOUR;
352 + time_gap -= time_gap_hour * SEC_IN_HOUR;
353 + time_gap_min = time_gap / SEC_IN_MIN;
354 + time_gap -= time_gap_min * SEC_IN_MIN;
355 +
356 + if (time_gap_day > 255) {
357 + dev_err(dev, "Day must be in the range 0 - 255\n");
358 + return -EINVAL;
359 + }
360 +
361 + sunxi_rtc_setaie(0, chip);
362 + writel(0, chip->base + SUNXI_ALRM_DHMS);
363 + usleep_range(100, 300);
364 +
365 + alrm = SUNXI_ALRM_SET_SEC_VALUE(time_gap) |
366 + SUNXI_ALRM_SET_MIN_VALUE(time_gap_min) |
367 + SUNXI_ALRM_SET_HOUR_VALUE(time_gap_hour) |
368 + SUNXI_ALRM_SET_DAY_VALUE(time_gap_day);
369 + writel(alrm, chip->base + SUNXI_ALRM_DHMS);
370 +
371 + writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
372 + writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
373 +
374 + sunxi_rtc_setaie(wkalrm->enabled, chip);
375 +
376 + return 0;
377 +}
378 +
379 +static int sunxi_rtc_wait(struct sunxi_rtc_dev *chip, int offset,
380 + unsigned int mask, unsigned int ms_timeout)
381 +{
382 + const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
383 + u32 reg;
384 +
385 + do {
386 + reg = readl(chip->base + offset);
387 + reg &= mask;
388 +
389 + if (reg == mask)
390 + return 0;
391 +
392 + } while (time_before(jiffies, timeout));
393 +
394 + return -ETIMEDOUT;
395 +}
396 +
397 +static int sunxi_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
398 +{
399 + struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
400 + u32 date = 0;
401 + u32 time = 0;
402 + int year;
403 +
404 + /*
405 + * the input rtc_tm->tm_year is the offset relative to 1900. We use
406 + * the SUNXI_YEAR_OFF macro to rebase it with respect to the min year
407 + * allowed by the hardware
408 + */
409 +
410 + year = rtc_tm->tm_year + 1900;
411 + if (year < chip->data_year->min || year > chip->data_year->max) {
412 + dev_err(dev, "rtc only supports year in range %d - %d\n",
413 + chip->data_year->min, chip->data_year->max);
414 + return -EINVAL;
415 + }
416 +
417 + rtc_tm->tm_year -= SUNXI_YEAR_OFF(chip->data_year);
418 + rtc_tm->tm_mon += 1;
419 +
420 + date = SUNXI_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
421 + SUNXI_DATE_SET_MON_VALUE(rtc_tm->tm_mon) |
422 + SUNXI_DATE_SET_YEAR_VALUE(rtc_tm->tm_year,
423 + chip->data_year->mask);
424 +
425 + if (is_leap_year(year))
426 + date |= SUNXI_LEAP_SET_VALUE(1, chip->data_year->leap_shift);
427 +
428 + time = SUNXI_TIME_SET_SEC_VALUE(rtc_tm->tm_sec) |
429 + SUNXI_TIME_SET_MIN_VALUE(rtc_tm->tm_min) |
430 + SUNXI_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
431 +
432 + writel(0, chip->base + SUNXI_RTC_HMS);
433 + writel(0, chip->base + SUNXI_RTC_YMD);
434 +
435 + writel(time, chip->base + SUNXI_RTC_HMS);
436 +
437 + /*
438 + * After writing the RTC HH-MM-SS register, the
439 + * SUNXI_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
440 + * be cleared until the real writing operation is finished
441 + */
442 +
443 + if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
444 + SUNXI_LOSC_CTRL_RTC_HMS_ACC, 50)) {
445 + dev_err(dev, "Failed to set rtc time.\n");
446 + return -1;
447 + }
448 +
449 + writel(date, chip->base + SUNXI_RTC_YMD);
450 +
451 + /*
452 + * After writing the RTC YY-MM-DD register, the
453 + * SUNXI_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
454 + * be cleared until the real writing operation is finished
455 + */
456 +
457 + if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
458 + SUNXI_LOSC_CTRL_RTC_YMD_ACC, 50)) {
459 + dev_err(dev, "Failed to set rtc time.\n");
460 + return -1;
461 + }
462 +
463 + return 0;
464 +}
465 +
466 +static int sunxi_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
467 +{
468 + struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
469 +
470 + if (!enabled)
471 + sunxi_rtc_setaie(enabled, chip);
472 +
473 + return 0;
474 +}
475 +
476 +static const struct rtc_class_ops sunxi_rtc_ops = {
477 + .read_time = sunxi_rtc_gettime,
478 + .set_time = sunxi_rtc_settime,
479 + .read_alarm = sunxi_rtc_getalarm,
480 + .set_alarm = sunxi_rtc_setalarm,
481 + .alarm_irq_enable = sunxi_rtc_alarm_irq_enable
482 +};
483 +
484 +static const struct of_device_id sunxi_rtc_dt_ids[] = {
485 + { .compatible = "allwinner,sun4i-rtc", .data = &data_year_param[0] },
486 + { .compatible = "allwinner,sun7i-a20-rtc", .data = &data_year_param[1] },
487 + { /* sentinel */ },
488 +};
489 +MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
490 +
491 +static int sunxi_rtc_probe(struct platform_device *pdev)
492 +{
493 + struct sunxi_rtc_dev *chip;
494 + struct resource *res;
495 + const struct of_device_id *of_id;
496 + int ret;
497 +
498 + chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
499 + if (!chip)
500 + return -ENOMEM;
501 +
502 + platform_set_drvdata(pdev, chip);
503 + chip->dev = &pdev->dev;
504 +
505 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
506 + chip->base = devm_ioremap_resource(&pdev->dev, res);
507 + if (IS_ERR(chip->base))
508 + return PTR_ERR(chip->base);
509 +
510 + chip->irq = platform_get_irq(pdev, 0);
511 + if (chip->irq < 0) {
512 + dev_err(&pdev->dev, "No IRQ resource\n");
513 + return chip->irq;
514 + }
515 + ret = devm_request_irq(&pdev->dev, chip->irq, sunxi_rtc_alarmirq,
516 + 0, dev_name(&pdev->dev), chip);
517 + if (ret) {
518 + dev_err(&pdev->dev, "Could not request IRQ\n");
519 + return ret;
520 + }
521 +
522 + of_id = of_match_device(sunxi_rtc_dt_ids, &pdev->dev);
523 + if (!of_id) {
524 + dev_err(&pdev->dev, "Unable to setup RTC data\n");
525 + return -ENODEV;
526 + }
527 + chip->data_year = (struct sunxi_rtc_data_year *) of_id->data;
528 +
529 + /* clear the alarm count value */
530 + writel(0, chip->base + SUNXI_ALRM_DHMS);
531 +
532 + /* disable alarm, not generate irq pending */
533 + writel(0, chip->base + SUNXI_ALRM_EN);
534 +
535 + /* disable alarm week/cnt irq, unset to cpu */
536 + writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
537 +
538 + /* clear alarm week/cnt irq pending */
539 + writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
540 + SUNXI_ALRM_IRQ_STA);
541 +
542 + chip->rtc = rtc_device_register("rtc-sunxi", &pdev->dev,
543 + &sunxi_rtc_ops, THIS_MODULE);
544 + if (IS_ERR(chip->rtc)) {
545 + dev_err(&pdev->dev, "unable to register device\n");
546 + return PTR_ERR(chip->rtc);
547 + }
548 +
549 + dev_info(&pdev->dev, "RTC enabled\n");
550 +
551 + return 0;
552 +}
553 +
554 +static int sunxi_rtc_remove(struct platform_device *pdev)
555 +{
556 + struct sunxi_rtc_dev *chip = platform_get_drvdata(pdev);
557 +
558 + rtc_device_unregister(chip->rtc);
559 +
560 + return 0;
561 +}
562 +
563 +static struct platform_driver sunxi_rtc_driver = {
564 + .probe = sunxi_rtc_probe,
565 + .remove = sunxi_rtc_remove,
566 + .driver = {
567 + .name = "sunxi-rtc",
568 + .owner = THIS_MODULE,
569 + .of_match_table = sunxi_rtc_dt_ids,
570 + },
571 +};
572 +
573 +module_platform_driver(sunxi_rtc_driver);
574 +
575 +MODULE_DESCRIPTION("sunxi RTC driver");
576 +MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
577 +MODULE_LICENSE("GPL");
578 --
579 1.8.5.1
580