sunxi: sun6i-a31 changes - push remaining sun6i patches for 3.13 - enable Colombus...
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.13 / 146-4-dt-sun6i-a31-add-hstimer.patch
1 From 28a9c5d93113cab73dd3a4b4a74a983151c08b9d Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
3 Date: Fri, 20 Dec 2013 22:41:09 +0100
4 Subject: [PATCH] ARM: sun6i: a31: Add support for the High Speed Timers
5
6 The Allwinner A31 has support for four high speed timers. Apart for the
7 number of timers (4 vs 2), it's basically the same logic than the high
8 speed timers found in the sun5i chips.
9
10 Now that we have a driver to support it, we can enable them in the
11 device tree.
12
13 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
14 ---
15 arch/arm/boot/dts/sun6i-a31.dtsi | 11 +++++++++++
16 1 file changed, 11 insertions(+)
17
18 diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
19 index ab6ea43..4b97449 100644
20 --- a/arch/arm/boot/dts/sun6i-a31.dtsi
21 +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
22 @@ -312,6 +312,17 @@
23 status = "disabled";
24 };
25
26 + hstimer@01c60000 {
27 + compatible = "allwinner,sun7i-a20-hstimer";
28 + reg = <0x01c60000 0x1000>;
29 + interrupts = <0 51 4>,
30 + <0 52 4>,
31 + <0 53 4>,
32 + <0 54 4>;
33 + clocks = <&ahb1_gates 19>;
34 + resets = <&ahb1_rst 19>;
35 + };
36 +
37 gic: interrupt-controller@01c81000 {
38 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
39 reg = <0x01c81000 0x1000>,
40 --
41 1.8.5.1
42