target/linux/sunxi/patches-3.13/150-1-dt-sun7i-add-gmac-clock-node.patch

   1 From bc7a0478e6dac1304fdfdb6f3056f438b632da62 Mon Sep 17 00:00:00 2001
   2 From: Chen-Yu Tsai <wens@csie.org>
   3 Date: Mon, 10 Feb 2014 18:35:48 +0800
   4 Subject: [PATCH] ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI
   5
   6 The GMAC uses 1 of 2 sources for its transmit clock, depending on the
   7 PHY interface mode. Add both sources as dummy clocks, and as parents
   8 to the GMAC clock node.
   9
  10 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
  11 ---
  12  arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++
  13  1 file changed, 28 insertions(+)
  14
  15 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
  16 index cefd7ac..7d98edc 100644
  17 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
  18 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
  19 @@ -322,6 +322,34 @@
  20                 };
  21
  22                 /*
  23 +                * The following two are dummy clocks, placeholders used in the gmac_tx
  24 +                * clock. The gmac driver will choose one parent depending on the PHY
  25 +                * interface mode, using clk_set_rate auto-reparenting.
  26 +                * The actual TX clock rate is not controlled by the gmac_tx clock.
  27 +                */
  28 +               mii_phy_tx_clk: clk@2 {
  29 +                       #clock-cells = <0>;
  30 +                       compatible = "fixed-clock";
  31 +                       clock-frequency = <25000000>;
  32 +                       clock-output-names = "mii_phy_tx";
  33 +               };
  34 +
  35 +               gmac_int_tx_clk: clk@3 {
  36 +                       #clock-cells = <0>;
  37 +                       compatible = "fixed-clock";
  38 +                       clock-frequency = <125000000>;
  39 +                       clock-output-names = "gmac_int_tx";
  40 +               };
  41 +
  42 +               gmac_tx_clk: clk@01c20164 {
  43 +                       #clock-cells = <0>;
  44 +                       compatible = "allwinner,sun7i-a20-gmac-clk";
  45 +                       reg = <0x01c20164 0x4>;
  46 +                       clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
  47 +                       clock-output-names = "gmac_tx";
  48 +               };
  49 +
  50 +               /*
  51                  * Dummy clock used by output clocks
  52                  */
  53                 osc24M_32k: clk@1 {
  54 --
  55 1.8.5.5
  56