target/linux/sunxi/patches-3.14/115-dt-sun6i-fix-mod0-compat.patch

   1 From 95c1fe603fbea0fd01d98262bd5ff7d5442a86db Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
   3 Date: Mon, 24 Feb 2014 17:29:06 +0100
   4 Subject: [PATCH] ARM: sun6i: dt: Fix mod0 compatible
   5
   6 The module 0 clock compatibles were changed between the time the patch was sent
   7 and it was merged. Update the compatibles.
   8
   9 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  10 ---
  11  arch/arm/boot/dts/sun6i-a31.dtsi | 8 ++++----
  12  1 file changed, 4 insertions(+), 4 deletions(-)
  13
  14 --- a/arch/arm/boot/dts/sun6i-a31.dtsi
  15 +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
  16 @@ -200,7 +200,7 @@
  17
  18                 spi0_clk: clk@01c200a0 {
  19                         #clock-cells = <0>;
  20 -                       compatible = "allwinner,sun4i-mod0-clk";
  21 +                       compatible = "allwinner,sun4i-a10-mod0-clk";
  22                         reg = <0x01c200a0 0x4>;
  23                         clocks = <&osc24M>, <&pll6>;
  24                         clock-output-names = "spi0";
  25 @@ -208,7 +208,7 @@
  26
  27                 spi1_clk: clk@01c200a4 {
  28                         #clock-cells = <0>;
  29 -                       compatible = "allwinner,sun4i-mod0-clk";
  30 +                       compatible = "allwinner,sun4i-a10-mod0-clk";
  31                         reg = <0x01c200a4 0x4>;
  32                         clocks = <&osc24M>, <&pll6>;
  33                         clock-output-names = "spi1";
  34 @@ -216,7 +216,7 @@
  35
  36                 spi2_clk: clk@01c200a8 {
  37                         #clock-cells = <0>;
  38 -                       compatible = "allwinner,sun4i-mod0-clk";
  39 +                       compatible = "allwinner,sun4i-a10-mod0-clk";
  40                         reg = <0x01c200a8 0x4>;
  41                         clocks = <&osc24M>, <&pll6>;
  42                         clock-output-names = "spi2";
  43 @@ -224,7 +224,7 @@
  44
  45                 spi3_clk: clk@01c200ac {
  46                         #clock-cells = <0>;
  47 -                       compatible = "allwinner,sun4i-mod0-clk";
  48 +                       compatible = "allwinner,sun4i-a10-mod0-clk";
  49                         reg = <0x01c200ac 0x4>;
  50                         clocks = <&osc24M>, <&pll6>;
  51                         clock-output-names = "spi3";