target/linux/sunxi/patches-3.14/183-clk-sunxi-add-usb-clockreg-defs.patch

   1 From c61dfeb17581d32360a817ba40636aaed85caade Mon Sep 17 00:00:00 2001
   2 From: Roman Byshko <rbyshko@gmail.com>
   3 Date: Fri, 7 Feb 2014 16:21:50 +0100
   4 Subject: [PATCH] clk: sunxi: Add USB clock register defintions
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 Add register definitions for the usb-clk register found on sun4i, sun5i and
  10 sun7i SoCs.
  11
  12 Signed-off-by: Roman Byshko <rbyshko@gmail.com>
  13 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
  14 Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  15 Signed-off-by: Emilio López <emilio@elopez.com.ar>
  16 ---
  17  Documentation/devicetree/bindings/clock/sunxi.txt |  5 +++++
  18  drivers/clk/sunxi/clk-sunxi.c                     | 12 ++++++++++++
  19  2 files changed, 17 insertions(+)
  20
  21 --- a/Documentation/devicetree/bindings/clock/sunxi.txt
  22 +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
  23 @@ -37,6 +37,8 @@ Required properties:
  24         "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
  25         "allwinner,sun4i-mod0-clk" - for the module 0 family of clocks
  26         "allwinner,sun7i-a20-out-clk" - for the external output clocks
  27 +       "allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
  28 +       "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
  29
  30  Required properties for all clocks:
  31  - reg : shall be the control register address for the clock.
  32 @@ -49,6 +51,9 @@ Required properties for all clocks:
  33  Additionally, "allwinner,*-gates-clk" clocks require:
  34  - clock-output-names : the corresponding gate names that the clock controls
  35
  36 +And "allwinner,*-usb-clk" clocks also require:
  37 +- reset-cells : shall be set to 1
  38 +
  39  Clock consumers should specify the desired clocks they use with a
  40  "clocks" phandle cell. Consumers that are using a gated clock should
  41  provide an additional ID in their clock property. This ID is the
  42 --- a/drivers/clk/sunxi/clk-sunxi.c
  43 +++ b/drivers/clk/sunxi/clk-sunxi.c
  44 @@ -816,6 +816,16 @@ static const struct gates_data sun7i_a20
  45         .mask = { 0xff80ff },
  46  };
  47
  48 +static const struct gates_data sun4i_a10_usb_gates_data __initconst = {
  49 +       .mask = {0x1C0},
  50 +       .reset_mask = 0x07,
  51 +};
  52 +
  53 +static const struct gates_data sun5i_a13_usb_gates_data __initconst = {
  54 +       .mask = {0x140},
  55 +       .reset_mask = 0x03,
  56 +};
  57 +
  58  static void __init sunxi_gates_clk_setup(struct device_node *node,
  59                                          struct gates_data *data)
  60  {
  61 @@ -1107,6 +1117,8 @@ static const struct of_device_id clk_gat
  62         {.compatible = "allwinner,sun6i-a31-apb1-gates-clk", .data = &sun6i_a31_apb1_gates_data,},
  63         {.compatible = "allwinner,sun7i-a20-apb1-gates-clk", .data = &sun7i_a20_apb1_gates_data,},
  64         {.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,},
  65 +       {.compatible = "allwinner,sun4i-a10-usb-clk", .data = &sun4i_a10_usb_gates_data,},
  66 +       {.compatible = "allwinner,sun5i-a13-usb-clk", .data = &sun5i_a13_usb_gates_data,},
  67         {}
  68  };
  69