oxnas: delete linux 4.1 support
[openwrt/openwrt.git] / target / linux / sunxi / patches-4.1 / 164-2-dt-add-codec-clock-into-dtsi.patch
1 From b404f3daca1807a74e07180397c6e85046b7a5cd Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Fri, 18 Jul 2014 15:58:58 -0300
4 Subject: [PATCH] ARM: sunxi: Add codec clock support
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 This commit adds the codec clock definition to the sun4i, sun5i and
10 sun7i device trees. The codec clock is used in the analog codec block.
11
12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
13 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
14 ---
15 arch/arm/boot/dts/sun4i-a10.dtsi | 8 ++++++++
16 arch/arm/boot/dts/sun5i.dtsi | 8 ++++++++
17 arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
18 3 files changed, 24 insertions(+)
19
20 --- a/arch/arm/boot/dts/sun4i-a10.dtsi
21 +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
22 @@ -420,6 +420,14 @@
23 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
24 clock-output-names = "spi3";
25 };
26 +
27 + codec_clk: clk@01c20140 {
28 + #clock-cells = <0>;
29 + compatible = "allwinner,sun4i-a10-codec-clk";
30 + reg = <0x01c20140 0x4>;
31 + clocks = <&pll2 0>;
32 + clock-output-names = "codec";
33 + };
34 };
35
36 soc@01c00000 {
37 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
38 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
39 @@ -350,6 +350,14 @@
40 clock-output-names = "usb_ohci0", "usb_phy";
41 };
42
43 + codec_clk: clk@01c20140 {
44 + #clock-cells = <0>;
45 + compatible = "allwinner,sun4i-a10-codec-clk";
46 + reg = <0x01c20140 0x4>;
47 + clocks = <&pll2 0>;
48 + clock-output-names = "codec";
49 + };
50 +
51 mbus_clk: clk@01c2015c {
52 #clock-cells = <0>;
53 compatible = "allwinner,sun5i-a13-mbus-clk";
54 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
55 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
56 @@ -464,6 +464,14 @@
57 clock-output-names = "spi3";
58 };
59
60 + codec_clk: clk@01c20140 {
61 + #clock-cells = <0>;
62 + compatible = "allwinner,sun4i-a10-codec-clk";
63 + reg = <0x01c20140 0x4>;
64 + clocks = <&pll2 0>;
65 + clock-output-names = "codec";
66 + };
67 +
68 mbus_clk: clk@01c2015c {
69 #clock-cells = <0>;
70 compatible = "allwinner,sun5i-a13-mbus-clk";