sunxi: initial 4.4 support
[openwrt/openwrt.git] / target / linux / sunxi / patches-4.4 / 111-2-dt-sun7i-add-ve-clock-module.patch
1 From f0571ab140723f9a898d4a404118580534dcc468 Mon Sep 17 00:00:00 2001
2 From: Chen-Yu Tsai <wens@csie.org>
3 Date: Sat, 5 Dec 2015 21:16:47 +0800
4 Subject: [PATCH] ARM: dts: sun7i: Add VE (Video Engine) module clock node
5
6 The video engine has its own module clock, which also includes a
7 reset control for it.
8
9 Signed-off-by: Chen-Yu Tsai <wens@csie.org>
10 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
11 ---
12 arch/arm/boot/dts/sun7i-a20.dtsi | 9 +++++++++
13 1 file changed, 9 insertions(+)
14
15 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
16 index 21169c0..0940a78 100644
17 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
18 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
19 @@ -527,6 +527,15 @@
20 "dram_de_mp", "dram_ace";
21 };
22
23 + ve_clk: clk@01c2013c {
24 + #clock-cells = <0>;
25 + #reset-cells = <0>;
26 + compatible = "allwinner,sun4i-a10-ve-clk";
27 + reg = <0x01c2013c 0x4>;
28 + clocks = <&pll4>;
29 + clock-output-names = "ve";
30 + };
31 +
32 codec_clk: clk@01c20140 {
33 #clock-cells = <0>;
34 compatible = "allwinner,sun4i-a10-codec-clk";