zynq: add support for the Zybo Z7 board
[openwrt/openwrt.git] / target / linux / zynq / patches-4.14 / 020-v4.17-add-digilent-zybo-z7-board.patch
1 From ba5c7a032c2ae66d5467820daab898e5f9048405 Mon Sep 17 00:00:00 2001
2 From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu@cybertrust.co.jp>
3 Date: Wed, 28 Feb 2018 11:25:52 +0900
4 Subject: [PATCH] arm: dts: zynq: Add Digilent Zybo Z7 board
5
6 This add a DTS for the Digilent Zybo Z7 board.
7 This board is the successor board of Zybo, these are almost the same except
8 for ps-clk-frequency specifications.
9
10 Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu@cybertrust.co.jp>
11 Reviewed-by: Rob Herring <robh@kernel.org>
12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
13 ---
14 Modifications:
15 - Removed changes to file Documentation/devicetree/bindings/arm/xilinx.txt
16 ---
17 arch/arm/boot/dts/Makefile | 3 +-
18 arch/arm/boot/dts/zynq-zybo-z7.dts | 58 +++++++++++++++++++
19 2 files changed, 60 insertions(+), 1 deletion(-)
20 create mode 100644 arch/arm/boot/dts/zynq-zybo-z7.dts
21
22 --- a/arch/arm/boot/dts/Makefile
23 +++ b/arch/arm/boot/dts/Makefile
24 @@ -1006,7 +1006,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
25 zynq-zc702.dtb \
26 zynq-zc706.dtb \
27 zynq-zed.dtb \
28 - zynq-zybo.dtb
29 + zynq-zybo.dtb \
30 + zynq-zybo-z7.dtb
31 dtb-$(CONFIG_MACH_ARMADA_370) += \
32 armada-370-db.dtb \
33 armada-370-dlink-dns327l.dtb \
34 --- /dev/null
35 +++ b/arch/arm/boot/dts/zynq-zybo-z7.dts
36 @@ -0,0 +1,58 @@
37 +// SPDX-License-Identifier: GPL-2.0+
38 +/dts-v1/;
39 +#include "zynq-7000.dtsi"
40 +
41 +/ {
42 + model = "Zynq ZYBO Z7 Development Board";
43 + compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
44 +
45 + aliases {
46 + ethernet0 = &gem0;
47 + serial0 = &uart1;
48 + };
49 +
50 + memory@0 {
51 + device_type = "memory";
52 + reg = <0x0 0x20000000>;
53 + };
54 +
55 + chosen {
56 + bootargs = "";
57 + stdout-path = "serial0:115200n8";
58 + };
59 +
60 + usb_phy0: phy0 {
61 + #phy-cells = <0>;
62 + compatible = "usb-nop-xceiv";
63 + reset-gpios = <&gpio0 46 1>;
64 + };
65 +};
66 +
67 +&clkc {
68 + ps-clk-frequency = <33333333>;
69 +};
70 +
71 +&gem0 {
72 + status = "okay";
73 + phy-mode = "rgmii-id";
74 + phy-handle = <&ethernet_phy>;
75 +
76 + ethernet_phy: ethernet-phy@0 {
77 + reg = <0>;
78 + device_type = "ethernet-phy";
79 + };
80 +};
81 +
82 +&sdhci0 {
83 + status = "okay";
84 +};
85 +
86 +&uart1 {
87 + status = "okay";
88 +};
89 +
90 +&usb0 {
91 + status = "okay";
92 + dr_mode = "host";
93 + usb-phy = <&usb_phy0>;
94 +};