musl: add powerpc soft-float support
[openwrt/openwrt.git] / toolchain / musl / patches / 010-Add-PowerPC-soft-float-support.patch
1 From: Felix Fietkau <nbd@openwrt.org>
2 Date: Wed, 8 Jul 2015 13:56:37 +0200
3 Subject: [PATCH] Add PowerPC soft-float support
4
5 Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
6 instruction set for floating point operations (SPE).
7 Executing regular PowerPC floating point instructions results in
8 "Illegal instruction" errors.
9
10 Until support for SPE FPU is added, make it possible to run these
11 devices in soft-float mode.
12
13 Signed-off-by: Felix Fietkau <nbd@openwrt.org>
14 ---
15 create mode 100644 src/fenv/powerpc-sf/fenv.sub
16 create mode 100644 src/setjmp/powerpc-sf/longjmp.s
17 create mode 100644 src/setjmp/powerpc-sf/longjmp.sub
18 create mode 100644 src/setjmp/powerpc-sf/setjmp.s
19 create mode 100644 src/setjmp/powerpc-sf/setjmp.sub
20
21 --- a/configure
22 +++ b/configure
23 @@ -498,6 +498,10 @@ trycppif "_MIPSEL || __MIPSEL || __MIPSE
24 trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
25 fi
26
27 +if test "$ARCH" = "powerpc" ; then
28 +trycppif _SOFT_FLOAT "$t" && SUBARCH=${SUBARCH}-sf
29 +fi
30 +
31 test "$ARCH" = "microblaze" && trycppif __MICROBLAZEEL__ "$t" \
32 && SUBARCH=${SUBARCH}el
33
34 --- /dev/null
35 +++ b/src/fenv/powerpc-sf/fenv.sub
36 @@ -0,0 +1 @@
37 +../fenv.c
38 --- /dev/null
39 +++ b/src/setjmp/powerpc-sf/longjmp.s
40 @@ -0,0 +1,47 @@
41 + .global _longjmp
42 + .global longjmp
43 + .type _longjmp,@function
44 + .type longjmp,@function
45 +_longjmp:
46 +longjmp:
47 +# void longjmp(jmp_buf env, int val);
48 +# put val into return register and restore the env saved in setjmp
49 +# if val(r4) is 0, put 1 there.
50 + # 0) move old return address into r0
51 + lwz 0, 0(3)
52 + # 1) put it into link reg
53 + mtlr 0
54 + #2 ) restore stack ptr
55 + lwz 1, 4(3)
56 + #3) restore control reg
57 + lwz 0, 8(3)
58 + mtcr 0
59 + #4) restore r14-r31
60 + lwz 14, 12(3)
61 + lwz 15, 16(3)
62 + lwz 16, 20(3)
63 + lwz 17, 24(3)
64 + lwz 18, 28(3)
65 + lwz 19, 32(3)
66 + lwz 20, 36(3)
67 + lwz 21, 40(3)
68 + lwz 22, 44(3)
69 + lwz 23, 48(3)
70 + lwz 24, 52(3)
71 + lwz 25, 56(3)
72 + lwz 26, 60(3)
73 + lwz 27, 64(3)
74 + lwz 28, 68(3)
75 + lwz 29, 72(3)
76 + lwz 30, 76(3)
77 + lwz 31, 80(3)
78 + #5) put val into return reg r3
79 + mr 3, 4
80 +
81 + #6) check if return value is 0, make it 1 in that case
82 + cmpwi cr7, 4, 0
83 + bne cr7, 1f
84 + li 3, 1
85 +1:
86 + blr
87 +
88 --- /dev/null
89 +++ b/src/setjmp/powerpc-sf/longjmp.sub
90 @@ -0,0 +1 @@
91 +longjmp.s
92 --- /dev/null
93 +++ b/src/setjmp/powerpc-sf/setjmp.s
94 @@ -0,0 +1,43 @@
95 + .global ___setjmp
96 + .hidden ___setjmp
97 + .global __setjmp
98 + .global _setjmp
99 + .global setjmp
100 + .type __setjmp,@function
101 + .type _setjmp,@function
102 + .type setjmp,@function
103 +___setjmp:
104 +__setjmp:
105 +_setjmp:
106 +setjmp:
107 + # 0) store IP int 0, then into the jmpbuf pointed to by r3 (first arg)
108 + mflr 0
109 + stw 0, 0(3)
110 + # 1) store reg1 (SP)
111 + stw 1, 4(3)
112 + # 2) store cr
113 + mfcr 0
114 + stw 0, 8(3)
115 + # 3) store r14-31
116 + stw 14, 12(3)
117 + stw 15, 16(3)
118 + stw 16, 20(3)
119 + stw 17, 24(3)
120 + stw 18, 28(3)
121 + stw 19, 32(3)
122 + stw 20, 36(3)
123 + stw 21, 40(3)
124 + stw 22, 44(3)
125 + stw 23, 48(3)
126 + stw 24, 52(3)
127 + stw 25, 56(3)
128 + stw 26, 60(3)
129 + stw 27, 64(3)
130 + stw 28, 68(3)
131 + stw 29, 72(3)
132 + stw 30, 76(3)
133 + stw 31, 80(3)
134 + # 4) set return value to 0
135 + li 3, 0
136 + # 5) return
137 + blr
138 --- /dev/null
139 +++ b/src/setjmp/powerpc-sf/setjmp.sub
140 @@ -0,0 +1 @@
141 +setjmp.s