/*
* Atheros AR71xx SoC platform devices
*
+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
- * Parts of this file are based on Atheros' 2.6.15 BSP
+ * Parts of this file are based on Atheros 2.6.15 BSP
+ * Parts of this file are based on Atheros 2.6.31 BSP
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
-#include <linux/dma-mapping.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <asm/mach-ar71xx/ar71xx.h>
+#include <asm/mach-ar71xx/ar933x_uart_platform.h>
#include "devices.h"
-static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
-
-/*
- * OHCI (USB full speed host controller)
- */
-static struct resource ar71xx_ohci_resources[] = {
- [0] = {
- .start = AR71XX_OHCI_BASE,
- .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = AR71XX_MISC_IRQ_OHCI,
- .end = AR71XX_MISC_IRQ_OHCI,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct resource ar7240_ohci_resources[] = {
- [0] = {
- .start = AR7240_OHCI_BASE,
- .end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = AR71XX_CPU_IRQ_USB,
- .end = AR71XX_CPU_IRQ_USB,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
-static struct platform_device ar71xx_ohci_device = {
- .name = "ar71xx-ohci",
- .id = -1,
- .resource = ar71xx_ohci_resources,
- .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
- .dev = {
- .dma_mask = &ar71xx_ohci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- },
-};
-
-/*
- * EHCI (USB full speed host controller)
- */
-static struct resource ar71xx_ehci_resources[] = {
- [0] = {
- .start = AR71XX_EHCI_BASE,
- .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = AR71XX_CPU_IRQ_USB,
- .end = AR71XX_CPU_IRQ_USB,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-
-static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
-static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
-
-static struct platform_device ar71xx_ehci_device = {
- .name = "ar71xx-ehci",
- .id = -1,
- .resource = ar71xx_ehci_resources,
- .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
- .dev = {
- .dma_mask = &ar71xx_ehci_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &ar71xx_ehci_data,
- },
-};
-
-#define AR71XX_USB_RESET_MASK \
- (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
- | RESET_MODULE_USB_OHCI_DLL)
-
-#define AR7240_USB_RESET_MASK \
- (RESET_MODULE_USB_HOST | RESET_MODULE_USB_OHCI_DLL_7240)
-
-static void __init ar71xx_usb_setup(void)
-{
- ar71xx_device_stop(AR71XX_USB_RESET_MASK);
- mdelay(1000);
- ar71xx_device_start(AR71XX_USB_RESET_MASK);
-
- /* Turning on the Buff and Desc swap bits */
- ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
-
- /* WAR for HW bug. Here it adjusts the duration between two SOFS */
- ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
-
- mdelay(900);
-}
-
-static void __init ar7240_usb_setup(void)
-{
- ar71xx_ohci_device.resource = ar7240_ohci_resources;
-
- ar71xx_device_stop(AR7240_USB_RESET_MASK);
- mdelay(1000);
- ar71xx_device_start(AR7240_USB_RESET_MASK);
-
- /* WAR for HW bug. Here it adjusts the duration between two SOFS */
- ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
-}
-
-static void __init ar91xx_usb_setup(void)
-{
- ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
- mdelay(10);
-
- ar71xx_device_start(RESET_MODULE_USB_HOST);
- mdelay(10);
-
- ar71xx_device_start(RESET_MODULE_USB_PHY);
- mdelay(10);
-}
-
-void __init ar71xx_add_device_usb(void)
-{
- switch (ar71xx_soc) {
- case AR71XX_SOC_AR7240:
- ar7240_usb_setup();
- platform_device_register(&ar71xx_ohci_device);
- break;
-
- case AR71XX_SOC_AR7130:
- case AR71XX_SOC_AR7141:
- case AR71XX_SOC_AR7161:
- ar71xx_usb_setup();
- platform_device_register(&ar71xx_ohci_device);
- platform_device_register(&ar71xx_ehci_device);
- break;
-
- case AR71XX_SOC_AR9130:
- case AR71XX_SOC_AR9132:
- ar91xx_usb_setup();
- ar71xx_ehci_data.is_ar91xx = 1;
- platform_device_register(&ar71xx_ehci_device);
- break;
-
- default:
- BUG();
- }
-}
+unsigned char ar71xx_mac_base[ETH_ALEN] __initdata;
static struct resource ar71xx_uart_resources[] = {
{
},
};
+static struct resource ar933x_uart_resources[] = {
+ {
+ .start = AR933X_UART_BASE,
+ .end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = AR71XX_MISC_IRQ_UART,
+ .end = AR71XX_MISC_IRQ_UART,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct ar933x_uart_platform_data ar933x_uart_data;
+static struct platform_device ar933x_uart_device = {
+ .name = "ar933x-uart",
+ .id = -1,
+ .resource = ar933x_uart_resources,
+ .num_resources = ARRAY_SIZE(ar933x_uart_resources),
+ .dev = {
+ .platform_data = &ar933x_uart_data,
+ },
+};
+
void __init ar71xx_add_device_uart(void)
{
- ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
- platform_device_register(&ar71xx_uart_device);
+ struct platform_device *pdev;
+
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7130:
+ case AR71XX_SOC_AR7141:
+ case AR71XX_SOC_AR7161:
+ case AR71XX_SOC_AR7240:
+ case AR71XX_SOC_AR7241:
+ case AR71XX_SOC_AR7242:
+ case AR71XX_SOC_AR9130:
+ case AR71XX_SOC_AR9132:
+ pdev = &ar71xx_uart_device;
+ ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
+ break;
+
+ case AR71XX_SOC_AR9330:
+ case AR71XX_SOC_AR9331:
+ pdev = &ar933x_uart_device;
+ ar933x_uart_data.uartclk = ar71xx_ahb_freq;
+ break;
+
+ case AR71XX_SOC_AR9341:
+ case AR71XX_SOC_AR9342:
+ case AR71XX_SOC_AR9344:
+ pdev = &ar71xx_uart_device;
+ ar71xx_uart_data[0].uartclk = ar71xx_ref_freq;
+ break;
+
+ default:
+ BUG();
+ }
+
+ platform_device_register(pdev);
}
static struct resource ar71xx_mdio_resources[] = {
static struct ag71xx_mdio_platform_data ar71xx_mdio_data;
-static struct platform_device ar71xx_mdio_device = {
+struct platform_device ar71xx_mdio_device = {
.name = "ag71xx-mdio",
.id = -1,
.resource = ar71xx_mdio_resources,
},
};
-void __init ar71xx_add_device_mdio(u32 phy_mask)
-{
- if (ar71xx_soc == AR71XX_SOC_AR7240)
- ar71xx_mdio_data.is_ar7240 = 1;
-
- ar71xx_mdio_data.phy_mask = phy_mask;
-
- platform_device_register(&ar71xx_mdio_device);
-}
-
static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
{
void __iomem *base;
iounmap(base);
}
+void __init ar71xx_add_device_mdio(u32 phy_mask)
+{
+ switch (ar71xx_soc) {
+ case AR71XX_SOC_AR7240:
+ ar71xx_mdio_data.is_ar7240 = 1;
+ break;
+ case AR71XX_SOC_AR7241:
+ ar71xx_mdio_data.is_ar7240 = 1;
+ ar71xx_mdio_resources[0].start = AR71XX_GE1_BASE;
+ ar71xx_mdio_resources[0].end = AR71XX_GE1_BASE + 0x200 - 1;
+ break;
+ case AR71XX_SOC_AR7242:
+ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG,
+ AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000,
+ AR71XX_ETH0_PLL_SHIFT);
+ break;
+ case AR71XX_SOC_AR9330:
+ case AR71XX_SOC_AR9331:
+ ar71xx_mdio_data.is_ar7240 = 1;
+ ar71xx_mdio_resources[0].start = AR71XX_GE1_BASE;
+ ar71xx_mdio_resources[0].end = AR71XX_GE1_BASE + 0x200 - 1;
+ break;
+ default:
+ break;
+ }
+
+ ar71xx_mdio_data.phy_mask = phy_mask;
+
+ platform_device_register(&ar71xx_mdio_device);
+}
+
struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
/* TODO */
}
+static void ar7242_set_pll_ge0(int speed)
+{
+ u32 val = ar71xx_get_eth_pll(0, speed);
+
+ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR7242_PLL_REG_ETH0_INT_CLOCK,
+ val, AR71XX_ETH0_PLL_SHIFT);
+}
+
static void ar91xx_set_pll_ge0(int speed)
{
u32 val = ar71xx_get_eth_pll(0, speed);
val, AR91XX_ETH1_PLL_SHIFT);
}
+static void ar933x_set_pll_ge0(int speed)
+{
+ /* TODO */
+}
+
+static void ar933x_set_pll_ge1(int speed)
+{
+ /* TODO */
+}
+
static void ar71xx_ddr_flush_ge0(void)
{
ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
}
+static void ar933x_ddr_flush_ge0(void)
+{
+ ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE0);
+}
+
+static void ar933x_ddr_flush_ge1(void)
+{
+ ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE1);
+}
+
static struct resource ar71xx_eth0_resources[] = {
{
.name = "mac_base",
.reset_bit = RESET_MODULE_GE0_MAC,
};
-static struct platform_device ar71xx_eth0_device = {
+struct platform_device ar71xx_eth0_device = {
.name = "ag71xx",
.id = 0,
.resource = ar71xx_eth0_resources,
.reset_bit = RESET_MODULE_GE1_MAC,
};
-static struct platform_device ar71xx_eth1_device = {
+struct platform_device ar71xx_eth1_device = {
.name = "ag71xx",
.id = 1,
.resource = ar71xx_eth1_resources,
#define AR724X_PLL_VAL_100 0x00001099
#define AR724X_PLL_VAL_10 0x00991099
+#define AR7242_PLL_VAL_1000 0x1c000000
+#define AR7242_PLL_VAL_100 0x00000101
+#define AR7242_PLL_VAL_10 0x00001616
+
#define AR91XX_PLL_VAL_1000 0x1a000000
#define AR91XX_PLL_VAL_100 0x13000a44
#define AR91XX_PLL_VAL_10 0x00441099
+#define AR933X_PLL_VAL_1000 0x00110000
+#define AR933X_PLL_VAL_100 0x00001099
+#define AR933X_PLL_VAL_10 0x00991099
+
static void __init ar71xx_init_eth_pll_data(unsigned int id)
{
struct ar71xx_eth_pll_data *pll_data;
break;
case AR71XX_SOC_AR7240:
+ case AR71XX_SOC_AR7241:
pll_10 = AR724X_PLL_VAL_10;
pll_100 = AR724X_PLL_VAL_100;
pll_1000 = AR724X_PLL_VAL_1000;
break;
+ case AR71XX_SOC_AR7242:
+ pll_10 = AR7242_PLL_VAL_10;
+ pll_100 = AR7242_PLL_VAL_100;
+ pll_1000 = AR7242_PLL_VAL_1000;
+ break;
+
case AR71XX_SOC_AR9130:
case AR71XX_SOC_AR9132:
pll_10 = AR91XX_PLL_VAL_10;
pll_100 = AR91XX_PLL_VAL_100;
pll_1000 = AR91XX_PLL_VAL_1000;
break;
+
+ case AR71XX_SOC_AR9330:
+ case AR71XX_SOC_AR9331:
+ pll_10 = AR933X_PLL_VAL_10;
+ pll_100 = AR933X_PLL_VAL_100;
+ pll_1000 = AR933X_PLL_VAL_1000;
+ break;
+
default:
BUG();
}
pdata->has_gbit = 1;
break;
+ case AR71XX_SOC_AR7242:
+ ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO;
+ ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO;
+ pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
+ : ar724x_ddr_flush_ge0;
+ pdata->set_pll = id ? ar724x_set_pll_ge1
+ : ar7242_set_pll_ge0;
+ pdata->has_gbit = 1;
+ pdata->is_ar724x = 1;
+
+ if (!pdata->fifo_cfg1)
+ pdata->fifo_cfg1 = 0x0010ffff;
+ if (!pdata->fifo_cfg2)
+ pdata->fifo_cfg2 = 0x015500aa;
+ if (!pdata->fifo_cfg3)
+ pdata->fifo_cfg3 = 0x01f00140;
+ break;
+
+ case AR71XX_SOC_AR7241:
+ ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO;
+ ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO;
+ /* fall through */
case AR71XX_SOC_AR7240:
pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
: ar724x_ddr_flush_ge0;
pdata->set_pll = id ? ar724x_set_pll_ge1
: ar724x_set_pll_ge0;
pdata->is_ar724x = 1;
+
+ if (!pdata->fifo_cfg1)
+ pdata->fifo_cfg1 = 0x0010ffff;
+ if (!pdata->fifo_cfg2)
+ pdata->fifo_cfg2 = 0x015500aa;
+ if (!pdata->fifo_cfg3)
+ pdata->fifo_cfg3 = 0x01f00140;
break;
case AR71XX_SOC_AR9130:
pdata->has_gbit = 1;
break;
+ case AR71XX_SOC_AR9330:
+ case AR71XX_SOC_AR9331:
+ ar71xx_eth0_data.reset_bit = AR933X_RESET_GE0_MAC |
+ AR933X_RESET_GE0_MDIO;
+ ar71xx_eth1_data.reset_bit = AR933X_RESET_GE1_MAC |
+ AR933X_RESET_GE1_MDIO;
+ pdata->ddr_flush = id ? ar933x_ddr_flush_ge1
+ : ar933x_ddr_flush_ge0;
+ pdata->set_pll = id ? ar933x_set_pll_ge1
+ : ar933x_set_pll_ge0;
+ pdata->has_gbit = 1;
+ pdata->is_ar724x = 1;
+
+ if (!pdata->fifo_cfg1)
+ pdata->fifo_cfg1 = 0x0010ffff;
+ if (!pdata->fifo_cfg2)
+ pdata->fifo_cfg2 = 0x015500aa;
+ if (!pdata->fifo_cfg3)
+ pdata->fifo_cfg3 = 0x01f00140;
+ break;
+
default:
BUG();
}
break;
}
- if (is_valid_ether_addr(ar71xx_mac_base)) {
- memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
- pdata->mac_addr[5] += ar71xx_eth_instance;
- } else {
+ if (!is_valid_ether_addr(pdata->mac_addr)) {
random_ether_addr(pdata->mac_addr);
printk(KERN_DEBUG
"ar71xx: using random MAC address for eth%d\n",
"\"%s\"\n", mac_str);
}
-static struct platform_device ar71xx_dsa_switch_device = {
- .name = "dsa",
- .id = 0,
-};
+static int __init ar71xx_ethaddr_setup(char *str)
+{
+ ar71xx_parse_mac_addr(str);
+ return 1;
+}
+__setup("ethaddr=", ar71xx_ethaddr_setup);
-void __init ar71xx_add_device_dsa(unsigned int id,
- struct dsa_platform_data *d)
+static int __init ar71xx_kmac_setup(char *str)
{
- int i;
+ ar71xx_parse_mac_addr(str);
+ return 1;
+}
+__setup("kmac=", ar71xx_kmac_setup);
- switch (id) {
- case 0:
- d->netdev = &ar71xx_eth0_device.dev;
- break;
- case 1:
- d->netdev = &ar71xx_eth1_device.dev;
- break;
- default:
- printk(KERN_ERR
- "ar71xx: invalid ethernet id %d for DSA switch\n",
- id);
+void __init ar71xx_init_mac(unsigned char *dst, const unsigned char *src,
+ unsigned offset)
+{
+ u32 t;
+
+ if (!is_valid_ether_addr(src)) {
+ memset(dst, '\0', ETH_ALEN);
return;
}
- for (i = 0; i < d->nr_chips; i++)
- d->chip[i].mii_bus = &ar71xx_mdio_device.dev;
-
- ar71xx_dsa_switch_device.dev.platform_data = d;
+ t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]);
+ t += offset;
- platform_device_register(&ar71xx_dsa_switch_device);
+ dst[0] = src[0];
+ dst[1] = src[1];
+ dst[2] = src[2];
+ dst[3] = (t >> 16) & 0xff;
+ dst[4] = (t >> 8) & 0xff;
+ dst[5] = t & 0xff;
}
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