#include <linux/sizes.h>
#include <linux/of_net.h>
#include <linux/of_address.h>
+#include <linux/of_platform.h>
#include "ag71xx.h"
#define AG71XX_DEFAULT_MSG_ENABLE \
ag71xx_rr(ag, AG71XX_REG_RX_STATUS));
}
+static void ag71xx_dump_regs(struct ag71xx *ag)
+{
+ DBG("%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n",
+ ag->dev->name,
+ ag71xx_rr(ag, AG71XX_REG_MAC_CFG1),
+ ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
+ ag71xx_rr(ag, AG71XX_REG_MAC_IPG),
+ ag71xx_rr(ag, AG71XX_REG_MAC_HDX),
+ ag71xx_rr(ag, AG71XX_REG_MAC_MFL));
+ DBG("%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n",
+ ag->dev->name,
+ ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
+ ag71xx_rr(ag, AG71XX_REG_MAC_ADDR1),
+ ag71xx_rr(ag, AG71XX_REG_MAC_ADDR2));
+ DBG("%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n",
+ ag->dev->name,
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
+ DBG("%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n",
+ ag->dev->name,
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
+}
+
static inline void ag71xx_dump_intr(struct ag71xx *ag, char *label, u32 intr)
{
DBG("%s: %s intr=%08x %s%s%s%s%s%s\n",
{
ag71xx_hw_stop(ag);
- if (ag->phy_reset) {
- reset_control_assert(ag->phy_reset);
- msleep(50);
- reset_control_deassert(ag->phy_reset);
- msleep(200);
- }
-
ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
udelay(20);
udelay(100);
}
+static void ath79_mii_ctrl_set_if(struct ag71xx *ag, unsigned int mii_if)
+{
+ u32 t;
+
+ t = __raw_readl(ag->mii_base);
+ t &= ~(AR71XX_MII_CTRL_IF_MASK);
+ t |= (mii_if & AR71XX_MII_CTRL_IF_MASK);
+ __raw_writel(t, ag->mii_base);
+}
+
+static void ath79_mii0_ctrl_set_if(struct ag71xx *ag)
+{
+ unsigned int mii_if;
+
+ switch (ag->phy_if_mode) {
+ case PHY_INTERFACE_MODE_MII:
+ mii_if = AR71XX_MII0_CTRL_IF_MII;
+ break;
+ case PHY_INTERFACE_MODE_GMII:
+ mii_if = AR71XX_MII0_CTRL_IF_GMII;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ mii_if = AR71XX_MII0_CTRL_IF_RGMII;
+ break;
+ case PHY_INTERFACE_MODE_RMII:
+ mii_if = AR71XX_MII0_CTRL_IF_RMII;
+ break;
+ default:
+ WARN(1, "Impossible PHY mode defined.\n");
+ return;
+ }
+
+ ath79_mii_ctrl_set_if(ag, mii_if);
+}
+
+static void ath79_mii1_ctrl_set_if(struct ag71xx *ag)
+{
+ unsigned int mii_if;
+
+ switch (ag->phy_if_mode) {
+ case PHY_INTERFACE_MODE_RMII:
+ mii_if = AR71XX_MII1_CTRL_IF_RMII;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ mii_if = AR71XX_MII1_CTRL_IF_RGMII;
+ break;
+ default:
+ WARN(1, "Impossible PHY mode defined.\n");
+ return;
+ }
+
+ ath79_mii_ctrl_set_if(ag, mii_if);
+}
+
static void ath79_mii_ctrl_set_speed(struct ag71xx *ag)
{
unsigned int mii_speed;
}
t = __raw_readl(ag->mii_base);
- t &= ~(AR71XX_MII_CTRL_IF_MASK);
- t |= (mii_speed & AR71XX_MII_CTRL_IF_MASK);
+ t &= ~(AR71XX_MII_CTRL_SPEED_MASK << AR71XX_MII_CTRL_SPEED_SHIFT);
+ t |= mii_speed << AR71XX_MII_CTRL_SPEED_SHIFT;
__raw_writel(t, ag->mii_base);
}
ag71xx_speed_str(ag),
(DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
- DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
- ag->dev->name,
- ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
- ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
- ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
-
- DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
- ag->dev->name,
- ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
- ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
- ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
-
- DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x\n",
- ag->dev->name,
- ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
- ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL));
+ ag71xx_dump_regs(ag);
}
void ag71xx_link_adjust(struct ag71xx *ag)
static int ag71xx_stop(struct net_device *dev)
{
+ unsigned long flags;
struct ag71xx *ag = netdev_priv(dev);
netif_carrier_off(dev);
phy_stop(ag->phy_dev);
+
+ spin_lock_irqsave(&ag->lock, flags);
+ if (ag->link) {
+ ag->link = 0;
+ ag71xx_link_adjust(ag);
+ }
+ spin_unlock_irqrestore(&ag->lock, flags);
+
ag71xx_hw_disable(ag);
return 0;
static int ag71xx_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
+ struct device_node *mdio_node;
struct net_device *dev;
struct resource *res;
struct ag71xx *ag;
goto err_free;
}
- ag->phy_reset = devm_reset_control_get_optional(&pdev->dev, "phy");
-
if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) {
if (of_device_is_compatible(np, "qca,ar9130-eth") ||
of_device_is_compatible(np, "qca,ar7100-eth")) {
goto err_free;
}
+ if (of_property_read_u32(np, "qca,mac-idx", &ag->mac_idx))
+ ag->mac_idx = -1;
+ if (ag->mii_base)
+ switch (ag->mac_idx) {
+ case 0:
+ ath79_mii0_ctrl_set_if(ag);
+ break;
+ case 1:
+ ath79_mii1_ctrl_set_if(ag);
+ break;
+ default:
+ break;
+ }
+
netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT);
+ ag71xx_dump_regs(ag);
+
ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, 0);
+
ag71xx_hw_init(ag);
- ag71xx_mdio_init(ag);
+
+ ag71xx_dump_regs(ag);
+
+ if (!of_device_is_compatible(np, "simple-mfd")) {
+ mdio_node = of_get_child_by_name(np, "mdio-bus");
+ if (!IS_ERR(mdio_node))
+ of_platform_device_create(mdio_node, NULL, NULL);
+ }
err = ag71xx_phy_connect(ag);
if (err)
- goto err_mdio_free;
+ goto err_free;
err = ag71xx_debugfs_init(ag);
if (err)
err_phy_disconnect:
ag71xx_phy_disconnect(ag);
-err_mdio_free:
- ag71xx_mdio_cleanup(ag);
err_free:
free_netdev(dev);
return err;
ag = netdev_priv(dev);
ag71xx_debugfs_exit(ag);
ag71xx_phy_disconnect(ag);
- ag71xx_mdio_cleanup(ag);
unregister_netdev(dev);
free_irq(dev->irq, dev);
iounmap(ag->mac_base);