fixes reset button on atheros platform, ar5312 gpio_irqs will be added later

[openwrt/openwrt.git] / target / linux / atheros / files / include / asm-mips / mach-atheros / ar531x.h

diff --git a/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h b/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h
index c77d74ec9f9f9d0b4205c1e33a20c00ceb85e394..8148b76fba12d037bfa0a2e66ca96add987f9602 100644 (file)
--- a/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h
+++ b/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h
@@ -12,29 +12,6 @@ extern void (*board_time_init)(void);
 #endif
 
 /*
- * C access to CLZ instruction
- * (count leading zeroes).
- */
-static inline int clz(unsigned long val)
-{
-       int ret;
-
-       __asm__ volatile (
-               ".set\tnoreorder\n\t"
-               ".set\tnoat\n\t"
-               ".set\tmips32\n\t"
-               "clz\t%0,%1\n\t"
-               ".set\tmips0\n\t"
-               ".set\tat\n\t"
-               ".set\treorder"
-               : "=r" (ret)
-               : "r" (val)
-       );
-       
-       return ret;
-}
-
-/*                                                                             
  * Atheros CPUs before the AR2315 are using MIPS 4Kc core, later designs are
  * using MIPS 4KEc R2 core. This makes it easy to determine the board at runtime.
  */
@@ -77,7 +54,7 @@ static inline int clz(unsigned long val)
 
 /* GPIO Interrupts [0..7], share AR531X_MISC_IRQ_GPIO */
 #define AR531X_GPIO_IRQ_NONE            AR531X_GPIO_IRQ_BASE+0
-#define AR531X_GPIO_IRQ(n)              AR531X_GPIO_IRQ_BASE+(n)+1
+#define AR531X_GPIO_IRQ(n)              AR531X_GPIO_IRQ_BASE+n
 #define AR531X_GPIO_IRQ_COUNT           22
 
 #define sysRegRead(phys)       \
@@ -157,7 +134,7 @@ extern void ar5315_pci_irq(int irq);
 static inline u32 sysRegMask(u32 phys, u32 mask, u32 value)
 {
        u32 reg;
-       
+
        reg = sysRegRead(phys);
        reg &= ~mask;
        reg |= value & mask;