atheros: ar2315-pci: remove odd locking in PCI config space access function

[openwrt/openwrt.git] / target / linux / atheros / patches-3.14 / 105-ar2315_pci.patch

diff --git a/target/linux/atheros/patches-3.14/105-ar2315_pci.patch b/target/linux/atheros/patches-3.14/105-ar2315_pci.patch
index 58e8f4b03e5ad6e6145d99f7f185bbb5f6e77a8b..a4377eb1d640f921dbdb5ed1b0447879013172c5 100644 (file)
--- a/target/linux/atheros/patches-3.14/105-ar2315_pci.patch
+++ b/target/linux/atheros/patches-3.14/105-ar2315_pci.patch
@@ -7,7 +7,7 @@
 +obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o
 --- /dev/null
 +++ b/arch/mips/ar231x/pci.c
-@@ -0,0 +1,234 @@
+@@ -0,0 +1,229 @@
 +/*
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License
@@ -20,8 +20,7 @@
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
++ * along with this program; if not, see <http://www.gnu.org/licenses/>.
 + */
 +
 +#include <linux/types.h>
@@ -29,7 +28,6 @@
 +#include <linux/kernel.h>
 +#include <linux/init.h>
 +#include <linux/mm.h>
-+#include <linux/spinlock.h>
 +#include <linux/delay.h>
 +#include <linux/irq.h>
 +#include <linux/io.h>
@@ -47,7 +45,6 @@
 +
 +static int config_access(int devfn, int where, int size, u32 *ptr, bool write)
 +{
-+      unsigned long flags;
 +      int func = PCI_FUNC(devfn);
 +      int dev = PCI_SLOT(devfn);
 +      u32 value = 0;
@@ -58,11 +55,10 @@
 +              return PCIBIOS_DEVICE_NOT_FOUND;
 +
 +      /* Select Configuration access */
-+      local_irq_save(flags);
 +      ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, 0, AR2315_PCIMISC_CFG_SEL);
 +      mb();
 +
-+      addr = (u32) configspace + (1 << (13 + dev)) + (func << 8) + where;
++      addr = (u32)configspace + (1 << (13 + dev)) + (func << 8) + where;
 +      if (size == 1)
 +              addr ^= 0x3;
 +      else if (size == 2)
@@ -91,7 +87,6 @@
 +
 +      /* Select Memory access */
 +      ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL, 0);
-+      local_irq_restore(flags);
 +
 +      return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
 +}
@@ -190,10 +185,10 @@
 +              return -ENODEV;
 +
 +      /* Remap PCI config space */
-+      configspace = (unsigned long) ioremap_nocache(AR2315_PCIEXT,
-+                                                    1*1024*1024);
++      configspace = (unsigned long)ioremap_nocache(AR2315_PCIEXT,
++                                                   1 * 1024 * 1024);
 +      ar231x_pci_controller.io_map_base =
-+                      (unsigned long) ioremap_nocache(AR2315_MEM_BASE +
++                      (unsigned long)ioremap_nocache(AR2315_MEM_BASE +
 +                      AR2315_MEM_SIZE, AR2315_IO_SIZE);
 +      set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space*/
 +
@@ -205,29 +200,29 @@
 +      msleep(20);
 +
 +      ar231x_mask_reg(AR2315_ENDIAN_CTL, 0,
-+              AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE);
++                      AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE);
 +
 +      ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM |
-+              (AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S));
++                       (AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S));
 +      ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI);
 +      ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | AR2315_IF_MASK,
-+              AR2315_IF_PCI | AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR |
-+               (AR2315_IF_PCI_CLK_OUTPUT_CLK << AR2315_IF_PCI_CLK_SHIFT));
++                      AR2315_IF_PCI | AR2315_IF_PCI_HOST |
++                      AR2315_IF_PCI_INTR | (AR2315_IF_PCI_CLK_OUTPUT_CLK <<
++                                            AR2315_IF_PCI_CLK_SHIFT));
 +
 +      /* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */
 +      ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
-+              AR2315_PCIRST_LOW);
++                      AR2315_PCIRST_LOW);
 +      msleep(100);
 +
 +      /* Bring the PCI out of reset */
 +      ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
-+              AR2315_PCIRST_HIGH | AR2315_PCICACHE_DIS | 0x8);
++                      AR2315_PCIRST_HIGH | AR2315_PCICACHE_DIS | 0x8);
 +
 +      ar231x_write_reg(AR2315_PCI_UNCACHE_CFG,
-+                      0x1E | /* 1GB uncached */
-+                      (1 << 5) | /* Enable uncached */
-+                      (0x2 << 30) /* Base: 0x80000000 */
-+      );
++                       0x1E | /* 1GB uncached */
++                       (1 << 5) | /* Enable uncached */
++                       (0x2 << 30) /* Base: 0x80000000 */);
 +      ar231x_read_reg(AR2315_PCI_UNCACHE_CFG);
 +
 +      msleep(500);
@@ -244,9 +239,9 @@
 +arch_initcall(ar2315_pci_init);
 --- a/arch/mips/ar231x/Kconfig
 +++ b/arch/mips/ar231x/Kconfig
-@@ -14,3 +14,10 @@ config ATHEROS_AR2315
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_BIG_ENDIAN
+@@ -7,3 +7,10 @@ config ATHEROS_AR2315
+       bool "Atheros 2315+ support"
+       depends on ATHEROS_AR231X
        default y
 +
 +config ATHEROS_AR2315_PCI