ar8216: add adjust_link checking

[openwrt/openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8216.c

diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index f3c953b808ee924493a4de9204bba2fb7906b0bf..6869e1ff191cbba219a7719fedd94cbc1b8595e4 100644 (file)
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -355,6 +355,7 @@ ar8xxx_reg_wait(struct ar8xxx_priv *priv, u32 reg, u32 mask, u32 val,
                        return 0;
 
                usleep_range(1000, 2000);
+               cond_resched();
        }
 
        return -ETIMEDOUT;
@@ -426,6 +427,7 @@ ar8xxx_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush)
                        mib_stats[i] = 0;
                else
                        mib_stats[i] += t;
+               cond_resched();
        }
 }
 
@@ -565,6 +567,7 @@ ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
                        break;
 
                udelay(10);
+               cond_resched();
        }
 
        pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
@@ -730,8 +733,10 @@ ar8216_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1)
 {
        int timeout = 20;
 
-       while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout)
-                udelay(10);
+       while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout) {
+               udelay(10);
+               cond_resched();
+       }
 
        if (!timeout)
                pr_err("ar8216: timeout waiting for atu to become ready\n");
@@ -1194,6 +1199,7 @@ ar8xxx_sw_reset_switch(struct switch_dev *dev)
        priv->arl_age_time = AR8XXX_DEFAULT_ARL_AGE_TIME;
 
        chip->init_globals(priv);
+       chip->atu_flush(priv);
 
        mutex_unlock(&priv->reg_mutex);
 
@@ -1695,6 +1701,16 @@ static const struct switch_dev_ops ar8xxx_sw_ops = {
        .apply_config = ar8xxx_sw_hw_apply,
        .reset_switch = ar8xxx_sw_reset_switch,
        .get_port_link = ar8xxx_sw_get_port_link,
+/* The following op is disabled as it hogs the CPU and degrades performance.
+   An implementation has been attempted in 4d8a66d but reading MIB data is slow
+   on ar8xxx switches.
+
+   The high CPU load has been traced down to the ar8xxx_reg_wait() call in
+   ar8xxx_mib_op(), which has to usleep_range() till the MIB busy flag set by
+   the request to update the MIB counter is cleared. */
+#if 0
+       .get_port_stats = ar8xxx_sw_get_port_stats,
+#endif
 };
 
 static const struct ar8xxx_chip ar8216_chip = {
@@ -2088,7 +2104,8 @@ ar8xxx_phy_read_status(struct phy_device *phydev)
 
        phydev->state = PHY_RUNNING;
        netif_carrier_on(phydev->attached_dev);
-       phydev->adjust_link(phydev->attached_dev);
+       if (phydev->adjust_link)
+               phydev->adjust_link(phydev->attached_dev);
 
        return 0;
 }