generic: ar8216: add device struct into struct ar8xxx_priv
[openwrt/openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8327.c
index 74f0a08d76e837dc6576a4be84a976fc86b685ef..36a4520678f9c8fd1447dfa1a8d4e223801840a3 100644 (file)
@@ -127,6 +127,49 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
        return t;
 }
 
+static void
+ar8327_phy_rgmii_set(struct ar8xxx_priv *priv, struct phy_device *phydev)
+{
+       u16 phy_val = 0;
+       int phyaddr = phydev->mdio.addr;
+       struct device_node *np = phydev->mdio.dev.of_node;
+
+       if (!np)
+               return;
+
+       if (!of_property_read_bool(np, "qca,phy-rgmii-en")) {
+               pr_err("ar8327: qca,phy-rgmii-en is not specified\n");
+               return;
+       }
+       ar8xxx_phy_dbg_read(priv, phyaddr,
+                               AR8327_PHY_MODE_SEL, &phy_val);
+       phy_val |= AR8327_PHY_MODE_SEL_RGMII;
+       ar8xxx_phy_dbg_write(priv, phyaddr,
+                               AR8327_PHY_MODE_SEL, phy_val);
+
+       /* set rgmii tx clock delay if needed */
+       if (!of_property_read_bool(np, "qca,txclk-delay-en")) {
+               pr_err("ar8327: qca,txclk-delay-en is not specified\n");
+               return;
+       }
+       ar8xxx_phy_dbg_read(priv, phyaddr,
+                               AR8327_PHY_SYS_CTRL, &phy_val);
+       phy_val |= AR8327_PHY_SYS_CTRL_RGMII_TX_DELAY;
+       ar8xxx_phy_dbg_write(priv, phyaddr,
+                               AR8327_PHY_SYS_CTRL, phy_val);
+
+       /* set rgmii rx clock delay if needed */
+       if (!of_property_read_bool(np, "qca,rxclk-delay-en")) {
+               pr_err("ar8327: qca,rxclk-delay-en is not specified\n");
+               return;
+       }
+       ar8xxx_phy_dbg_read(priv, phyaddr,
+                               AR8327_PHY_TEST_CTRL, &phy_val);
+       phy_val |= AR8327_PHY_TEST_CTRL_RGMII_RX_DELAY;
+       ar8xxx_phy_dbg_write(priv, phyaddr,
+                               AR8327_PHY_TEST_CTRL, phy_val);
+}
+
 static void
 ar8327_phy_fixup(struct ar8xxx_priv *priv, int phy)
 {
@@ -619,8 +662,8 @@ ar8327_hw_init(struct ar8xxx_priv *priv)
        if (!priv->chip_data)
                return -ENOMEM;
 
-       if (priv->phy->mdio.dev.of_node)
-               ret = ar8327_hw_config_of(priv, priv->phy->mdio.dev.of_node);
+       if (priv->pdev->of_node)
+               ret = ar8327_hw_config_of(priv, priv->pdev->of_node);
        else
                ret = ar8327_hw_config_pdata(priv,
                                             priv->phy->mdio.dev.platform_data);
@@ -1057,8 +1100,7 @@ static void ar8327_get_arl_entry(struct ar8xxx_priv *priv,
        struct mii_bus *bus = priv->mii_bus;
        u16 r2, page;
        u16 r1_data0, r1_data1, r1_data2, r1_func;
-       u32 t, val0, val1, val2;
-       int i;
+       u32 val0, val1, val2;
 
        split_addr(AR8327_REG_ATU_DATA0, &r1_data0, &r2, &page);
        r2 |= 0x10;
@@ -1095,12 +1137,7 @@ static void ar8327_get_arl_entry(struct ar8xxx_priv *priv,
                if (!*status)
                        break;
 
-               i = 0;
-               t = AR8327_ATU_PORT0;
-               while (!(val1 & t) && ++i < AR8327_NUM_PORTS)
-                       t <<= 1;
-
-               a->port = i;
+               a->portmap = (val1 & AR8327_ATU_PORTS) >> AR8327_ATU_PORTS_S;
                a->mac[0] = (val0 & AR8327_ATU_ADDR0) >> AR8327_ATU_ADDR0_S;
                a->mac[1] = (val0 & AR8327_ATU_ADDR1) >> AR8327_ATU_ADDR1_S;
                a->mac[2] = (val0 & AR8327_ATU_ADDR2) >> AR8327_ATU_ADDR2_S;
@@ -1496,6 +1533,7 @@ const struct ar8xxx_chip ar8337_chip = {
        .set_mirror_regs = ar8327_set_mirror_regs,
        .get_arl_entry = ar8327_get_arl_entry,
        .sw_hw_apply = ar8327_sw_hw_apply,
+       .phy_rgmii_set = ar8327_phy_rgmii_set,
 
        .num_mibs = ARRAY_SIZE(ar8236_mibs),
        .mib_decs = ar8236_mibs,