if (is5325(dev)) {
u32 entry = 0;
- if (members)
- entry = (untag << VA_UNTAG_S) | members | VA_VALID_25;
+ if (members) {
+ entry = ((untag & VA_UNTAG_MASK_25) << VA_UNTAG_S_25) |
+ members;
+ if (dev->core_rev >= 3)
+ entry |= VA_VALID_25_R4 | vid << VA_VID_HIGH_S;
+ else
+ entry |= VA_VALID_25;
+ }
b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);
b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
u16 entry = 0;
if (members)
- entry = (untag << VA_UNTAG_S) | members | VA_VALID_65;
+ entry = ((untag & VA_UNTAG_MASK_65) << VA_UNTAG_S_65) |
+ members | VA_VALID_65;
b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);
b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
*/
if (dev->enable_vlan || is_cpu_port(dev, i))
pvlan_mask = 0x1ff;
- else if (is531x5(dev))
+ else if (is531x5(dev) || is5301x(dev))
/* BCM53115 may use a different port as cpu port */
pvlan_mask = BIT(dev->sw_dev.cpu_port);
else
pvlan_mask);
/* port state is handled by bcm63xx_enet driver */
- if (!is63xx(dev))
+ if (!is63xx(dev) && !(is5301x(dev) && i == 6))
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(i),
port_ctrl);
}
{
u8 gc;
- b53_read8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, &gc);
+ b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
gc &= ~(GC_RESET_MIB | GC_MIB_AC_EN);
- b53_write8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, gc);
+ b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);
}
static int b53_apply(struct b53_device *dev)
return 0;
}
-void b53_switch_reset_gpio(struct b53_device *dev)
+static void b53_switch_reset_gpio(struct b53_device *dev)
{
int gpio = dev->reset_gpio;
static int b53_switch_reset(struct b53_device *dev)
{
+ u8 cpu_port = dev->sw_dev.cpu_port;
u8 mgmt;
b53_switch_reset_gpio(dev);
+ if (is539x(dev)) {
+ b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x83);
+ b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);
+ }
+
b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
if (!(mgmt & SM_SW_FWD_EN)) {
return -EINVAL;
}
}
- } else if (is531x5(dev) && dev->sw_dev.cpu_port == B53_CPU_PORT) {
+ } else if (is531x5(dev) && cpu_port == B53_CPU_PORT) {
u8 mii_port_override;
b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
mii_port_override | PORT_OVERRIDE_EN |
PORT_OVERRIDE_LINK);
+ } else if (is5301x(dev)) {
+ if (cpu_port == 8) {
+ u8 mii_port_override;
+
+ b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
+ &mii_port_override);
+ mii_port_override |= PORT_OVERRIDE_LINK |
+ PORT_OVERRIDE_RX_FLOW |
+ PORT_OVERRIDE_TX_FLOW |
+ PORT_OVERRIDE_SPEED_2000M |
+ PORT_OVERRIDE_EN;
+ b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
+ mii_port_override);
+
+ /* TODO: Ports 5 & 7 require some extra handling */
+ } else {
+ u8 po_reg = B53_GMII_PORT_OVERRIDE_CTRL(cpu_port);
+ u8 gmii_po;
+
+ b53_read8(dev, B53_CTRL_PAGE, po_reg, &gmii_po);
+ gmii_po |= GMII_PO_LINK |
+ GMII_PO_RX_FLOW |
+ GMII_PO_TX_FLOW |
+ GMII_PO_EN |
+ GMII_PO_SPEED_2000M;
+ b53_write8(dev, B53_CTRL_PAGE, po_reg, gmii_po);
+ }
}
b53_enable_mib(dev);
}
+static int b53_port_set_link(struct switch_dev *sw_dev, int port,
+ struct switch_port_link *link)
+{
+ struct b53_device *dev = sw_to_b53(sw_dev);
+
+ /*
+ * TODO: BCM63XX requires special handling as it can have external phys
+ * and ports might be GE or only FE
+ */
+ if (is63xx(dev))
+ return -ENOTSUPP;
+
+ if (port == sw_dev->cpu_port)
+ return -EINVAL;
+
+ if (!(BIT(port) & dev->enabled_ports))
+ return -EINVAL;
+
+ if (link->speed == SWITCH_PORT_SPEED_1000 &&
+ (is5325(dev) || is5365(dev)))
+ return -EINVAL;
+
+ if (link->speed == SWITCH_PORT_SPEED_1000 && !link->duplex)
+ return -EINVAL;
+
+ return switch_generic_set_link(sw_dev, port, link);
+}
+
+static int b53_phy_read16(struct switch_dev *dev, int addr, u8 reg, u16 *value)
+{
+ struct b53_device *priv = sw_to_b53(dev);
+
+ if (priv->ops->phy_read16)
+ return priv->ops->phy_read16(priv, addr, reg, value);
+
+ return b53_read16(priv, B53_PORT_MII_PAGE(addr), reg, value);
+}
+
+static int b53_phy_write16(struct switch_dev *dev, int addr, u8 reg, u16 value)
+{
+ struct b53_device *priv = sw_to_b53(dev);
+
+ if (priv->ops->phy_write16)
+ return priv->ops->phy_write16(priv, addr, reg, value);
+
+ return b53_write16(priv, B53_PORT_MII_PAGE(addr), reg, value);
+}
+
static int b53_global_reset_switch(struct switch_dev *dev)
{
struct b53_device *priv = sw_to_b53(dev);
priv->enable_jumbo = 0;
priv->allow_vid_4095 = 0;
- memset(priv->vlans, 0, sizeof(priv->vlans) * dev->vlans);
- memset(priv->ports, 0, sizeof(priv->ports) * dev->ports);
+ memset(priv->vlans, 0, sizeof(*priv->vlans) * dev->vlans);
+ memset(priv->ports, 0, sizeof(*priv->ports) * dev->ports);
return b53_switch_reset(priv);
}
.apply_config = b53_global_apply_config,
.reset_switch = b53_global_reset_switch,
.get_port_link = b53_port_get_link,
+ .set_port_link = b53_port_set_link,
+ .phy_read16 = b53_phy_read16,
+ .phy_write16 = b53_phy_write16,
};
static const struct switch_dev_ops b53_switch_ops_65 = {
.apply_config = b53_global_apply_config,
.reset_switch = b53_global_reset_switch,
.get_port_link = b53_port_get_link,
+ .set_port_link = b53_port_set_link,
+ .phy_read16 = b53_phy_read16,
+ .phy_write16 = b53_phy_write16,
};
static const struct switch_dev_ops b53_switch_ops = {
.apply_config = b53_global_apply_config,
.reset_switch = b53_global_reset_switch,
.get_port_link = b53_port_get_link,
+ .set_port_link = b53_port_set_link,
+ .phy_read16 = b53_phy_read16,
+ .phy_write16 = b53_phy_write16,
};
struct b53_chip_data {
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
.sw_ops = &b53_switch_ops,
},
+ {
+ .chip_id = BCM53128_DEVICE_ID,
+ .dev_name = "BCM53128",
+ .alias = "bcm53128",
+ .vlans = 4096,
+ .enabled_ports = 0x1ff,
+ .cpu_port = B53_CPU_PORT,
+ .vta_regs = B53_VTA_REGS,
+ .duplex_reg = B53_DUPLEX_STAT_GE,
+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+ .sw_ops = &b53_switch_ops,
+ },
{
.chip_id = BCM63XX_DEVICE_ID,
.dev_name = "BCM63xx",
.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
.sw_ops = &b53_switch_ops,
},
+ {
+ .chip_id = BCM53010_DEVICE_ID,
+ .dev_name = "BCM53010",
+ .alias = "bcm53011",
+ .vlans = 4096,
+ .enabled_ports = 0x1f,
+ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
+ .vta_regs = B53_VTA_REGS,
+ .duplex_reg = B53_DUPLEX_STAT_GE,
+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+ .sw_ops = &b53_switch_ops,
+ },
+ {
+ .chip_id = BCM53011_DEVICE_ID,
+ .dev_name = "BCM53011",
+ .alias = "bcm53011",
+ .vlans = 4096,
+ .enabled_ports = 0x1bf,
+ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
+ .vta_regs = B53_VTA_REGS,
+ .duplex_reg = B53_DUPLEX_STAT_GE,
+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+ .sw_ops = &b53_switch_ops,
+ },
+ {
+ .chip_id = BCM53012_DEVICE_ID,
+ .dev_name = "BCM53012",
+ .alias = "bcm53011",
+ .vlans = 4096,
+ .enabled_ports = 0x1bf,
+ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
+ .vta_regs = B53_VTA_REGS,
+ .duplex_reg = B53_DUPLEX_STAT_GE,
+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+ .sw_ops = &b53_switch_ops,
+ },
+ {
+ .chip_id = BCM53018_DEVICE_ID,
+ .dev_name = "BCM53018",
+ .alias = "bcm53018",
+ .vlans = 4096,
+ .enabled_ports = 0x1f,
+ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
+ .vta_regs = B53_VTA_REGS,
+ .duplex_reg = B53_DUPLEX_STAT_GE,
+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+ .sw_ops = &b53_switch_ops,
+ },
+ {
+ .chip_id = BCM53019_DEVICE_ID,
+ .dev_name = "BCM53019",
+ .alias = "bcm53019",
+ .vlans = 4096,
+ .enabled_ports = 0x1f,
+ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
+ .vta_regs = B53_VTA_REGS,
+ .duplex_reg = B53_DUPLEX_STAT_GE,
+ .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
+ .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
+ .sw_ops = &b53_switch_ops,
+ },
};
-int b53_switch_init(struct b53_device *dev)
+static int b53_switch_init(struct b53_device *dev)
{
struct switch_dev *sw_dev = &dev->sw_dev;
unsigned i;
sw_dev->cpu_port = 5;
}
- /* cpu port is always last */
- sw_dev->ports = sw_dev->cpu_port + 1;
dev->enabled_ports |= BIT(sw_dev->cpu_port);
+ sw_dev->ports = fls(dev->enabled_ports);
dev->ports = devm_kzalloc(dev->dev,
sizeof(struct b53_port) * sw_dev->ports,
dev->reset_gpio = b53_switch_get_reset_gpio(dev);
if (dev->reset_gpio >= 0) {
- ret = devm_gpio_request_one(dev->dev, dev->reset_gpio, GPIOF_OUT_INIT_HIGH, "robo_reset");
+ ret = devm_gpio_request_one(dev->dev, dev->reset_gpio,
+ GPIOF_OUT_INIT_HIGH, "robo_reset");
if (ret)
return ret;
}
switch (id32) {
case BCM53115_DEVICE_ID:
case BCM53125_DEVICE_ID:
+ case BCM53128_DEVICE_ID:
+ case BCM53010_DEVICE_ID:
+ case BCM53011_DEVICE_ID:
+ case BCM53012_DEVICE_ID:
+ case BCM53018_DEVICE_ID:
+ case BCM53019_DEVICE_ID:
dev->chip_id = id32;
break;
default:
}
}
- return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID, &dev->core_rev);
+ if (dev->chip_id == BCM5325_DEVICE_ID)
+ return b53_read8(dev, B53_STAT_PAGE, B53_REV_ID_25,
+ &dev->core_rev);
+ else
+ return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID,
+ &dev->core_rev);
}
EXPORT_SYMBOL(b53_switch_detect);
projects / openwrt / openwrt.git / blobdiff