-/include/ "vr9.dtsi"
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
/ {
+ compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
+
chosen {
- bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
+ bootargs = "console=ttyLTQ0,115200";
+ };
+
+ aliases {
+ led-boot = &power_green;
+ led-failsafe = &power_red;
+ led-running = &power_green;
+
+ led-dsl = &dsl_green;
+ led-internet = &internet_green;
+ led-wifi = &wireless_green;
};
memory@0 {
reg = <0x0 0x8000000>;
};
- fpi@10000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "lantiq,fpi", "simple-bus";
- ranges = <0x0 0x10000000 0xEEFFFFF>;
- reg = <0x10000000 0xEF00000>;
-
- localbus@0 {
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
- 1 0 0x4000000 0x4000010>; /* addsel1 */
- compatible = "lantiq,localbus", "simple-bus";
- };
-
+ fpi@10000000 {
gpio: pinmux@E100B10 {
- compatible = "lantiq,pinctrl-xr9";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
-
- interrupt-parent = <&icu0>;
- interrupts = <166 135 66 40 41 42 38>;
-
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0xE100B10 0xA0>;
state_default: pinmux {
exin3 {
};
};
- eth@E108000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-net";
- reg = < 0xE108000 0x3000 /* switch */
- 0xE10B100 0x70 /* mdio */
- 0xE10B1D8 0x30 /* mii */
- 0xE10B308 0x30 >; /* pmac */
- interrupt-parent = <&icu0>;
- interrupts = <73 72>;
-
- lan: interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mac-address = [ 00 11 22 33 44 55 ];
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- };
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rgmii";
- phy-handle = <&phy1>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
- };
- };
-
- mdio@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy5: ethernet-phy@5 {
- reg = <0x5>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
- };
-
stp: stp@E100BB0 {
compatible = "lantiq,gpio-stp-xway";
reg = <0xE100BB0 0x40>;
ifxhcd@E101000 {
status = "okay";
- gpios = <&gpio 33 0>;
+ gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
lantiq,portmask = <0x3>;
};
+ ifxhcd@E106000 {
+ status = "okay";
+ gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+ };
+
pci@E105400 {
status = "okay";
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- compatible = "lantiq,pci-xway";
- bus-range = <0x0 0x0>;
- ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
- 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
- reg = <0x7000000 0x8000 /* config space */
- 0xE105400 0x400>; /* pci bridge */
- lantiq,bus-clock = <33333333>;
- /*lantiq,external-clock;*/
- lantiq,delay-hi = <0>; /* 0ns delay */
- lantiq,delay-lo = <0>; /* 0.0ns delay */
- interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
- interrupt-map = <
- 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30
- >;
- gpio-reset = <&gpio 21 0>;
- req-mask = <0x1>; /* GNT1 */
+ gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
};
gphy-xrx200 {
compatible = "lantiq,phy-xrx200";
- firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/
- firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/
+ firmware1 = "lantiq/xrx200_phy11g_a14.bin"; /*VR9 1.1*/
+ firmware2 = "lantiq/xrx200_phy11g_a22.bin"; /*VR9 1.2*/
phys = [ 00 01 ];
};
reset {
label = "reset";
- gpios = <&gpio 39 1>;
- linux,code = <0x198>;
+ gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
- gpios = <&gpio 1 1>;
- linux,code = <0xf7>;
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RFKILL>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ internet_red {
+ label = "p2812hnufx:red:internet";
+ gpios = <&stp 16 GPIO_ACTIVE_LOW>;
+ };
+ internet_green: internet_green {
+ label = "p2812hnufx:green:internet";
+ gpios = <&stp 17 GPIO_ACTIVE_LOW>;
+ };
+ dsl_green: dsl_green {
+ label = "p2812hnufx:green:dsl";
+ gpios = <&stp 18 GPIO_ACTIVE_LOW>;
+ };
+ dsl_orange {
+ label = "p2812hnufx:orange:dsl";
+ gpios = <&stp 19 GPIO_ACTIVE_LOW>;
+ };
+ wireless_orange {
+ label = "p2812hnufx:orange:wlan";
+ gpios = <&stp 20 GPIO_ACTIVE_LOW>;
+ };
+ wireless_green: wireless_green {
+ label = "p2812hnufx:green:wlan";
+ gpios = <&stp 21 GPIO_ACTIVE_LOW>;
+ };
+ power_red: power {
+ label = "p2812hnufx:red:power";
+ gpios = <&stp 22 GPIO_ACTIVE_LOW>;
+ };
+ power_green: power2 {
+ label = "p2812hnufx:green:power";
+ gpios = <&stp 23 GPIO_ACTIVE_LOW>;
+ default-state = "keep";
+ };
+ phone1 {
+ label = "p2812hnufx:green:phone";
+ gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+ };
+ phone1warn {
+ label = "p2812hnufx:orange:phone";
+ gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
+ };
+ phone2warn {
+ label = "p2812hnufx:orange:phone2";
+ gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
+ };
+ phone2 {
+ label = "p2812hnufx:green:phone2";
+ gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+ð0 {
+ lan: interface@0 {
+ compatible = "lantiq,xrx200-pdi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ mac-address = [ 00 11 22 33 44 55 ];
+ lantiq,switch;
+
+ ethernet@0 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <0>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet@1 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <1>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+ ethernet@2 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <2>;
+ phy-mode = "gmii";
+ phy-handle = <&phy11>;
+ };
+ ethernet@4 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <4>;
+ phy-mode = "gmii";
+ phy-handle = <&phy13>;
+ };
+ ethernet@5 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <5>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+ };
+
+ mdio@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "lantiq,xrx200-mdio";
+
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ };
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
};
};
};
projects / openwrt / openwrt.git / blobdiff