mediatek: fix mt7530 mcm reset
[openwrt/openwrt.git] / target / linux / mediatek / files / arch / arm / boot / dts / mt7623-NAND.dts
index d25e46ebae78a945644ccecf66a5de5613f001e2..6606176d4d6a80c06521470ecbdd0aba41e2b2f7 100644 (file)
 
 /dts-v1/;
 
-#include "mt7623.dtsi"
+#include "_mt7623.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 
 / {
-       model = "MediaTek MT7623 evaluation board";
-       compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
+       model = "MediaTek MT7623 NAND reference board";
+       compatible = "mediatek,mt7623-rfb-nand", "mediatek,mt7623";
 
        chosen {
                stdout-path = &uart2;
                                regulator-enable-ramp-delay = <216>;
                        };
                };
+
+               mt6323led: leds {
+                       compatible = "mediatek,mt6323-led";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       led@0 {
+                               reg = <0>;
+                               label = "LED0";
+                               linux,default-trigger = "timer";
+                               default-state = "on";
+                       };
+                       led@1 {
+                               reg = <1>;
+                               label = "LED1";
+                               default-state = "off";
+                       };
+                       led@2 {
+                               reg = <2>;
+                               label = "LED2";
+                               default-state = "on";
+                       };
+                       led@3 {
+                               reg = <3>;
+                               label = "LED3";
+                               default-state = "on";
+                       };
+               };
        };
 };
 
                                 <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
                                 <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
                                 <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
-                                <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>,
                                 <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
                };
-               
+
+               pins_eth_esw {
+                       pinmux = <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>;
+                       input-enable;
+                       drive-strength = <MTK_DRIVE_8mA>;
+                       bias-pull-up;
+               };
+
                pins_eth_rst {
                        pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
                        output-low;
                };
        };
+
+       pwm_pins: pwm {
+               pins_pwm1 {
+                       pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
+               };
+
+               pins_pwm2 {
+                       pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
+               };
+       };
 };
 
 &nandc {
        nand@0 {
                reg = <0>;
                spare_per_sector = <64>;
-               nand-on-flash-bbt;
                nand-ecc-mode = "hw";
                nand-ecc-strength = <12>;
                nand-ecc-step-size = <1024>;
                        };
 
                        partition@4140000 {
-                               label = "rootfs";
+                               label = "ubi";
                                reg = <0x4140000 0x1000000>;
                        };
                };
 &gmac1 {
        mac-address = [00 11 22 33 44 56];
        status = "okay";
+
+       phy-mode = "trgmii";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+               pause;
+       };
 };
 
 &gmac2 {
        mac-address = [00 11 22 33 44 55];
        status = "okay";
+
+       phy-mode = "trgmii";
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+               pause;
+       };
+};
+
+&mdio0 {
+       switch@0 {
+               compatible = "mediatek,mt7530";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&eth_default>;
+
+               core-supply = <&mt6323_vpa_reg>;
+               io-supply = <&mt6323_vemc3v3_reg>;
+
+               mediatek,mcm;
+               resets = <&ethsys 2>;
+               reset-names = "mcm";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+                       port@0 {
+                               reg = <0>;
+                               label = "lan0";
+                               cpu = <&cpu_port0>;
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                               cpu = <&cpu_port0>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                               cpu = <&cpu_port0>;
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                               cpu = <&cpu_port0>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "wan";
+                               cpu = <&cpu_port1>;
+                       };
+
+                       cpu_port1: port@5 {
+                               reg = <5>;
+                               label = "cpu";
+                               ethernet = <&gmac2>;
+                               phy-mode = "trgmii";
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       cpu_port0: port@6 {
+                               reg = <6>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "trgmii";
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+               };
+       };
 };
 
-&gsw {
+&pwm {
        pinctrl-names = "default";
-       pinctrl-0 = <&eth_default>;
-       mediatek,reset-pin = <&pio 15 0>;
+       pinctrl-0 = <&pwm_pins>;
        status = "okay";
 };