mediatek: fix mt7530 mcm reset
[openwrt/openwrt.git] / target / linux / mediatek / files / arch / arm / boot / dts / mt7623-eMMC.dts
index 2b75b44541d4b4a994b91713a728650cf334b2bc..fe1a42d282719f22f51851751ef5d00677457e2e 100644 (file)
 
 /dts-v1/;
 
 
 /dts-v1/;
 
-#include "mt7623.dtsi"
+#include "_mt7623.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 
 / {
 #include <dt-bindings/gpio/gpio.h>
 
 / {
-       model = "MediaTek MT7623 eMMC evaluation board";
-       compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
+       model = "MediaTek MT7623 eMMC reference board";
+       compatible = "mediatek,mt7623-rfb-emmc", "mediatek,mt7623";
 
        chosen {
                stdout-path = &uart2;
 
        chosen {
                stdout-path = &uart2;
                                 <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>,
                                 <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
                };
                                 <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>,
                                 <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
                };
-               
+
                pins_eth_rst {
                        pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
                        output-low;
                };
        };
                pins_eth_rst {
                        pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
                        output-low;
                };
        };
+
+       pwm_pins: pwm {
+               pins_pwm1 {
+                       pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
+               };
+
+               pins_pwm2 {
+                       pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
+               };
+       };
 };
 
 &usb1 {
 };
 
 &usb1 {
 &gmac2 {
        mac-address = [00 11 22 33 44 55];
        status = "okay";
 &gmac2 {
        mac-address = [00 11 22 33 44 55];
        status = "okay";
+
+       phy-handle = <&phy5>;
+};
+
+&mdio0 {
+       switch@0 {
+               compatible = "mediatek,mt7530";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&eth_default>;
+
+               core-supply = <&mt6323_vpa_reg>;
+               io-supply = <&mt6323_vemc3v3_reg>;
+
+               mediatek,mcm;
+               resets = <&ethsys 2>;
+               reset-names = "mcm";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+                       port@0 {
+                               reg = <0>;
+                               label = "lan0";
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                       };
+
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                       };
+
+                       port@6 {
+                               reg = <6>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "trgmii";
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+               };
+       };
+
+       phy5: ethernet-phy@5 {
+               reg = <5>;
+               phy-mode = "rgmii-rxid";
+       };
 };
 
 };
 
-&gsw {
+&pwm {
        pinctrl-names = "default";
        pinctrl-names = "default";
-       pinctrl-0 = <&eth_default>;
-       mediatek,reset-pin = <&pio 15 0>;
+       pinctrl-0 = <&pwm_pins>;
        status = "okay";
 };
        status = "okay";
 };