#define U3P_U3_CHIP_GPIO_CTLD 0x0c
#define P3C_REG_IP_SW_RST BIT(31)
-@@ -585,6 +587,31 @@ static void u2_phy_instance_exit(struct
+@@ -580,6 +582,31 @@ static void u2_phy_instance_exit(struct
}
}
static void pcie_phy_instance_init(struct mtk_tphy *tphy,
struct mtk_phy_instance *instance)
{
-@@ -881,6 +908,17 @@ static int mtk_phy_exit(struct phy *phy)
+@@ -876,6 +903,17 @@ static int mtk_phy_exit(struct phy *phy)
return 0;
}
static struct phy *mtk_phy_xlate(struct device *dev,
struct of_phandle_args *args)
{
-@@ -931,6 +969,7 @@ static const struct phy_ops mtk_tphy_ops
+@@ -926,6 +964,7 @@ static const struct phy_ops mtk_tphy_ops
.exit = mtk_phy_exit,
.power_on = mtk_phy_power_on,
.power_off = mtk_phy_power_off,