kernel: update 3.14 to 3.14.18

[openwrt/openwrt.git] / target / linux / sunxi / patches-3.14 / 184-clk-sunxi-add-pll6-on-a31.patch

diff --git a/target/linux/sunxi/patches-3.14/184-clk-sunxi-add-pll6-on-a31.patch b/target/linux/sunxi/patches-3.14/184-clk-sunxi-add-pll6-on-a31.patch
index 4d71742803869117d4fef738524fa608c8810a97..7193c5029b672d2338a41db757d32b1b430cb0e5 100644 (file)
--- a/target/linux/sunxi/patches-3.14/184-clk-sunxi-add-pll6-on-a31.patch
+++ b/target/linux/sunxi/patches-3.14/184-clk-sunxi-add-pll6-on-a31.patch
@@ -16,8 +16,6 @@ Signed-off-by: Emilio López <emilio@elopez.com.ar>
  drivers/clk/sunxi/clk-sunxi.c                     | 45 +++++++++++++++++++++++
  2 files changed, 46 insertions(+)
 
-diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
-index ca2b692..c37c764 100644
 --- a/Documentation/devicetree/bindings/clock/sunxi.txt
 +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
 @@ -11,6 +11,7 @@ Required properties:
@@ -28,11 +26,9 @@ index ca2b692..c37c764 100644
        "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
        "allwinner,sun4i-axi-clk" - for the AXI clock
        "allwinner,sun4i-axi-gates-clk" - for the AXI gates
-diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
-index a779c31..d4cf297 100644
 --- a/drivers/clk/sunxi/clk-sunxi.c
 +++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -252,7 +252,38 @@ static void sun4i_get_pll5_factors(u32 *freq, u32 parent_rate,
+@@ -252,7 +252,38 @@ static void sun4i_get_pll5_factors(u32 *
        *n = DIV_ROUND_UP(div, (*k+1));
  }
  
@@ -61,17 +57,17 @@ index a779c31..d4cf297 100644
 +      /* we were called to round the frequency, we can now return */
 +      if (n == NULL)
 +              return;
-+
+ 
 +      *k = div / 32;
 +      if (*k > 3)
 +              *k = 3;
- 
++
 +      *n = DIV_ROUND_UP(div, (*k+1));
 +}
  
  /**
   * sun4i_get_apb1_factors() - calculates m, p factors for APB1
-@@ -420,6 +451,13 @@ static struct clk_factors_config sun4i_pll5_config = {
+@@ -420,6 +451,13 @@ static struct clk_factors_config sun4i_p
        .kwidth = 2,
  };
  
@@ -85,7 +81,7 @@ index a779c31..d4cf297 100644
  static struct clk_factors_config sun4i_apb1_config = {
        .mshift = 0,
        .mwidth = 5,
-@@ -469,6 +507,12 @@ static const struct factors_data sun4i_pll6_data __initconst = {
+@@ -469,6 +507,12 @@ static const struct factors_data sun4i_p
        .name = "pll6",
  };
  
@@ -98,7 +94,7 @@ index a779c31..d4cf297 100644
  static const struct factors_data sun4i_apb1_data __initconst = {
        .table = &sun4i_apb1_config,
        .getter = sun4i_get_apb1_factors,
-@@ -1069,6 +1113,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node,
+@@ -1069,6 +1113,7 @@ free_clkdata:
  static const struct of_device_id clk_factors_match[] __initconst = {
        {.compatible = "allwinner,sun4i-pll1-clk", .data = &sun4i_pll1_data,},
        {.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,},
@@ -106,6 +102,3 @@ index a779c31..d4cf297 100644
        {.compatible = "allwinner,sun4i-apb1-clk", .data = &sun4i_apb1_data,},
        {.compatible = "allwinner,sun4i-mod0-clk", .data = &sun4i_mod0_data,},
        {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,},
--- 
-2.0.3
-