X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Far71xx%2Ffiles%2Farch%2Fmips%2Fath79%2Fmach-rbspi.c;h=d281bf1a6a5429de0496b39c41978cea4905ea06;hp=541865220c79dd92d54c79cd2255c3eb4aa61cf1;hb=540edf704501db3ec8dcb278a7f1df52de222ae0;hpb=b18bae37a4f26949f71f1345caa2b6934f6a4663 diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c index 541865220c..d281bf1a6a 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c @@ -3,6 +3,19 @@ * * - MikroTik RouterBOARD mAP L-2nD * - MikroTik RouterBOARD 941L-2nD + * - MikroTik RouterBOARD 951Ui-2nD + * - MikroTik RouterBOARD 952Ui-5ac2nD + * - MikroTik RouterBOARD 750UP r2 + * - MikroTik RouterBOARD 750 r2 + * - MikroTik RouterBOARD LHG 5nD + * + * Preliminary support for the following hardware + * - MikroTik RouterBOARD wAP2nD + * - MikroTik RouterBOARD cAP2nD + * - MikroTik RouterBOARD mAP2nD + * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same + * hardware as the mAP L-2nD. It is unknown if they share the same board + * identifier. * * Copyright (C) 2017 Thibaut VARENE * @@ -11,11 +24,15 @@ * by the Free Software Foundation. */ +#include #include #include #include #include +#include +#include + #include #include @@ -32,19 +49,24 @@ #include "dev-usb.h" #include "dev-wmac.h" #include "machtypes.h" +#include "pci.h" #include "routerboot.h" #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */ #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL) #define RBSPI_HAS_USB BIT(0) -#define RBSPI_HAS_WLAN BIT(1) -#define RBSPI_HAS_WAN4 BIT(2) /* has WAN port on PHY4 */ +#define RBSPI_HAS_WLAN0 BIT(1) +#define RBSPI_HAS_WLAN1 BIT(2) +#define RBSPI_HAS_WAN4 BIT(3) /* has WAN port on PHY4 */ +#define RBSPI_HAS_SSR BIT(4) /* has an SSR on SPI bus 0 */ +#define RBSPI_HAS_POE BIT(5) +#define RBSPI_HAS_MDIO1 BIT(6) +#define RBSPI_HAS_PCI BIT(7) #define RB_ROUTERBOOT_OFFSET 0x0000 #define RB_BIOS_SIZE 0x1000 #define RB_SOFT_CFG_SIZE 0x1000 -#define RB_KERNEL_SIZE (2 * 1024 * 1024) /* 2MB kernel */ /* Flash partitions indexes */ enum { @@ -53,8 +75,7 @@ enum { RBSPI_PART_BIOS, RBSPI_PART_RBOOT2, RBSPI_PART_SCONF, - RBSPI_PART_KERN, - RBSPI_PART_ROOT, + RBSPI_PART_FIRMW, RBSPI_PARTS }; @@ -63,8 +84,6 @@ static struct mtd_partition rbspi_spi_partitions[RBSPI_PARTS]; /* * Setup the SPI flash partition table based on initial parsing. * The kernel can be at any aligned position and have any size. - * The size of the kernel partition is the desired RB_KERNEL_SIZE - * minus the size of the preceding partitions (128KB). */ static void __init rbspi_init_partitions(const struct rb_info *info) { @@ -98,16 +117,10 @@ static void __init rbspi_init_partitions(const struct rb_info *info) parts[RBSPI_PART_SCONF].offset = info->soft_cfg_offs; parts[RBSPI_PART_SCONF].size = RB_SOFT_CFG_SIZE; - parts[RBSPI_PART_KERN].name = "kernel"; - parts[RBSPI_PART_KERN].offset = parts[RBSPI_PART_SCONF].offset + parts[RBSPI_PART_FIRMW].name = "firmware"; + parts[RBSPI_PART_FIRMW].offset = parts[RBSPI_PART_SCONF].offset + parts[RBSPI_PART_SCONF].size; - parts[RBSPI_PART_KERN].size = RB_KERNEL_SIZE - - parts[RBSPI_PART_KERN].offset; - - parts[RBSPI_PART_ROOT].name = "rootfs"; - parts[RBSPI_PART_ROOT].offset = parts[RBSPI_PART_KERN].offset - + parts[RBSPI_PART_KERN].size; - parts[RBSPI_PART_ROOT].size = MTDPART_SIZ_FULL; + parts[RBSPI_PART_FIRMW].size = MTDPART_SIZ_FULL; } static struct flash_platform_data rbspi_spi_flash_data = { @@ -166,12 +179,259 @@ static struct gpio_led rbhapl_leds[] __initdata = { }, }; -void __init rbspi_wlan_init(int wmac_offset) +/* common RB SSRs */ +#define RBSPI_SSR_GPIO_BASE 40 +#define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit)) + +/* RB 951Ui-2nD gpios */ +#define RB952_SSR_BIT_LED_LAN1 0 +#define RB952_SSR_BIT_LED_LAN2 1 +#define RB952_SSR_BIT_LED_LAN3 2 +#define RB952_SSR_BIT_LED_LAN4 3 +#define RB952_SSR_BIT_LED_LAN5 4 +#define RB952_SSR_BIT_USB_POWER 5 +#define RB952_SSR_BIT_LED_WLAN 6 +#define RB952_GPIO_SSR_CS 11 +#define RB952_GPIO_LED_USER 4 +#define RB952_GPIO_POE_POWER 14 +#define RB952_GPIO_POE_STATUS 12 +#define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER) +#define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1) +#define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2) +#define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3) +#define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4) +#define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5) +#define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN) + +static struct gpio_led rb952_leds[] __initdata = { + { + .name = "rb:green:user", + .gpio = RB952_GPIO_LED_USER, + .active_low = 0, + }, { + .name = "rb:blue:wlan", + .gpio = RB952_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "rb:green:port1", + .gpio = RB952_GPIO_LED_LAN1, + .active_low = 1, + }, { + .name = "rb:green:port2", + .gpio = RB952_GPIO_LED_LAN2, + .active_low = 1, + }, { + .name = "rb:green:port3", + .gpio = RB952_GPIO_LED_LAN3, + .active_low = 1, + }, { + .name = "rb:green:port4", + .gpio = RB952_GPIO_LED_LAN4, + .active_low = 1, + }, { + .name = "rb:green:port5", + .gpio = RB952_GPIO_LED_LAN5, + .active_low = 1, + }, +}; + +/* RB wAP-2nD gpios */ +#define RBWAP_GPIO_LED_USER 14 +#define RBWAP_GPIO_LED_WLAN 11 + +static struct gpio_led rbwap_leds[] __initdata = { + { + .name = "rb:green:user", + .gpio = RBWAP_GPIO_LED_USER, + .active_low = 1, + }, { + .name = "rb:green:wlan", + .gpio = RBWAP_GPIO_LED_WLAN, + .active_low = 1, + }, +}; + +/* RB cAP-2nD gpios */ +#define RBCAP_GPIO_LED_1 14 +#define RBCAP_GPIO_LED_2 12 +#define RBCAP_GPIO_LED_3 11 +#define RBCAP_GPIO_LED_4 4 +#define RBCAP_GPIO_LED_ALL 13 + +static struct gpio_led rbcap_leds[] __initdata = { + { + .name = "rb:green:rssi1", + .gpio = RBCAP_GPIO_LED_1, + .active_low = 1, + }, { + .name = "rb:green:rssi2", + .gpio = RBCAP_GPIO_LED_2, + .active_low = 1, + }, { + .name = "rb:green:rssi3", + .gpio = RBCAP_GPIO_LED_3, + .active_low = 1, + }, { + .name = "rb:green:rssi4", + .gpio = RBCAP_GPIO_LED_4, + .active_low = 1, + }, +}; + +/* RB mAP-2nD gpios */ +#define RBMAP_SSR_BIT_LED_LAN1 0 +#define RBMAP_SSR_BIT_LED_LAN2 1 +#define RBMAP_SSR_BIT_LED_POEO 2 +#define RBMAP_SSR_BIT_LED_USER 3 +#define RBMAP_SSR_BIT_LED_WLAN 4 +#define RBMAP_SSR_BIT_USB_POWER 5 +#define RBMAP_SSR_BIT_LED_APCAP 6 +#define RBMAP_GPIO_SSR_CS 11 +#define RBMAP_GPIO_LED_POWER 4 +#define RBMAP_GPIO_POE_POWER 14 +#define RBMAP_GPIO_POE_STATUS 12 +#define RBMAP_GPIO_USB_POWER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER) +#define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1) +#define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2) +#define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO) +#define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER) +#define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN) +#define RBMAP_GPIO_LED_APCAP RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_APCAP) + +static struct gpio_led rbmap_leds[] __initdata = { + { + .name = "rb:green:power", + .gpio = RBMAP_GPIO_LED_POWER, + .active_low = 1, + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, { + .name = "rb:green:eth1", + .gpio = RBMAP_GPIO_LED_LAN1, + .active_low = 1, + }, { + .name = "rb:green:eth2", + .gpio = RBMAP_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "rb:red:poe_out", + .gpio = RBMAP_GPIO_LED_POEO, + .active_low = 1, + }, { + .name = "rb:green:user", + .gpio = RBMAP_GPIO_LED_USER, + .active_low = 1, + }, { + .name = "rb:green:wlan", + .gpio = RBMAP_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "rb:green:ap_cap", + .gpio = RBMAP_GPIO_LED_APCAP, + .active_low = 1, + }, +}; + +/* RB LHG 5nD gpios */ +#define RBLHG_GPIO_LED_0 13 +#define RBLHG_GPIO_LED_1 12 +#define RBLHG_GPIO_LED_2 4 +#define RBLHG_GPIO_LED_3 21 +#define RBLHG_GPIO_LED_4 18 +#define RBLHG_GPIO_LED_ETH 14 +#define RBLHG_GPIO_LED_POWER 11 +#define RBLHG_GPIO_LED_USER 20 +#define RBLHG_GPIO_BTN_RESET 15 + +static struct gpio_led rblhg_leds[] __initdata = { + { + .name = "rb:green:rssi0", + .gpio = RBLHG_GPIO_LED_0, + .active_low = 1, + }, { + .name = "rb:green:rssi1", + .gpio = RBLHG_GPIO_LED_1, + .active_low = 1, + }, { + .name = "rb:green:rssi2", + .gpio = RBLHG_GPIO_LED_2, + .active_low = 1, + }, { + .name = "rb:green:rssi3", + .gpio = RBLHG_GPIO_LED_3, + .active_low = 1, + }, { + .name = "rb:green:rssi4", + .gpio = RBLHG_GPIO_LED_4, + .active_low = 1, + }, { + .name = "rb:green:eth", + .gpio = RBLHG_GPIO_LED_ETH, + .active_low = 1, + }, { + .name = "rb:green:user", + .gpio = RBLHG_GPIO_LED_USER, + .active_low = 1, + }, { + .name = "rb:blue:power", + .gpio = RBLHG_GPIO_LED_POWER, + .active_low = 0, + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, +}; + +static struct gpio_keys_button rblhg_gpio_keys[] __initdata = { + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL, + .gpio = RBLHG_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + + +static struct gen_74x164_chip_platform_data rbspi_ssr_data = { + .base = RBSPI_SSR_GPIO_BASE, +}; + +/* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */ +static int rbspi_spi_cs_gpios[] = { + -ENOENT, /* CS0 is always -ENOENT: natively handled */ + -ENOENT, /* CS1 can be updated by the code as necessary */ +}; + +static struct ath79_spi_platform_data rbspi_ath79_spi_data = { + .bus_num = 0, + .cs_gpios = rbspi_spi_cs_gpios, +}; + +/* + * Global spi_board_info: devices that don't have an SSR only have the SPI NOR + * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1 + */ +static struct spi_board_info rbspi_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "m25p80", + .platform_data = &rbspi_spi_flash_data, + }, { + .bus_num = 0, + .chip_select = 1, + .max_speed_hz = 25000000, + .modalias = "74x164", + .platform_data = &rbspi_ssr_data, + } +}; + +void __init rbspi_wlan_init(u16 id, int wmac_offset) { char *art_buf; u8 wlan_mac[ETH_ALEN]; - art_buf = rb_get_wlan_data(); + art_buf = rb_get_ext_wlan_data(id); if (!art_buf) return; @@ -181,20 +441,32 @@ void __init rbspi_wlan_init(int wmac_offset) kfree(art_buf); } +#define RBSPI_MACH_BUFLEN 64 /* * Common platform init routine for all SPI NOR devices. */ static int __init rbspi_platform_setup(void) { const struct rb_info *info; - char buf[64]; + char buf[RBSPI_MACH_BUFLEN] = "MikroTik "; + char *str; + int len = RBSPI_MACH_BUFLEN - strlen(buf) - 1; info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x20000); if (!info) return -ENODEV; - scnprintf(buf, sizeof(buf), "MikroTik %s", - (info->board_name) ? info->board_name : ""); + if (info->board_name) { + str = "RouterBOARD "; + if (strncmp(info->board_name, str, strlen(str))) { + strncat(buf, str, len); + len -= strlen(str); + } + strncat(buf, info->board_name, len); + } + else + strncat(buf, "UNKNOWN", len); + mips_set_machine_name(buf); /* fix partitions based on flash parsing */ @@ -209,10 +481,22 @@ static int __init rbspi_platform_setup(void) */ static void __init rbspi_peripherals_setup(u32 flags) { - ath79_register_m25p80(&rbspi_spi_flash_data); + unsigned spi_n; + + if (flags & RBSPI_HAS_SSR) + spi_n = ARRAY_SIZE(rbspi_spi_info); + else + spi_n = 1; /* only one device on bus0 */ + + rbspi_ath79_spi_data.num_chipselect = spi_n; + rbspi_ath79_spi_data.cs_gpios = rbspi_spi_cs_gpios; + ath79_register_spi(&rbspi_ath79_spi_data, rbspi_spi_info, spi_n); if (flags & RBSPI_HAS_USB) ath79_register_usb(); + + if (flags & RBSPI_HAS_PCI) + ath79_register_pci(); } /* @@ -220,10 +504,12 @@ static void __init rbspi_peripherals_setup(u32 flags) * Sets LAN/WAN/WLAN. */ static void __init rbspi_network_setup(u32 flags, int gmac1_offset, - int wmac_offset) + int wmac0_offset, int wmac1_offset) { /* for QCA953x that will init mdio1_device/data */ ath79_register_mdio(0, 0x0); + if (flags & RBSPI_HAS_MDIO1) + ath79_register_mdio(1, 0x0); if (flags & RBSPI_HAS_WAN4) { ath79_setup_ar934x_eth_cfg(0); @@ -252,12 +538,15 @@ static void __init rbspi_network_setup(u32 flags, int gmac1_offset, ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; ath79_register_eth(1); - if (flags & RBSPI_HAS_WLAN) - rbspi_wlan_init(wmac_offset); + if (flags & RBSPI_HAS_WLAN0) + rbspi_wlan_init(0, wmac0_offset); + + if (flags & RBSPI_HAS_WLAN1) + rbspi_wlan_init(1, wmac1_offset); } /* - * Init the mAP lite hardware. + * Init the mAP lite hardware (QCA953x). * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0. * Trying to use GMAC0 in direct mode was unsucessful, so we're * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal @@ -265,15 +554,15 @@ static void __init rbspi_network_setup(u32 flags, int gmac1_offset, */ static void __init rbmapl_setup(void) { - u32 flags = RBSPI_HAS_WLAN; + u32 flags = RBSPI_HAS_WLAN0; if (rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); - /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */ - rbspi_network_setup(flags, 0, 1); + /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */ + rbspi_network_setup(flags, 0, 1, 0); ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds), rbmapl_leds); @@ -288,7 +577,7 @@ static void __init rbmapl_setup(void) } /* - * Init the hAP lite hardware. + * Init the hAP lite hardware (QCA953x). * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4 * being assigned to LAN on the casing, and port 1 being assigned * to "internet" (WAN) on the casing. Port 1 is connected to PHY3. @@ -296,15 +585,15 @@ static void __init rbmapl_setup(void) */ static void __init rbhapl_setup(void) { - u32 flags = RBSPI_HAS_WLAN; + u32 flags = RBSPI_HAS_WLAN0; if (rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); - /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 4 */ - rbspi_network_setup(flags, 0, 4); + /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 4 */ + rbspi_network_setup(flags, 0, 4, 0); ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds), rbhapl_leds); @@ -314,5 +603,186 @@ static void __init rbhapl_setup(void) rbspi_gpio_keys_reset16); } +/* + * The hAP, hAP ac lite, hEX lite and hEX PoE lite share the same platform + */ +static void __init rbspi_952_750r2_setup(u32 flags) +{ + if (flags & RBSPI_HAS_SSR) + rbspi_spi_cs_gpios[1] = RB952_GPIO_SSR_CS; + + rbspi_peripherals_setup(flags); + + /* + * GMAC1 is HW MAC + 1, WLAN0 MAC IS HW MAC + 5 (hAP), + * WLAN1 MAC IS HW MAC + 6 (hAP ac lite) + */ + rbspi_network_setup(flags, 1, 5, 6); + + if (flags & RBSPI_HAS_USB) + gpio_request_one(RB952_GPIO_USB_POWER, + GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, + "USB power"); + + if (flags & RBSPI_HAS_POE) + gpio_request_one(RB952_GPIO_POE_POWER, + GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, + "POE power"); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds), rb952_leds); + + /* These devices have a single reset button as gpio 16 */ + ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, + ARRAY_SIZE(rbspi_gpio_keys_reset16), + rbspi_gpio_keys_reset16); +} + +/* + * Init the hAP (ac lite) hardware (QCA953x). + * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned + * to LAN on the casing, and port 1 being assigned to "internet" (WAN). + * Port 1 is connected to PHY4 (the ports are labelled in reverse physical + * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the + * internal switch for the LAN ports. + * The device also has USB, PoE output and an SSR used for LED multiplexing. + * The 952Ui-5ac2nD (hAP ac lite) is nearly identical to the hAP, it adds a + * QCA9887 5GHz radio via PCI and moves 2.4GHz from WLAN0 to WLAN1. + */ +static void __init rb952_setup(void) +{ + u32 flags = RBSPI_HAS_WAN4 | RBSPI_HAS_USB | + RBSPI_HAS_SSR | RBSPI_HAS_POE; + + if (rbspi_platform_setup()) + return; + + /* differentiate the hAP from the hAP ac lite */ + if (strstr(mips_get_machine_name(), "952Ui-5ac2nD")) + flags |= RBSPI_HAS_WLAN1 | RBSPI_HAS_PCI; + else + flags |= RBSPI_HAS_WLAN0; + + rbspi_952_750r2_setup(flags); +} + +/* + * Init the hEX (PoE) lite hardware (QCA953x). + * The 750UP r2 (hEX PoE lite) is nearly identical to the hAP, only without + * WLAN. The 750 r2 (hEX lite) is nearly identical to the 750UP r2, only + * without USB and POE. It shares the same bootloader board identifier. + */ +static void __init rb750upr2_setup(void) +{ + u32 flags = RBSPI_HAS_WAN4 | RBSPI_HAS_SSR; + + if (rbspi_platform_setup()) + return; + + /* differentiate the hEX lite from the hEX PoE lite */ + if (strstr(mips_get_machine_name(), "750UP r2")) + flags |= RBSPI_HAS_USB | RBSPI_HAS_POE; + + rbspi_952_750r2_setup(flags); +} + +/* + * Init the LHG hardware (AR9344). + * The LHG 5nD has a single ethernet port connected to PHY0. + * Wireless is provided via 5GHz WLAN1. + */ +static void __init rblhg_setup(void) +{ + u32 flags = RBSPI_HAS_WLAN1 | RBSPI_HAS_MDIO1; + + if (rbspi_platform_setup()) + return; + + rbspi_peripherals_setup(flags); + + /* GMAC1 is HW MAC, WLAN1 MAC is HW MAC + 1 */ + rbspi_network_setup(flags, 0, 0, 1); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rblhg_leds), rblhg_leds); + + ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, + ARRAY_SIZE(rblhg_gpio_keys), + rblhg_gpio_keys); +} + +/* + * Init the wAP hardware (EXPERIMENTAL). + * The wAP 2nD has a single ethernet port. + */ +static void __init rbwap_setup(void) +{ + u32 flags = RBSPI_HAS_WLAN0; + + if (rbspi_platform_setup()) + return; + + rbspi_peripherals_setup(flags); + + /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */ + rbspi_network_setup(flags, 0, 1, 0); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds), rbwap_leds); +} + +/* + * Init the cAP hardware (EXPERIMENTAL). + * The cAP 2nD has a single ethernet port, and a global LED switch. + */ +static void __init rbcap_setup(void) +{ + u32 flags = RBSPI_HAS_WLAN0; + + if (rbspi_platform_setup()) + return; + + rbspi_peripherals_setup(flags); + + /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */ + rbspi_network_setup(flags, 0, 1, 0); + + gpio_request_one(RBCAP_GPIO_LED_ALL, + GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, + "LEDs enable"); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds), rbcap_leds); +} + +/* + * Init the mAP hardware (EXPERIMENTAL). + * The mAP 2nD has two ethernet ports, PoE output and an SSR for LED + * multiplexing. + */ +static void __init rbmap_setup(void) +{ + u32 flags = RBSPI_HAS_WLAN0 | RBSPI_HAS_SSR | RBSPI_HAS_POE; + + if (rbspi_platform_setup()) + return; + + rbspi_spi_cs_gpios[1] = RBMAP_GPIO_SSR_CS; + rbspi_peripherals_setup(flags); + + /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 2 */ + rbspi_network_setup(flags, 0, 2, 0); + + if (flags & RBSPI_HAS_POE) + gpio_request_one(RBMAP_GPIO_POE_POWER, + GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, + "POE power"); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds); +} + + MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup); MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup); +MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup); +MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2, "750-hb", rb750upr2_setup); +MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5, "lhg", rblhg_setup); +MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP, "wap-hb", rbwap_setup); +MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP, "cap-hb", rbcap_setup); +MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP, "map2-hb", rbmap_setup);