X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Fath79%2Ffiles%2Fdrivers%2Fnet%2Fethernet%2Fatheros%2Fag71xx%2Fag71xx_main.c;h=07d9992ca7c91a8a6ebeb957284ebb94c89183cb;hp=0db11a6785bc599fac00259be388206456c5298f;hb=87627b2d760cd2ac341dd3181ce6f987d69777c2;hpb=5358d8b995f7aa52e16dd45cef082fc9983c8b39 diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 0db11a6785..07d9992ca7 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -577,6 +577,77 @@ static void ag71xx_bit_clear(void __iomem *reg, u32 bit) __raw_readl(reg); } +static void ag71xx_sgmii_serdes_init_qca956x(struct device_node *np) +{ + struct device_node *np_dev; + void __iomem *gmac_base; + u32 serdes_cal; + u32 t; + + np = of_get_child_by_name(np, "gmac-config"); + if (!np) + return; + + if (of_property_read_u32(np, "serdes-cal", &serdes_cal)) + /* By default, use middle value for resistor calibration */ + serdes_cal = 0x7; + + np_dev = of_parse_phandle(np, "device", 0); + if (!np_dev) + goto out; + + gmac_base = of_iomap(np_dev, 0); + if (!gmac_base) { + pr_err("%pOF: can't map GMAC registers\n", np_dev); + goto err_iomap; + } + + pr_debug("%pOF: fixup SERDES calibration to value %i\n", + np_dev, serdes_cal); + t = __raw_readl(gmac_base + QCA956X_GMAC_REG_SGMII_SERDES); + t &= ~(QCA956X_SGMII_SERDES_RES_CALIBRATION_MASK + << QCA956X_SGMII_SERDES_RES_CALIBRATION_SHIFT); + t |= (serdes_cal & QCA956X_SGMII_SERDES_RES_CALIBRATION_MASK) + << QCA956X_SGMII_SERDES_RES_CALIBRATION_SHIFT; + __raw_writel(t, gmac_base + QCA956X_GMAC_REG_SGMII_SERDES); + + ath79_pll_wr(QCA956X_PLL_ETH_SGMII_SERDES_REG, + QCA956X_PLL_ETH_SGMII_SERDES_LOCK_DETECT + | QCA956X_PLL_ETH_SGMII_SERDES_EN_PLL); + + t = __raw_readl(gmac_base + QCA956X_GMAC_REG_SGMII_SERDES); + + /* missing in QCA u-boot code, clear before setting */ + t &= ~(QCA956X_SGMII_SERDES_CDR_BW_MASK + << QCA956X_SGMII_SERDES_CDR_BW_SHIFT | + QCA956X_SGMII_SERDES_TX_DR_CTRL_MASK + << QCA956X_SGMII_SERDES_TX_DR_CTRL_SHIFT | + QCA956X_SGMII_SERDES_VCO_REG_MASK + << QCA956X_SGMII_SERDES_VCO_REG_SHIFT); + + t |= (3 << QCA956X_SGMII_SERDES_CDR_BW_SHIFT) | + (1 << QCA956X_SGMII_SERDES_TX_DR_CTRL_SHIFT) | + QCA956X_SGMII_SERDES_PLL_BW | + QCA956X_SGMII_SERDES_EN_SIGNAL_DETECT | + QCA956X_SGMII_SERDES_FIBER_SDO | + (3 << QCA956X_SGMII_SERDES_VCO_REG_SHIFT); + + __raw_writel(t, gmac_base + QCA956X_GMAC_REG_SGMII_SERDES); + + ath79_device_reset_clear(QCA956X_RESET_SGMII_ANALOG); + ath79_device_reset_clear(QCA956X_RESET_SGMII); + + while (!(__raw_readl(gmac_base + QCA956X_GMAC_REG_SGMII_SERDES) + & QCA956X_SGMII_SERDES_LOCK_DETECT_STATUS)) + ; + + iounmap(gmac_base); +err_iomap: + of_node_put(np_dev); +out: + of_node_put(np); +} + static void ag71xx_sgmii_init_qca955x(struct device_node *np) { struct device_node *np_dev; @@ -665,6 +736,37 @@ out: of_node_put(np); } +static void ag71xx_mux_select_sgmii_qca956x(struct device_node *np) +{ + struct device_node *np_dev; + void __iomem *gmac_base; + u32 t; + + np = of_get_child_by_name(np, "gmac-config"); + if (!np) + return; + + np_dev = of_parse_phandle(np, "device", 0); + if (!np_dev) + goto out; + + gmac_base = of_iomap(np_dev, 0); + if (!gmac_base) { + pr_err("%pOF: can't map GMAC registers\n", np_dev); + goto err_iomap; + } + + t = __raw_readl(gmac_base + QCA956X_GMAC_REG_ETH_CFG); + t |= QCA956X_ETH_CFG_GE0_SGMII; + __raw_writel(t, gmac_base + QCA956X_GMAC_REG_ETH_CFG); + + iounmap(gmac_base); +err_iomap: + of_node_put(np_dev); +out: + of_node_put(np); +} + static void ath79_mii_ctrl_set_if(struct ag71xx *ag, unsigned int mii_if) { u32 t; @@ -688,6 +790,8 @@ static void ath79_mii0_ctrl_set_if(struct ag71xx *ag) break; case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: mii_if = AR71XX_MII0_CTRL_IF_RGMII; break; case PHY_INTERFACE_MODE_RMII: @@ -711,6 +815,8 @@ static void ath79_mii1_ctrl_set_if(struct ag71xx *ag) break; case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: mii_if = AR71XX_MII1_CTRL_IF_RGMII; break; default: @@ -1419,6 +1525,11 @@ static int ag71xx_probe(struct platform_device *pdev) if (!res) return -EINVAL; + if (of_property_read_bool(np, "qca956x-serdes-fixup")) { + ag71xx_sgmii_serdes_init_qca956x(np); + ag71xx_sgmii_init_qca955x(np); + } + err = ag71xx_setup_gmac(np); if (err) return err; @@ -1549,11 +1660,7 @@ static int ag71xx_probe(struct platform_device *pdev) ag->stop_desc->next = (u32) ag->stop_desc_dma; mac_addr = of_get_mac_address(np); -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,2,0)) - if (!mac_addr || !is_valid_ether_addr(mac_addr)) { -#else - if (IS_ERR(mac_addr) || !is_valid_ether_addr(mac_addr)) { -#endif + if (IS_ERR_OR_NULL(mac_addr) || !is_valid_ether_addr(mac_addr)) { dev_err(&pdev->dev, "invalid MAC address, using random address\n"); eth_random_addr(dev->dev_addr); } else { @@ -1566,6 +1673,10 @@ static int ag71xx_probe(struct platform_device *pdev) return ag->phy_if_mode; } + if (of_device_is_compatible(np, "qca,qca9560-eth") && + ag->phy_if_mode == PHY_INTERFACE_MODE_SGMII) + ag71xx_mux_select_sgmii_qca956x(np); + if (of_property_read_u32(np, "qca,mac-idx", &ag->mac_idx)) ag->mac_idx = -1; if (ag->mii_base)