X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Fgeneric%2Ffiles%2Fdrivers%2Fnet%2Fphy%2Far8216.c;h=00d4fc214d355974fc6e30d5fc2efffbd9d0a205;hp=8f3aded48fe361372533ba993f5f49055de18d3a;hb=74a353f64fc032358db34636019c16b469d16f0a;hpb=3205b52d1c88d40936d9f300e1b67ca174f4f248

diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index 8f3aded48f..00d4fc214d 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -33,6 +33,8 @@
 #include <linux/lockdep.h>
 #include <linux/ar8216_platform.h>
 #include <linux/workqueue.h>
+#include <linux/of_device.h>
+
 #include "ar8216.h"
 
 /* size of the vlan table */
@@ -42,7 +44,7 @@
 
 #define AR8XXX_MIB_WORK_DELAY	2000 /* msecs */
 
-struct ar8216_priv;
+struct ar8xxx_priv;
 
 #define AR8XXX_CAP_GIGE			BIT(0)
 #define AR8XXX_CAP_MIB_COUNTERS		BIT(1)
@@ -63,31 +65,44 @@ struct ar8xxx_mib_desc {
 struct ar8xxx_chip {
 	unsigned long caps;
 
-	int (*hw_init)(struct ar8216_priv *priv);
-	void (*init_globals)(struct ar8216_priv *priv);
-	void (*init_port)(struct ar8216_priv *priv, int port);
-	void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
+	int (*hw_init)(struct ar8xxx_priv *priv);
+	void (*init_globals)(struct ar8xxx_priv *priv);
+	void (*init_port)(struct ar8xxx_priv *priv, int port);
+	void (*setup_port)(struct ar8xxx_priv *priv, int port, u32 egress,
 			   u32 ingress, u32 members, u32 pvid);
-	u32 (*read_port_status)(struct ar8216_priv *priv, int port);
-	int (*atu_flush)(struct ar8216_priv *priv);
-	void (*vtu_flush)(struct ar8216_priv *priv);
-	void (*vtu_load_vlan)(struct ar8216_priv *priv, u32 vid, u32 port_mask);
+	u32 (*read_port_status)(struct ar8xxx_priv *priv, int port);
+	int (*atu_flush)(struct ar8xxx_priv *priv);
+	void (*vtu_flush)(struct ar8xxx_priv *priv);
+	void (*vtu_load_vlan)(struct ar8xxx_priv *priv, u32 vid, u32 port_mask);
 
 	const struct ar8xxx_mib_desc *mib_decs;
 	unsigned num_mibs;
 };
 
-struct ar8216_priv {
+struct ar8327_data {
+	u32 port0_status;
+	u32 port6_status;
+};
+
+struct ar8xxx_priv {
 	struct switch_dev dev;
+	struct mii_bus *mii_bus;
 	struct phy_device *phy;
-	u32 (*read)(struct ar8216_priv *priv, int reg);
-	void (*write)(struct ar8216_priv *priv, int reg, u32 val);
+
+	u32 (*read)(struct ar8xxx_priv *priv, int reg);
+	void (*write)(struct ar8xxx_priv *priv, int reg, u32 val);
+
+	int (*get_port_link)(unsigned port);
+
 	const struct net_device_ops *ndo_old;
 	struct net_device_ops ndo;
 	struct mutex reg_mutex;
 	u8 chip_ver;
 	u8 chip_rev;
 	const struct ar8xxx_chip *chip;
+	union {
+		struct ar8327_data ar8327;
+	} chip_data;
 	bool initialized;
 	bool port4_phy;
 	char buf[2048];
@@ -100,12 +115,21 @@ struct ar8216_priv {
 	int mib_next_port;
 	u64 *mib_stats;
 
+	struct list_head list;
+	unsigned int use_count;
+
 	/* all fields below are cleared on reset */
 	bool vlan;
 	u16 vlan_id[AR8X16_MAX_VLANS];
 	u8 vlan_table[AR8X16_MAX_VLANS];
 	u8 vlan_tagged;
 	u16 pvid[AR8X16_MAX_PORTS];
+
+	/* mirroring */
+	bool mirror_rx;
+	bool mirror_tx;
+	int source_port;
+	int monitor_port;
 };
 
 #define MIB_DESC(_s , _o, _n)	\
@@ -197,34 +221,41 @@ static const struct ar8xxx_mib_desc ar8236_mibs[] = {
 	MIB_DESC(1, AR8236_STATS_TXLATECOL, "TxLateCol"),
 };
 
-#define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
+static DEFINE_MUTEX(ar8xxx_dev_list_lock);
+static LIST_HEAD(ar8xxx_dev_list);
+
+static inline struct ar8xxx_priv *
+swdev_to_ar8xxx(struct switch_dev *swdev)
+{
+	return container_of(swdev, struct ar8xxx_priv, dev);
+}
 
-static inline bool ar8xxx_has_gige(struct ar8216_priv *priv)
+static inline bool ar8xxx_has_gige(struct ar8xxx_priv *priv)
 {
 	return priv->chip->caps & AR8XXX_CAP_GIGE;
 }
 
-static inline bool ar8xxx_has_mib_counters(struct ar8216_priv *priv)
+static inline bool ar8xxx_has_mib_counters(struct ar8xxx_priv *priv)
 {
 	return priv->chip->caps & AR8XXX_CAP_MIB_COUNTERS;
 }
 
-static inline bool chip_is_ar8216(struct ar8216_priv *priv)
+static inline bool chip_is_ar8216(struct ar8xxx_priv *priv)
 {
 	return priv->chip_ver == AR8XXX_VER_AR8216;
 }
 
-static inline bool chip_is_ar8236(struct ar8216_priv *priv)
+static inline bool chip_is_ar8236(struct ar8xxx_priv *priv)
 {
 	return priv->chip_ver == AR8XXX_VER_AR8236;
 }
 
-static inline bool chip_is_ar8316(struct ar8216_priv *priv)
+static inline bool chip_is_ar8316(struct ar8xxx_priv *priv)
 {
 	return priv->chip_ver == AR8XXX_VER_AR8316;
 }
 
-static inline bool chip_is_ar8327(struct ar8216_priv *priv)
+static inline bool chip_is_ar8327(struct ar8xxx_priv *priv)
 {
 	return priv->chip_ver == AR8XXX_VER_AR8327;
 }
@@ -243,10 +274,9 @@ split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
 }
 
 static u32
-ar8216_mii_read(struct ar8216_priv *priv, int reg)
+ar8xxx_mii_read(struct ar8xxx_priv *priv, int reg)
 {
-	struct phy_device *phy = priv->phy;
-	struct mii_bus *bus = phy->bus;
+	struct mii_bus *bus = priv->mii_bus;
 	u16 r1, r2, page;
 	u16 lo, hi;
 
@@ -265,10 +295,9 @@ ar8216_mii_read(struct ar8216_priv *priv, int reg)
 }
 
 static void
-ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
+ar8xxx_mii_write(struct ar8xxx_priv *priv, int reg, u32 val)
 {
-	struct phy_device *phy = priv->phy;
-	struct mii_bus *bus = phy->bus;
+	struct mii_bus *bus = priv->mii_bus;
 	u16 r1, r2, r3;
 	u16 lo, hi;
 
@@ -292,10 +321,10 @@ ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 }
 
 static void
-ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
+ar8xxx_phy_dbg_write(struct ar8xxx_priv *priv, int phy_addr,
 		     u16 dbg_addr, u16 dbg_data)
 {
-	struct mii_bus *bus = priv->phy->bus;
+	struct mii_bus *bus = priv->mii_bus;
 
 	mutex_lock(&bus->mdio_lock);
 	bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
@@ -304,9 +333,9 @@ ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
 }
 
 static void
-ar8216_phy_mmd_write(struct ar8216_priv *priv, int phy_addr, u16 addr, u16 data)
+ar8xxx_phy_mmd_write(struct ar8xxx_priv *priv, int phy_addr, u16 addr, u16 data)
 {
-	struct mii_bus *bus = priv->phy->bus;
+	struct mii_bus *bus = priv->mii_bus;
 
 	mutex_lock(&bus->mdio_lock);
 	bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr);
@@ -315,7 +344,7 @@ ar8216_phy_mmd_write(struct ar8216_priv *priv, int phy_addr, u16 addr, u16 data)
 }
 
 static u32
-ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
+ar8xxx_rmw(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
 {
 	u32 v;
 
@@ -330,7 +359,7 @@ ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 }
 
 static inline void
-ar8216_reg_set(struct ar8216_priv *priv, int reg, u32 val)
+ar8xxx_reg_set(struct ar8xxx_priv *priv, int reg, u32 val)
 {
 	u32 v;
 
@@ -342,7 +371,7 @@ ar8216_reg_set(struct ar8216_priv *priv, int reg, u32 val)
 }
 
 static int
-ar8216_reg_wait(struct ar8216_priv *priv, u32 reg, u32 mask, u32 val,
+ar8xxx_reg_wait(struct ar8xxx_priv *priv, u32 reg, u32 mask, u32 val,
 		unsigned timeout)
 {
 	int i;
@@ -361,7 +390,7 @@ ar8216_reg_wait(struct ar8216_priv *priv, u32 reg, u32 mask, u32 val,
 }
 
 static int
-ar8216_mib_op(struct ar8216_priv *priv, u32 op)
+ar8xxx_mib_op(struct ar8xxx_priv *priv, u32 op)
 {
 	unsigned mib_func;
 	int ret;
@@ -375,11 +404,11 @@ ar8216_mib_op(struct ar8216_priv *priv, u32 op)
 
 	mutex_lock(&priv->reg_mutex);
 	/* Capture the hardware statistics for all ports */
-	ar8216_rmw(priv, mib_func, AR8216_MIB_FUNC, (op << AR8216_MIB_FUNC_S));
+	ar8xxx_rmw(priv, mib_func, AR8216_MIB_FUNC, (op << AR8216_MIB_FUNC_S));
 	mutex_unlock(&priv->reg_mutex);
 
 	/* Wait for the capturing to complete. */
-	ret = ar8216_reg_wait(priv, mib_func, AR8216_MIB_BUSY, 0, 10);
+	ret = ar8xxx_reg_wait(priv, mib_func, AR8216_MIB_BUSY, 0, 10);
 	if (ret)
 		goto out;
 
@@ -390,19 +419,19 @@ out:
 }
 
 static int
-ar8216_mib_capture(struct ar8216_priv *priv)
+ar8xxx_mib_capture(struct ar8xxx_priv *priv)
 {
-	return ar8216_mib_op(priv, AR8216_MIB_FUNC_CAPTURE);
+	return ar8xxx_mib_op(priv, AR8216_MIB_FUNC_CAPTURE);
 }
 
 static int
-ar8216_mib_flush(struct ar8216_priv *priv)
+ar8xxx_mib_flush(struct ar8xxx_priv *priv)
 {
-	return ar8216_mib_op(priv, AR8216_MIB_FUNC_FLUSH);
+	return ar8xxx_mib_op(priv, AR8216_MIB_FUNC_FLUSH);
 }
 
 static void
-ar8216_mib_fetch_port_stat(struct ar8216_priv *priv, int port, bool flush)
+ar8xxx_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush)
 {
 	unsigned int base;
 	u64 *mib_stats;
@@ -442,7 +471,7 @@ ar8216_mib_fetch_port_stat(struct ar8216_priv *priv, int port, bool flush)
 }
 
 static void
-ar8216_read_port_link(struct ar8216_priv *priv, int port,
+ar8216_read_port_link(struct ar8xxx_priv *priv, int port,
 		      struct switch_port_link *link)
 {
 	u32 status;
@@ -455,12 +484,21 @@ ar8216_read_port_link(struct ar8216_priv *priv, int port,
 	link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 	if (link->aneg) {
 		link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
-		if (!link->link)
-			return;
 	} else {
 		link->link = true;
+
+		if (priv->get_port_link) {
+			int err;
+
+			err = priv->get_port_link(port);
+			if (err >= 0)
+				link->link = !!err;
+		}
 	}
 
+	if (!link->link)
+		return;
+
 	link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 	link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 	link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
@@ -487,7 +525,7 @@ ar8216_read_port_link(struct ar8216_priv *priv, int port,
 static struct sk_buff *
 ar8216_mangle_tx(struct net_device *dev, struct sk_buff *skb)
 {
-	struct ar8216_priv *priv = dev->phy_ptr;
+	struct ar8xxx_priv *priv = dev->phy_ptr;
 	unsigned char *buf;
 
 	if (unlikely(!priv))
@@ -516,7 +554,7 @@ error:
 static void
 ar8216_mangle_rx(struct net_device *dev, struct sk_buff *skb)
 {
-	struct ar8216_priv *priv;
+	struct ar8xxx_priv *priv;
 	unsigned char *buf;
 	int port, vlan;
 
@@ -551,7 +589,7 @@ ar8216_mangle_rx(struct net_device *dev, struct sk_buff *skb)
 }
 
 static int
-ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
+ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val)
 {
 	int timeout = 20;
 	u32 t = 0;
@@ -573,7 +611,7 @@ ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 }
 
 static void
-ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
+ar8216_vtu_op(struct ar8xxx_priv *priv, u32 op, u32 val)
 {
 	if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 		return;
@@ -587,13 +625,13 @@ ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 }
 
 static void
-ar8216_vtu_flush(struct ar8216_priv *priv)
+ar8216_vtu_flush(struct ar8xxx_priv *priv)
 {
 	ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 }
 
 static void
-ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
+ar8216_vtu_load_vlan(struct ar8xxx_priv *priv, u32 vid, u32 port_mask)
 {
 	u32 op;
 
@@ -602,7 +640,7 @@ ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
 }
 
 static int
-ar8216_atu_flush(struct ar8216_priv *priv)
+ar8216_atu_flush(struct ar8xxx_priv *priv)
 {
 	int ret;
 
@@ -614,13 +652,13 @@ ar8216_atu_flush(struct ar8216_priv *priv)
 }
 
 static u32
-ar8216_read_port_status(struct ar8216_priv *priv, int port)
+ar8216_read_port_status(struct ar8xxx_priv *priv, int port)
 {
 	return priv->read(priv, AR8216_REG_PORT_STATUS(port));
 }
 
 static void
-ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
+ar8216_setup_port(struct ar8xxx_priv *priv, int port, u32 egress, u32 ingress,
 		  u32 members, u32 pvid)
 {
 	u32 header;
@@ -630,7 +668,7 @@ ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 	else
 		header = 0;
 
-	ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
+	ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
 		   AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 		   AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 		   AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
@@ -638,7 +676,7 @@ ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 		   (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 		   (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 
-	ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
+	ar8xxx_rmw(priv, AR8216_REG_PORT_VLAN(port),
 		   AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 		   AR8216_PORT_VLAN_DEFAULT_ID,
 		   (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
@@ -647,23 +685,23 @@ ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 }
 
 static int
-ar8216_hw_init(struct ar8216_priv *priv)
+ar8216_hw_init(struct ar8xxx_priv *priv)
 {
 	return 0;
 }
 
 static void
-ar8216_init_globals(struct ar8216_priv *priv)
+ar8216_init_globals(struct ar8xxx_priv *priv)
 {
 	/* standard atheros magic */
 	priv->write(priv, 0x38, 0xc000050e);
 
-	ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 		   AR8216_GCTRL_MTU, 1518 + 8 + 2);
 }
 
 static void
-ar8216_init_port(struct ar8216_priv *priv, int port)
+ar8216_init_port(struct ar8xxx_priv *priv, int port)
 {
 	/* Enable port learning and tx */
 	priv->write(priv, AR8216_REG_PORT_CTRL(port),
@@ -705,10 +743,10 @@ static const struct ar8xxx_chip ar8216_chip = {
 };
 
 static void
-ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
+ar8236_setup_port(struct ar8xxx_priv *priv, int port, u32 egress, u32 ingress,
 		  u32 members, u32 pvid)
 {
-	ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
+	ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
 		   AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 		   AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 		   AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
@@ -716,11 +754,11 @@ ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 		   (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 		   (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 
-	ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
+	ar8xxx_rmw(priv, AR8236_REG_PORT_VLAN(port),
 		   AR8236_PORT_VLAN_DEFAULT_ID,
 		   (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 
-	ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
+	ar8xxx_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 		   AR8236_PORT_VLAN2_VLAN_MODE |
 		   AR8236_PORT_VLAN2_MEMBER,
 		   (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
@@ -728,7 +766,7 @@ ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 }
 
 static int
-ar8236_hw_init(struct ar8216_priv *priv)
+ar8236_hw_init(struct ar8xxx_priv *priv)
 {
 	int i;
 	struct mii_bus *bus;
@@ -737,7 +775,7 @@ ar8236_hw_init(struct ar8216_priv *priv)
 		return 0;
 
 	/* Initialize the PHYs */
-	bus = priv->phy->bus;
+	bus = priv->mii_bus;
 	for (i = 0; i < 5; i++) {
 		mdiobus_write(bus, i, MII_ADVERTISE,
 			      ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
@@ -751,14 +789,14 @@ ar8236_hw_init(struct ar8216_priv *priv)
 }
 
 static void
-ar8236_init_globals(struct ar8216_priv *priv)
+ar8236_init_globals(struct ar8xxx_priv *priv)
 {
 	/* enable jumbo frames */
-	ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 		   AR8316_GCTRL_MTU, 9018 + 8 + 2);
 
 	/* Enable MIB counters */
-	ar8216_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
+	ar8xxx_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
 		   (AR8216_MIB_FUNC_NO_OP << AR8216_MIB_FUNC_S) |
 		   AR8236_MIB_EN);
 }
@@ -779,67 +817,68 @@ static const struct ar8xxx_chip ar8236_chip = {
 };
 
 static int
-ar8316_hw_init(struct ar8216_priv *priv)
+ar8316_hw_init(struct ar8xxx_priv *priv)
 {
 	int i;
 	u32 val, newval;
 	struct mii_bus *bus;
 
-	val = priv->read(priv, 0x8);
+	val = priv->read(priv, AR8316_REG_POSTRIP);
 
 	if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 		if (priv->port4_phy) {
 			/* value taken from Ubiquiti RouterStation Pro */
 			newval = 0x81461bea;
-			printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
+			pr_info("ar8316: Using port 4 as PHY\n");
 		} else {
 			newval = 0x01261be2;
-			printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
+			pr_info("ar8316: Using port 4 as switch port\n");
 		}
 	} else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 		/* value taken from AVM Fritz!Box 7390 sources */
 		newval = 0x010e5b71;
 	} else {
 		/* no known value for phy interface */
-		printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
-			priv->phy->interface);
+		pr_err("ar8316: unsupported mii mode: %d.\n",
+		       priv->phy->interface);
 		return -EINVAL;
 	}
 
 	if (val == newval)
 		goto out;
 
-	priv->write(priv, 0x8, newval);
+	priv->write(priv, AR8316_REG_POSTRIP, newval);
+
+	if (priv->port4_phy &&
+	    priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
+		/* work around for phy4 rgmii mode */
+		ar8xxx_phy_dbg_write(priv, 4, 0x12, 0x480c);
+		/* rx delay */
+		ar8xxx_phy_dbg_write(priv, 4, 0x0, 0x824e);
+		/* tx delay */
+		ar8xxx_phy_dbg_write(priv, 4, 0x5, 0x3d47);
+		msleep(1000);
+	}
 
 	/* Initialize the ports */
-	bus = priv->phy->bus;
+	bus = priv->mii_bus;
 	for (i = 0; i < 5; i++) {
-		if ((i == 4) && priv->port4_phy &&
-		    priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
-			/* work around for phy4 rgmii mode */
-			ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
-			/* rx delay */
-			ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
-			/* tx delay */
-			ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
-			msleep(1000);
-		}
-
 		/* initialize the port itself */
 		mdiobus_write(bus, i, MII_ADVERTISE,
 			ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 		mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 		mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
-		msleep(1000);
 	}
 
+	msleep(1000);
+
 out:
 	priv->initialized = true;
 	return 0;
 }
 
 static void
-ar8316_init_globals(struct ar8216_priv *priv)
+ar8316_init_globals(struct ar8xxx_priv *priv)
 {
 	/* standard atheros magic */
 	priv->write(priv, 0x38, 0xc000050e);
@@ -848,11 +887,11 @@ ar8316_init_globals(struct ar8216_priv *priv)
 	priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 
 	/* enable jumbo frames */
-	ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
+	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 		   AR8316_GCTRL_MTU, 9018 + 8 + 2);
 
 	/* Enable MIB counters */
-	ar8216_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
+	ar8xxx_rmw(priv, AR8216_REG_MIB_FUNC, AR8216_MIB_FUNC | AR8236_MIB_EN,
 		   (AR8216_MIB_FUNC_NO_OP << AR8216_MIB_FUNC_S) |
 		   AR8236_MIB_EN);
 }
@@ -903,6 +942,23 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
 
 	case AR8327_PAD_MAC_SGMII:
 		t = AR8327_PAD_SGMII_EN;
+
+		/*
+		 * WAR for the QUalcomm Atheros AP136 board.
+		 * It seems that RGMII TX/RX delay settings needs to be
+		 * applied for SGMII mode as well, The ethernet is not
+		 * reliable without this.
+		 */
+		t |= cfg->txclk_delay_sel << AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S;
+		t |= cfg->rxclk_delay_sel << AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S;
+		if (cfg->rxclk_delay_en)
+			t |= AR8327_PAD_RGMII_RXCLK_DELAY_EN;
+		if (cfg->txclk_delay_en)
+			t |= AR8327_PAD_RGMII_TXCLK_DELAY_EN;
+
+		if (cfg->sgmii_delay_en)
+			t |= AR8327_PAD_SGMII_DELAY_EN;
+
 		break;
 
 	case AR8327_PAD_MAC2PHY_MII:
@@ -950,45 +1006,78 @@ ar8327_get_pad_cfg(struct ar8327_pad_cfg *cfg)
 }
 
 static void
-ar8327_phy_fixup(struct ar8216_priv *priv, int phy)
+ar8327_phy_fixup(struct ar8xxx_priv *priv, int phy)
 {
 	switch (priv->chip_rev) {
 	case 1:
 		/* For 100M waveform */
-		ar8216_phy_dbg_write(priv, phy, 0, 0x02ea);
+		ar8xxx_phy_dbg_write(priv, phy, 0, 0x02ea);
 		/* Turn on Gigabit clock */
-		ar8216_phy_dbg_write(priv, phy, 0x3d, 0x68a0);
+		ar8xxx_phy_dbg_write(priv, phy, 0x3d, 0x68a0);
 		break;
 
 	case 2:
-		ar8216_phy_mmd_write(priv, phy, 0x7, 0x3c);
-		ar8216_phy_mmd_write(priv, phy, 0x4007, 0x0);
+		ar8xxx_phy_mmd_write(priv, phy, 0x7, 0x3c);
+		ar8xxx_phy_mmd_write(priv, phy, 0x4007, 0x0);
 		/* fallthrough */
 	case 4:
-		ar8216_phy_mmd_write(priv, phy, 0x3, 0x800d);
-		ar8216_phy_mmd_write(priv, phy, 0x4003, 0x803f);
+		ar8xxx_phy_mmd_write(priv, phy, 0x3, 0x800d);
+		ar8xxx_phy_mmd_write(priv, phy, 0x4003, 0x803f);
 
-		ar8216_phy_dbg_write(priv, phy, 0x3d, 0x6860);
-		ar8216_phy_dbg_write(priv, phy, 0x5, 0x2c46);
-		ar8216_phy_dbg_write(priv, phy, 0x3c, 0x6000);
+		ar8xxx_phy_dbg_write(priv, phy, 0x3d, 0x6860);
+		ar8xxx_phy_dbg_write(priv, phy, 0x5, 0x2c46);
+		ar8xxx_phy_dbg_write(priv, phy, 0x3c, 0x6000);
 		break;
 	}
 }
 
+static u32
+ar8327_get_port_init_status(struct ar8327_port_cfg *cfg)
+{
+	u32 t;
+
+	if (!cfg->force_link)
+		return AR8216_PORT_STATUS_LINK_AUTO;
+
+	t = AR8216_PORT_STATUS_TXMAC | AR8216_PORT_STATUS_RXMAC;
+	t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0;
+	t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0;
+	t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0;
+
+	switch (cfg->speed) {
+	case AR8327_PORT_SPEED_10:
+		t |= AR8216_PORT_SPEED_10M;
+		break;
+	case AR8327_PORT_SPEED_100:
+		t |= AR8216_PORT_SPEED_100M;
+		break;
+	case AR8327_PORT_SPEED_1000:
+		t |= AR8216_PORT_SPEED_1000M;
+		break;
+	}
+
+	return t;
+}
+
 static int
-ar8327_hw_init(struct ar8216_priv *priv)
+ar8327_hw_config_pdata(struct ar8xxx_priv *priv,
+		       struct ar8327_platform_data *pdata)
 {
-	struct ar8327_platform_data *pdata;
 	struct ar8327_led_cfg *led_cfg;
-	struct mii_bus *bus;
+	struct ar8327_data *data;
 	u32 pos, new_pos;
 	u32 t;
-	int i;
 
-	pdata = priv->phy->dev.platform_data;
 	if (!pdata)
 		return -EINVAL;
 
+	priv->get_port_link = pdata->get_port_link;
+
+	data = &priv->chip_data.ar8327;
+
+	data->port0_status = ar8327_get_port_init_status(&pdata->port0_cfg);
+	data->port6_status = ar8327_get_port_init_status(&pdata->port6_cfg);
+
 	t = ar8327_get_pad_cfg(pdata->pad0_cfg);
 	priv->write(priv, AR8327_REG_PAD0_MODE, t);
 	t = ar8327_get_pad_cfg(pdata->pad5_cfg);
@@ -1010,14 +1099,96 @@ ar8327_hw_init(struct ar8216_priv *priv)
 		priv->write(priv, AR8327_REG_LED_CTRL1, led_cfg->led_ctrl1);
 		priv->write(priv, AR8327_REG_LED_CTRL2, led_cfg->led_ctrl2);
 		priv->write(priv, AR8327_REG_LED_CTRL3, led_cfg->led_ctrl3);
+
+		if (new_pos != pos)
+			new_pos |= AR8327_POWER_ON_STRIP_POWER_ON_SEL;
 	}
 
-	if (new_pos != pos) {
-		new_pos |= AR8327_POWER_ON_STRIP_POWER_ON_SEL;
-		priv->write(priv, AR8327_REG_POWER_ON_STRIP, new_pos);
+	if (pdata->sgmii_cfg) {
+		t = pdata->sgmii_cfg->sgmii_ctrl;
+		if (priv->chip_rev == 1)
+			t |= AR8327_SGMII_CTRL_EN_PLL |
+			     AR8327_SGMII_CTRL_EN_RX |
+			     AR8327_SGMII_CTRL_EN_TX;
+		else
+			t &= ~(AR8327_SGMII_CTRL_EN_PLL |
+			       AR8327_SGMII_CTRL_EN_RX |
+			       AR8327_SGMII_CTRL_EN_TX);
+
+		priv->write(priv, AR8327_REG_SGMII_CTRL, t);
+
+		if (pdata->sgmii_cfg->serdes_aen)
+			new_pos &= ~AR8327_POWER_ON_STRIP_SERDES_AEN;
+		else
+			new_pos |= AR8327_POWER_ON_STRIP_SERDES_AEN;
 	}
 
-	bus = priv->phy->bus;
+	priv->write(priv, AR8327_REG_POWER_ON_STRIP, new_pos);
+
+	return 0;
+}
+
+#ifdef CONFIG_OF
+static int
+ar8327_hw_config_of(struct ar8xxx_priv *priv, struct device_node *np)
+{
+	const __be32 *paddr;
+	int len;
+	int i;
+
+	paddr = of_get_property(np, "qca,ar8327-initvals", &len);
+	if (!paddr || len < (2 * sizeof(*paddr)))
+		return -EINVAL;
+
+	len /= sizeof(*paddr);
+
+	for (i = 0; i < len - 1; i += 2) {
+		u32 reg;
+		u32 val;
+
+		reg = be32_to_cpup(paddr + i);
+		val = be32_to_cpup(paddr + i + 1);
+
+		switch (reg) {
+		case AR8327_REG_PORT_STATUS(0):
+			priv->chip_data.ar8327.port0_status = val;
+			break;
+		case AR8327_REG_PORT_STATUS(6):
+			priv->chip_data.ar8327.port6_status = val;
+			break;
+		default:
+			priv->write(priv, reg, val);
+			break;
+		}
+	}
+
+	return 0;
+}
+#else
+static inline int
+ar8327_hw_config_of(struct ar8xxx_priv *priv, struct device_node *np)
+{
+	return -EINVAL;
+}
+#endif
+
+static int
+ar8327_hw_init(struct ar8xxx_priv *priv)
+{
+	struct mii_bus *bus;
+	int ret;
+	int i;
+
+	if (priv->phy->dev.of_node)
+		ret = ar8327_hw_config_of(priv, priv->phy->dev.of_node);
+	else
+		ret = ar8327_hw_config_pdata(priv,
+					     priv->phy->dev.platform_data);
+
+	if (ret)
+		return ret;
+
+	bus = priv->mii_bus;
 	for (i = 0; i < AR8327_NUM_PHYS; i++) {
 		ar8327_phy_fixup(priv, i);
 
@@ -1035,7 +1206,7 @@ ar8327_hw_init(struct ar8216_priv *priv)
 }
 
 static void
-ar8327_init_globals(struct ar8216_priv *priv)
+ar8327_init_globals(struct ar8xxx_priv *priv)
 {
 	u32 t;
 
@@ -1051,66 +1222,32 @@ ar8327_init_globals(struct ar8216_priv *priv)
 	priv->write(priv, AR8327_REG_FWD_CTRL1, t);
 
 	/* setup MTU */
-	ar8216_rmw(priv, AR8327_REG_MAX_FRAME_SIZE,
+	ar8xxx_rmw(priv, AR8327_REG_MAX_FRAME_SIZE,
 		   AR8327_MAX_FRAME_SIZE_MTU, 1518 + 8 + 2);
 
 	/* Enable MIB counters */
-	ar8216_reg_set(priv, AR8327_REG_MODULE_EN,
+	ar8xxx_reg_set(priv, AR8327_REG_MODULE_EN,
 		       AR8327_MODULE_EN_MIB);
 }
 
 static void
-ar8327_init_cpuport(struct ar8216_priv *priv)
-{
-	struct ar8327_platform_data *pdata;
-	struct ar8327_port_cfg *cfg;
-	u32 t;
-
-	pdata = priv->phy->dev.platform_data;
-	if (!pdata)
-		return;
-
-	cfg = &pdata->cpuport_cfg;
-	if (!cfg->force_link) {
-		priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU),
-			    AR8216_PORT_STATUS_LINK_AUTO);
-		return;
-	}
-
-	t = AR8216_PORT_STATUS_TXMAC | AR8216_PORT_STATUS_RXMAC;
-	t |= cfg->duplex ? AR8216_PORT_STATUS_DUPLEX : 0;
-	t |= cfg->rxpause ? AR8216_PORT_STATUS_RXFLOW : 0;
-	t |= cfg->txpause ? AR8216_PORT_STATUS_TXFLOW : 0;
-	switch (cfg->speed) {
-	case AR8327_PORT_SPEED_10:
-		t |= AR8216_PORT_SPEED_10M;
-		break;
-	case AR8327_PORT_SPEED_100:
-		t |= AR8216_PORT_SPEED_100M;
-		break;
-	case AR8327_PORT_SPEED_1000:
-		t |= AR8216_PORT_SPEED_1000M;
-		break;
-	}
-
-	priv->write(priv, AR8327_REG_PORT_STATUS(AR8216_PORT_CPU), t);
-}
-
-static void
-ar8327_init_port(struct ar8216_priv *priv, int port)
+ar8327_init_port(struct ar8xxx_priv *priv, int port)
 {
 	u32 t;
 
-	if (port == AR8216_PORT_CPU) {
-		ar8327_init_cpuport(priv);
-	} else {
+	if (port == AR8216_PORT_CPU)
+		t = priv->chip_data.ar8327.port0_status;
+	else if (port == 6)
+		t = priv->chip_data.ar8327.port6_status;
+	else
 		t = AR8216_PORT_STATUS_LINK_AUTO;
-		priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
-	}
 
+	priv->write(priv, AR8327_REG_PORT_STATUS(port), t);
 	priv->write(priv, AR8327_REG_PORT_HEADER(port), 0);
 
-	priv->write(priv, AR8327_REG_PORT_VLAN0(port), 0);
+	t = 1 << AR8327_PORT_VLAN0_DEF_SVID_S;
+	t |= 1 << AR8327_PORT_VLAN0_DEF_CVID_S;
+	priv->write(priv, AR8327_REG_PORT_VLAN0(port), t);
 
 	t = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH << AR8327_PORT_VLAN1_OUT_MODE_S;
 	priv->write(priv, AR8327_REG_PORT_VLAN1(port), t);
@@ -1121,13 +1258,13 @@ ar8327_init_port(struct ar8216_priv *priv, int port)
 }
 
 static u32
-ar8327_read_port_status(struct ar8216_priv *priv, int port)
+ar8327_read_port_status(struct ar8xxx_priv *priv, int port)
 {
 	return priv->read(priv, AR8327_REG_PORT_STATUS(port));
 }
 
 static int
-ar8327_atu_flush(struct ar8216_priv *priv)
+ar8327_atu_flush(struct ar8xxx_priv *priv)
 {
 	int ret;
 
@@ -1141,7 +1278,7 @@ ar8327_atu_flush(struct ar8216_priv *priv)
 }
 
 static void
-ar8327_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
+ar8327_vtu_op(struct ar8xxx_priv *priv, u32 op, u32 val)
 {
 	if (ar8216_wait_bit(priv, AR8327_REG_VTU_FUNC1,
 			    AR8327_VTU_FUNC1_BUSY, 0))
@@ -1155,13 +1292,13 @@ ar8327_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 }
 
 static void
-ar8327_vtu_flush(struct ar8216_priv *priv)
+ar8327_vtu_flush(struct ar8xxx_priv *priv)
 {
 	ar8327_vtu_op(priv, AR8327_VTU_FUNC1_OP_FLUSH, 0);
 }
 
 static void
-ar8327_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
+ar8327_vtu_load_vlan(struct ar8xxx_priv *priv, u32 vid, u32 port_mask)
 {
 	u32 op;
 	u32 val;
@@ -1187,7 +1324,7 @@ ar8327_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
 }
 
 static void
-ar8327_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
+ar8327_setup_port(struct ar8xxx_priv *priv, int port, u32 egress, u32 ingress,
 		  u32 members, u32 pvid)
 {
 	u32 t;
@@ -1237,28 +1374,28 @@ static const struct ar8xxx_chip ar8327_chip = {
 };
 
 static int
-ar8216_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
+ar8xxx_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 		   struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	priv->vlan = !!val->value.i;
 	return 0;
 }
 
 static int
-ar8216_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
+ar8xxx_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 		   struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	val->value.i = priv->vlan;
 	return 0;
 }
 
 
 static int
-ar8216_sw_set_pvid(struct switch_dev *dev, int port, int vlan)
+ar8xxx_sw_set_pvid(struct switch_dev *dev, int port, int vlan)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 
 	/* make sure no invalid PVIDs get set */
 
@@ -1270,45 +1407,45 @@ ar8216_sw_set_pvid(struct switch_dev *dev, int port, int vlan)
 }
 
 static int
-ar8216_sw_get_pvid(struct switch_dev *dev, int port, int *vlan)
+ar8xxx_sw_get_pvid(struct switch_dev *dev, int port, int *vlan)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	*vlan = priv->pvid[port];
 	return 0;
 }
 
 static int
-ar8216_sw_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
+ar8xxx_sw_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 		  struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	priv->vlan_id[val->port_vlan] = val->value.i;
 	return 0;
 }
 
 static int
-ar8216_sw_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
+ar8xxx_sw_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 		  struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	val->value.i = priv->vlan_id[val->port_vlan];
 	return 0;
 }
 
 static int
-ar8216_sw_get_port_link(struct switch_dev *dev, int port,
+ar8xxx_sw_get_port_link(struct switch_dev *dev, int port,
 			struct switch_port_link *link)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 
 	ar8216_read_port_link(priv, port, link);
 	return 0;
 }
 
 static int
-ar8216_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
+ar8xxx_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	u8 ports = priv->vlan_table[val->port_vlan];
 	int i;
 
@@ -1330,9 +1467,9 @@ ar8216_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
 }
 
 static int
-ar8216_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
+ar8xxx_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	u8 *vt = &priv->vlan_table[val->port_vlan];
 	int i, j;
 
@@ -1360,10 +1497,102 @@ ar8216_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
 	return 0;
 }
 
+static void
+ar8327_set_mirror_regs(struct ar8xxx_priv *priv)
+{
+	int port;
+
+	/* reset all mirror registers */
+	ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL0,
+		   AR8327_FWD_CTRL0_MIRROR_PORT,
+		   (0xF << AR8327_FWD_CTRL0_MIRROR_PORT_S));
+	for (port = 0; port < AR8327_NUM_PORTS; port++) {
+		ar8xxx_rmw(priv, AR8327_REG_PORT_LOOKUP(port),
+			   AR8327_PORT_LOOKUP_ING_MIRROR_EN,
+			   0);
+
+		ar8xxx_rmw(priv, AR8327_REG_PORT_HOL_CTRL1(port),
+			   AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN,
+			   0);
+	}
+
+	/* now enable mirroring if necessary */
+	if (priv->source_port >= AR8327_NUM_PORTS ||
+	    priv->monitor_port >= AR8327_NUM_PORTS ||
+	    priv->source_port == priv->monitor_port) {
+		return;
+	}
+
+	ar8xxx_rmw(priv, AR8327_REG_FWD_CTRL0,
+		   AR8327_FWD_CTRL0_MIRROR_PORT,
+		   (priv->monitor_port << AR8327_FWD_CTRL0_MIRROR_PORT_S));
+
+	if (priv->mirror_rx)
+		ar8xxx_rmw(priv, AR8327_REG_PORT_LOOKUP(priv->source_port),
+			   AR8327_PORT_LOOKUP_ING_MIRROR_EN,
+			   AR8327_PORT_LOOKUP_ING_MIRROR_EN);
+
+	if (priv->mirror_tx)
+		ar8xxx_rmw(priv, AR8327_REG_PORT_HOL_CTRL1(priv->source_port),
+			   AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN,
+			   AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN);
+}
+
+static void
+ar8216_set_mirror_regs(struct ar8xxx_priv *priv)
+{
+	int port;
+
+	/* reset all mirror registers */
+	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CPUPORT,
+		   AR8216_GLOBAL_CPUPORT_MIRROR_PORT,
+		   (0xF << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
+	for (port = 0; port < AR8216_NUM_PORTS; port++) {
+		ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
+			   AR8216_PORT_CTRL_MIRROR_RX,
+			   0);
+
+		ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(port),
+			   AR8216_PORT_CTRL_MIRROR_TX,
+			   0);
+	}
+
+	/* now enable mirroring if necessary */
+	if (priv->source_port >= AR8216_NUM_PORTS ||
+	    priv->monitor_port >= AR8216_NUM_PORTS ||
+	    priv->source_port == priv->monitor_port) {
+		return;
+	}
+
+	ar8xxx_rmw(priv, AR8216_REG_GLOBAL_CPUPORT,
+		   AR8216_GLOBAL_CPUPORT_MIRROR_PORT,
+		   (priv->monitor_port << AR8216_GLOBAL_CPUPORT_MIRROR_PORT_S));
+
+	if (priv->mirror_rx)
+		ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(priv->source_port),
+			   AR8216_PORT_CTRL_MIRROR_RX,
+			   AR8216_PORT_CTRL_MIRROR_RX);
+
+	if (priv->mirror_tx)
+		ar8xxx_rmw(priv, AR8216_REG_PORT_CTRL(priv->source_port),
+			   AR8216_PORT_CTRL_MIRROR_TX,
+			   AR8216_PORT_CTRL_MIRROR_TX);
+}
+
+static void
+ar8xxx_set_mirror_regs(struct ar8xxx_priv *priv)
+{
+	if (chip_is_ar8327(priv)) {
+		ar8327_set_mirror_regs(priv);
+	} else {
+		ar8216_set_mirror_regs(priv);
+	}
+}
+
 static int
-ar8216_sw_hw_apply(struct switch_dev *dev)
+ar8xxx_sw_hw_apply(struct switch_dev *dev)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	u8 portmask[AR8X16_MAX_PORTS];
 	int i, j;
 
@@ -1423,19 +1652,22 @@ ar8216_sw_hw_apply(struct switch_dev *dev)
 		priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
 				       pvid);
 	}
+
+	ar8xxx_set_mirror_regs(priv);
+
 	mutex_unlock(&priv->reg_mutex);
 	return 0;
 }
 
 static int
-ar8216_sw_reset_switch(struct switch_dev *dev)
+ar8xxx_sw_reset_switch(struct switch_dev *dev)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	int i;
 
 	mutex_lock(&priv->reg_mutex);
-	memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
-		offsetof(struct ar8216_priv, vlan));
+	memset(&priv->vlan, 0, sizeof(struct ar8xxx_priv) -
+		offsetof(struct ar8xxx_priv, vlan));
 
 	for (i = 0; i < AR8X16_MAX_VLANS; i++)
 		priv->vlan_id[i] = i;
@@ -1444,18 +1676,24 @@ ar8216_sw_reset_switch(struct switch_dev *dev)
 	for (i = 0; i < dev->ports; i++)
 		priv->chip->init_port(priv, i);
 
+	priv->mirror_rx = false;
+	priv->mirror_tx = false;
+	priv->source_port = 0;
+	priv->monitor_port = 0;
+
 	priv->chip->init_globals(priv);
+
 	mutex_unlock(&priv->reg_mutex);
 
-	return ar8216_sw_hw_apply(dev);
+	return ar8xxx_sw_hw_apply(dev);
 }
 
 static int
-ar8216_sw_set_reset_mibs(struct switch_dev *dev,
+ar8xxx_sw_set_reset_mibs(struct switch_dev *dev,
 			 const struct switch_attr *attr,
 			 struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	unsigned int len;
 	int ret;
 
@@ -1467,7 +1705,7 @@ ar8216_sw_set_reset_mibs(struct switch_dev *dev,
 	len = priv->dev.ports * priv->chip->num_mibs *
 	      sizeof(*priv->mib_stats);
 	memset(priv->mib_stats, '\0', len);
-	ret = ar8216_mib_flush(priv);
+	ret = ar8xxx_mib_flush(priv);
 	if (ret)
 		goto unlock;
 
@@ -1479,11 +1717,111 @@ unlock:
 }
 
 static int
-ar8216_sw_set_port_reset_mib(struct switch_dev *dev,
+ar8xxx_sw_set_mirror_rx_enable(struct switch_dev *dev,
+			       const struct switch_attr *attr,
+			       struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+
+	mutex_lock(&priv->reg_mutex);
+	priv->mirror_rx = !!val->value.i;
+	ar8xxx_set_mirror_regs(priv);
+	mutex_unlock(&priv->reg_mutex);
+
+	return 0;
+}
+
+static int
+ar8xxx_sw_get_mirror_rx_enable(struct switch_dev *dev,
+			       const struct switch_attr *attr,
+			       struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+	val->value.i = priv->mirror_rx;
+	return 0;
+}
+
+static int
+ar8xxx_sw_set_mirror_tx_enable(struct switch_dev *dev,
+			       const struct switch_attr *attr,
+			       struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+
+	mutex_lock(&priv->reg_mutex);
+	priv->mirror_tx = !!val->value.i;
+	ar8xxx_set_mirror_regs(priv);
+	mutex_unlock(&priv->reg_mutex);
+
+	return 0;
+}
+
+static int
+ar8xxx_sw_get_mirror_tx_enable(struct switch_dev *dev,
+			       const struct switch_attr *attr,
+			       struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+	val->value.i = priv->mirror_tx;
+	return 0;
+}
+
+static int
+ar8xxx_sw_set_mirror_monitor_port(struct switch_dev *dev,
+				  const struct switch_attr *attr,
+				  struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+
+	mutex_lock(&priv->reg_mutex);
+	priv->monitor_port = val->value.i;
+	ar8xxx_set_mirror_regs(priv);
+	mutex_unlock(&priv->reg_mutex);
+
+	return 0;
+}
+
+static int
+ar8xxx_sw_get_mirror_monitor_port(struct switch_dev *dev,
+				  const struct switch_attr *attr,
+				  struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+	val->value.i = priv->monitor_port;
+	return 0;
+}
+
+static int
+ar8xxx_sw_set_mirror_source_port(struct switch_dev *dev,
+				 const struct switch_attr *attr,
+				 struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+
+	mutex_lock(&priv->reg_mutex);
+	priv->source_port = val->value.i;
+	ar8xxx_set_mirror_regs(priv);
+	mutex_unlock(&priv->reg_mutex);
+
+	return 0;
+}
+
+static int
+ar8xxx_sw_get_mirror_source_port(struct switch_dev *dev,
+				 const struct switch_attr *attr,
+				 struct switch_val *val)
+{
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
+	val->value.i = priv->source_port;
+	return 0;
+}
+
+static int
+ar8xxx_sw_set_port_reset_mib(struct switch_dev *dev,
 			     const struct switch_attr *attr,
 			     struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	int port;
 	int ret;
 
@@ -1495,11 +1833,11 @@ ar8216_sw_set_port_reset_mib(struct switch_dev *dev,
 		return -EINVAL;
 
 	mutex_lock(&priv->mib_lock);
-	ret = ar8216_mib_capture(priv);
+	ret = ar8xxx_mib_capture(priv);
 	if (ret)
 		goto unlock;
 
-	ar8216_mib_fetch_port_stat(priv, port, true);
+	ar8xxx_mib_fetch_port_stat(priv, port, true);
 
 	ret = 0;
 
@@ -1509,11 +1847,11 @@ unlock:
 }
 
 static int
-ar8216_sw_get_port_mib(struct switch_dev *dev,
+ar8xxx_sw_get_port_mib(struct switch_dev *dev,
 		       const struct switch_attr *attr,
 		       struct switch_val *val)
 {
-	struct ar8216_priv *priv = to_ar8216(dev);
+	struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev);
 	const struct ar8xxx_chip *chip = priv->chip;
 	u64 *mib_stats;
 	int port;
@@ -1529,11 +1867,11 @@ ar8216_sw_get_port_mib(struct switch_dev *dev,
 		return -EINVAL;
 
 	mutex_lock(&priv->mib_lock);
-	ret = ar8216_mib_capture(priv);
+	ret = ar8xxx_mib_capture(priv);
 	if (ret)
 		goto unlock;
 
-	ar8216_mib_fetch_port_stat(priv, port, false);
+	ar8xxx_mib_fetch_port_stat(priv, port, false);
 
 	len += snprintf(buf + len, sizeof(priv->buf) - len,
 			"Port %d MIB counters\n",
@@ -1556,81 +1894,183 @@ unlock:
 	return ret;
 }
 
-static struct switch_attr ar8216_globals[] = {
+static struct switch_attr ar8xxx_sw_attr_globals[] = {
 	{
 		.type = SWITCH_TYPE_INT,
 		.name = "enable_vlan",
 		.description = "Enable VLAN mode",
-		.set = ar8216_sw_set_vlan,
-		.get = ar8216_sw_get_vlan,
+		.set = ar8xxx_sw_set_vlan,
+		.get = ar8xxx_sw_get_vlan,
 		.max = 1
 	},
 	{
 		.type = SWITCH_TYPE_NOVAL,
 		.name = "reset_mibs",
 		.description = "Reset all MIB counters",
-		.set = ar8216_sw_set_reset_mibs,
+		.set = ar8xxx_sw_set_reset_mibs,
 	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "enable_mirror_rx",
+		.description = "Enable mirroring of RX packets",
+		.set = ar8xxx_sw_set_mirror_rx_enable,
+		.get = ar8xxx_sw_get_mirror_rx_enable,
+		.max = 1
+	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "enable_mirror_tx",
+		.description = "Enable mirroring of TX packets",
+		.set = ar8xxx_sw_set_mirror_tx_enable,
+		.get = ar8xxx_sw_get_mirror_tx_enable,
+		.max = 1
+	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "mirror_monitor_port",
+		.description = "Mirror monitor port",
+		.set = ar8xxx_sw_set_mirror_monitor_port,
+		.get = ar8xxx_sw_get_mirror_monitor_port,
+		.max = AR8216_NUM_PORTS - 1
+	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "mirror_source_port",
+		.description = "Mirror source port",
+		.set = ar8xxx_sw_set_mirror_source_port,
+		.get = ar8xxx_sw_get_mirror_source_port,
+		.max = AR8216_NUM_PORTS - 1
+ 	},
+};
 
+static struct switch_attr ar8327_sw_attr_globals[] = {
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "enable_vlan",
+		.description = "Enable VLAN mode",
+		.set = ar8xxx_sw_set_vlan,
+		.get = ar8xxx_sw_get_vlan,
+		.max = 1
+	},
+	{
+		.type = SWITCH_TYPE_NOVAL,
+		.name = "reset_mibs",
+		.description = "Reset all MIB counters",
+		.set = ar8xxx_sw_set_reset_mibs,
+	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "enable_mirror_rx",
+		.description = "Enable mirroring of RX packets",
+		.set = ar8xxx_sw_set_mirror_rx_enable,
+		.get = ar8xxx_sw_get_mirror_rx_enable,
+		.max = 1
+	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "enable_mirror_tx",
+		.description = "Enable mirroring of TX packets",
+		.set = ar8xxx_sw_set_mirror_tx_enable,
+		.get = ar8xxx_sw_get_mirror_tx_enable,
+		.max = 1
+	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "mirror_monitor_port",
+		.description = "Mirror monitor port",
+		.set = ar8xxx_sw_set_mirror_monitor_port,
+		.get = ar8xxx_sw_get_mirror_monitor_port,
+		.max = AR8327_NUM_PORTS - 1
+	},
+	{
+		.type = SWITCH_TYPE_INT,
+		.name = "mirror_source_port",
+		.description = "Mirror source port",
+		.set = ar8xxx_sw_set_mirror_source_port,
+		.get = ar8xxx_sw_get_mirror_source_port,
+		.max = AR8327_NUM_PORTS - 1
+ 	},
 };
 
-static struct switch_attr ar8216_port[] = {
+static struct switch_attr ar8xxx_sw_attr_port[] = {
 	{
 		.type = SWITCH_TYPE_NOVAL,
 		.name = "reset_mib",
 		.description = "Reset single port MIB counters",
-		.set = ar8216_sw_set_port_reset_mib,
+		.set = ar8xxx_sw_set_port_reset_mib,
 	},
 	{
 		.type = SWITCH_TYPE_STRING,
 		.name = "mib",
 		.description = "Get port's MIB counters",
 		.set = NULL,
-		.get = ar8216_sw_get_port_mib,
+		.get = ar8xxx_sw_get_port_mib,
 	},
 };
 
-static struct switch_attr ar8216_vlan[] = {
+static struct switch_attr ar8xxx_sw_attr_vlan[] = {
 	{
 		.type = SWITCH_TYPE_INT,
 		.name = "vid",
 		.description = "VLAN ID (0-4094)",
-		.set = ar8216_sw_set_vid,
-		.get = ar8216_sw_get_vid,
+		.set = ar8xxx_sw_set_vid,
+		.get = ar8xxx_sw_get_vid,
 		.max = 4094,
 	},
 };
 
-static const struct switch_dev_ops ar8216_sw_ops = {
+static const struct switch_dev_ops ar8xxx_sw_ops = {
 	.attr_global = {
-		.attr = ar8216_globals,
-		.n_attr = ARRAY_SIZE(ar8216_globals),
+		.attr = ar8xxx_sw_attr_globals,
+		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_globals),
 	},
 	.attr_port = {
-		.attr = ar8216_port,
-		.n_attr = ARRAY_SIZE(ar8216_port),
+		.attr = ar8xxx_sw_attr_port,
+		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_port),
 	},
 	.attr_vlan = {
-		.attr = ar8216_vlan,
-		.n_attr = ARRAY_SIZE(ar8216_vlan),
+		.attr = ar8xxx_sw_attr_vlan,
+		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_vlan),
 	},
-	.get_port_pvid = ar8216_sw_get_pvid,
-	.set_port_pvid = ar8216_sw_set_pvid,
-	.get_vlan_ports = ar8216_sw_get_ports,
-	.set_vlan_ports = ar8216_sw_set_ports,
-	.apply_config = ar8216_sw_hw_apply,
-	.reset_switch = ar8216_sw_reset_switch,
-	.get_port_link = ar8216_sw_get_port_link,
+	.get_port_pvid = ar8xxx_sw_get_pvid,
+	.set_port_pvid = ar8xxx_sw_set_pvid,
+	.get_vlan_ports = ar8xxx_sw_get_ports,
+	.set_vlan_ports = ar8xxx_sw_set_ports,
+	.apply_config = ar8xxx_sw_hw_apply,
+	.reset_switch = ar8xxx_sw_reset_switch,
+	.get_port_link = ar8xxx_sw_get_port_link,
+};
+
+static const struct switch_dev_ops ar8327_sw_ops = {
+	.attr_global = {
+		.attr = ar8327_sw_attr_globals,
+		.n_attr = ARRAY_SIZE(ar8327_sw_attr_globals),
+	},
+	.attr_port = {
+		.attr = ar8xxx_sw_attr_port,
+		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_port),
+	},
+	.attr_vlan = {
+		.attr = ar8xxx_sw_attr_vlan,
+		.n_attr = ARRAY_SIZE(ar8xxx_sw_attr_vlan),
+	},
+	.get_port_pvid = ar8xxx_sw_get_pvid,
+	.set_port_pvid = ar8xxx_sw_set_pvid,
+	.get_vlan_ports = ar8xxx_sw_get_ports,
+	.set_vlan_ports = ar8xxx_sw_set_ports,
+	.apply_config = ar8xxx_sw_hw_apply,
+	.reset_switch = ar8xxx_sw_reset_switch,
+	.get_port_link = ar8xxx_sw_get_port_link,
 };
 
 static int
-ar8216_id_chip(struct ar8216_priv *priv)
+ar8xxx_id_chip(struct ar8xxx_priv *priv)
 {
 	u32 val;
 	u16 id;
 	int i;
 
-	val = ar8216_mii_read(priv, AR8216_REG_CTRL);
+	val = priv->read(priv, AR8216_REG_CTRL);
 	if (val == ~0)
 		return -ENODEV;
 
@@ -1638,7 +2078,7 @@ ar8216_id_chip(struct ar8216_priv *priv)
 	for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 		u16 t;
 
-		val = ar8216_mii_read(priv, AR8216_REG_CTRL);
+		val = priv->read(priv, AR8216_REG_CTRL);
 		if (val == ~0)
 			return -ENODEV;
 
@@ -1665,11 +2105,8 @@ ar8216_id_chip(struct ar8216_priv *priv)
 		priv->chip = &ar8327_chip;
 		break;
 	default:
-		printk(KERN_DEBUG
-			"ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
-			priv->chip_ver, priv->chip_rev,
-			mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
-			mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
+		pr_err("ar8216: Unknown Atheros device [ver=%d, rev=%d]\n",
+		       priv->chip_ver, priv->chip_rev);
 
 		return -ENODEV;
 	}
@@ -1680,18 +2117,18 @@ ar8216_id_chip(struct ar8216_priv *priv)
 static void
 ar8xxx_mib_work_func(struct work_struct *work)
 {
-	struct ar8216_priv *priv;
+	struct ar8xxx_priv *priv;
 	int err;
 
-	priv = container_of(work, struct ar8216_priv, mib_work.work);
+	priv = container_of(work, struct ar8xxx_priv, mib_work.work);
 
 	mutex_lock(&priv->mib_lock);
 
-	err = ar8216_mib_capture(priv);
+	err = ar8xxx_mib_capture(priv);
 	if (err)
 		goto next_port;
 
-	ar8216_mib_fetch_port_stat(priv, priv->mib_next_port, false);
+	ar8xxx_mib_fetch_port_stat(priv, priv->mib_next_port, false);
 
 next_port:
 	priv->mib_next_port++;
@@ -1704,7 +2141,7 @@ next_port:
 }
 
 static int
-ar8xxx_mib_init(struct ar8216_priv *priv)
+ar8xxx_mib_init(struct ar8xxx_priv *priv)
 {
 	unsigned int len;
 
@@ -1720,14 +2157,11 @@ ar8xxx_mib_init(struct ar8216_priv *priv)
 	if (!priv->mib_stats)
 		return -ENOMEM;
 
-	mutex_init(&priv->mib_lock);
-	INIT_DELAYED_WORK(&priv->mib_work, ar8xxx_mib_work_func);
-
 	return 0;
 }
 
 static void
-ar8xxx_mib_start(struct ar8216_priv *priv)
+ar8xxx_mib_start(struct ar8xxx_priv *priv)
 {
 	if (!ar8xxx_has_mib_counters(priv))
 		return;
@@ -1737,96 +2171,70 @@ ar8xxx_mib_start(struct ar8216_priv *priv)
 }
 
 static void
-ar8xxx_mib_cleanup(struct ar8216_priv *priv)
+ar8xxx_mib_stop(struct ar8xxx_priv *priv)
 {
 	if (!ar8xxx_has_mib_counters(priv))
 		return;
 
 	cancel_delayed_work(&priv->mib_work);
-	kfree(priv->mib_stats);
 }
 
-static int
-ar8216_config_init(struct phy_device *pdev)
+static struct ar8xxx_priv *
+ar8xxx_create(void)
 {
-	struct ar8216_priv *priv = pdev->priv;
-	struct net_device *dev = pdev->attached_dev;
-	struct switch_dev *swdev;
-	int ret;
-
-	if (!priv) {
-		priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
-		if (priv == NULL)
-			return -ENOMEM;
-	}
+	struct ar8xxx_priv *priv;
 
-	priv->phy = pdev;
-
-	ret = ar8216_id_chip(priv);
-	if (ret)
-		goto err_free_priv;
-
-	if (pdev->addr != 0) {
-		if (ar8xxx_has_gige(priv)) {
-			pdev->supported |= SUPPORTED_1000baseT_Full;
-			pdev->advertising |= ADVERTISED_1000baseT_Full;
-		}
+	priv = kzalloc(sizeof(struct ar8xxx_priv), GFP_KERNEL);
+	if (priv == NULL)
+		return NULL;
 
-		if (chip_is_ar8316(priv)) {
-			/* check if we're attaching to the switch twice */
-			pdev = pdev->bus->phy_map[0];
-			if (!pdev) {
-				kfree(priv);
-				return 0;
-			}
+	mutex_init(&priv->reg_mutex);
+	mutex_init(&priv->mib_lock);
+	INIT_DELAYED_WORK(&priv->mib_work, ar8xxx_mib_work_func);
 
-			/* switch device has not been initialized, reuse priv */
-			if (!pdev->priv) {
-				priv->port4_phy = true;
-				pdev->priv = priv;
-				return 0;
-			}
+	return priv;
+}
 
-			kfree(priv);
+static void
+ar8xxx_free(struct ar8xxx_priv *priv)
+{
+	kfree(priv->mib_stats);
+	kfree(priv);
+}
 
-			/* switch device has been initialized, reinit */
-			priv = pdev->priv;
-			priv->dev.ports = (AR8216_NUM_PORTS - 1);
-			priv->initialized = false;
-			priv->port4_phy = true;
-			ar8316_hw_init(priv);
-			return 0;
-		}
+static struct ar8xxx_priv *
+ar8xxx_create_mii(struct mii_bus *bus)
+{
+	struct ar8xxx_priv *priv;
 
-		kfree(priv);
-		return 0;
+	priv = ar8xxx_create();
+	if (priv) {
+		priv->mii_bus = bus;
+		priv->read = ar8xxx_mii_read;
+		priv->write = ar8xxx_mii_write;
 	}
 
-	if (ar8xxx_has_gige(priv))
-		pdev->supported = SUPPORTED_1000baseT_Full;
-	else
-		pdev->supported = SUPPORTED_100baseT_Full;
-	pdev->advertising = pdev->supported;
+	return priv;
+}
 
-	mutex_init(&priv->reg_mutex);
-	priv->read = ar8216_mii_read;
-	priv->write = ar8216_mii_write;
+static int
+ar8xxx_probe_switch(struct ar8xxx_priv *priv)
+{
+	struct switch_dev *swdev;
+	int ret;
 
-	pdev->priv = priv;
+	ret = ar8xxx_id_chip(priv);
+	if (ret)
+		return ret;
 
 	swdev = &priv->dev;
 	swdev->cpu_port = AR8216_PORT_CPU;
-	swdev->ops = &ar8216_sw_ops;
-	swdev->ports = AR8216_NUM_PORTS;
+	swdev->ops = &ar8xxx_sw_ops;
 
 	if (chip_is_ar8316(priv)) {
 		swdev->name = "Atheros AR8316";
 		swdev->vlans = AR8X16_MAX_VLANS;
-
-		if (priv->port4_phy) {
-			/* port 5 connected to the other mac, therefore unusable */
-			swdev->ports = (AR8216_NUM_PORTS - 1);
-		}
+		swdev->ports = AR8216_NUM_PORTS;
 	} else if (chip_is_ar8236(priv)) {
 		swdev->name = "Atheros AR8236";
 		swdev->vlans = AR8216_NUM_VLANS;
@@ -1835,58 +2243,89 @@ ar8216_config_init(struct phy_device *pdev)
 		swdev->name = "Atheros AR8327";
 		swdev->vlans = AR8X16_MAX_VLANS;
 		swdev->ports = AR8327_NUM_PORTS;
+		swdev->ops = &ar8327_sw_ops;
 	} else {
 		swdev->name = "Atheros AR8216";
 		swdev->vlans = AR8216_NUM_VLANS;
+		swdev->ports = AR8216_NUM_PORTS;
 	}
 
 	ret = ar8xxx_mib_init(priv);
 	if (ret)
-		goto err_free_priv;
+		return ret;
 
-	ret = register_switch(&priv->dev, pdev->attached_dev);
-	if (ret)
-		goto err_cleanup_mib;
+	return 0;
+}
 
-	printk(KERN_INFO "%s: %s switch driver attached.\n",
-		pdev->attached_dev->name, swdev->name);
+static int
+ar8xxx_start(struct ar8xxx_priv *priv)
+{
+	int ret;
 
 	priv->init = true;
 
 	ret = priv->chip->hw_init(priv);
 	if (ret)
-		goto err_cleanup_mib;
+		return ret;
 
-	ret = ar8216_sw_reset_switch(&priv->dev);
+	ret = ar8xxx_sw_reset_switch(&priv->dev);
 	if (ret)
-		goto err_cleanup_mib;
+		return ret;
 
-	dev->phy_ptr = priv;
+	priv->init = false;
+
+	ar8xxx_mib_start(priv);
+
+	return 0;
+}
+
+static int
+ar8xxx_phy_config_init(struct phy_device *phydev)
+{
+	struct ar8xxx_priv *priv = phydev->priv;
+	struct net_device *dev = phydev->attached_dev;
+	int ret;
+
+	if (WARN_ON(!priv))
+		return -ENODEV;
+
+	if (chip_is_ar8327(priv))
+		return 0;
+
+	priv->phy = phydev;
+
+	if (phydev->addr != 0) {
+		if (chip_is_ar8316(priv)) {
+			/* switch device has been initialized, reinit */
+			priv->dev.ports = (AR8216_NUM_PORTS - 1);
+			priv->initialized = false;
+			priv->port4_phy = true;
+			ar8316_hw_init(priv);
+			return 0;
+		}
+
+		return 0;
+	}
+
+	ret = ar8xxx_start(priv);
+	if (ret)
+		return ret;
 
 	/* VID fixup only needed on ar8216 */
-	if (chip_is_ar8216(priv) && pdev->addr == 0) {
+	if (chip_is_ar8216(priv)) {
+		dev->phy_ptr = priv;
 		dev->priv_flags |= IFF_NO_IP_ALIGN;
 		dev->eth_mangle_rx = ar8216_mangle_rx;
 		dev->eth_mangle_tx = ar8216_mangle_tx;
 	}
 
-	priv->init = false;
-
-	ar8xxx_mib_start(priv);
-
 	return 0;
-
-err_cleanup_mib:
-	ar8xxx_mib_cleanup(priv);
-err_free_priv:
-	kfree(priv);
-	return ret;
 }
 
 static int
-ar8216_read_status(struct phy_device *phydev)
+ar8xxx_phy_read_status(struct phy_device *phydev)
 {
-	struct ar8216_priv *priv = phydev->priv;
+	struct ar8xxx_priv *priv = phydev->priv;
 	struct switch_port_link link;
 	int ret;
 
@@ -1926,7 +2365,7 @@ ar8216_read_status(struct phy_device *phydev)
 }
 
 static int
-ar8216_config_aneg(struct phy_device *phydev)
+ar8xxx_phy_config_aneg(struct phy_device *phydev)
 {
 	if (phydev->addr == 0)
 		return 0;
@@ -1934,70 +2373,193 @@ ar8216_config_aneg(struct phy_device *phydev)
 	return genphy_config_aneg(phydev);
 }
 
+static const u32 ar8xxx_phy_ids[] = {
+	0x004dd033,
+	0x004dd034,
+	0x004dd041,
+	0x004dd042,
+};
+
+static bool
+ar8xxx_phy_match(u32 phy_id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(ar8xxx_phy_ids); i++)
+		if (phy_id == ar8xxx_phy_ids[i])
+			return true;
+
+	return false;
+}
+
+static bool
+ar8xxx_is_possible(struct mii_bus *bus)
+{
+	unsigned i;
+
+	for (i = 0; i < 4; i++) {
+		u32 phy_id;
+
+		phy_id = mdiobus_read(bus, i, MII_PHYSID1) << 16;
+		phy_id |= mdiobus_read(bus, i, MII_PHYSID2);
+		if (!ar8xxx_phy_match(phy_id)) {
+			pr_debug("ar8xxx: unknown PHY at %s:%02x id:%08x\n",
+				 dev_name(&bus->dev), i, phy_id);
+			return false;
+		}
+	}
+
+	return true;
+}
+
 static int
-ar8216_probe(struct phy_device *pdev)
+ar8xxx_phy_probe(struct phy_device *phydev)
 {
-	struct ar8216_priv *priv;
+	struct ar8xxx_priv *priv;
+	struct switch_dev *swdev;
 	int ret;
 
-	priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
-	if (priv == NULL)
-		return -ENOMEM;
+	/* skip PHYs at unused adresses */
+	if (phydev->addr != 0 && phydev->addr != 4)
+		return -ENODEV;
 
-	priv->phy = pdev;
+	if (!ar8xxx_is_possible(phydev->bus))
+		return -ENODEV;
 
-	ret = ar8216_id_chip(priv);
-	kfree(priv);
+	mutex_lock(&ar8xxx_dev_list_lock);
+	list_for_each_entry(priv, &ar8xxx_dev_list, list)
+		if (priv->mii_bus == phydev->bus)
+			goto found;
+
+	priv = ar8xxx_create_mii(phydev->bus);
+	if (priv == NULL) {
+		ret = -ENOMEM;
+		goto unlock;
+	}
+
+	ret = ar8xxx_probe_switch(priv);
+	if (ret)
+		goto free_priv;
+
+	swdev = &priv->dev;
+	swdev->alias = dev_name(&priv->mii_bus->dev);
+	ret = register_switch(swdev, NULL);
+	if (ret)
+		goto free_priv;
+
+	pr_info("%s: %s rev. %u switch registered on %s\n",
+		swdev->devname, swdev->name, priv->chip_rev,
+		dev_name(&priv->mii_bus->dev));
+
+found:
+	priv->use_count++;
+
+	if (phydev->addr == 0) {
+		if (ar8xxx_has_gige(priv)) {
+			phydev->supported = SUPPORTED_1000baseT_Full;
+			phydev->advertising = ADVERTISED_1000baseT_Full;
+		} else {
+			phydev->supported = SUPPORTED_100baseT_Full;
+			phydev->advertising = ADVERTISED_100baseT_Full;
+		}
 
+		if (chip_is_ar8327(priv)) {
+			priv->phy = phydev;
+
+			ret = ar8xxx_start(priv);
+			if (ret)
+				goto err_unregister_switch;
+		}
+	} else {
+		if (ar8xxx_has_gige(priv)) {
+			phydev->supported |= SUPPORTED_1000baseT_Full;
+			phydev->advertising |= ADVERTISED_1000baseT_Full;
+		}
+	}
+
+	phydev->priv = priv;
+
+	list_add(&priv->list, &ar8xxx_dev_list);
+
+	mutex_unlock(&ar8xxx_dev_list_lock);
+
+	return 0;
+
+err_unregister_switch:
+	if (--priv->use_count)
+		goto unlock;
+
+	unregister_switch(&priv->dev);
+
+free_priv:
+	ar8xxx_free(priv);
+unlock:
+	mutex_unlock(&ar8xxx_dev_list_lock);
 	return ret;
 }
 
 static void
-ar8216_remove(struct phy_device *pdev)
+ar8xxx_phy_detach(struct phy_device *phydev)
 {
-	struct ar8216_priv *priv = pdev->priv;
-	struct net_device *dev = pdev->attached_dev;
+	struct net_device *dev = phydev->attached_dev;
 
-	if (!priv)
+	if (!dev)
 		return;
 
+	dev->phy_ptr = NULL;
 	dev->priv_flags &= ~IFF_NO_IP_ALIGN;
 	dev->eth_mangle_rx = NULL;
 	dev->eth_mangle_tx = NULL;
+}
 
-	if (pdev->addr == 0)
-		unregister_switch(&priv->dev);
+static void
+ar8xxx_phy_remove(struct phy_device *phydev)
+{
+	struct ar8xxx_priv *priv = phydev->priv;
 
-	ar8xxx_mib_cleanup(priv);
-	kfree(priv);
+	if (WARN_ON(!priv))
+		return;
+
+	phydev->priv = NULL;
+	if (--priv->use_count > 0)
+		return;
+
+	mutex_lock(&ar8xxx_dev_list_lock);
+	list_del(&priv->list);
+	mutex_unlock(&ar8xxx_dev_list_lock);
+
+	unregister_switch(&priv->dev);
+	ar8xxx_mib_stop(priv);
+	ar8xxx_free(priv);
 }
 
-static struct phy_driver ar8216_driver = {
+static struct phy_driver ar8xxx_phy_driver = {
 	.phy_id		= 0x004d0000,
 	.name		= "Atheros AR8216/AR8236/AR8316",
 	.phy_id_mask	= 0xffff0000,
 	.features	= PHY_BASIC_FEATURES,
-	.probe		= ar8216_probe,
-	.remove		= ar8216_remove,
-	.config_init	= &ar8216_config_init,
-	.config_aneg	= &ar8216_config_aneg,
-	.read_status	= &ar8216_read_status,
+	.probe		= ar8xxx_phy_probe,
+	.remove		= ar8xxx_phy_remove,
+	.detach		= ar8xxx_phy_detach,
+	.config_init	= ar8xxx_phy_config_init,
+	.config_aneg	= ar8xxx_phy_config_aneg,
+	.read_status	= ar8xxx_phy_read_status,
 	.driver		= { .owner = THIS_MODULE },
 };
 
 int __init
-ar8216_init(void)
+ar8xxx_init(void)
 {
-	return phy_driver_register(&ar8216_driver);
+	return phy_driver_register(&ar8xxx_phy_driver);
 }
 
 void __exit
-ar8216_exit(void)
+ar8xxx_exit(void)
 {
-	phy_driver_unregister(&ar8216_driver);
+	phy_driver_unregister(&ar8xxx_phy_driver);
 }
 
-module_init(ar8216_init);
-module_exit(ar8216_exit);
+module_init(ar8xxx_init);
+module_exit(ar8xxx_exit);
 MODULE_LICENSE("GPL");