X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7620a.dtsi;h=ccadbe40db7a748d1b9aa955f48978f70ae9c195;hp=3e735fb18cac7ca9e84c784bf18487969bd5d18d;hb=f36d624d88f962b12a7c819d456590d6b0a9ee24;hpb=93d8dc870ee07027ca1e27f19831d6127402336f diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi index 3e735fb18c..ccadbe40db 100644 --- a/target/linux/ramips/dts/mt7620a.dtsi +++ b/target/linux/ramips/dts/mt7620a.dtsi @@ -20,20 +20,26 @@ compatible = "mti,cpu-interrupt-controller"; }; - palmbus@10000000 { + aliases { + spi0 = &spi0; + spi1 = &spi1; + serial0 = &uartlite; + }; + + palmbus: palmbus@10000000 { compatible = "palmbus"; reg = <0x10000000 0x200000>; - ranges = <0x0 0x10000000 0x1FFFFF>; + ranges = <0x0 0x10000000 0x1FFFFF>; #address-cells = <1>; #size-cells = <1>; - sysc@0 { + sysc: sysc@0 { compatible = "ralink,mt7620a-sysc", "ralink,rt3050-sysc"; reg = <0x0 0x100>; }; - timer@100 { + timer: timer@100 { compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer"; reg = <0x100 0x20>; @@ -41,7 +47,7 @@ interrupts = <1>; }; - watchdog@120 { + watchdog: watchdog@120 { compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt"; reg = <0x120 0x10>; @@ -66,7 +72,7 @@ interrupts = <2>; }; - memc@300 { + memc: memc@300 { compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; reg = <0x300 0x100>; @@ -77,7 +83,7 @@ interrupts = <3>; }; - uart@500 { + uart: uart@500 { compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; @@ -169,7 +175,7 @@ status = "disabled"; }; - i2c@900 { + i2c: i2c@900 { compatible = "link,mt7620a-i2c", "ralink,rt2880-i2c"; reg = <0x900 0x100>; @@ -185,7 +191,7 @@ pinctrl-0 = <&i2c_pins>; }; - i2s@a00 { + i2s: i2s@a00 { compatible = "ralink,mt7620a-i2s"; reg = <0xa00 0x100>; @@ -202,15 +208,15 @@ status = "disabled"; }; - spi@b00 { + spi0: spi@b00 { compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi"; - reg = <0xb00 0x100>; + reg = <0xb00 0x40>; resets = <&rstctrl 18>; reset-names = "spi"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; status = "disabled"; @@ -218,7 +224,23 @@ pinctrl-0 = <&spi_pins>; }; - uartlite@c00 { + spi1: spi@b40 { + compatible = "ralink,rt2880-spi"; + reg = <0xb40 0x60>; + + resets = <&rstctrl 18>; + reset-names = "spi"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + pinctrl-names = "default"; + pinctrl-0 = <&spi_cs1>; + }; + + uartlite: uartlite@c00 { compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; @@ -234,7 +256,7 @@ pinctrl-0 = <&uartlite_pins>; }; - systick@d00 { + systick: systick@d00 { compatible = "ralink,mt7620a-systick", "ralink,cevt-systick"; reg = <0xd00 0x10>; @@ -245,7 +267,7 @@ interrupts = <7>; }; - pcm@2000 { + pcm: pcm@2000 { compatible = "ralink,mt7620a-pcm"; reg = <0x2000 0x800>; @@ -259,7 +281,7 @@ }; gdma: gdma@2800 { - compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma"; + compatible = "ralink,mt7620a-gdma", "ralink,rt3883-gdma"; reg = <0x2800 0x800>; resets = <&rstctrl 14>; @@ -276,66 +298,97 @@ }; }; - pinctrl { + pinctrl: pinctrl { compatible = "ralink,rt2880-pinmux"; pinctrl-names = "default"; pinctrl-0 = <&state_default>; + state_default: pinctrl0 { }; + pcm_i2s_pins: pcm_i2s { pcm_i2s { ralink,group = "uartf"; ralink,function = "pcm i2s"; }; }; + + uartf_gpio_pins: uartf_gpio { + uartf_gpio { + ralink,group = "uartf"; + ralink,function = "gpio uartf"; + }; + }; + spi_pins: spi { spi { ralink,group = "spi"; ralink,function = "spi"; }; }; + + spi_cs1: spi1 { + spi1 { + ralink,group = "spi_cs1"; + ralink,function = "spi_cs1"; + }; + }; + i2c_pins: i2c { i2c { - lantiq,group = "i2c"; - lantiq,function = "i2c"; + ralink,group = "i2c"; + ralink,function = "i2c"; }; }; + uartlite_pins: uartlite { uart { ralink,group = "uartlite"; ralink,function = "uartlite"; }; }; + mdio_pins: mdio { mdio { ralink,group = "mdio"; ralink,function = "mdio"; }; }; + ephy_pins: ephy { ephy { ralink,group = "ephy"; ralink,function = "ephy"; }; }; + wled_pins: wled { wled { ralink,group = "wled"; ralink,function = "wled"; }; }; + rgmii1_pins: rgmii1 { rgmii1 { ralink,group = "rgmii1"; ralink,function = "rgmii1"; }; }; + rgmii2_pins: rgmii2 { rgmii2 { ralink,group = "rgmii2"; ralink,function = "rgmii2"; }; }; + + pcie_pins: pcie { + pcie { + ralink,group = "pcie"; + ralink,function = "pcie rst"; + }; + }; }; rstctrl: rstctrl { @@ -343,16 +396,25 @@ #reset-cells = <1>; }; - ubsphy { - compatible = "ralink,mt7620a-usbphy"; + clkctrl: clkctrl { + compatible = "ralink,rt2880-clock"; + #clock-cells = <1>; + }; + + usbphy: usbphy { + compatible = "mediatek,mt7620-usbphy"; + #phy-cells = <1>; resets = <&rstctrl 22 &rstctrl 25>; reset-names = "host", "device"; + + clocks = <&clkctrl 22 &clkctrl 25>; + clock-names = "host", "device"; }; - ethernet@10100000 { - compatible = "ralink,mt7620a-eth"; - reg = <0x10100000 10000>; + ethernet: ethernet@10100000 { + compatible = "mediatek,mt7620-eth"; + reg = <0x10100000 0x10000>; #address-cells = <1>; #size-cells = <0>; @@ -363,15 +425,17 @@ resets = <&rstctrl 21 &rstctrl 23>; reset-names = "fe", "esw"; + mediatek,switch = <&gsw>; + port@4 { - compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port"; + compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; reg = <4>; status = "disabled"; }; port@5 { - compatible = "ralink,mt7620a-gsw-port", "ralink,eth-port"; + compatible = "mediatek,mt7620a-gsw-port", "mediatek,eth-port"; reg = <5>; status = "disabled"; @@ -385,17 +449,20 @@ }; }; - gsw@10110000 { - compatible = "ralink,mt7620a-gsw"; - reg = <0x10110000 8000>; + gsw: gsw@10110000 { + compatible = "mediatek,mt7620-gsw"; + reg = <0x10110000 0x8000>; + + resets = <&rstctrl 23>; + reset-names = "esw"; interrupt-parent = <&intc>; interrupts = <17>; }; - sdhci@10130000 { - compatible = "ralink,mt7620a-sdhci"; - reg = <0x10130000 4000>; + sdhci: sdhci@10130000 { + compatible = "ralink,mt7620-sdhci"; + reg = <0x10130000 0x4000>; interrupt-parent = <&intc>; interrupts = <14>; @@ -403,37 +470,79 @@ status = "disabled"; }; - ehci@101c0000 { - compatible = "ralink,rt3xxx-ehci"; + ehci: ehci@101c0000 { + compatible = "generic-ehci"; reg = <0x101c0000 0x1000>; interrupt-parent = <&intc>; interrupts = <18>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; }; - ohci@101c1000 { - compatible = "ralink,rt3xxx-ohci"; + ohci: ohci@101c1000 { + compatible = "generic-ohci"; reg = <0x101c1000 0x1000>; interrupt-parent = <&intc>; interrupts = <18>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; }; - pcie@10140000 { - compatible = "ralink,mt7620a-pci"; + pcie: pcie@10140000 { + compatible = "mediatek,mt7620-pci"; reg = <0x10140000 0x100 0x10142000 0x100>; + #address-cells = <3>; + #size-cells = <2>; + resets = <&rstctrl 26>; reset-names = "pcie0"; + clocks = <&clkctrl 26>; + clock-names = "pcie0"; + interrupt-parent = <&cpuintc>; interrupts = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + + device_type = "pci"; + + bus-range = <0 255>; + ranges = < + 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */ + 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */ + >; + status = "disabled"; + + pcie-bridge { + reg = <0x0000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + + device_type = "pci"; + }; + }; + + wmac: wmac@10180000 { + compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac"; + reg = <0x10180000 0x40000>; + + interrupt-parent = <&cpuintc>; + interrupts = <6>; + + ralink,eeprom = "soc_wmac.eeprom"; }; };