X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7621.dtsi;h=766251899283125990510683d7cfa84b660d4bf1;hp=bc30597fdd286c600bcd2b50bf249492c412cc8e;hb=6acb53c5267b96aa4f166c703998eaad3cb5d9fd;hpb=9195d8da355d0d141ac02c9a5269452dc64ffd2d

diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index bc30597fdd..7662518992 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -3,7 +3,7 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
-	compatible = "mediatek,mtk7621-soc";
+	compatible = "mediatek,mt7621-soc";
 
 	cpus {
 		cpu@0 {
@@ -42,6 +42,8 @@
 		clock-frequency = <50000000>;
 	};
 
+
+
 	palmbus: palmbus@1E000000 {
 		compatible = "palmbus";
 		reg = <0x1E000000 0x100000>;
@@ -89,6 +91,57 @@
 			};
 		};
 
+		i2c: i2c@900 {
+			compatible = "mediatek,mt7621-i2c";
+			reg = <0x900 0x100>;
+
+			clocks = <&sysclock>;
+
+			resets = <&rstctrl 16>;
+			reset-names = "i2c";
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c_pins>;
+		};
+
+		i2s: i2s@a00 {
+			compatible = "mediatek,mt7621-i2s";
+			reg = <0xa00 0x100>;
+
+			clocks = <&sysclock>;
+
+			resets = <&rstctrl 17>;
+			reset-names = "i2s";
+
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
+
+			txdma-req = <2>;
+			rxdma-req = <3>;
+
+			dmas = <&gdma 4>,
+				<&gdma 6>;
+			dma-names = "tx", "rx";
+
+			status = "disabled";
+		};
+
+		systick: systick@d00 {
+			compatible = "ralink,mt7621-systick", "ralink,cevt-systick";
+			reg = <0xd00 0x10>;
+
+			resets = <&rstctrl 28>;
+			reset-names = "intc";
+
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		memc: memc@5000 {
 			compatible = "mtk,mt7621-memc";
 			reg = <0x300 0x100>;
@@ -109,6 +162,7 @@
 			reg = <0xc00 0x100>;
 
 			clocks = <&sysclock>;
+			clock-frequency = <50000000>;
 
 			interrupt-parent = <&gic>;
 			interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
@@ -119,7 +173,7 @@
 		};
 
 		spi0: spi@b00 {
-			status = "okay";
+			status = "disabled";
 
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x100>;
@@ -134,14 +188,40 @@
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&spi_pins>;
+		};
 
-			m25p80@0 {
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0 0>;
-				spi-max-frequency = <10000000>;
-				m25p,chunked-io = <32>;
-			};
+		gdma: gdma@2800 {
+			compatible = "ralink,rt3883-gdma";
+			reg = <0x2800 0x800>;
+
+			resets = <&rstctrl 14>;
+			reset-names = "dma";
+
+			interrupt-parent = <&gic>;
+			interrupts = <0 13 4>;
+
+			#dma-cells = <1>;
+			#dma-channels = <16>;
+			#dma-requests = <16>;
+
+			status = "disabled";
+		};
+
+		hsdma: hsdma@7000 {
+			compatible = "mediatek,mt7621-hsdma";
+			reg = <0x7000 0x1000>;
+
+			resets = <&rstctrl 5>;
+			reset-names = "hsdma";
+
+			interrupt-parent = <&gic>;
+			interrupts = <0 11 4>;
+
+			#dma-cells = <1>;
+			#dma-channels = <1>;
+			#dma-requests = <1>;
+
+			status = "disabled";
 		};
 	};
 
@@ -153,13 +233,6 @@
 		state_default: pinctrl0 {
 		};
 
-		spi_pins: spi {
-			spi {
-				ralink,group = "spi";
-				ralink,function = "spi";
-			};
-		};
-
 		i2c_pins: i2c {
 			i2c {
 				ralink,group = "i2c";
@@ -167,6 +240,13 @@
 			};
 		};
 
+		spi_pins: spi {
+			spi {
+				ralink,group = "spi";
+				ralink,function = "spi";
+			};
+		};
+
 		uart1_pins: uart1 {
 			uart1 {
 				ralink,group = "uart1";
@@ -241,7 +321,14 @@
 		#reset-cells = <1>;
 	};
 
+	clkctrl: clkctrl {
+		compatible = "ralink,rt2880-clock";
+		#clock-cells = <1>;
+	};
+
 	sdhci: sdhci@1E130000 {
+		status = "disabled";
+
 		compatible = "ralink,mt7620-sdhci";
 		reg = <0x1E130000 0x4000>;
 
@@ -347,7 +434,12 @@
 				GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
 				GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
 
-		status = "okay";
+		status = "disabled";
+
+		resets = <&rstctrl 24 &rstctrl 25 &rstctrl 26>;
+		reset-names = "pcie0", "pcie1", "pcie2";
+		clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
+		clock-names = "pcie0", "pcie1", "pcie2";
 
 		pcie0 {
 			reg = <0x0000 0 0 0 0>;