X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Framips%2Fdts%2Fmt7628an.dtsi;h=3376b9f3a611c3d603aec27bd0f778bc771e34ae;hp=fd584a12ab75549e6683d91ff31d08897531deb0;hb=3fbf3ab44f5cebb22e30a4c8681b13341feed6a6;hpb=7ad419a9f1ad41f30e3dffcea8c0132c32ebefcc diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi index fd584a12ab..3376b9f3a6 100644 --- a/target/linux/ramips/dts/mt7628an.dtsi +++ b/target/linux/ramips/dts/mt7628an.dtsi @@ -13,6 +13,10 @@ bootargs = "console=ttyS0,57600"; }; + aliases { + serial0 = &uartlite; + }; + cpuintc: cpuintc@0 { #address-cells = <0>; #interrupt-cells = <1>; @@ -20,7 +24,7 @@ compatible = "mti,cpu-interrupt-controller"; }; - palmbus@10000000 { + palmbus: palmbus@10000000 { compatible = "palmbus"; reg = <0x10000000 0x200000>; ranges = <0x0 0x10000000 0x1FFFFF>; @@ -28,13 +32,13 @@ #address-cells = <1>; #size-cells = <1>; - sysc@0 { + sysc: sysc@0 { compatible = "ralink,mt7620a-sysc"; reg = <0x0 0x100>; }; - watchdog@120 { - compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt"; + watchdog: watchdog@120 { + compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt"; reg = <0x120 0x10>; resets = <&rstctrl 8>; @@ -62,7 +66,7 @@ 0x80 0x78>; }; - memc@300 { + memc: memc@300 { compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; reg = <0x300 0x100>; @@ -105,7 +109,43 @@ }; }; - spi@b00 { + i2c: i2c@900 { + compatible = "mediatek,mt7621-i2c"; + reg = <0x900 0x100>; + + resets = <&rstctrl 16>; + reset-names = "i2c"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + }; + + i2s: i2s@a00 { + compatible = "mediatek,mt7628-i2s"; + reg = <0xa00 0x100>; + + resets = <&rstctrl 17>; + reset-names = "i2s"; + + interrupt-parent = <&intc>; + interrupts = <10>; + + txdma-req = <2>; + rxdma-req = <3>; + + dmas = <&gdma 4>, + <&gdma 6>; + dma-names = "tx", "rx"; + + status = "disabled"; + }; + + spi0: spi@b00 { compatible = "ralink,mt7621-spi"; reg = <0xb00 0x100>; @@ -113,7 +153,7 @@ reset-names = "spi"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi_pins>; @@ -121,7 +161,7 @@ status = "disabled"; }; - uartlite@c00 { + uartlite: uartlite@c00 { compatible = "ns16550a"; reg = <0xc00 0x100>; @@ -129,6 +169,8 @@ reg-io-width = <4>; no-loopback-test; + clock-frequency = <40000000>; + resets = <&rstctrl 12>; reset-names = "uartl"; @@ -139,7 +181,7 @@ pinctrl-0 = <&uart0_pins>; }; - uart1@d00 { + uart1: uart1@d00 { compatible = "ns16550a"; reg = <0xd00 0x100>; @@ -147,6 +189,8 @@ reg-io-width = <4>; no-loopback-test; + clock-frequency = <40000000>; + resets = <&rstctrl 19>; reset-names = "uart1"; @@ -159,7 +203,7 @@ status = "disabled"; }; - uart2@e00 { + uart2: uart2@e00 { compatible = "ns16550a"; reg = <0xe00 0x100>; @@ -167,6 +211,8 @@ reg-io-width = <4>; no-loopback-test; + clock-frequency = <40000000>; + resets = <&rstctrl 20>; reset-names = "uart2"; @@ -178,9 +224,52 @@ status = "disabled"; }; + + pwm: pwm@5000 { + compatible = "mediatek,mt7628-pwm"; + reg = <0x5000 0x1000>; + + resets = <&rstctrl 31>; + reset-names = "pwm"; + + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>; + + status = "disabled"; + }; + + pcm: pcm@2000 { + compatible = "ralink,mt7620a-pcm"; + reg = <0x2000 0x800>; + + resets = <&rstctrl 11>; + reset-names = "pcm"; + + interrupt-parent = <&intc>; + interrupts = <4>; + + status = "disabled"; + }; + + gdma: gdma@2800 { + compatible = "ralink,rt3883-gdma"; + reg = <0x2800 0x800>; + + resets = <&rstctrl 14>; + reset-names = "dma"; + + interrupt-parent = <&intc>; + interrupts = <7>; + + #dma-cells = <1>; + #dma-channels = <16>; + #dma-requests = <16>; + + status = "disabled"; + }; }; - pinctrl { + pinctrl: pinctrl { compatible = "ralink,rt2880-pinmux"; pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -195,6 +284,20 @@ }; }; + spi_cs1_pins: spi_cs1 { + spi_cs1 { + ralink,group = "spi cs1"; + ralink,function = "spi cs1"; + }; + }; + + i2c_pins: i2c { + i2c { + ralink,group = "i2c"; + ralink,function = "i2c"; + }; + }; + uart0_pins: uartlite { uartlite { ralink,group = "uart0"; @@ -222,6 +325,27 @@ ralink,function = "sdxc"; }; }; + + pwm0_pins: pwm0 { + pwm0 { + ralink,group = "pwm0"; + ralink,function = "pwm0"; + }; + }; + + pwm1_pins: pwm1 { + pwm1 { + ralink,group = "pwm1"; + ralink,function = "pwm1"; + }; + }; + + pcm_i2s_pins: i2s { + i2s { + ralink,group = "i2s"; + ralink,function = "pcm"; + }; + }; }; rstctrl: rstctrl { @@ -229,17 +353,25 @@ #reset-cells = <1>; }; - usbphy: usbphy { - compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy"; + clkctrl: clkctrl { + compatible = "ralink,rt2880-clock"; + #clock-cells = <1>; + }; + + usbphy: usbphy@10120000 { + compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy"; + reg = <0x10120000 0x1000>; #phy-cells = <1>; - resets = <&rstctrl 22>; - reset-names = "host"; + resets = <&rstctrl 22 &rstctrl 25>; + reset-names = "host", "device"; + clocks = <&clkctrl 22 &clkctrl 25>; + clock-names = "host", "device"; }; - sdhci@10130000 { + sdhci: sdhci@10130000 { compatible = "ralink,mt7620-sdhci"; - reg = <0x10130000 4000>; + reg = <0x10130000 0x4000>; interrupt-parent = <&intc>; interrupts = <14>; @@ -250,8 +382,8 @@ status = "disabled"; }; - ehci@101c0000 { - compatible = "ralink,rt3xxx-ehci"; + ehci: ehci@101c0000 { + compatible = "generic-ehci"; reg = <0x101c0000 0x1000>; phys = <&usbphy 1>; @@ -261,8 +393,8 @@ interrupts = <18>; }; - ohci@101c1000 { - compatible = "ralink,rt3xxx-ohci"; + ohci: ohci@101c1000 { + compatible = "generic-ohci"; reg = <0x101c1000 0x1000>; phys = <&usbphy 1>; @@ -272,20 +404,22 @@ interrupts = <18>; }; - ethernet@10100000 { + ethernet: ethernet@10100000 { compatible = "ralink,rt5350-eth"; - reg = <0x10100000 10000>; + reg = <0x10100000 0x10000>; interrupt-parent = <&cpuintc>; interrupts = <5>; resets = <&rstctrl 21 &rstctrl 23>; reset-names = "fe", "esw"; + + mediatek,switch = <&esw>; }; - esw@10110000 { - compatible = "ralink,rt3050-esw"; - reg = <0x10110000 8000>; + esw: esw@10110000 { + compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw"; + reg = <0x10110000 0x8000>; resets = <&rstctrl 23>; reset-names = "esw"; @@ -294,7 +428,7 @@ interrupts = <17>; }; - pcie@10140000 { + pcie: pcie@10140000 { compatible = "mediatek,mt7620-pci"; reg = <0x10140000 0x100 0x10142000 0x100>; @@ -302,12 +436,14 @@ #address-cells = <3>; #size-cells = <2>; - resets = <&rstctrl 26>; - reset-names = "pcie0"; - interrupt-parent = <&cpuintc>; interrupts = <4>; + resets = <&rstctrl 26 &rstctrl 27>; + reset-names = "pcie0", "pcie1"; + clocks = <&clkctrl 26 &clkctrl 27>; + clock-names = "pcie0", "pcie1"; + status = "disabled"; device_type = "pci"; @@ -327,4 +463,16 @@ device_type = "pci"; }; }; + + wmac: wmac@10300000 { + compatible = "mediatek,mt7628-wmac"; + reg = <0x10300000 0x100000>; + + interrupt-parent = <&cpuintc>; + interrupts = <6>; + + status = "disabled"; + + mediatek,mtd-eeprom = <&factory 0x0000>; + }; };