cns3xxx: fix register for enabling MMC/SD pins
authorFelix Fietkau <nbd@openwrt.org>
Tue, 7 Oct 2014 10:37:09 +0000 (10:37 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Tue, 7 Oct 2014 10:37:09 +0000 (10:37 +0000)
also fixes a GPIO related regression from the upgrade to 3.10

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 42829

target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c

index 9021f3d..d61dad9 100644 (file)
@@ -818,8 +818,7 @@ static void __init laguna_init(void)
        *reg |= BIT(12) | BIT(13);
 
        /* Enable MMC/SD pins */
-       reg = MISC_GPIOA_PIN_ENABLE_REG;
-       *reg |= 0xf80;
+       *reg |= BIT(7) | BIT(8) | BIT(9) | BIT(10) | BIT(11);
 
        cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C);
        cns3xxx_pwr_power_up(1 << PM_CLK_GATE_REG_OFFSET_SPI_PCM_I2C);