--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/* Copyright 2023 Nokia */
+
+/dts-v1/;
+
+#include "ipq8074.dtsi"
+#include "ipq8074-hk-cpu.dtsi"
+#include "ipq8074-ess.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Compex WPQ873";
+ compatible = "compex,wpq873", "qcom,ipq8074";
+
+ aliases {
+ serial0 = &blsp1_uart5;
+ led-boot = &led_power_blue;
+ led-failsafe = &led_power_red;
+ led-running = &led_system_green;
+ led-upgrade = &led_system_blue;
+ /* Aliases as required by u-boot to patch MAC addresses */
+ ethernet0 = &dp6;
+ ethernet1 = &dp2;
+ ethernet2 = &dp3;
+ ethernet3 = &dp4;
+ label-mac-device = &dp6;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ bootargs-append = " root=/dev/ubiblock0_1";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power_red: power-red {
+ label = "red:power";
+ gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_RED>;
+ };
+
+ led_power_blue: power-blue {
+ label = "blue:power";
+ gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_BLUE>;
+ };
+
+ led_system_red: system-red {
+ label = "red:system";
+ gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_RED>;
+ };
+
+ led_system_green: system-green {
+ label = "green:system";
+ gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ };
+
+ led_system_blue: system-blue {
+ label = "blue:system";
+ gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ };
+};
+
+&tlmm {
+ mdio_pins: mdio-pins {
+ mdc {
+ pins = "gpio68";
+ function = "mdc";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ mdio {
+ pins = "gpio69";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+
+ i2c_pins: i2c-pins {
+ pins = "gpio0", "gpio2";
+ function = "blsp5_i2c";
+ drive-strength = <8>;
+ bias-disable;
+ };
+};
+
+&blsp1_uart5 {
+ status = "okay";
+};
+
+&blsp1_i2c6 {
+ status = "okay";
+
+ pinctrl-0 = <&i2c_pins>;
+ pinctrl-names = "default";
+};
+
+&prng {
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&qpic_bam {
+ status = "okay";
+};
+
+&blsp1_spi1 {
+ status = "okay";
+};
+
+&tlmm {
+ mdio_pins: mdio-pins {
+ mdc {
+ pins = "gpio68";
+ function = "mdc";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ mdio {
+ pins = "gpio69";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+
+ button_pins: button_pins {
+ reset_button {
+ pins = "gpio66";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
+};
+
+&blsp1_spi1 {
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "0:sbl1";
+ reg = <0x0 0x50000>;
+ read-only;
+ };
+
+ partition@50000 {
+ label = "0:mibib";
+ reg = <0x50000 0x10000>;
+ read-only;
+ };
+
+ partition@60000 {
+ label = "0:bootconfig";
+ reg = <0x60000 0x20000>;
+ read-only;
+ };
+
+ partition@80000 {
+ label = "0:bootconfig1";
+ reg = <0x80000 0x20000>;
+ read-only;
+ };
+
+ partition@a0000 {
+ label = "0:qsee";
+ reg = <0xa0000 0x180000>;
+ read-only;
+ };
+
+ partition@220000 {
+ label = "0:qsee_1";
+ reg = <0x220000 0x180000>;
+ read-only;
+ };
+
+ partition@3a0000 {
+ label = "0:devcfg";
+ reg = <0x3a0000 0x10000>;
+ read-only;
+ };
+
+ partition@3b0000 {
+ label = "0:devcfg_1";
+ reg = <0x3b0000 0x10000>;
+ read-only;
+ };
+
+ partition@3c0000 {
+ label = "0:apdp";
+ reg = <0x3c0000 0x10000>;
+ read-only;
+ };
+
+ partition@3d0000 {
+ label = "0:apdp_1";
+ reg = <0x3d0000 0x10000>;
+ read-only;
+ };
+
+ partition@3e0000 {
+ label = "0:rpm";
+ reg = <0x3e0000 0x40000>;
+ read-only;
+ };
+
+ partition@420000 {
+ label = "0:rpm_1";
+ reg = <0x420000 0x40000>;
+ read-only;
+ };
+
+ partition@460000 {
+ label = "0:cdt";
+ reg = <0x460000 0x10000>;
+ read-only;
+ };
+
+ partition@470000 {
+ label = "0:cdt_1";
+ reg = <0x470000 0x10000>;
+ read-only;
+ };
+
+ partition@480000 {
+ label = "0:appsblenv";
+ reg = <0x480000 0x10000>;
+ };
+
+ partition@490000 {
+ label = "0:appsbl";
+ reg = <0x490000 0xa0000>;
+ read-only;
+ };
+
+ partition@550000 {
+ label = "0:appsbl_1";
+ reg = <0x530000 0xa0000>;
+ read-only;
+ };
+
+ partition@610000 {
+ label = "0:art";
+ reg = <0x5d0000 0x40000>;
+ read-only;
+ };
+
+ partition@650000 {
+ label = "0:ethphyfw";
+ reg = <0x610000 0x80000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&qpic_nand {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-strength = <8>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "rootfs";
+ reg = <0x0000000 0x3400000>;
+ };
+
+ partition@3400000 {
+ label = "0:wififw";
+ reg = <0x3400000 0x800000>;
+ read-only;
+ };
+
+ partition@3c00000 {
+ label = "rootfs_1";
+ reg = <0x3c00000 0x3400000>;
+ };
+
+ partition@7000000 {
+ label = "0:wififw_1";
+ reg = <0x7000000 0x800000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&qusb_phy_0 {
+ status = "okay";
+};
+
+&qusb_phy_1 {
+ status = "okay";
+};
+
+&ssphy_0 {
+ status = "okay";
+};
+
+&ssphy_1 {
+ status = "okay";
+};
+
+&usb_0 {
+ status = "okay";
+};
+
+&usb_1 {
+ status = "okay";
+};
+
+
+&mdio {
+ status = "okay";
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+ reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
+
+ qca8075_1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+
+ qca8075_2: ethernet-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <2>;
+ };
+
+ qca8075_3: ethernet-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ };
+
+ qca8081: ethernet-phy@28 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <28>;
+ reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+ };
+
+};
+
+&switch {
+ status = "okay";
+
+ switch_cpu_bmp = <0x1>; /* cpu port bitmap */
+ switch_lan_bmp = <0x3e>; /* lan port bitmap */
+ switch_wan_bmp = <0x40>; /* wan port bitmap */
+ switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
+ switch_mac_mode1 = <0x0f>; /* mac mode for uniphy instance1*/
+ switch_mac_mode2 = <0x0f>; /* mac mode for uniphy instance2*/
+ bm_tick_mode = <0>; /* bm tick mode */
+ tm_tick_mode = <0>; /* tm tick mode */
+
+ qcom,port_phyinfo {
+ port@2 {
+ port_id = <2>;
+ phy_address = <1>;
+ };
+ port@3 {
+ port_id = <3>;
+ phy_address = <2>;
+ };
+ port@4 {
+ port_id = <4>;
+ phy_address = <3>;
+ };
+ port@5 {
+ port_id = <6>;
+ phy_address = <28>;
+ port_mac_sel = "QGMAC_PORT";
+ };
+ };
+};
+
+&edma {
+ status = "okay";
+};
+
+&dp2 {
+ status = "okay";
+ phy-handle = <&qca8075_1>;
+ label = "lan1";
+};
+
+&dp3 {
+ status = "okay";
+ phy-handle = <&qca8075_2>;
+ label = "lan2";
+};
+
+&dp4 {
+ status = "okay";
+ phy-handle = <&qca8075_3>;
+ label = "lan3";
+};
+
+&dp6 {
+ status = "okay";
+ phy-handle = <&qca8081>;
+ label = "wan";
+};
+
+&pcie_qmp0 {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+
+ perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
+
+ bridge@0,0 {
+ reg = <0x00020000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+};
+
+&pcie_qmp1 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+
+ perst-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
+
+ bridge@1,0 {
+ reg = <0x00010000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+};
+
+&wifi {
+ status = "okay";
+
+ qcom,ath11k-calibration-variant = "Compex-WPQ873";
+};
projects / openwrt / openwrt.git / commitdiff