--- /dev/null
+--- /dev/null
++++ b/ChangeLog.csl
+@@ -0,0 +1,5630 @@
++2009-05-21 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (mcf52235_ctrl): Remove non-existent CACR, ACR[01].
++ (mcf53017_ctrl): Fix RAMBAR.
++
++2009-04-30 Nathan Sidwell <nathan@codesourcery.com>
++
++ * release-notes-csl.xml: Add arm* TARGET for -mauto-it note.
++
++2009-04-23 Andrew Stubbs <ams@codesourcery.com>
++
++ Issue #5328
++
++ * release-notes-csl.xml: Document bug fix.
++
++ bfd/
++ * elf32-arm.c (elf32_arm_fix_exidx_coverage): Don't attempt to
++ fix discarded sections.
++
++2009-04-22 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #4502
++
++ * release-notes-csl.xml (Assembler fix for -mauto-it): New note.
++
++ gas/
++ * config/tc-arm.c (handle_it_state): Use force_automatic_it_block_close
++ to close the previous IT block. Only close the next IT block if we
++ opened a new one for an IT-only instruction.
++
++2009-04-22 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue 5271
++
++ Backport 2009-04-22 Nathan Sidwell <nathan@codesourcery.com>
++ ld/testsuite/
++ * ld-scripts/rgn-at1.d: Cope with larger padding on sections.
++ * ld-scripts/rgn-at2.d: Likewise.
++ * ld-scripts/rgn-at3.d: Likewise.
++
++ Backport 2009-04-03 Nathan Sidwell <nathan@codesourcery.com>
++ ld/testuite/
++ * ld-scripts/rgn-at.s: Use explicit .section pseudos.
++
++2009-04-21 Andrew Jenner <andrew@codesourcery.com>
++
++ Issue #5270
++
++ * ld/testsuite/ld-elf/eh5.d: Accept 0b as well as 1b for the
++ personality byte in the augmentation data.
++
++2009-04-20 Daniel Gutson <dgutson@codesourcery.com>
++
++ Issue #5050
++
++ binutils/
++ * readelf.c (get_arm_section_type_name): Added support for
++ new sections headers.
++
++ include/elf
++ * arm.h: (SHT_ARM_DEBUGOVERLAY): New define.
++ (SHT_ARM_OVERLAYSECTION): New define.
++
++ * release-notes-csl.xml: Document.
++
++2009-04-15 Nathan Froyd <froydnj@codesourcery.com>
++
++ * release-notes-csl.xml: Fix typo.
++
++2009-04-14 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #1956, #2786, #5144
++ * release-notes-csl.xml (Mapping symbols): New note.
++
++ gas/testsuite/
++ * gas/arm/mapdir.d, gas/arm/mapdir.s: New files.
++
++ gas/
++ * config/tc-arm.c (make_mapping_symbol): New function, from
++ mapping_state. Save mapping symbols in the frag.
++ (insert_data_mapping_symbol): New.
++ (mapping_state): Use make_mapping_symbol.
++ (mapping_state_2): New. Provide dummy definition.
++ (opcode_select): Do not call mapping_state.
++ (s_bss): Call md_elf_section_change_hook instead of mapping_state.
++ (arm_handle_align): Update use of tc_frag_data.
++ Call insert_data_mapping_symbol.
++ (arm_init_frag): Update use of tc_frag_data. Call
++ mapping_state_2.
++ (check_mapping_symbols): New function.
++ (arm_adjust_symtab): Use check_mapping_symbols.
++ * config/tc-arm.h (struct arm_frag_type): New.
++ (TC_FRAG_TYPE): Change to struct arm_frag_type.
++ (TC_FRAG_INIT): Pass max_chars.
++ (arm_init_frag): Update prototype.
++
++ ld/testsuite/
++ * ld-arm/thumb2-bl-blx-interwork.d: Correct disassembly.
++ * ld-arm/script-type.sym: Add an additional $a mapping symbol.
++
++ binutils/testsuite/
++ * binutils-all/arm/thumb2-cond.s: Use instructions.
++
++2009-04-12 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #5185
++
++ * release-notes-csl.xml (Incorrect placement of linker-generated
++ functions): New note.
++
++ bfd/
++ * elf32-arm.c (elf32_arm_next_input_section): Skip flags without
++ SEC_CODE.
++ (group_sections): Handle empty lists.
++
++2009-04-09 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #4849
++
++ * release-notes-csl.xml (Assembler floating point format): New note.
++
++ gas/testsuite/
++ * gas/arm/mapmisc.d: Correct expected output for .double and .dcb.d.
++
++2009-04-09 Daniel Gutson <dgutson@codesourcery.com>
++
++ Issue #4502
++
++ gas/testsuite/
++ * gas/arm/arm-it-auto.d: fixed test case dump.
++
++2009-04-09 Catherine Moore <clm@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c (check_for_24k_errata): Adjust if block.
++ Remove return.
++
++2009-04-09 Daniel Gutson <dgutson@codesourcery.com>
++ Issue #4502
++
++ gas/
++ * config/tc-arm.c (do_automatic_it): New variable.
++ (it_instruction_type): New enum.
++ (arm_it): New field.
++ (it_state): New enum.
++ (current_it): New struct and global variable.
++ (current_it_compatible): New function.
++ (conditional_insn): New function.
++ (set_it_insn_type): New macro.
++ (set_it_insn_type_last): New macro.
++ (do_t_add_sub): Call automatic IT machinery functions.
++ (do_t_arit3): Likewise.
++ (do_t_arit3c): Likewise.
++ (do_t_blx): Likewise.
++ (do_t_branch): Likewise.
++ (do_t_bkpt): Likewise.
++ (do_t_branch23): Likewise.
++ (do_t_bx): Likewise.
++ (do_t_bxj): Likewise.
++ (do_t_cps): Likewise.
++ (do_t_cpsi): Likewise.
++ (do_t_cbz): Likewise.
++ (do_t_it): Likewise.
++ (encode_thumb2_ldmstm): Likewise.
++ (do_t_ldst): Likewise.
++ (do_t_mov_cmp): Likewise.
++ (do_t_mvn_tst): Likewise.
++ (do_t_mul): Likewise.
++ (do_t_neg): Likewise.
++ (do_t_setend): Likewise.
++ (do_t_shift): Likewise.
++ (do_t_tb): Likewise.
++ (output_it_inst): New function.
++ (new_automatic_it_block): New function.
++ (close_automatic_it_block): New function.
++ (current_it_add_mask): New function.
++ (it_fsm_pre_encode): New function.
++ (handle_it_state): New function.
++ (it_fsm_post_encode): New function.
++ (force_automatic_it_block_close): New function.
++ (in_it_block): New function.
++ (md_assemble): Call automatic IT block machinery functions.
++ (arm_frob_label): Likewise.
++ (arm_opts): New element.
++ * doc/c-arm.texi: New option -mauto-it.
++
++ gas/testsuite/
++ * gas/arm/arm-it-auto.d: New test.
++ * gas/arm/arm-it-auto.s: New file.
++ * gas/arm/thumb2_it_auto.d: New test.
++ * gas/arm/thumb2_it_bad.l: Error message updated.
++ * gas/arm/thumb2_it_bad_auto.d: New test.
++ * gas/arm/thumb2_it.d: Comment added.
++ * gas/arm/thumb2_it_bad.d: Comment added.
++
++ * release-notes-csl.xml: Document.
++
++2009-04-08 Daniel Gutson <dgutson@codesourcery.com>
++
++ gas/testsuite/
++ * gas/arm/thumb2_it.d: Removed obsolete regex.
++
++2009-04-08 Paul Brook <paul@codesourcery.com>
++
++ Issue #5162
++ bfd/
++ * elf32-arm.c (make_branch_to_a8_stub): Ignore long branch stubs.
++
++2009-04-08 Catherine Moore <clm@codesourcery.com>
++
++ Issue #4593
++
++ gas/
++ * config/tc-mips.c (mips_fix_24k): Declare.
++ (check_for_24k_errata): New.
++ (mips_cleanup): Call check_for_24k_errata.
++ (start_noreorder): Likewise.
++ (md_mips_end): Likewise.
++ (s_change_sec): Likewise.
++ (s_change_section): Likewise.
++ (append_insn): Call check_for_24k_errata. Prevent
++ ERET/DERET instructions from being moved into delay
++ slots.
++ (OPTION_FIX_24K): New.
++ (OPTION_NO_FIX_24k): New.
++ (md_longopts): Add "mfix-24k" and "mno-fix-24k".
++ (md_parse_option): Handle fix-24k options.
++ (md_show_usage): Display fix-24k options.
++ * doc/c-mips.texi: Document.
++ * testsuite/gas/mips/mips.exp: Run new tests.
++ * testsuite/gas/mips/eret.s: New test.
++ * testsuite/gas/mips/eret.d: New test output.
++ * testsuite/gas/mips/eret.l: New test output.
++
++ * release-notes-csl.xml: New note.
++
++2009-04-08 Nathan Froyd <froydnj@codesourcery.com>
++
++ Issue #5170
++
++ * release-notes-csl.xml (tlbilx encoding fix): New note.
++
++ Backport from mainline:
++
++ gas/
++ 2009-04-07 Peter Bergner <bergner@vnet.ibm.com>
++
++ * ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
++ "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
++ Reorder entries so the extended mnemonics are listed before tlbilx.
++
++ opcodes/
++ 2009-04-07 Peter Bergner <bergner@vnet.ibm.com>
++
++ * gas/ppc/e500mc.d: Update to match extended mnemonics.
++
++2009-04-06 Daniel Gutson <dgutson@codesourcery.com>
++
++ Issue #5124
++
++ gas/
++ * config/tc-arm.c (arm_frag_align_code): Fixed the string message.
++ * config/tc-arm.h (MAX_MEM_ALIGNMENT_BYTES): New macro.
++ (MAX_MEM_FOR_RS_ALIGN_CODE): Macro changed to use the above.
++
++ gas/testsuite/
++ * gas/arm/align64.d: New file.
++ * gas/arm/align64.s: New file.
++
++ * release-notes-csl.xml: Document.
++
++2009-04-06 Andrew Jenner <andrew@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c: Move sysdep.h to start of file.
++
++2009-04-06 Kazu Hirata <kazu@codesourcery.com>
++
++ Backport from FSF:
++ ld/
++ 2009-04-06 Kazu Hirata <kazu@codesourcery.com>
++ * ld.texinfo (-L): Mention that -L options do not affect how ld
++ searches for a linker script unless -T option is specified.
++ * ldfile.c (ldfile_find_command_file): Append the path obtained
++ from the program name to the search path instead of
++ prepending. Add a new parameter "default_only". Restrict the
++ search to the default script location if the new parameter is
++ true.
++ (ldfile_open_command_file_1): New.
++ (ldfile_open_command_file): Call ldfile_open_command_file_1.
++ (ldfile_open_default_command_file): New.
++
++ * ldfile.c (ldfile_find_command_file): Initialize result.
++
++2009-04-05 Kazu Hirata <kazu@codesourcery.com>
++
++ Issue #5010
++ binutils/
++ * objcopy.c (maybe_sign_extend_vma): New.
++ (setup_section): Call maybe_sign_extend_vma after manipulating
++ addresses.
++
++ * release-notes-csl.xml: Mention the bug fix above.
++
++2009-04-03 Julian Brown <julian@codesourcery.com>
++
++ * release-notes-csl.xml (Cortex-A8 erratum workaround enabled
++ for ARMv7-A): Add note.
++
++2009-04-03 Julian Brown <julian@codesourcery.com>
++
++ ld/
++ * emultempl/armelf.em (OPTION_NO_FIX_CORTEX_A8): New.
++ (PARSE_AND_LIST_LONGOPTS): Add --no-fix-cortex-a8 option. Remove
++ argument from --fix-cortex-a8.
++ (PARSE_AND_LIST_OPTIONS): Adjust for --[no-]fix-cortex-a8 syntax.
++ (PARSE_FIX_CORTEX_A8, PARSE_NO_FIX_CORTEX_A8): Handle
++ --[no-]fix-cortex-a8 syntax.
++ * ld.texinfo (--fix-cortex-a8): Document.
++
++ bfd/
++ * elf32-arm.c (bfd_elf32_arm_set_cortex_a8_fix): Re-enable fix by
++ default on ARM v7-A.
++
++2009-04-03 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #5022
++ ld/
++ * ldlang.c (lang_leave_output_section_statement): Set lma_region
++ if it is not overridden and section is for the same vma region as
++ the previous section.
++
++ ld/testsuite/
++ * ld-scripts/rgn-at.exp: New.
++ * ld-scripts/rgn-at.s: New.
++ * ld-scripts/rgn-at1.d: New.
++ * ld-scripts/rgn-at1.t: New.
++ * ld-scripts/rgn-at2.d: New.
++ * ld-scripts/rgn-at2.t: New.
++ * ld-scripts/rgn-at3.d: New.
++ * ld-scripts/rgn-at3.t: New.
++
++ * release-notes-csl.xml: Add note.
++
++2009-04-02 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issues #4842, #5076
++ gas/
++ * config/tc-armlinux-eabi.h (FPU_DEFAULT): Default to plain VFP.
++ * config/tc-armeabi.h (FPU_DEFAULT): Likewise.
++ * config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
++ the default FPU from the processor.
++
++ gas/testsuite/
++ * gas/arm/attr-mcpu.d: Add -mfpu=neon.
++
++ * release-notes-csl.xml: Add note.
++
++2009-03-31 Paul Brook <paul@codesourcery.com>
++
++ Issue #1531
++
++ bfd/
++ * bfd-in.h (elf32_arm_fix_exidx_coverage): Add prototype.
++ * bfd-in2.h: Regenerate.
++ * elf32-arm.c (arm_unwind_edit_type, arm_unwind_table_edit): Define.
++ (_arm_elf_section_data): Add text and exidx fields.
++ (add_unwind_table_edit, get_arm_elf_section_data, adjust_exidx_size,
++ insert_cantunwind_after, elf32_arm_fix_exidx_coverage, offset_prel31,
++ copy_exidx_entry): New functions.
++ (elf32_arm_write_section): Fixup .ARM.exidx contents.
++
++ ld/
++ * emultempl/armelf.em (compare_output_sec_vma): New function.
++ (gld${EMULATION_NAME}_finish): Add exidx munging code.
++
++ ld/testsuite/
++ * ld-arm/arm.ld: Add .ARM.exidx and .ARM.extab.
++ * ld-arm/arm-elf.exp: Add unwind-[1-4].
++ * ld-arm/unwind-1.d: New test.
++ * ld-arm/unwind-1.s: New test.
++ * ld-arm/unwind-2.d: New test.
++ * ld-arm/unwind-2.s: New test.
++ * ld-arm/unwind-3.d: New test.
++ * ld-arm/unwind-3.s: New test.
++ * ld-arm/unwind-4.d: New test.
++ * ld-arm/unwind-4.s: New test.
++
++2009-03-30 Andrew Jenner <andrew@codesourcery.com>
++
++ ld/
++ * emultempl/octeonelf.em: Source mipself.em.
++
++ gas/
++ * config/tc-arm.c: Move as.h to start of file.
++
++2009-03-30 Joseph Myers <joseph@codesourcery.com>
++
++ Issue #5084
++
++ Backport from FSF:
++
++ gas/testsuite/
++ * gas/arm/mapsecs.d, gas/arm/mapsecs.s: New.
++
++ opcodes/
++ * arm-dis.c (print_insn): Also check section matches in backwards
++ search for mapping symbol.
++
++2009-03-30 Julian Brown <julian@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (a8_erratum_fix): Add r_type, st_type, sym_name,
++ non_a8_stub fields.
++ (find_thumb_glue): Add forward declaration.
++ (elf32_arm_size_stubs): Improve integration of Cortex-A8 erratum
++ workaround and ARM/Thumb interworking.
++
++ ld/testsuite/
++ * ld-arm/cortex-a8-fix-b.s: Update for text at 0x8f00.
++ * ld-arm/cortex-a8-fix-bl.s: Likewise.
++ * ld-arm/cortex-a8-fix-bcc.s: Likewise.
++ * ld-arm/cortex-a8-fix-blx.s: Likewise.
++ * ld-arm/cortex-a8-fix-b.d: Update.
++ * ld-arm/cortex-a8-fix-bl.d: Update.
++ * ld-arm/cortex-a8-fix-bcc.d: Update.
++ * ld-arm/cortex-a8-fix-blx.d: Update.
++ * ld-arm/cortex-a8-arm-target.s: New.
++ * ld-arm/cortex-a8-thumb-target.s: New.
++ * ld-arm/cortex-a8-fix-b-rel.s: New.
++ * ld-arm/cortex-a8-fix-b-rel-arm.d: New.
++ * ld-arm/cortex-a8-fix-b-rel-thumb.d: New.
++ * ld-arm/cortex-a8-fix-bl-rel.s: New.
++ * ld-arm/cortex-a8-fix-bl-rel-arm.d: New.
++ * ld-arm/cortex-a8-fix-bl-rel-thumb.d: New.
++ * ld-arm/cortex-a8-fix-bcc-rel.s: New.
++ * ld-arm/cortex-a8-fix-bcc-rel-thumb.d: New.
++ * ld-arm/cortex-a8-fix-blx-rel.s: New.
++ * ld-arm/cortex-a8-fix-blx-rel-arm.d: New.
++ * ld-arm/cortex-a8-fix-blx-rel-thumb.d: New.
++ * ld-arm/arm-elf.exp: Move text section to 0x8f00 in existing
++ Cortex-A8 erratum workaround tests, and add above new tests.
++
++2009-03-29 Mark Mitchell <mark@codesourcery.com>
++
++ Backport:
++
++ 2009-03-28 Mark Mitchell <mark@codesourcery.com>
++ bfd/
++ * coff-arm.c (coff_arm_merge_private_bfd_data): Use "error:", not
++ "ERROR:", in error messages.
++ * cpu-arm.c (bfd_arm_merge_machines): Likewise.
++ * elf-attrs.c (_bfd_elf_merge_object_attributes): Likewise.
++ * elf32-arm.c (tag_cpu_arch_combine): Likewise.
++ (elf32_arm_merge_eabi_attributes): Likewise.
++ (elf32_arm_merge_private_bfd_data): Likewise.
++
++2009-03-24 Daniel Jacobowitz <dan@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (INTERWORK_FLAG): Check BFD_LINKER_CREATED.
++
++2009-03-22 Mark Mitchell <mark@codesourcery.com>
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (armelftests): Use -EL for Cortex-A8 tests.
++
++2009-03-20 Julian Brown <julian@codesourcery.com>
++
++ * release-notes-csl.xml (Erratum workaround for Cortex-A8 processors):
++ Add note.
++
++2009-03-20 Julian Brown <julian@codesourcery.com>
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (Cortex-A8 erratum fix, b.w)
++ (Cortex-A8 erratum fix, bl.w, Cortex-A8 erratum fix, bcc.w)
++ (Cortex-A8 erratum fix, blx.w): Pass --fix-cortex-a8 option.
++
++ bfd/
++ * elf32-arm.c (bfd_elf32_arm_set_cortex_a8_fix): Disable fix by
++ default in all cases.
++
++2009-03-20 Julian Brown <julian@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (do_t_blx): Always use BFD_RELOC_THUMB_PCREL_BLX.
++ (md_pcrel_from_section): Align address for BLX.
++ (tc_gen_reloc): Change BFD_RELOC_THUMB_PCREL_BLX relocations to
++ BFD_RELOC_THUMB_PCREL_BRANCH23 for EABI v4+.
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (armeabitests): Add thumb2-bl-blx-interwork test.
++ * ld-arm/thumb2-bl-blx-interwork.s: New.
++ * ld-arm/thumb2-bl-blx-interwork.d: New.
++
++2009-03-20 Andrew Stubbs <ams@codesourcery.com>
++
++ * release-note-csl.xml: Document issue #4250 changes.
++
++2009-03-20 Daniel Jacobowitz <dan@codesourcery.com>
++
++ * release-notes-csl.xml (Incorrect linker-generated functions): New
++ note.
++
++2009-03-19 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #4727
++
++ ld/
++ * emultempl/armelf.em (bfd_for_interwork, arm_elf_after_open)
++ (arm_elf_set_bfd_for_interworking): Delete.
++ (arm_elf_before_allocation): Do not set the interworking BFD.
++ Move allocation inside not-dynamic block.
++ (arm_elf_create_output_section_statements): Create glue sections
++ and set the interworking BFD here.
++ (LDEMUL_AFTER_OPEN): Delete.
++
++ ld/testsuite/
++ * ld-arm/farcall-mix.d, ld-arm/farcall-mix2.d,
++ ld-arm/farcall-group-size2.d, ld-arm/farcall-group.d: Update for
++ linker changes.
++
++ bfd/
++ * elf32-arm.c (elf32_arm_write_section): Declare early.
++ (elf32_arm_size_stubs): Skip non-stub sections in the stub BFD.
++ (arm_allocate_glue_section_space): Exclude empty sections.
++ (ARM_GLUE_SECTION_FLAGS): Add SEC_LINKER_CREATED.
++ (bfd_elf32_arm_add_glue_sections_to_bfd): Do not skip the stub
++ BFD.
++ (elf32_arm_output_glue_section, elf32_arm_final_link): New.
++ (elf32_arm_merge_eabi_attributes): Skip the stub BFD.
++ (elf32_arm_size_dynamic_sections): Allocate interworking
++ sections here.
++ (bfd_elf32_bfd_final_link): Define.
++
++2009-03-18 Daniel Gutson <dgutson@codesourcery.com>
++
++ Issue #4753
++
++ gas/
++ * doc/c-arm.texi: Added entries for cpus ARM Cortex-M0 and Cortex-M1.
++
++2009-03-18 Andrew Stubbs <ams@codesourcery.com>
++
++ Issue #4250
++
++ gas/
++ * config/tc-arm.c (md_apply_fix): Check BFD_RELOC_ARM_IMMEDIATE and
++ BFD_RELOC_ARM_ADRL_IMMEDIATE value is in the correct section.
++ Check BFD_RELOC_ARM_ADRL_IMMEDIATE has a defined symbol.
++
++ gas/testsuites/
++ * gas/arm/adr-invalid.d: New file.
++ * gas/arm/adr-invalid.l: New file.
++ * gas/arm/adr-invalid.s: New file.
++
++2009-03-17 Daniel Gutson <dgutson@codesourcery.com>
++
++ Issue #4753
++
++ gas/
++ * config/tc-arm.c (arm_cpus): Added cortex-m0.
++
++2009-03-17 Daniel Jacobowitz <dan@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_check_relocs): Correct symbian_p test.
++
++2009-03-16 Daniel Gutson <dgutson@codesourcery.com>
++
++ Issue #4753
++
++ * gas/config/tc-arm.c (arm_cpus): Added cortex-m0.
++
++2009-03-16 Julian Brown <julian@codesourcery.com>
++
++ ld/
++ * emultempl/armelf.em (fix_cortex_a8): New.
++ (arm_elf_before_allocation): Call bfd_elf32_arm_set_cortex_a8_fix.
++ (arm_elf_create_output_section_statements): Add fix_cortex_a8 to
++ bfd_elf32_arm_set_target_relocs.
++ (OPTION_FIX_CORTEX_A8): New.
++ (PARSE_AND_LIST_LONGOPTS): Add fix-cortex-a8 options.
++ (PARSE_AND_LIST_OPTIONS): Add fix-cortex-a8 option.
++ (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FIX_CORTEX_A8.
++
++ bfd/
++ * elf32-arm.c (stub_reloc_type): Remove.
++ (THUMB32_INSN, THUMB32_B_INSN): New macros.
++ (insn_sequence): Change type of reloc_type.
++ (elf32_arm_stub_a8_veneer_b_cond, elf32_arm_stub_a8_veneer_b)
++ (elf32_arm_stub_a8_veneer_blx): New stub sequences.
++ (elf32_arm_stub_type): Add arm_stub_a8_veneer_b_cond,
++ arm_stub_a8_veneer_b, arm_stub_a8_veneer_bl and
++ arm_stub_a8_veneer_blx.
++ (_arm_elf_section_data): Add target_addend field.
++ (a8_erratum_fix, a8_erratum_reloc): New structs.
++ (elf32_arm_link_hash_table): Add a8_erratum_fixes,
++ num_a8_erratum_fixes, fix_cortex_a8.
++ (elf32_arm_link_hash_table_create): Zero fix_cortex_a8.
++ (elf32_arm_final_link_relocate): Add forward declaration.
++ (arm_build_one_stub): Add support for THUMB32_TYPE, Thumb-2
++ relocations, multiple relocations per stub.
++ (find_stub_size_and_template): New.
++ (arm_size_one_stub): Use find_stub_size_and_template.
++ (a8_reloc_compare): New.
++ (elf32_arm_size_stubs): Add Cortex-A8 erratum workaround support.
++ (bfd_elf32_arm_set_cortex_a8_fix): New.
++ (bfd_elf32_arm_set_target_relocs): Add fix_cortex_a8 argument.
++ (arm_map_one_stub): Add THUMB32_TYPE support.
++ (a8_branch_to_stub_data): New.
++ (make_branch_to_a8_stub): New.
++ (elf32_arm_write_section): Add Cortex-A8 erratum workaround support.
++ * bfd-in.h (bfd_elf32_arm_set_cortex_a8_fix): New.
++ * bfd-in2.h: Regenerate.
++
++ ld/testsuite/
++ * ld-arm/cortex-a8-fix-b.s: New.
++ * ld-arm/cortex-a8-fix-b.d: New.
++ * ld-arm/cortex-a8-fix-bl.s: New.
++ * ld-arm/cortex-a8-fix-bl.d: New.
++ * ld-arm/cortex-a8-fix-bcc.s: New.
++ * ld-arm/cortex-a8-fix-bcc.d: New.
++ * ld-arm/cortex-a8-fix-blx.s: New.
++ * ld-arm/cortex-a8-fix-blx.d: New.
++
++2009-03-16 Andrew Stubbs <ams@codesourcery.com>
++
++ * release-notes-csl.xml: Document linker bug fix.
++
++2009-03-16 Andrew Stubbs <ams@codesourcery.com>
++
++ bfd/
++ * dwarf2.c (read_section): Always use rawsize, if available.
++
++ Backport
++ 2009-03-16 Alan Modra <amodra@bigpond.net.au>
++ * simple.c (bfd_simple_get_relocated_section_contents): Use larger
++ of rawsize and size for buffer.
++
++2009-03-12 Andrew Stubbs <ams@codesourcery.com>
++
++ bfd/
++ * dwarf2.c (read_section): Always check the offset, even when the
++ section has been read before.
++
++2009-03-11 Joseph Myers <joseph@codesourcery.com>
++
++ binutils/testsuite/
++ * binutils-all/objdump.W, binutils-all/objdump.s: Don't match
++ literal "tmpdir/" in expected output.
++
++2009-03-09 Catherine Moore <clm@codesourcery.com>
++
++ Issue #4861
++
++ Backport from FSF:
++
++ 2009-03-03 Alan Modra <amodra@bigpond.net.au>
++
++ * objdump.c (disassemble_section): Mask address before sign
++ extending.
++
++2009-03-08 Mark Mitchell <mark@codesourcery.com>
++
++ ld/testsuite/
++ * ld-elfcomm/elfcomm.exp: Compile with -fcommon.
++
++2009-03-06 Catherine Moore <clm@codesourcery.com>
++
++ Issue # 4861
++
++ Backport from FSF:
++
++ 2009-03-05 Nick Clifton <nickc@redhat.com>
++
++ * objdump.c (disassemble_section): If the computed next offset is
++ not beyond the current offset then just continue to the end.
++
++2009-03-05 Joseph Myers <joseph@codesourcery.com>
++
++ Issue #4808
++
++ Backport from FSF:
++
++ gas/
++ 2009-03-05 Joseph Myers <joseph@codesourcery.com>
++ * read.c (s_fill, s_space, s_float_space, float_cons, stringer,
++ s_incbin): Call md_cons_align (1).
++
++ gas/testsuite/
++ 2009-03-05 Joseph Myers <joseph@codesourcery.com>
++ * gas/arm/mapmisc.d, gas/arm/mapmisc.dat, gas/arm/mapmisc.s: New.
++
++2009-03-01 Mark Mitchell <mark@codesourcery.com>
++
++ Issue #4781
++
++ * release-notes-csl.xml: Document change.
++ gas/
++ * config/tc-arm.c (md_assemble): Allow barrier instructions on
++ ARMv6-M cores.
++ gas/testsuite/
++ * arm/archv6m.s: Add dmb, dsb, and isb.
++ * arm/archv6m.d: Likewise.
++
++2009-02-24 Sandra Loosemore <sandra@codesourcery.com>
++
++ Issue #2369
++ Patch applied simultaneously on mainline.
++
++ ld/
++ * ld.texinfo (Options): Correct typos in example. Recommend
++ using joined forms of syntax for passing options with arguments
++ from a driver.
++ (-a): Use consistent syntax for documenting option arguments.
++ Clean up indexing and markup.
++ (-A/--architecture): Likewise.
++ (-f/--auxiliary): Likewise.
++ (-F/--filter): Likewise.
++ (-fini): Likewise.
++ (-G/--gpsize): Likewise.
++ (-h/-soname):Likewise.
++ (-init): Likewise.
++ (-l/--library): Likewise.
++ (-L/--library-path): Likewise.
++ (-m): Likewise.
++ (--defsym): Likewise.
++ (-I/--dynamic-linker): Likewise.
++ (-Map): Likewise.
++ (--oformat): Likewise.
++ (--retain-symbols-file): Likewise.
++ (-rpath): Likewise.
++ (-rpath-link): Likewise.
++ (--sort-common): Likewise.
++ (--sort-section): Likewise.
++ (--split-by-file): Likewise.
++ (--split-by-reloc): Likewise.
++ (--sysroot): Likewise.
++ (--section-start): Likewise.
++ (-Tbss, -Tdata, -Ttext): Likewise.
++ (-Ttext-segment): Likewise.
++ (--version-script): Likewise.
++ (--wrap): Likewise.
++
++2009-02-24 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Revert:
++
++ 2009-02-19 Maxim Kuvyrkov <maxim@codesourcery.com>
++ Issue #4600
++
++ bfd/
++ * elf.c (_bfd_elf_map_sections_to_segments): Fix sanity check.
++
++ 2008-03-25 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ bfd/
++
++ * elf.c (_bfd_elf_map_sections_to_segments): Check user's
++ mapping of section to segments.
++
++2009-02-22 Mark Mitchell <mark@codesourcery.com>
++
++ * release-notes-csl.xml: Document change.
++ gas/
++ * config/tc-arm.c (warn_deprecated_sp): New macro.
++ (do_t_mov_cmp): Permit R13 as the second
++ argument to "cmp.n".
++ gas/testsuite/
++ * gas/arm/thumb2_bad_reg.s: Update.
++ * gas/arm/thumb2_bad_reg.l: Likewise.
++
++2009-02-23 Daniel Jacobowitz <dan@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_stub_long_branch_any_any_pic): Rename
++ to elf32_arm_stub_long_branch_any_arm_pic.
++ (elf32_arm_stub_long_branch_any_thumb_pic): New.
++ (enum elf32_arm_stub_type, arm_type_of_stub)
++ (arm_size_one_stub): Handle any to ARM PIC and any to Thumb PIC
++ separately.
++
++ ld/testsuite/
++ * ld-arm/farcall-arm-thumb-blx-pic-veneer.d,
++ ld-arm/farcall-arm-thumb-pic-veneer.d,
++ ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Update for fixed
++ Thumb PIC stub.
++
++2009-02-23 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (PREV_SEC): Update comment.
++ (group_sections): Rename argument to stubs_always_after_branch.
++ Reverse the list and place stubs at the end of input sections.
++ Undefine NEXT_SEC.
++ (elf32_arm_size_stubs): Update to use stubs_always_after_branch.
++
++ ld/
++ * ld.texinfo (ARM): Document changed meaning of --stub-group-size.
++ * emultempl/armelf.em (hook_in_stub): Insert after the input section.
++ (elf32_arm_add_stub_section): Update comment.
++ (PARSE_AND_LIST_OPTIONS): Update help for --stub-group-size.
++
++2009-02-23 Daniel Jacobowitz <dan@codesourcery.com>
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (armeabitests): Update duplicate test names.
++ Use normal output files for big-endian.
++ * ld-arm/farcall-arm-arm-be.d, ld-arm/farcall-thumb-arm-be.d: Delete.
++ * ld-arm/farcall-arm-arm-be8.d, ld-arm/farcall-arm-arm-pic-veneer.d,
++ ld-arm/farcall-arm-arm.d, ld-arm/farcall-arm-thumb-blx-pic-veneer.d,
++ ld-arm/farcall-arm-thumb-blx.d, ld-arm/farcall-arm-thumb-pic-veneer.d,
++ ld-arm/farcall-arm-thumb.d, ld-arm/farcall-group-size2.d,
++ ld-arm/farcall-group.d, ld-arm/farcall-mix.d, ld-arm/farcall-mix2.d,
++ ld-arm/farcall-thumb-arm-be8.d,
++ ld-arm/farcall-thumb-arm-blx-pic-veneer.d,
++ ld-arm/farcall-thumb-arm-blx.d, ld-arm/farcall-thumb-arm-short.d,
++ ld-arm/farcall-thumb-arm.d,
++ ld-arm/farcall-thumb-thumb-blx-pic-veneer.d,
++ ld-arm/farcall-thumb-thumb-blx.d, ld-arm/farcall-thumb-thumb-m.d,
++ ld-arm/farcall-thumb-thumb.d, ld-arm/thumb2-bl-as-thumb1-bad.d,
++ ld-arm/thumb2-bl-bad.d: Update for moved stubs.
++
++2009-02-23 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Backport:
++
++ 2009-02-23 Daniel Jacobowitz <dan@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (arm_build_one_stub): Initialize stub_reloc_offset.
++ Fix formatting.
++ (arm_size_one_stub): Remove unnecessary break.
++ (arm_map_one_stub): Fix formatting. Return after BFD_FAIL.
++
++ 2009-02-23 Daniel Jacobowitz <dan@codesourcery.com>
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (armeabitests): Run new tests. Correct BE8 output
++ filename.
++ * ld-arm/farcall-arm-arm-be.d, ld-arm/farcall-thumb-arm-be.d: New.
++
++ 2009-02-23 Christophe Lyon <christophe.lyon@st.com>
++
++ bfd/
++ * elf32-arm.c (stub_insn_type): New type.
++ (stub_reloc_type): Likewise.
++ (insn_sequence): Likewise.
++ (elf32_arm_stub_long_branch_any_any): Encode using insn_sequence.
++ (elf32_arm_stub_long_branch_v4t_arm_thumb): Likewise.
++ (elf32_arm_stub_long_branch_thumb_only): Likewise.
++ (elf32_arm_stub_long_branch_v4t_thumb_arm): Likewise.
++ (elf32_arm_stub_short_branch_v4t_thumb_arm): Likewise.
++ (elf32_arm_stub_long_branch_any_any_pic): Likewise.
++ (elf32_arm_stub_hash_entry): Add new helper fields.
++ (stub_hash_newfunc): Initialize these new fields.
++ (arm_build_one_stub): Encode Arm and Thumb instructions separately
++ to take endianness into account.
++ (arm_size_one_stub): Compute size of stubs using insn_sequence.
++ (arm_map_one_stub): Code is now more generic, thanks to
++ insn_sequence.
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp: Add new farcall-thumb-arm-be8 test.
++ * ld-arm/farcall-thumb-arm-be8.d: New expected result.
++ * ld-arm/farcall-arm-arm-be8.d: Replace wildcards by instructions.
++
++ 2009-02-23 Christophe Lyon <christophe.lyon@st.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_stub_long_branch_thumb_only): Fix stub
++ code.
++ (elf32_arm_stub_long_branch_v4t_thumb_arm): Likewise.
++ (arm_type_of_stub): Use Thumb-only long branch stub (non-PIC) when
++ BLX is not available. Fix typo in warning message. Add comments
++ and improve formatting.
++ (arm_build_one_stub): Adjust to new
++ elf32_arm_stub_long_branch_v4t_thumb_arm stub.
++ (arm_map_one_stub): Likewise.
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp: Rewrite non-EABI variants of
++ thumb2-bl-as-thumb1-bad and thumb2-bl-bad tests, which now
++ pass. farcall-thumb-thumb now passes in EABI mode.
++ * ld-arm/farcall-thumb-arm-pic-veneer.d: Fixed name, source, as
++ and ld flags to match intended test.
++ * ld-arm/farcall-thumb-arm.d: New expected result.
++ * ld-arm/farcall-thumb-thumb-m.d: Likewise.
++ * ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Fixed name and ld
++ flags.
++ * ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
++ * ld-arm/farcall-thumb-thumb.d: New expected result, this test is
++ now expected to pass.
++ * ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise.
++ * ld-arm/thumb2-bl-bad-noeabi.d: Likewise.
++ * ld-arm/thumb2-bl-as-thumb1-bad.d: Update addresses according to
++ new use.
++ * ld-arm/thumb2-bl-as-thumb1-bad.s: Update comment.
++
++ 2009-02-18 Christophe Lyon <christophe.lyon@st.com>
++
++ bfd/
++ * elf32-arm.c (arm_build_one_stub): Fix relocation target for pic
++ stub. Catch default case error.
++ (arm_map_one_stub): Add missing Thumb mapping symbol.
++
++ ld/testsuite/
++ * ld-arm/farcall-arm-arm-pic-veneer.d,
++ ld-arm/farcall-arm-thumb-blx-pic-veneer.d,
++ ld-arm/farcall-arm-thumb-pic-veneer.d,
++ ld-arm/farcall-thumb-arm-blx-pic-veneer.d,
++ ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Fix expected stub
++ target.
++
++ 2009-02-16 Christophe Lyon <christophe.lyon@st.com>
++
++ bfd/
++ * elf32-arm.c (arm_long_branch_stub,
++ arm_thumb_v4t_long_branch_stub,
++ arm_thumb_thumb_long_branch_stub,
++ arm_thumb_arm_v4t_long_branch_stub,
++ arm_thumb_arm_v4t_short_branch_stub,
++ arm_pic_long_branch_stub):
++ Renamed to elf32_arm_stub_long_branch_any_any,
++ elf32_arm_stub_long_branch_v4t_arm_thumb,
++ elf32_arm_stub_long_branch_thumb_only,
++ elf32_arm_stub_long_branch_v4t_thumb_arm,
++ elf32_arm_stub_short_branch_v4t_thumb_arm,
++ elf32_arm_stub_long_branch_any_any_pic.
++ (arm_stub_long_branch, arm_thumb_v4t_stub_long_branch,
++ arm_thumb_thumb_stub_long_branch,
++ arm_thumb_arm_v4t_stub_long_branch,
++ arm_thumb_arm_v4t_stub_short_branch, arm_stub_pic_long_branch):
++ Renamed to arm_stub_long_branch_any_any,
++ arm_stub_long_branch_v4t_arm_thumb,
++ arm_stub_long_branch_thumb_only,
++ arm_stub_long_branch_v4t_thumb_arm,
++ arm_stub_short_branch_v4t_thumb_arm,
++ arm_stub_long_branch_any_any_pic.
++
++2009-02-22 Mark Mitchell <mark@codesourcery.com>
++
++ Issue #4694
++ * release-notes-csl.xml: Document fix.
++ Backport:
++ libiberty/
++ 2009-02-21 Mark Mitchell <mark@codesourcery.com>
++ * make-temp-file.c (<windows.h>): Include on Windows.
++ (choose_tmpdir): On Windows, use GetTempPath.
++
++2009-02-19 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Issue #4600
++
++ bfd/
++ * elf.c (_bfd_elf_map_sections_to_segments): Fix sanity check.
++
++2009-02-18 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #4577
++ gas/
++ * config/tc-arm.c (do_nop): Generate v6k nops whenever possible.
++ (arm_handle_align): Generate v6k ARM, thumb2 wide & narrow nops
++ whenever possible.
++
++ gas/testsuite/
++ * gas/arm/align.s, gas/arm/align.d: New.
++ * gas/arm/thumb32.d, gas/arm/arch6zk.d, gas/arm/arch6zk.s,
++ arm/thumb2_relax.d: Adjust for align changes.
++
++2009-02-05 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elf.c: Revert local version of issue 3598 patch.
++
++2009-02-05 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elflink.c: Resync with upstream.
++
++ binutils/
++ * sysdep.h: Resync with upstream.
++
++2009-02-05 Joseph Myers <joseph@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c: Resync whitespace with upstream.
++ * config/tc-mips.c: Remove duplicate 74kf3_2 entry.
++
++ gas/testsuite/
++ * gas/arm/backslash-at.d: Resync with upstream.
++
++ include/opcode/
++ * mips.h: Remove relics of old Octeon support.
++
++2009-02-05 Joseph Myers <joseph@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c: Remove relics of old Octeon support. Adjust
++ error checking in line with
++ <https://intranet.codesourcery.com/ml/gnu-mips-sgxx/2008-08/msg00069.html>.
++
++ gas/testsuite/
++ * gas/mips/octeon1.l, gas/mips/octeon3.d, gas/mips/octeon3.s:
++ Update for assembler changes.
++
++ opcodes/
++ * mips-dis.c: Remove relics of old Octeon support.
++ * mips-opc.c: Restore Octeon sync instructions.
++
++2009-02-04 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Clean up m68k TLS implementation after upstream contribution.
++
++ ld/testsuite/
++ * ld-m68k/tls-gd-ie-1.d: Update.
++ * ld-m68k/tls-gd-3.d, ld-m68k/tls-gd-3.s: Move to gas testsuite.
++ * ld-m68k/m68k.exp (merge isa-a isa-a:nodiv): Fix test.
++ (tls-*): Run only for m68k-*-linux* targets.
++
++ gas/testsuite/
++ * gas/m68k/tls-gd-3.d, gas/m68k/tls-gd-3.s: New test.
++ * gas/m68k/all.exp: Run it.
++
++ gas/
++ * config/tc-m68k.c: Fix whitespace.
++
++ bfd/
++ * elf32-m68k.c: Fix formatting.
++ (elf_m68k_relocate_section): Remove duplicate code. Use
++ SYMBOL_REFERENCES_LOCAL.
++ (elf_m68k_finish_dynamic_symbol): Use SYMBOL_REFERENCES_LOCAL.
++
++2009-02-04 Andrew Jenner <andrew@codesourcery.com>
++
++ gas/
++ * configure.tgt: Handle mips-montavista-elf.
++
++2009-02-03 Kazu Hirata <kazu@codesourcery.com>
++
++ config/
++ * mh-mingw (BOOT_CFLAGS): Remove -D__USE_MINGW_ACCESS.
++ (CFLAGS): Comment out.
++
++ libiberty/
++ * cygpath.c (msvcrt_dll): Change the return type to HMODULE.
++ (msvcrt_fopen): Use HMODULE for the return value from msvcrt_dll.OB
++
++2009-02-03 Joseph Myers <joseph@codesourcery.com>
++
++ Issue #4540
++
++ bfd/
++ * elfxx-mips.c (_bfd_mips_elf_section_processing): Remove special
++ .sbss handling.
++
++2009-02-02 Kazu Hirata <kazu@codesourcery.com>
++
++ gprof/
++ * gprof.h: Include gconfig.h. #undef PACKAGE.
++
++ ld/
++ * gprof.h: Include config.h.
++
++2009-01-30 Catherine Moore <clm@codesourcery.com>
++
++ bfd/
++ elf32-m68k.c (elf_m68k_relocate_section): Pass relocation
++ type to elf_m68k_init_got_entry_key.
++
++2009-01-29 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c: Resync whitespace with upstream.
++
++ gas/
++ * doc/c-mips.texi: Remove duplicate 74kf3_2 entry.
++
++ ld/
++ * configure.in: Replace AC_ERROR with AC_MSG_ERROR.
++ * emultempl/m68kelf.em: Resync whitespace with upstream.
++
++2009-01-29 Catherine Moore <clm@codesourcery.com>
++
++ bfd/
++ elfxx-mips.c (mips_elf_calculate_relocation): Add check
++ for (h != NULL).
++
++2009-01-28 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elfxx-mips.c (mips_mach_extensions): Remove duplicate Octeon
++ entry.
++
++ gas/
++ * config/tc-mips.c (CPU_HAS_DROR): Remove Octeon handling.
++ (CPU_HAS_INS): Remove.
++
++ gas/testsuite/
++ * gas/mips/mips.exp: Resync whitespace with upstream.
++
++ include/elf/
++ * mips.h: Resync whitespace with upstream.
++
++ include/opcode/
++ * mips.h (OPCODE_IS_MEMBER): Remove duplicate Octeon check.
++
++ opcodes/
++ * mips-opc.c (mips_builtin_opcodes): Remove duplicate pop
++ instruction.
++
++2009-01-28 Joseph Myers <joseph@codesourcery.com>
++
++ * config.sub: Remove XLR targets.
++ * configure.ac: Move mips*-sde-elf* case to upstream location.
++ Don't add target-sdemdi.
++ * configure: Regenerate.
++
++ bfd/
++ * elf.c: Remove duplicate if conditional.
++ * elf32-m68k.c: Remove conflict marker.
++ * elfxx-mips.c: Resync whitespace with upstream. Remove duplicate
++ comment.
++
++ config/
++ * mt-sde: Revert difference from upstream.
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp: Remove duplicate runs of some tests.
++
++ opcodes/
++ * ppc-dis.c: Remove duplicate if conditional.
++
++2009-01-25 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ bfd/
++ * elf32-m68k.c (elf_m68k_finalize_got_offsets): Fix condition.
++
++2009-01-25 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ bfd/
++ * elf32-m68k.c (struct elf_m68k_finalize_got_offsets_arg): Remove
++ use_neg_got_offsets_p field.
++ (elf_m68k_finalize_got_offsets_1, elf_m68k_finalize_got_offsets):
++ Update, don't use not initialized data, initialize data before
++ using it.
++
++2009-01-21 Andrew Stubbs <ams@codesourcery.com>
++
++ Issue #4300
++
++ gas/
++ * config/tc-arm.c (attributes_set_explicitly): New array.
++ (s_arm_eabi_attribute): Check return value from s_vendor_attribute.
++ (cpu_arch): Add ARM_ARCH_V5T.
++ (aeabi_set_attribute_int): New function.
++ (aeabi_set_attribute_string): New function.
++ (aeabi_set_public_attributes): Set attributes according to the user's
++ intentions, rather than the actual state of the binary.
++ Use aeabi_set_attribute_int and aeabi_set_attribute_string instead of
++ bfd_elf_add_proc_attr_int and bfd_elf_add_proc_attr_string.
++ Support WMMXv2. Use attribute names instead of numbers.
++ * read.c (s_vendor_attribute): Change return type to int.
++ Return the tag number that was set.
++ * read.h (s_vendor_attribute): Change return type to int.
++
++ gas/testsuite/
++ * gas/arm/attr-cpu-directive.d: New file.
++ * gas/arm/attr-cpu-directive.s: New file.
++ * gas/arm/attr-default.d: New file.
++ * gas/arm/attr-march-all.d: New file.
++ * gas/arm/attr-march-armv1.d: New file.
++ * gas/arm/attr-march-armv2.d: New file.
++ * gas/arm/attr-march-armv2a.d: New file.
++ * gas/arm/attr-march-armv2s.d: New file.
++ * gas/arm/attr-march-armv3.d: New file.
++ * gas/arm/attr-march-armv3m.d: New file.
++ * gas/arm/attr-march-armv4.d: New file.
++ * gas/arm/attr-march-armv4t.d: New file.
++ * gas/arm/attr-march-armv4txm.d: New file.
++ * gas/arm/attr-march-armv4xm.d: New file.
++ * gas/arm/attr-march-armv5.d: New file.
++ * gas/arm/attr-march-armv5t.d: New file.
++ * gas/arm/attr-march-armv5te.d: New file.
++ * gas/arm/attr-march-armv5tej.d: New file.
++ * gas/arm/attr-march-armv5texp.d: New file.
++ * gas/arm/attr-march-armv5txm.d: New file.
++ * gas/arm/attr-march-armv6-m.d: New file.
++ * gas/arm/attr-march-armv6.d: New file.
++ * gas/arm/attr-march-armv6j.d: New file.
++ * gas/arm/attr-march-armv6k.d: New file.
++ * gas/arm/attr-march-armv6kt2.d: New file.
++ * gas/arm/attr-march-armv6t2.d: New file.
++ * gas/arm/attr-march-armv6z.d: New file.
++ * gas/arm/attr-march-armv6zk.d: New file.
++ * gas/arm/attr-march-armv6zkt2.d: New file.
++ * gas/arm/attr-march-armv6zt2.d: New file.
++ * gas/arm/attr-march-armv7-a.d: New file.
++ * gas/arm/attr-march-armv7-m.d: New file.
++ * gas/arm/attr-march-armv7-r.d: New file.
++ * gas/arm/attr-march-armv7.d: New file.
++ * gas/arm/attr-march-armv7a.d: New file.
++ * gas/arm/attr-march-armv7m.d: New file.
++ * gas/arm/attr-march-armv7r.d: New file.
++ * gas/arm/attr-march-iwmmxt.d: New file.
++ * gas/arm/attr-march-iwmmxt2.d: New file.
++ * gas/arm/attr-march-marvell-f.d: New file.
++ * gas/arm/attr-march-xscale.d: New file.
++ * gas/arm/attr-mcpu.d: New file.
++ * gas/arm/attr-mfpu-arm1020e.d: New file.
++ * gas/arm/attr-mfpu-arm1020t.d: New file.
++ * gas/arm/attr-mfpu-arm1136jf-s.d: New file.
++ * gas/arm/attr-mfpu-arm1136jfs.d: New file.
++ * gas/arm/attr-mfpu-arm7500fe.d: New file.
++ * gas/arm/attr-mfpu-fpa.d: New file.
++ * gas/arm/attr-mfpu-fpa10.d: New file.
++ * gas/arm/attr-mfpu-fpa11.d: New file.
++ * gas/arm/attr-mfpu-fpe.d: New file.
++ * gas/arm/attr-mfpu-fpe2.d: New file.
++ * gas/arm/attr-mfpu-fpe3.d: New file.
++ * gas/arm/attr-mfpu-maverick.d: New file.
++ * gas/arm/attr-mfpu-neon-fp16.d: New file.
++ * gas/arm/attr-mfpu-neon.d: New file.
++ * gas/arm/attr-mfpu-softfpa.d: New file.
++ * gas/arm/attr-mfpu-softvfp+vfp.d: New file.
++ * gas/arm/attr-mfpu-softvfp.d: New file.
++ * gas/arm/attr-mfpu-vfp.d: New file.
++ * gas/arm/attr-mfpu-vfp10-r0.d: New file.
++ * gas/arm/attr-mfpu-vfp10.d: New file.
++ * gas/arm/attr-mfpu-vfp3.d: New file.
++ * gas/arm/attr-mfpu-vfp9.d: New file.
++ * gas/arm/attr-mfpu-vfpv2.d: New file.
++ * gas/arm/attr-mfpu-vfpv3-d16.d: New file.
++ * gas/arm/attr-mfpu-vfpv3.d: New file.
++ * gas/arm/attr-mfpu-vfpxd.d: New file.
++ * gas/arm/attr-order.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
++ * gas/arm/attr-override-cpu-directive.d: New file.
++ * gas/arm/attr-override-cpu-directive.s: New file.
++ * gas/arm/attr-override-mcpu.d: New file.
++ * gas/arm/attr-override-mcpu.s: New file.
++ * gas/arm/blank.s: New file.
++ * gas/arm/eabi_attr_1.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
++
++ ld/testsuite/
++ * ld-arm/attr-merge-3.attr: Update following gas change.
++ * ld-arm/attr-merge-2.attr: Update Tag_ARM_ISA_use and
++ Tag_THUMB_ISA_use following gas changes.
++ * ld-arm/attr-merge-4.attr: Likewise.
++ * ld-arm/attr-merge-5.attr: Likewise.
++ * ld-arm/attr-merge-arch-1.attr: Likewise.
++ * ld-arm/attr-merge-arch-2.attr: Likewise.
++ * ld-arm/attr-merge-unknown-2.d: Likewise.
++ * ld-arm/attr-merge-unknown-2r.d: Likewise.
++ * ld-arm/attr-merge-unknown-3.d: Likewise.
++ * ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-00.d: Likewise.
++ * ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-02.d: Likewise.
++ * ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-04.d: Likewise.
++ * ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-20.d: Likewise.
++ * ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-22.d: Likewise.
++ * ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-40.d: Likewise.
++ * ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
++ * ld-arm/attr-merge-wchar-44.d: Likewise.
++ * ld-arm/attr-merge.attr: Likewise.
++
++2009-01-21 Andrew Stubbs <ams@codesourcery.com>
++
++ bfd/
++ * elf-attrs.c (is_default_attr): Substitute magic numbers with macros.
++ (obj_attr_size): Likewise.
++ (write_obj_attribute): Likewise.
++ (_bfd_elf_copy_obj_attributes): Likewise.
++ (_bfd_elf_parse_attributes): Likewise.
++ * elf-bfd.h (ATTR_TYPE_FLAG_INT_VAL): New define.
++ (ATTR_TYPE_FLAG_STR_VAL, ATTR_TYPE_FLAG_NO_DEFAULT): New defines.
++ (ATTR_TYPE_HAS_INT_VAL, ATTR_TYPE_HAS_STR_VAL): New defines.
++ (ATTR_TYPE_HAS_NO_DEFAULT): New define.
++ * elf32-arm.c (elf32_arm_obj_attrs_arg_type): Replace magic numbers
++ with macros.
++
++2009-01-06 Andrew Stubbs <ams@codesourcery.com>
++
++ * release-notes-csl.xml: Document ARM attributes improvements.
++
++2009-01-01 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from FSF:
++
++ bfd/
++ 2008-12-23 Nick Clifton <nickc@redhat.com>
++ PR 7093
++ * elf32-arm.c (bfd_elf32_arm_init_maps): Only process ARM ELF
++ object files.
++
++2008-12-24 Andrew Stubbs <ams@codesourcery.com>
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (armeabitests): Add EABI attribute merging 3,
++ EABI attribute merging 4, and EABI attribute merging 5,
++ EABI attribute arch merging 1, EABI attribute arch merging 1 reversed,
++ EABI attribute arch merging 2, EABI attribute arch merging 2 reversed.
++ Add attr-merge-unknown-1, attr-merge-unknown-2, attr-merge-unknown-2r,
++ and attr-merge-unknown-3 dump tests.
++ * ld-arm/arch-v6.s: New file.
++ * ld-arm/arch-v6k.s: New file.
++ * ld-arm/arch-v6t2.s: New file.
++ * ld-arm/attr-merge-3.attr: New file.
++ * ld-arm/attr-merge-3a.s: New file.
++ * ld-arm/attr-merge-3b.s: New file.
++ * ld-arm/attr-merge-4.attr: New file.
++ * ld-arm/attr-merge-4a.s: New file.
++ * ld-arm/attr-merge-4b.s: New file.
++ * ld-arm/attr-merge-5.attr: New file.
++ * ld-arm/attr-merge-5.s: New file.
++ * ld-arm/attr-merge-arch-1.attr: New file.
++ * ld-arm/attr-merge-arch-2.attr: New file.
++ * ld-arm/attr-merge-unknown-1.d: New file.
++ * ld-arm/attr-merge-unknown-1.s: New file.
++ * ld-arm/attr-merge-unknown-2.d: New file.
++ * ld-arm/attr-merge-unknown-2.s: New file.
++ * ld-arm/attr-merge-unknown-2r.d: New file.
++ * ld-arm/attr-merge-unknown-3.d: New file.
++ * ld-arm/blank.s: New file.
++
++2008-12-24 Andrew Stubbs <ams@codesourcery.com>
++
++ bfd/
++ * elf-attrs.c (vendor_set_obj_attr_contents): Support tag ordering.
++ * elf-bfd.h (elf_backend_data): Add obj_attrs_order.
++ * elf32-arm.c (elf32_arm_obj_attrs_order): New function.
++ (elf_backend_obj_attrs_order): New define.
++ * elfxx-target.h (elf_backend_obj_attrs_order): New define.
++ (elfNN_bed): Add elf_backend_obj_attrs_order.
++
++ gas/testsuite/
++ * gas/arm/attr-order.d: New file.
++ * gas/arm/attr-order.s: New file.
++
++2008-12-24 Andrew Stubbs <ams@codesourcery.com>
++
++ bfd/
++ * elf-attrs.c (is_default_attr): Support defaultless attributes.
++ (bfd_elf_add_obj_attr_int): Get type from _bfd_elf_obj_attrs_arg_type.
++ (bfd_elf_add_obj_attr_string): Likewise.
++ (bfd_elf_add_obj_attr_int_string): Likewise.
++ (_bfd_elf_parse_attributes): Allow for unknown flag bits in type.
++ * elf-bfd.h (struct obj_attribute): Document new flag bit.
++ * elf32-arm.c (elf32_arm_obj_attrs_arg_type): Specify that
++ Tag_nodefaults has no default value.
++ (elf32_arm_merge_eabi_attributes): Modify the Tag_nodefaults
++ comment to reflect the new state.
++
++ gas/
++ * read.c (s_vendor_attribute): Allow for unknown flag bits in type.
++
++2008-12-24 Andrew Stubbs <ams@codesourcery.com>
++ Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #1581
++
++ gas/
++ * config/tc-arm.c (arm_copy_symbol_attributes): New function.
++ * config/tc-arm.h (arm_copy_symbol_attributes): New prototype.
++ (CONVERT_SYMBOLIC_ATTRIBUTE): New define.
++ * read.c (s_vendor_attribute): Add support for symbolic tag names.
++ Improve string parser.
++ * doc/c-arm.texi (ARM Machine Directives): Document
++ .eabi_attribute symbolic tag names.
++
++ gas/testsuite/
++ * gas/arm/attr-syntax.d: New file.
++ * gas/arm/attr-syntax.s: New file.
++
++2008-12-24 Andrew Stubbs <ams@codesourcery.com>
++ Julian Brown <julian@codesourcery.com>
++
++ bfd/
++ * elf-bfd.h (NUM_KNOWN_OBJ_ATTRIBUTES): Set to 71 to include all known
++ ARM attributes in ABI 2.07.
++ * elf32-arm.c (get_secondary_compatible_arch): New function.
++ (set_secondary_compatible_arch): New function.
++ (tag_cpu_arch_combine): New function.
++ (elf32_arm_copy_one_eabi_other_attribute): Delete function.
++ (elf32_arm_copy_eabi_other_attribute_list): Delete function.
++ (elf32_arm_merge_eabi_attributes): Rename order_312 to order_021 to
++ make it fit with order_01243.
++ Add support for Tag_also_compatible_with,
++ Tag_CPU_unaligned_access, Tag_T2EE_use, Tag_Virtualization_use,
++ Tag_MPextension_use, Tag_nodefaults and Tag_conformance.
++ Improve/tidy up support for Tag_CPU_raw_name, Tag_CPU_name,
++ Tag_CPU_arch, Tag_ABI_HardFP_use, Tag_VFP_HP_extension,
++ Tag_ABI_FP_denormal, Tag_ABI_PCS_GOT_use, Tag_ABI_align8_needed,
++ Tag_VFP_arch and Tag_ABI_FP_16bit_format.
++ Rework the way unknown attributes are handled.
++ Defer errors until all attributes have been processed.
++
++ gas/
++ * config/tc-arm.c (cpu_arch): Change ARM_ARCH_V6M to 11.
++
++ include/elf/
++ * arm.h (TAG_CPU_ARCH_V6_M, TAG_CPU_ARCH_V6S_M): New defines.
++ (MAX_TAG_CPU_ARCH, TAG_CPU_ARCH_V4T_PLUS_V6_M): New defines.
++ (Tag_NEON_arch): Rename to Tag_Advanced_SIMD_arch to match ARM ABI
++ version 2.07.
++ (Tag_undefined39, Tag_nodefaults): New enum values.
++ (Tag_also_compatible_with, Tag_T2EE_use): Likewise.
++ (Tag_conformance, Tag_Virtualization_use): Likewise.
++ (Tag_undefined69, Tag_MPextension_use): Likewise.
++
++2008-12-24 Andrew Stubbs <ams@codesourcery.com>
++
++ bfd/
++ * elf-attrs.c (bfd_elf_add_obj_attr_compat): Rename to
++ bfd_elf_add_obj_attr_int_string.
++ Read Tag_compatibility from its new location in the attribute array,
++ rather than the attribute list.
++ (_bfd_elf_copy_obj_attributes): bfd_elf_add_obj_attr_compat ->
++ bfd_elf_add_obj_attr_int_string.
++ (_bfd_elf_parse_attributes): Likewise.
++ (_bfd_elf_merge_object_attributes): There's now only one
++ Tag_compatibility, and it's in the array, not the list.
++ * elf-bfd.h (NUM_KNOWN_OBJ_ATTRIBUTES): Set to 33 to include
++ Tag_compatibility.
++ (bfd_elf_add_obj_attr_compat): Rename to
++ bfd_elf_add_obj_attr_int_string.
++ (bfd_elf_add_proc_attr_compat): Rename to
++ bfd_elf_add_proc_attr_int_string.
++ elf32-arm.c (elf32_arm_merge_eabi_attributes): Explicitly don't handle
++ Tag_compatibility.
++
++ gas/
++ * read.c (s_vendor_attribute): bfd_elf_add_obj_attr_compat ->
++ bfd_elf_add_obj_attr_int_string.
++
++2008-12-11 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (m68k_cpus): Add 51jm.
++
++2008-12-09 Andrew Stubbs <ams@codesourcery.com>
++
++ binutils/
++ * readelf.c (arm_attr_tag_CPU_arch): Add "v6-M" and "v6S-M".
++ (arm_attr_tag_WMMX_arch): Add "WMMXv2".
++ (arm_attr_tag_NEON_arch): Rename to ...
++ (arm_attr_tag_Advanced_SIMD_arch): ... official name.
++ (arm_attr_tag_ABI_PCS_config): Rename to ...
++ (arm_attr_tag_PCS_config): ... official name.
++ (arm_attr_tag_ABI_PCS_RO_DATA): Rename to ...
++ (arm_attr_tag_ABI_PCS_RO_data): ... official name.
++ (arm_attr_tag_ABI_FP_denormal): Add "Sign only".
++ (arm_attr_tag_CPU_unaligned_access): New array.
++ (arm_attr_tag_T2EE_use): New array.
++ (arm_attr_tag_Virtualization_use): New array.
++ (arm_attr_tag_MPextension_use): New array.
++ (arm_attr_publ): NEON_arch -> Advanced_SIMD_arch.
++ ABI_PCS_config -> PCS_config.
++ ABI_PCS_RO_DATA -> ABI_PCS_RO_data.
++ Add CPU_unaligned_access, nodefaults, also_compatible_with,
++ T2EE_use, conformance, Virtualization_use and MPextension_use.
++ (display_arm_attribute): Handle Tag_nodefaults and
++ Tag_also_compatible_with.
++
++2008-12-01 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #2968
++ * release-notes-csl.xml: Document attribute fix.
++
++ bfd/
++ * elf-attrs.c (elf_new_obj_attr, bfd_elf_get_obj_attr_int): Correct
++ comments.
++ (_bfd_elf_merge_object_attributes): Support final Tag_compatibility.
++
++2008-11-30 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ bfd/
++ * elf32-m68k.c (elf_m68k_relocate_section): Fix indentation,
++ adjust relocation when appropriate.
++
++2008-11-24 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_final_link_relocate): Do not turn
++ branches to undefine weak symbols into branches to the next
++ instruction if creating PLT entries for those symbols.
++
++ ld/testsuite/
++ * ld-arm/thumb2-bl-undefweak.d, ld-arm/thumb2-bl-undefweak.s: New.
++ * ld-arm/arm-elf.exp: Run thumb2-bl-undefweak test.
++
++2008-11-14 Catheirne Moore <clm@codesourcery.com>
++
++ opcodes/
++ * mips-opc.c (sync, sync.p, sync.l, synci): Remove duplicates.
++
++2008-11-12 Catherine Moore <clm@codesourcery.com>
++
++ gas/testsuite/
++ * gas/mips/mips.exp (mips32-sync): Only run for mips targets.
++
++2008-11-09 Catherine Moore <clm@codesourcery.com>
++
++ Issue #4135
++
++ Backport from mainline:
++
++ 2008-11-06 Chao-ying Fu <fu@mips.com>
++
++ opcodes/
++ * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
++ before sync.
++ (sync): New instruction with 5-bit sync type.
++ * mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.
++
++ gas/
++ * config/tc-mips.c (validate_mips_insn): Add case '1'.
++ (mips_ip): Add case '1' to process sync type.
++
++ gas/testsuite/
++ * gas/mips/mips32-sync.d, gas/mip/mips32-sync.s: New tests.
++ * gas/mips/mips.exp: Run them.
++
++ include/opcode/
++ * mips.h: Doucument '1' for 5-bit sync type.
++
++2008-11-07 Catherine Moore <clm@codesourcery.com>
++
++ Issue #3827
++
++ * bfd/elfxx-mips.c (_bfd_mips_elf_always_size_sections): Move
++ the sizing of the nonpic to pic stubs prior to the check for
++ the presence of a dynamic object.
++
++2008-10-24 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (md_pseudo_table): Use .long instead of .word
++ to handle TLS debug information.
++ (m68k_elf_cons): Remove workaround.
++
++2008-10-24 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (m68k_elf_cons): Force used.
++
++2008-10-23 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (md_pseudo_table): Disable .word override for
++ now.
++
++2008-10-13 Sandra Loosemore <sandra@codesourcery.com>
++
++ * release-notes-csl.xsl (Bug fix for assembly listing):
++ Conditionalize for windows host.
++ (Bug fix for objdump on Windows): Likewise.
++
++2008-10-13 Andrew Stubbs <ams@codesourcery.com>
++
++ Issue #3536
++
++ Backport from mainline:
++ bfd/
++ 2008-10-08 Alan Modra <amodra@bigpond.net.au>
++
++ * elf.c (assign_file_positions_for_load_sections): When checking
++ a segment for contents, don't assume that a non-TLS nobits section
++ must only be followed by nobits sections.
++
++2008-10-13 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c (mips_cpu_info_table): Add ice9.
++
++2008-10-11 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ M68K NPTL support.
++ gas/
++ * config/tc-m68k.c (m68k_elf_cons): New static function.
++ (md_pseudo_table): Use it.
++ (md_apply_fix): Fix to set thread local flag.
++ (m68k_elf_suffix): New static function; helper for m68k_elf_cons.
++
++ gas/testsuite/
++ * gas/m68k/tls-1.s: Remove.
++
++ bfd/
++ * elf32-m68k.c: Handle 2-slot GOT entries. Rename variables and
++ fields from n_entries to n_slots where appropriate, update comments.
++ (struct elf_m68k_got_entry.type): Move field to ...
++ (struct elf_m68k_got_entry_key): ... here. Update all uses.
++ (struct elf_m68k_got): Update comments.
++ (elf_m68k_reloc_got_tls_p): Rename to elf_m68k_reloc_tls_p, handle
++ all relocations. Update all uses.
++ (elf_m68k_init_got, elf_m68k_init_got_entry_key): Update.
++ (elf_m68k_got_entry_hash, elf_m68k_got_entry_eq): Update,
++ handle key->type.
++ (ELF_M68K_REL_8O_MAX_N_ENTRIES_IN_GOT): Update name, update all uses.
++ (ELF_M68K_REL_8O_16O_MAX_N_ENTRIES_IN_GOT): Same.
++ (elf_m68k_get_got_entry, elf_m68k_update_got_entry_type): Update.
++ (elf_m68k_remove_got_entry_type, elf_m68k_add_entry_to_got): Update.
++ (elf_m68k_can_merge_gots_1, elf_m68k_can_merge_gots): Update.
++ (elf_m68k_merge_gots_1, elf_m68k_merge_gots): Update.
++ (struct elf_m68k_finalize_got_offsets_arg: n_ldm_entries): New field.
++ (elf_m68k_finalize_got_offsets_1, elf_m68k_finalize_got_offsets):
++ Update, handle TLS_LDM entries.
++ (struct elf_m68k_partition_multi_got_arg): Add slots_relas_diff
++ field, remove obsoleted local_n_entries field.
++ (elf_m68k_partition_multi_got_2): New static function.
++ (elf_m68k_partition_multi_got_1, elf_m68k_partition_multi_got): Use it,
++ update.
++ (elf_m68k_remove_got_entry): Update.
++ (elf_m68k_install_rela, dtpoff_base, tpoff): New static functions.
++ (elf_m68k_relocate_section, elf_m68k_finish_dynamic_symbol):
++ Handle TLS relocations.
++
++ ld/testsuite/
++ * ld-m68k/tls-gd-1.d, ld-m68k/tls-gd-2.d, ld-m68k/tls-gd-3.d:
++ New tests.
++ * ld-m68k/tls-gd-ie-1.d, ld-m68k/tls-ie-1.d: New tests.
++ * ld-m68k/tls-ld-1.d, ld-m68k/tls-ld-2.d: New tests.
++ * ld-m68k/tls-ld-1.s, ld-m68k/tls-ld-2.s, ld-m68k/tls-le-1.s:
++ New test sources.
++ * ld-m68k/tls-no-1.s, ld-m68k/tls-gd-ie-1.s, ld-m68k/tls-gd-1.s:
++ New test sources.
++ * ld-m68k/tls-gd-2.s, ld-m68k/tls-gd-3.s, ld-m68k/tls-ie-1.s:
++ New test sources.
++ * ld-m68k/m68k.exp: Run new tests.
++
++2008-10-10 Nathan Froyd <froydnj@codesourcery.com>
++
++ binutils/
++ * readelf.c (display_mips_gnu_attribute): Move Power-specific
++ block of code...
++ (display_power_gnu_attribute): ...here. Oops.
++
++2008-10-10 Nathan Froyd <froydnj@codesourcery.com>
++
++ Issue #3928
++
++ Backport:
++
++ include/elf/
++ 2008-10-10 Nathan Froyd <froydnj@codesourcery.com>
++ * ppc.h: Add Tag_GNU_Power_ABI_Struct_Return.
++
++ bfd/
++ 2008-10-10 Nathan Froyd <froydnj@codesourcery.com>
++ * elf32-ppc.c (ppc_elf_merge_obj_attributes): Merge
++ Tag_GNU_Power_ABI_Struct_Return.
++
++ binutils/
++ 2008-10-10 Nathan Froyd <froydnj@codesourcery.com>
++ * readelf.c (display_power_gnu_attribute): Decode
++ Tag_GNU_Power_ABI_Struct_Return.
++
++ ld/testsuite/
++ 2008-10-10 Nathan Froyd <froydnj@codesourcery.com>
++ * ld-powerpc/gnu-attr-12-1.s: New file.
++ * ld-powerpc/gnu-attr-12-2.s: New file.
++ * ld-powerpc/gnu-attr-12-11.d: New file.
++ * ld-powerpc/gnu-attr-12-21.d: New file.
++ * ld-powerpc/powerpc.exp: Run new dump tests.
++
++
++2008-10-09 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * coff64-rs6000.c (rs6000coff64_vec, aix5coff64_vec): Add
++ copy_link_hash_symbol_type initializers.
++
++2008-10-09 Joseph Myers <joseph@codesourcery.com>
++
++ Backport:
++
++ bfd/
++ 2008-02-17 Mark Kettenis <kettenis@gnu.org>
++ * elf.c (swap_out_syms): Avoid preprocessing directive within
++ macro arg.
++
++2008-10-03 Kazu Hirata <kazu@codesourcery.com>
++
++ Issue 1365
++ gas/
++ * listing.c (buffer_line): Open the source file with FOPEN_RB.
++ Manually process line ends.
++
++ * release-notes-csl.xml: Add a release note about the
++ assembler bug.
++
++2008-09-26 Julian Brown <julian@codesourcery.com>
++
++ * release-notes-csl.xml (Mixed-case NEON register aliases): Add note.
++
++2008-09-25 Maciej W. Rozycki <macro@codesourcery.com>
++
++ Issue #3634
++ gas/testsuite/
++ * gas/mips/mips.exp: Move the "ice9a" test to the target
++ section.
++
++2008-09-25 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * libbfd-in.h (_bfd_nolink_bfd_copy_link_hash_symbol_type):
++ Define.
++ * libbfd.h: Regenerate.
++
++2008-09-25 Julian Brown <julian@codesourcery.com>
++
++ Issue #3893
++
++ gas/
++ * config/tc-arm.c (create_neon_reg_alias): Fix case-sensitivity for
++ Neon register aliases.
++
++2008-09-17 Catherine Moore <clm@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (aeabi_set_public_attributes): Fix setting
++ of attribute 12 for neon fpus. Set attributes 36 and 38 for
++ neon-fp16 fpus.
++
++ binutils/
++ * readelf.c (arm_attr_tag_ABI_FP_16bit_format): New.
++ (arm_attr_tag_VFP_HP_extension): New.
++ (arm_attr_public_tag arm_attr_public_tags): Support new
++ attributes.
++
++ bfd/
++ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Merge
++ half-precision attributes.
++ (elf32_arm_copy_one_eabi_other_attribute): New.
++ (elf32_arm_copy_other_attribute_list): New.
++
++2008-09-24 Andrew Stubbs <ams@codesourcery.com>
++
++ Issue #3598
++
++ * release-notes-csl.xml: Document.
++
++ bfd/
++ * elf.c (elf_fake_sections): Find the signature symbol for
++ SHT_GROUP sections when doing objcopy/strip.
++
++2008-09-24 Joseph Myers <joseph@codesourcery.com>
++
++ ld/
++ * emulparams/elf64ppc.sh (OTHER_GOT_RELOC_SECTIONS): Add .rela.opd
++ and .rela.branch_lt.
++
++2008-09-13 Maciej W. Rozycki <macro@codesourcery.com>
++ Daniel Gutson <daniel@codesourcery.com>
++
++ Issue #3634
++ gas/
++ * config/tc-mips.c (ICE9A_MOVNDS): New macro.
++ (MAX_NOPS): Rename to...
++ (MAX_HIST_INSNS): ... this. Adjust references and comments
++ accordingly.
++ (mips_fix_ice9a): New variable.
++ (ice9a_fp_stall_hazard_p): New function.
++ (ice9a_fp_round_hazard_p): New function.
++ (ice9a_movnd_workaround_p): Likewise.
++ (ice9a_insn_accesses_f30_p): Likewise.
++ (check_for_ice9a): Likewise.
++ (mips_cleanup): Likewise.
++ (nops_for_insn): Call check_for_ice9a().
++ (OPTION_FIX_ICE9A): New macro.
++ (OPTION_NO_FIX_ICE9A): Likewise.
++ (OPTION_MISC_BASE): Adjust accordingly.
++ (md_longopts): Add "mfix-ice9a" and "mno-fix-ice9a".
++ (md_parse_option): Handle OPTION_FIX_ICE9A and
++ OPTION_NO_FIX_ICE9A.
++ (md_show_usage): Document "-mfix-ice9a".
++ * config/tc-mips.h (mips_cleanup): New declaration.
++ (md_cleanup): New macro.
++ * doc/c-mips.texi (MIPS Opts): Document "-mfix-ice9a" and
++ "-mno-fix-ice9a".
++ * doc/as.texinfo (Target MIPS options): Likewise.
++
++ gas/testsuite/
++ * gas/mips/ice9a.l: New test for the "-mfix-ice9a" option.
++ * gas/mips/ice9a.s: Source for the new test.
++ * gas/mips/mips.exp: Run the new test.
++
++2008-09-22 Catherine Moore <clm@codesourcery.com>
++
++ Issue #3806
++ * release-notes-csl.xml: Document.
++
++2008-09-22 Catherine Moore <clm@codesourcery.com>
++
++ Issue #3806
++ bfd/
++ * elfxx-mips.c (allocate_dynrelocs): Avoid a copy_reloc if
++ dynamic sections have not been created.
++
++2008-09-13 Catherine Moore <clm@codesourcery.com>
++
++ gas/testsuite/
++ * gas/arm/half-prec-neon.d: New.
++ * gas/arm/half-prec-neon.s: New.
++ * gas/arm/half-prec-vfp3.d: New.
++ * gas/arm/half-prec-vfp3.s: New.
++ * gas/arm/half-prec-psyntax.d: New.
++ * gas/arm/half-prec-psyntax.s: New.
++
++ gas/
++ * config/tc-arm.c (neon_type_mask): Renumber.
++ (type_chk_of_el_type): Handle F_F16.
++ (neon_cvt_flavour): Recognize half-precision conversions.
++ (do_neon_cvt): New shapes NS_QD and NS_DQ. Encode half-precision
++ conversions.
++ (do_neon_cvtt): Encode the T bit.
++ (asm_opcode_insns): vcvt, vcvtt support.
++ (arm_option_cpu_value): Add neon-fp16 support.
++
++ include/
++ * opcode/arm.h (FPU_NEON_FP16): New.
++ (FPU_ARCH_NEON_FP16): New.
++ * elf/arm.h (Tag_ABI_FP_16bit_format): Define.
++
++ opcodes/
++ * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
++ instructions.
++ (neon_opcodes): Likewise.
++ (print_insn_coprocessor): Print 't' or 'b' for
++ vcvt instructions.
++
++2008-09-10 Mark Mitchell <mark@codesourcery.com>
++
++ * release-notes-csl.xml: Mention recent improvements.
++
++2008-09-09 Mark Mitchell <mark@codesourcery.com>
++
++ Issue #2882
++ gas/
++ * config/tc-arm.c (BAD_SP): Define.
++ (s_arm_unwind_fnstart): Use REG_SP.
++ (s_arm_unwind_setfp): Likewise.
++ (reject_bad_reg): New macro.
++ (do_co_reg): Check for bad registers.
++ (do_co_reg2c): Likewise.
++ (do_srs): Use REG_SP.
++ (do_t_add_sub): Check for bad registers.
++ (do_t_adr): Likewise.
++ (do_t_arit3): Likewise.
++ (do_t_arit3c): Likewise.
++ (do_t_bfc): Likewise.
++ (do_t_bfi): Likewise.
++ (do_t_bfx): Likewise.
++ (do_t_blx): Likewise.
++ (do_t_bx): Likewise.
++ (do_t_bxj): Likewise.
++ (do_t_clz): Likewise.
++ (do_t_div): Likewise.
++ (do_t_mla): Likewise.
++ (do_t_mlal): Likewise.
++ (do_t_mov_cmp): Likewise.
++ (do_t_mov16): Likewise.
++ (do_t_mvn_tst): Likewise.
++ (do_t_mrs): Likewise.
++ (do_t_msr): Likewise.
++ (do_t_mul): Likewise.
++ (do_t_mull): Likewise.
++ (do_t_orn): Likewise.
++ (do_t_pkhbt): Likewise.
++ (do_t_pld): Likewise.
++ (do_t_rbit): Likewise.
++ (do_t_rev): Likewise.
++ (do_t_rrx): Likewise.
++ (do_t_rsb): Likewise.
++ (do_t_shift): Likewise.
++ (do_t_simd): Likewise.
++ (do_t_ssat): Likewise.
++ (do_t_ssat16): Likewise.
++ (do_t_sxtah): Likewise.
++ (do_t_sxth): Likewise.
++ (do_t_tb): Likewise.
++ (do_t_usat): Likewise.
++ (do_t_usat16): Likewise.
++ (nysn_insert_sp): Use REG_SP.
++ gas/testsuite/
++ * gas/arm/copro.s: Avoid using r15 where not permitted.
++ * gas/arm/copro.d: Adjust accordingly.
++ * gas/arm/thumb2_bad_reg.s: New.
++ * gas/arm/thumb2_bad_reg.l: Likewise.
++ * gas/arm/thumb2_bad_reg.d: Likewise.
++
++2008-09-10 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ gas/testsuite/
++ * gas/m68k/br-isac.d: Fix whitespace.
++
++2008-09-09 Mark Mitchell <mark@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (do_t_orn): New function.
++ (do_t_rrx): Likewise.
++ (insns): Add orn and rrx.
++ gas/testsuite/
++ * gas/arm/thumb32.s: Add tests for orn and rrx.
++ * gas/arm/thumb32.d: Adjust accordingly.
++ * gas/arm/thumb32.l: Likewise.
++ * gas/arm/thumb2_invert.s: Add tests for orn and orr.
++ * gas/arm/thumb2_invert.d: Adjust accordingly.
++ * gas/arm/tcompat.s: Add tests for rrx.
++ * gas/arm/tcompat.d: Adjust accordingly.
++
++2008-09-09 Mark Mitchell <mark@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (insns): Add qasx, qsax, shasx, shsax, ssax,
++ uasx, uhasx, uhsx, uqasx, uqsax, usax.
++ gas/testsuite/
++ * gas/arm/thumb32.s (qadd): Add tests for them.
++ * gas/arm/thumb32.d: Adjust accordingly.
++
++2008-09-09 Mark Mitchell <mark@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (insns): Correct encoding of qadd, qdadd, qsub,
++ qdsub in Thumb-2 mode.
++ opcodes/
++ * arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
++ qsub, and qdsub.
++ gas/testsuite/
++ * gas/arm/thumb32.s (qadd): Add qadd, qdadd, qsub, and qdsub.
++ * gas/arm/thumb32.d: Likewise.
++
++2008-09-09 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #3318
++ ld/testsuite/
++ * ld-arm/mixed-lib.d, ld-arm/armthumb-lib.d: Loosen regexp.
++
++2008-09-08 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #2348, #3206
++
++ * release-notes-csl.xml: Add release note for DWARF 3 support.
++
++ Backport from mainline:
++
++ bfd/
++ 2008-09-08 H.J. Lu <hongjiu.lu@intel.com>
++ Daniel Jacobowitz <dan@codesourcery.com>
++
++ PR ld/3191
++ * dwarf2.c (struct adjusted_section): Renamed from struct
++ loadable_section.
++ (struct dwarf2_debug): Adjust for renaming. Add version field.
++ (read_attribute_value): Correctly handle DW_FORM_ref_addr for
++ DWARF3.
++ (find_abstract_instance_name): Pass a pointer to
++ attribute instead of offset. For DW_FORM_ref_addr, get the
++ entry at the offset from the .debug_info section.
++ (scan_unit_for_symbols): Update.
++ (parse_comp_unit): Allow DWARF3. Save the version.
++ (unset_sections): Update for renaming.
++ (place_sections): Likewise. Set new VMAs for DWARF sections
++ also.
++
++2008-09-08 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * doc/c-arm.texi (ARM Directives): Document .2byte, .4byte,
++ .8byte, .bss, .even, .extend, .ldouble, .packed, .secrel32
++ directives.
++
++2008-09-06 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/m68k-parse.h (CPUCR): New register name.
++ * config/tc-m68k.c (mcf51qe_ctrl): Rename to ...
++ (mcf51_ctrl): ... here. Add CPUCR.
++ (mcf52259_ctrl, mcf53017_ctrl): New.
++ (mcf5307_ctrl): Reorder canonically.
++ (m68k_cpus): Add 51, 51ac, 51cn, 51em, 5225x, 5301x.
++ (m68k_ip): Add CPUCR case.
++ (init_table): Add CPUCR.
++
++ opcodes/
++ * m68k-opc.c (m68k_opcodes): Add stldsr insn.
++
++ gas/testsuite/
++ * gas/m68k/br-isac.s: Add stldsr test case
++ * gas/m68k/br-isac.d: Add stldsr test case
++
++2008-09-05 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #1441
++ * release-notes-csl.xml: Copy note for issue #2963.
++
++ Issue #3213
++ gprof/
++ 2004-09-07 David Ung <davidu@mips.com>
++ * hist.c (hist_read_rec): Load profiling rate into hz_int.
++ (hist_write_hist): Write hz_int into file.
++ (print_header): Adjust header for total_time >= 100000.
++ (print_line): Use wider fields it total_time >= 100000.
++ (hist_print): Skip excluded symbols when finding the highest
++ execution time in order to calculate the scaling factor.
++ * gprof.h (hz): Now optionally a floating-point variable.
++ (hz_int): New variable, always integral.
++ * gprof.c (hz): Now optionally a floating-point variable.
++ (hz_int): New variable, always integral.
++ * gmon_io.c (gmon_out_read): Load profiling rate initially into
++ hz_int, not hz. Finally convert hz_int into floating-point hz
++ variable, where a negative hz_int is converted to a reciprocal to
++ handle cycles/count instead of counts/sec.
++ (gmon_out_write): Write hz_int to file, not hz.
++ * cg_print.c: (child_max): New variable to store maximum time
++ value.
++ (self_wid): New var to hold width of self time field in report.
++ (child_wid): New var to hold width of child time field.
++ (prec): New var to hold precision of time fields.
++ (print_header): Adjust headers for wider fields.
++ (print_cycle): Use child_wid, self_wid and prec to format output.
++ (print_members): Similarly.
++ (print_parents): Similarly.
++ (print_children): Similarly.
++ (print_line): Similarly.
++ (cg_print): Find maximum child time, then determine child/self
++ field widths and precision to cope with times >= 100000.
++
++2008-09-05 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * doc/c-arm.texi (ARM Directives): Alphabetize.
++
++2008-09-05 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #1737
++ gas/
++ * doc/c-arm.texi (): Document -mwarn-deprecated.
++ * config/tc-arm.c (WARN_DEPRECATED): Remove. Replace with ...
++ (warn_on_deprecated): ... this.
++ (opcode_lookup, md_assemble): Check it before warning.
++ (arm_opts): Add m[no-]warn-deprecated.
++ (md_parse_option): Replace WARN_DEPRECATED with
++ warn_on_deprecated.
++
++2008-09-05 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Backport from mainline:
++
++ binutils/
++ 2008-09-05 Daniel Jacobowitz <dan@codesourcery.com>
++
++ * readelf.c (load_specific_debug_section): New function, from
++ load_debug_section.
++ (load_debug_section): Use load_specific_debug_section.
++ (display_debug_section): Use load_specific_debug_section. Check for
++ multiple sections with the same name.
++
++2008-09-04 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #3213
++ gprof/
++ Format changes extracted from David Ung's histogram patch.
++ * cg_print.c (print_header, print_line): Fix formatting.
++ * hist.c (read_histogram_header, hist_read_rec, hist_print,
++ find_histogram_for_pc): Likewise.
++
++2008-09-03 Nathan Froyd <froydnj@codesourcery.com>
++
++ Issue #3614
++
++ bfd/
++ * elf32-ppc.c (ppc_elf_relocate_section): Continue processing
++ relocations if the output section is NULL; this guards against
++ relocations against global undefined symbols bombing out.
++
++2008-09-02 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #3213
++ gprof/
++ 2005-10-12 Nigel Stephens <nigel@mips.com>
++ * mips.c (mips_find_call): Traverse MIPS16 functions, identifiable
++ by an odd address. Indicate in debug message when we're
++ traversing a mips16 function.
++ (mips_find_call): Use "restore" as end of function marker, not
++ "save".
++ * corefile.c (core_init): Set min_insn_size to 2 for MIPS.
++ (core_create_function_syms): Make the address of MIPS16 symbols
++ odd in the gprof symbol table, since after this point we can't
++ access the original bfd symbol information.
++
++2008-08-29 Julian Brown <julian@codesourcery.com>
++
++ ld/
++ * ld.texinfo (--fix-janus-2cc): Document new option.
++
++ bfd/
++ * elf32-arm.c (bfd_elf32_arm_janus_2cc_erratum_scan): Use correct
++ insn when checking for PC operand.
++
++2008-08-28 Julian Brown <julian@codesourcery.com>
++
++ ld/
++ * emultempl/armelf.em (fix_janus_2cc): New variable.
++ (arm_elf_before_allocation): Call
++ bfd_elf32_arm_validate_janus_2cc_fix and
++ bfd_elf32_arm_janus_2cc_erratum_scan.
++ (arm_elf_after_allocation): Call bfd_elf32_arm_fix_veneer_locations
++ not bfd_elf32_arm_vfp11_fix_veneer_locations.
++ (arm_elf_create_output_section_statements): Add fix_janus_2cc
++ argument.
++ (PARSE_AND_LIST_PROLOGUE): Add OPTION_FIX_JANUS_2CC.
++ (PARSE_AND_LIST_LONGOPTS): Add fix-janus-2cc option.
++ (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_CASES): Add
++ OPTION_FIX_JANUS_2CC case.
++ * emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Add .janus_2cc_veneer
++ section.
++
++ bfd/
++ * bfd-in.h (bfd_elf32_arm_validate_janus_2cc_fix): Add prototype.
++ (bfd_elf32_arm_janus_2cc_erratum_scan): Add prototype.
++ (bfd_elf32_arm_vfp11_fix_veneer_locations): Rename to...
++ (bfd_elf32_arm_fix_veneer_locations): This.
++ (bfd_elf32_arm_set_target_relocs): Update prototype.
++ * bfd-in2.h: Regenerate.
++ * elf32-arm.c (VFP11_ERRATUM_VENEER_ENTRY_NAME): Adjust format.
++ (JANUS_2CC_ERRATUM_VENEER_SECTION_NAME)
++ (JANUS_2CC_ERRATUM_VENEER_ENTRY_NAME, MAX_ERRATUM_SYMBOL_LENGTH):
++ New macros.
++ (elf32_vfp11_erratum_type): Rename to...
++ (elf32_cpu_erratum_type): This. Add Janus 2CC entries.
++ (elf32_vfp11_erratum_list): Rename to...
++ (elf32_cpu_erratum_list): This. Rename vfp_insn field to orig_insn.
++ (_arm_elf_section_data): Update type of erratumlist field.
++ (elf32_arm_link_hash_table): Add janus_2cc_erratum_glue_size,
++ fix_janus_2cc fields. Rename num_vfp11_fixes to num_errata_fixes.
++ (elf32_arm_link_hash_table_create): Initialise above fields.
++ (JANUS_2CC_ERRATUM_VENEER_SIZE): New macro.
++ (bfd_elf32_arm_allocate_interworking_sections): Initialise Janus
++ 2CC erratum veneer section.
++ (record_vfp11_erratum_veneer): Rename to...
++ (record_cpu_erratum_veneer): This. Add argument for type of erratum
++ to record. Expand to handle Janus 2CC erratum.
++ (bfd_elf32_arm_add_glue_sections_to_bfd): Make Janus 2CC erratum
++ veneer section.
++ (bfd_elf32_arm_validate_janus_2cc_fix): New.
++ (bfd_elf32_arm_vfp11_erratum_scan): Update for new type and field
++ names. Call record_cpu_erratum_veneer instead of
++ record_vfp11_erratum_veneer.
++ (bfd_elf32_arm_vfp11_fix_veneer_locations): Rename to...
++ (bfd_elf32_arm_fix_veneer_locations): This. Add Janus 2CC erratum
++ support.
++ (bfd_elf32_arm_janus_2cc_erratum_scan): New.
++ (bfd_elf32_arm_set_target_relocs): Add fix_janus_2cc option. Handle.
++ (elf32_arm_size_dynamic_sections): Call
++ bfd_elf32_arm_janus_2cc_erratum_scan.
++ (elf32_arm_write_section): Add Janus 2CC erratum support.
++
++2008-08-21 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (mcf52277_ctrl): New.
++ (m68k_cpus): Add 52274, 52277.
++
++2008-08-17 Catherine Moore <clm@codesourcery.com>
++
++ bfd/
++ * elfxx-mips.c (_bfd_mips_elf_final_link): Write out the
++ non-pic to pic stubs.
++
++2008-08-08 Catherine Moore <clm@codesourcery.com>
++
++ opcodes/
++ * mips-opc.c (jalx): Allow for ISA1 and above.
++
++ gas/
++ * testsuite/gas/mips/mips-no-jalx.l: Remove.
++ * testsuite/gas/mips/mips-no-jalx.s: Remove.
++ * testsuite/gas/mips/mips.exp: Remove invocation of mips-no-jalx.
++
++
++2008-08-03 Catherine Moore <clm@codesourcery.com>
++
++ * release-notes-csl.xml: Add missing "/" to <formalpara>.
++ Change csl-target to csl_target. Change mips*- to mips*-*.
++
++2008-07-31 Kazu Hirata <kazu@codesourcery.com>
++
++ Backport from mainline:
++ binutils/
++ 2008-04-28 M Thomas <mthomas@rhrk.uni-kl.de>
++ Nick Clifton <nickc@redhat.com>
++
++ PR binutils/6449
++ * objdump.c (slurp_file): Open the file in binary mode.
++ * ar.c: Remove conditional definition of O_BINARY.
++ * bin2.c: Likewise.
++ * rename.c: Likewise.
++ * strings.c: Likewise.
++ * sysdep.h: Add conditional definition of O_BINARY.
++
++2008-07-29 Paul Brook <paul@codesourcery.com>
++ Mark Mitchell <mark@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (do_t_mul): In Thumb-2 mode, use 16-bit encoding
++ of MUL when possible.
++ gas/testsuite/
++ * gas/arm/thumb2_mul.s: New file.
++ * gas/arm/thumb2_mul.d: Likewise.
++ * gas/arm/thumb2_mul-bad.s: Likewise.
++ * gas/arm/thumb2_mul-bad.d: Likewise.
++ * gas/arm/thumb2_mul-bad.l: Likewise.
++ * gas/arm/t16-bad.s: Add tests for"mul" with high registers.
++ * gas/arm/t16-bad.l: Update accordingly.
++
++ * release-notes-csl.xml: Document.
++
++2008-07-28 Catherine Moore <clm@codesourcery.com>
++
++ Issue #3380
++ * release-notes-csl.xml: Document.
++
++ Issue #3166
++ * release-notes-csl.xml: Document.
++
++2008-07-28 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #3380
++ bfd/
++ * elfxx-mips.c (mips_elf_calculate_relocation): Avoid generating
++ relocations for undefined weak symbols with non-default visibility.
++ (_bfd_mips_elf_check_relocs): Use possibly_dynamic_relocs for
++ global symbols in shared libraries.
++ (allocate_dynrelocs): New function.
++ (_bfd_mips_elf_adjust_dynamic_symbol): Do not handle
++ possibly_dynamic_relocs here.
++ (_bfd_mips_elf_size_dynamic_sections): Call allocate_dynrelocs.
++
++2008-07-27 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ ld/testsuite/
++ * ld-m68k/got-multigot-12-13-14-34-35-ok.d: Update.
++ * ld-m68k/got-multigot-14-ok.d: Update.
++ * ld-m68k/m68k.exp: Update.
++ * ld-m68k/got-negative-12-13-14-34-ok.d: Update.
++ * ld-m68k/got-negative-14-ok.d: Update.
++
++ gas/testsuite/
++ * gas/m68k/tls-1.s: New.
++
++ gas/
++ * config/m68k-parse.h (enum pic_relocation): Add values for TLS
++ relocations.
++ * config/m68k-parse.y (yylex): Parse TLS relocations.
++ * config/tc-m68k.c (get_reloc_code, tc_m68k_fix_adjustable)
++ (tc_gen_reloc): Handle TLS relocations.
++
++ include/elf/
++ * m68k.h: Map TLS relocations to numbers.
++
++ bfd/
++ * bfd-in2.h: Regenerate.
++ * elf32-m68k.c (HOWTO): Add TLS relocations.
++ (reloc_map): Map BFD_RELOC_68K_TLS_* to R_68K_TLS_*.
++ (enum elf_m68k_got_offset_size): New enum.
++ (struct elf_m68k_got_entry: type) Move from nested union up.
++ (elf_m68k_reloc_got_type, elf_m68k_reloc_got_offset_size)
++ (elf_m68k_reloc_got_n_entries, elf_m68k_reloc_got_tls_p): New static
++ functions.
++ (struct elf_m68k_got): merge rel_8o_n_entries and rel_8o_16o_n_entries
++ fields into n_entries array.
++ (elf_m68k_init_got): Simplify, update all uses.
++ (elf_m68k_init_got_entry_key): Handle R_68K_TLS_LDM32 reloc.
++ (ELF_M68K_REL_8O_MAX_N_ENTRIES_IN_GOT)
++ (ELF_M68K_REL_8O_16O_MAX_N_ENTRIES_IN_GOT): Adjust to handle 2-slot
++ GOT entries.
++ (elf_m68k_get_got_entry): Update.
++ (elf_m68k_update_got_entry_type): Rewrite to handle TLS GOT entries,
++ simplify.
++ (elf_m68k_remove_got_entry_type): Simplify.
++ (elf_m68k_add_entry_to_got, elf_m68k_can_merge_gots_1)
++ (elf_m68k_can_merge_gots): Update.
++ (struct elf_m68k_finalize_got_offsets_arg)
++ (elf_m68k_finalize_got_offsets_1, elf_m68k_finalize_got_offsets):
++ Rewrite to handle 2-slot GOT entries, simplify.
++ (elf_m68k_partition_multi_got_1, elf_m68k_partition_multi_got): Update.
++ (elf_m68k_remove_got_entry_type): Update.
++ (elf_m68k_check_relocs): Handle TLS relocations. Remove unnecessary
++ update of sgot->size and srelgot->size.
++ (elf_m68k_gc_sweep_hook): Update.
++ (elf_m68k_relocate_section): Add dummy handling of TLS relocations.
++ * reloc.c (BFD_RELOC_68K_TLS_*): Declare TLS relocations.
++ * libbfd.h (bfd_reloc_code_real_names): Add BFD_RELOC_68K_TLS_*.
++
++2008-07-27 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ bfd/
++ * elf32-m68k.c: Apply cosmetic differences from FSF mainline.
++
++2008-07-26 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Backport:
++
++ ld/testsuite/
++ 2008-07-11 H.J. Lu <hongjiu.lu@intel.com>
++
++ * ld-m68k/got-12.s: Removed.
++ * ld-m68k/got-13.s: Likewise.
++ * ld-m68k/got-14.s: Likewise.
++ * ld-m68k/got-15.s: Likewise.
++ * ld-m68k/got-34.s: Likewise.
++ * ld-m68k/got-35.s: Likewise.
++ * ld-m68k/xgot-15.s: Likewise.
++
++ * ld-m68k/got-multigot-12-13-14-34-35-ok.d: Remove #source
++ and expected relocations.
++ * ld-m68k/got-multigot-14-ok.d: Likewise.
++ * ld-m68k/got-negative-12-13-14-34-ok.d: Likewise.
++ * ld-m68k/got-negative-14-ok.d: Likewise.
++ * ld-m68k/got-single-12-ok.d: Likewise.
++ * ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: Likewise.
++ * ld-m68k/got-xgot-15-ok.d: Likewise.
++
++ * ld-m68k/got-multigot-15-er.d: Remove #source.
++ * ld-m68k/got-negative-12-13-14-35-er.d: Likewise.
++ * ld-m68k/got-negative-15-er.d: Likewise.
++ * ld-m68k/got-single-13-er.d: Likewise.
++
++ * ld-m68k/m68k.exp: Move GOT tests to ...
++ * ld-m68k/m68k-got.exp: This. New.
++
++2008-07-26 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Backport:
++
++ bfd/
++ 2008-06-29 Andreas Schwab <schwab@suse.de>
++ * elf32-m68k.c (elf_m68k_relocate_section): Don't ignore existing
++ addend on _GLOBAL_OFFSET_TABLE_.
++
++ ld/testsuite/
++ 2008-06-29 Andreas Schwab <schwab@suse.de>
++ * ld-m68k/got-1.s: New file.
++ * ld-m68k/got-1.d: New dump test.
++ * ld-m68k/m68k.exp: Run it.
++
++2008-07-24 Joseph Myers <joseph@codesourcery.com>
++
++ * config.sub: Allow mips64octeon* targets.
++
++ NOT ASSIGNED TO FSF
++ COPYRIGHT CAVIUM
++ bfd/
++ * config.bfd: Handle mips64octeon*-*-elf*.
++
++ gas/
++ * configure.tgt: Handle mips-wrs-elf*.
++
++ ld/
++ * configure.tgt: Handle mips64octeon*-*-elf*.
++ * Makefile.am (ALL_EMULATIONS): Add Octeon emulations.
++ (eelf32ebocteon.c, eelf32elocteon.c, eelf32ebocteonn32.c,
++ eelf32elocteonn32.c, eelf64ebocteon.c, eelf64elocteon.c): New.
++ * Makefile.in: Regenerate.
++ * scripttempl/elf.sc: Add ${OCTEON_SPECIAL_SECTIONS}.
++ * emulparams/elf32ebocteon.sh, emulparams/elf32ebocteonn32.sh,
++ emulparams/elf32elocteon.sh, emulparams/elf32elocteonn32.sh,
++ emulparams/elf64ebocteon.sh, emulparams/elf64elocteon.sh,
++ emultempl/octeonelf.em: New.
++
++2008-07-18 Joseph Myers <joseph@codesourcery.com>
++
++ Backport:
++
++ bfd/
++ 2008-07-18 Joseph Myers <joseph@codesourcery.com>
++ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add new parameter.
++ * bfd-in2.h: Regenerate.
++ * elf32-arm.c (struct elf_arm_obj_tdata): Add field
++ no_wchar_size_warning.
++ (bfd_elf32_arm_set_target_relocs): Add new parameter
++ no_wchar_warn.
++ (elf32_arm_merge_eabi_attributes): Give a warning, not an error,
++ for conflicting wchar_t attributes. Do not warn if
++ --no-wchar-size-warning. Make diagnostic text more specific.
++
++ ld/
++ 2008-07-18 Joseph Myers <joseph@codesourcery.com>
++ * ld.texinfo (--no-wchar-size-warning): Document new ARM option.
++ * emultempl/armelf.em (no_wchar_size_warning): New.
++ (arm_elf_create_output_section_statements): Pass
++ no_wchar_size_warning to arm_elf_create_output_section_statements.
++ (OPTION_NO_WCHAR_SIZE_WARNING): New.
++ (PARSE_AND_LIST_LONGOPTS): Add no-wchar-size-warning.
++ (PARSE_AND_LIST_OPTIONS): List --no-wchar-size-warning.
++ (PARSE_AND_LIST_ARGS_CASES): Handle --no-wchar-size-warning.
++
++ ld/testsuite/
++ 2008-07-18 Joseph Myers <joseph@codesourcery.com>
++ * ld-arm/attr-merge-wchar-0.s,ld-arm/attr-merge-wchar-2.s,
++ ld-arm/attr-merge-wchar-4.s, ld-arm/attr-merge-wchar-00-nowarn.d,
++ ld-arm/attr-merge-wchar-00.d, ld-arm/attr-merge-wchar-02-nowarn.d,
++ ld-arm/attr-merge-wchar-02.d, ld-arm/attr-merge-wchar-04-nowarn.d,
++ ld-arm/attr-merge-wchar-04.d, ld-arm/attr-merge-wchar-20-nowarn.d,
++ ld-arm/attr-merge-wchar-20.d, ld-arm/attr-merge-wchar-22-nowarn.d,
++ ld-arm/attr-merge-wchar-22.d, ld-arm/attr-merge-wchar-24-nowarn.d,
++ ld-arm/attr-merge-wchar-24.d, ld-arm/attr-merge-wchar-40-nowarn.d,
++ ld-arm/attr-merge-wchar-40.d, ld-arm/attr-merge-wchar-42-nowarn.d,
++ ld-arm/attr-merge-wchar-42.d, ld-arm/attr-merge-wchar-44-nowarn.d,
++ ld-arm/attr-merge-wchar-44.d: New.
++ * ld-arm/arm-elf.exp: Run new tests.
++
++2008-07-10 Joseph Myers <joseph@codesourcery.com>
++
++ config/
++ * mh-mingw (LDFLAGS): Append to rather than replacing previous
++ value.
++
++2008-07-08 Stan Shebs <stan@codesourcery.com>
++
++ BE8 disassembly.
++ include/
++ * dis-asm.h (struct disassemble_info): Add endian_code field.
++ opcodes/
++ * dis-init.c (init_disassemble_info): Init endian_code field.
++ * arm-dis.c (print_insn): Disassemble code according to
++ setting of endian_code.
++ (print_insn_big_arm): Detect when BE8 extension flag has been set.
++ ld/testsuite/
++ * ld-arm/arm-elf.exp: Use objdump -d for arm-be8 test.
++ * ld-arm/arm-be8.d: Change to test disassembly.
++
++2008-07-02 Joseph Myers <joseph@codesourcery.com>
++
++ ld/
++ * ld.h (args_type): Add error_poison_system_directories.
++ * ld.texinfo (--error-poison-system-directories): Document.
++ * ldfile.c (ldfile_add_library_path): Check
++ command_line.error_poison_system_directories.
++ * ldmain.c (main): Initialize
++ command_line.error_poison_system_directories.
++ * lexsup.c (enum option_values): Add
++ OPTION_ERROR_POISON_SYSTEM_DIRECTORIES.
++ (ld_options): Add --error-poison-system-directories.
++ (parse_args): Handle new option.
++
++2008-06-30 Joseph Myers <joseph@codesourcery.com>
++
++ config/
++ * mh-mingw (BOOT_CFLAGS): Do not use -D__USE_MINGW_ACCESS.
++
++2008-06-14 Catherine Moore <clm@codesourcery.com>
++
++ Issue #3166
++ bfd/
++ * elfxx-mips.c (bfd_mips_elf_maybe_create_non_pic_to_pic_stubs_section):
++ Set SEC_LINKER_CREATED for the stub section.
++
++2008-06-09 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ bfd/
++ * elf32-arm.c (elf32_arm_merge_private_bfd_data): Allow BE8 shared
++ libraries.
++
++2008-06-06 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ bfd/
++ * elf32-arm.c (elf32_arm_merge_private_bfd_data): Reject BE8 input.
++
++2008-06-03 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (do_t_rbit): Populate both rm fields.
++ gas/testsuite/
++ * gas/arm/thumb32.d: Update expected output.
++
++2008-06-02 Nathan Froyd <froydnj@codesourcery.com>
++
++ ld/testsuite/
++ * ld-scripts/rgn-over8.s: Use .section .bss instead of .bss.
++
++2008-05-23 Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (arm_fix_adjustable): Don't adjust MOVW/MOVT
++ relocations.
++
++ gas/testsuite/
++ * gas/arm/movw-local.d: New test.
++ * gas/arm/movw-local.s: New test.
++
++2008-05-23 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (parse_cond): Covert to lowercase before matching.
++
++2008-05-20 Nathan Froyd <froydnj@codesourcery.com>
++
++ Backport from mainline:
++
++ 2008-03-31 Edmar Wienskoski <edmar@freescale.com>
++ bfd/
++ * archures.c: Add bfd_mach_ppc_e500mc.
++ * bfd-in2.h: Regenerate.
++
++ gas/
++ * config/tc-ppc.c (parse_cpu): Handle "e500mc". Extend "e500" to
++ accept e500mc instructions.
++ (md_show_usage): Document -me500mc.
++
++ gas/testsuite/
++ * gas/ppc/e500mc.s, gas/ppc/e500mc.d: New test.
++ * gas/ppc/ppc.exp: Run the new test
++
++ include/opcode/
++ * ppc.h: (PPC_OPCODE_E500MC): New.
++
++ opcodes/
++ * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
++ accept Power E500MC instructions.
++ (print_ppc_disassembler_options): Document -Me500mc.
++ * ppc-opc.c: (DUIS, DUI, T): New.
++ (XRT, XRTRA): Likewise.
++ (E500MC): Likewise.
++ (powerpc_opcodes): Add new Power E500MC instructions.
++
++2008-05-15 Nathan Sidwell <nathan@codesourcery.com>
++
++ ld/testsuite/
++ Backport 2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
++ PR ld/6475
++ * ld-scripts/rgn-over8-ok.d: Accept any alignment.
++
++2008-05-09 Catherine Moore <clm@codesourcery.com>
++
++ From binutils-mips:
++ Issue #2963
++ gas/
++ * config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
++ with non-MIPS16 relocs.
++
++ gas/testsuite/
++ * gas/mips/mips16-hilo-match.s: New test.
++ * gas/mips/mip16-hilo-match.d: New test output.
++ * gas/mips/mips.exp: Run mips16-hilo-match.
++
++2008-05-05 Catherine Moore <clm@codesourcery.com>
++
++ From binutils-mips:
++ 2008-04-04 Catherine Moore <clm@codesourcery.com>
++ gas/testsuite/
++ * gas/mips/mips.exp (ulw2-eb-ilocks, elw2-el-ilocks, uld2-el,
++ uld2-eb, mips64): Disable for octeon.
++
++2008-04-29 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #2950
++ * release-notes-csl.xml: Document Symbian relocation fix.
++
++ Backport from FSF:
++ 2008-04-29 Daniel Jacobowitz <dan@codesourcery.com>
++ bfd/
++ * elf.c (_bfd_elf_get_dynamic_reloc_upper_bound)
++ (_bfd_elf_canonicalize_dynamic_reloc): Find dynamic relocations
++ even if they are not loaded.
++ * elflink.c (_bfd_elf_init_2_index_sections): Set data_index_section
++ first.
++
++ 2008-04-29 Daniel Jacobowitz <dan@codesourcery.com>
++ ld/testsuite/
++ * ld-arm/symbian-seg1.s, ld-arm/symbian-seg1.d: New files.
++ * ld-arm/arm-elf.exp: Run symbian-seg1.
++
++2008-04-28 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #2928
++ * release-notes-csl.xml: Document.
++
++ ld/
++ * ldlang.c (lang_size_sections_1): Don't check LMA overflow on
++ non-load sections.
++
++ ld/testsuite/
++ * ld-scripts/rgn-over.exp: Allow -ok file names to pass.
++ * ld-scripts/rgn-over8.s: New.
++ * ld-scripts/rgn-over8.t: New.
++ * ld-scripts/rgn-over8-ok.d: New.
++
++2008-04-24 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Don't reject R_MIPS_HI16
++ relocations when they are a part of compound relocation.
++
++2008-04-07 Andrew Jenner <andrew@codesourcery.com>
++
++ ld/
++ * emultempl/armelf.em: Correct formatting of help text for
++ --no-enum-size-warning option.
++
++2008-03-28 Catherine Moore <clm@codesourcery.com>
++
++ Backport:
++ 2008-03-26 Daniel Jacobowitz <dan@codesourcery.com>
++ ld/testsuite/
++ * ld-elf/flags1.d: Adjust for MIPS text alignment.
++
++2008-03-28 Daniel Jacobowitz <dan@codesourcery.com>
++
++ bfd/
++ * elfxx-mips.c (_bfd_mips_elf_create_nonpic_dynamic_sections): New.
++ (_bfd_mips_elf_create_dynamic_sections): Use it.
++ (_bfd_mips_elf_check_relocs): Likewise. Reject shared libraries with
++ non-PIC relocations.
++ (_bfd_mips_elf_merge_private_bfd_data): Skip dynamic objects.
++
++2008-03-28 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (parse_neon_mov): Parse register before immediate
++ to avoid spurious symbols.
++
++2008-03-27 Joseph Myers <joseph@codesourcery.com>
++
++ ld/testsuite/
++ * ld-elfcomm/elfcomm.exp: Run $READELF not readelf.
++
++2008-03-27 Daniel Jacobowitz <dan@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c (md_begin): Disable -G for abicalls even without
++ PIC.
++
++2008-03-27 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #2742
++ gas/
++ * config/tc-m68k.c (md_convert_frag_1): Replace as_fatal with
++ as_bad_where.
++
++2008-03-26 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #2682
++ bfd/
++ * elfxx-mips.c (mips_elf_record_got_page_entry): Update comment.
++ (_bfd_mips_elf_check_relocs): Update comments. Always call
++ mips_elf_record_got_page_entry for R_MIPS_GOT_PAGE.
++
++2008-03-26 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #2691
++ config/
++ * mt-sde (CFLAGS_FOR_TARGET, CXXFLAGS_FOR_TARGET): Replace
++ -minterlink-mips16 with -fno-optimize-sibling-calls.
++
++ convert/
++ * Makefile.am (convert.o): Add convert.c.
++ * Makefile.in: Rebuilt.
++
++2008-03-25 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ bfd/
++
++ * elf.c (_bfd_elf_map_sections_to_segments): Check user's
++ mapping of section to segments.
++
++2008-03-24 Kazu Hirata <kazu@codesourcery.com>
++
++ libiberty/
++ * cygpath.c (cygpath): Special-case the empty path.
++
++2008-03-20 Nathan Sidwell <nathan@codesourcery.com>
++
++ convert/
++ * Makefile.am (convert.o): Fix dependency typo.
++ * Makefile.in: Rebuilt.
++
++2008-03-18 Daniel Jacobowitz <dan@codesourcery.com>
++
++ libiberty/
++ * cygpath.c (chdir): New function.
++
++2008-03-14 Mark Shinwell <shinwell@codesourcery.com>
++ Daniel Jacobowitz <dan@codesourcery.com>
++ Catherine Moore <clm@codesourcery.com>
++
++ bfd/
++ * bfd-in.h (bfd_mips_elf_set_non_pic): New prototype.
++ (bfd_mips_elf_check_non_pic): New prototype.
++ * bfd-in2.h: Regenerate.
++ * elf32-mips.c (elf_mips_copy_howto): New.
++ (elf_mips_jump_slot_howto): New.
++ (bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
++ and BFD_RELOC_MIPS_JUMP_SLOT.
++ (bfd_elf32_bfd_reloc_name_lookup): Handle new copy and jump slot
++ relocations.
++ (mips_elf32_rtype_to_howto): Likewise.
++ (elf_backend_want_plt_sym): Define. Remove definition in VxWorks
++ clause.
++ (elf_backend_plt_readonly): Likewise.
++ (elf_backend_write_section): Define.
++ (elf_backend_plt_sym_val): Define, except for VxWorks.
++ (mips_vxworks_copy_howto_rela): Delete.
++ (mips_vxworks_jump_slot_howto_rela): Delete.
++ (mips_vxworks_bfd_reloc_type_lookup): Delete.
++ (mips_vxworks_bfd_reloc_name_lookup): Delete.
++ (mips_vxworks_rtype_to_howto): Delete.
++ (elf_backend_got_symbol_offset): Remove legacy definition.
++ (elf_backend_want_dynbss): Remove unnecessary definition.
++ (bfd_elf32_bfd_reloc_type_lookup): Delete macro definition for
++ VxWorks.
++ (bfd_elf32_bfd_reloc_name_lookup): Likewise.
++ (elf_backend_mips_rtype_to_howto): Likewise.
++ (elf_backend_adjust_dynamic_symbol): Define to new function.
++ * elfxx-mips.c (mips_elf_link_hash_entry): Add plt_entry_offset and
++ has_non_pic_to_pic_stub members. Delete is_relocation_target
++ member.
++ (mips_elf_link_hash_table): Add is_non_pic, non_pic_bfd,
++ snonpictopic and large_plt_entry_size members. Update comments.
++ (NON_PIC_P): New.
++ (NON_PIC_TO_PIC_STUB_SECTION_NAME): New.
++ (MIPS_NONPIC_LARGE_PLT_THRESHOLD): New.
++ (mips_non_pic_exec_plt0_entry): New.
++ (mips_non_pic_exec_plt_entry): New.
++ (mips_non_pic_large_exec_plt_entry): New.
++ (mips_non_pic_to_pic_stub): New.
++ (mips_elf_link_hash_newfunc): Initialize new members.
++ (mips_elf_create_got_section): Don't create .got.plt for VxWorks.
++ (mips_elf_calculate_relocation): Handle cases for filling in
++ references to non-PIC to PIC call stubs and non-PIC PLT entries.
++ (_bfd_mips_elf_create_dynamic_sections): Create .plt, .rel.plt,
++ .dynbss and .rel.bss sections for non-PIC. Create .got.plt for
++ non-PIC and VxWorks.
++ (_bfd_mips_elf_check_relocs): Update comments. Check if we have
++ the first non-PIC file encountered during an executable link.
++ Don't add dynamic relocations for non-PIC. Remove
++ is_relocation_target assignment. Set non_got_ref as appropriate.
++ (mips_elf_next_plt_entry_size): New.
++ (mips_elf_create_old_style_stub): New.
++ (_bfd_mips_elf_adjust_dynamic_symbol): Call worker function to
++ handle VxWorks and non-PIC cases. Move code for creating old-style
++ .MIPS.stubs entries to mips_elf_create_old_style_stub.
++ (_bfd_mips_vxworks_adjust_dynamic_symbol): Rename to...
++ (_bfd_mips_plt_adjust_dynamic_symbol): ...this. New. Extend code
++ to handle the non-PIC ABI.
++ (mips_elf_maybe_create_non_pic_to_pic_stub): New.
++ (_bfd_mips_elf_always_size_sections): Identify symbols requiring
++ non-PIC to PIC call stubs. Allocate space for any such stubs.
++ (_bfd_mips_elf_size_dynamic_sections): Allocate space for delay slot
++ in a PLT section. Update comments. Add dynamic tags for non-PIC
++ if required.
++ (_bfd_mips_elf_finish_dynamic_symbol): Fill in .plt, .got.plt and
++ .rel.plt entries for symbols with PLT entries under non-PIC.
++ Tighten bound on h->plt.offset for old-style stubs. Emit copy
++ relocations if required.
++ (mips_non_pic_finish_plt): New.
++ (_bfd_mips_elf_finish_dynamic_sections): Handle DT_MIPS_PLTGOT
++ and DT_MIPS_RWPLT dynamic tags. Rework code handling DT_PLTGOT
++ dynamic tag. Adjust assertions for DT_PLTREL, DT_PLTRELSZ and
++ DT_JMPREL. Call mips_non_pic_finish_plt.
++ (_bfd_mips_elf_copy_indirect_symbol): Copy new members.
++ (_bfd_mips_elf_link_hash_table_create): Initialize new members.
++ (_bfd_mips_elf_merge_private_bfd_data): Remove extraneous
++ braces.
++ (_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
++ DT_MIPS_RWPLT cases.
++ (_bfd_mips_elf_plt_sym_val): New.
++ (mips_elf_nonpic_stub): New.
++ (_bfd_mips_elf_begin_write_processing): New.
++ (bfd_mips_elf_maybe_create_non_pic_to_pic_stubs_section): New.
++ (_bfd_mips_post_process_headers): Set correct ABI version for
++ non-PIC.
++ * elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Rename to...
++ (_bfd_mips_plt_adjust_dynamic_symbol): ...this. New prototype.
++ (_bfd_mips_nonpic_finish_dynamic_symbol): New.
++ (_bfd_mips_elf_plt_sym_val): New prototype.
++ (_bfd_mips_elf_begin_write_processing): New prototype.
++ (bfd_mips_elf_maybe_create_non_pic_to_pic_stubs_section): New
++ prototype.
++ (_bfd_mips_post_process_headers): New prototype.
++ (elf_backend_post_process_headers): Define.
++ (elf_backend_begin_write_processing): Define.
++ * elflink.c (_bfd_elf_merge_symbol): Correct typo.
++ * reloc.c (MIPS ELF relocation): Add reference to non-PIC.
++
++ binutils/
++ * readelf.c (get_mips_dynamic_type): Handle DT_MIPS_PLTGOT
++ and DT_MIPS_RWPLT.
++ (get_mips_symbol_other): Handle STO_MIPS_PLT.
++
++ gas/
++ * config/tc-mips.c (mips_nonpic_option): New.
++ (md_longopts): Add mnon-pic-abicalls entry.
++ (md_parse_option): Add OPTION_NON_PIC_ABICALLS case.
++ (mips_elf_final_processing): Check mips_nonpic_option.
++
++ include/
++ * elf/mips.h (DT_MIPS_PLTGOT): New.
++ (DT_MIPS_RWPLT): New.
++ (STO_MIPS_PLT): New.
++
++ ld/
++ * emulparams/elf32btsmip.sh: Update comment.
++ (GOT): Define.
++ (GOTPLT): Define.
++ (DATA_GOTPLT): Define.
++ * emulparams/elf32ebmipvxworks.sh (GOT): Unset.
++ (GOTPLT): Likewise.
++ (DATA_GOTPLT): Likewise.
++ * emulparams/elf32elmipvxworks.sh (GOT): Unset.
++ (GOTPLT): Likewise.
++ (DATA_GOTPLT): Likewise.
++ * emultempl/mipself.em: Include elfxx-mips.h.
++ (mips_after_open): New.
++ (LDEMUL_AFTER_OPEN): Define.
++ * scripttempl/elf.sc: Update comments. Handle DATA_GOT and
++ DATA_GOTPLT.
++
++2008-03-12 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (no_mac): New.
++ (m68k_extensions): Point to it for mac entry.
++ (m68k_set_extension): Allow for disabling different set of flags.
++
++2008-03-11 Catherine Moore <clm@codesourcery.com>
++
++ bfd/
++ * elf.c ( _bfd_elf_print_private_bfd_data): Call
++ elf_backend_get_target_dtag if defined.
++ * elf32-mips.c (elf_backend_get_target_dtag): Define.
++ * elf64-mips.c: Likewise.
++ * elfn32-mips.c: Likewise.
++ * elfxx-mips.c (_bfd_mips_elf_get_target_dtag): New.
++ * elfxx-mips.h (_bfd_mips_elf_get_target_dtag): Declare.
++ * elf-bfd.h (elf_backend_get_target_dtag): Add prototype.
++ * elfxx-target.h (elf_backend_get_target_dtag): Add default.
++ (elf_backend_data): Add elf_backend_get_target_dtag.
++
++2008-03-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ 2008-03-11 Thiemo Seufer <ths@mips.com>
++
++ convert/
++ * bin.c, conv.texi, convert.c, elf.h, elfio.c, elfmips.h,
++ elfout.c, idtbin.c, lsifast.c, mipsflash.c, srec.c, stagbin.c:
++ Update license to GPL v3.
++
++2008-03-07 Julian Brown <julian@codesourcery.com>
++
++ convert/
++ * convert.c (conv-version.h): Include.
++ (getopt.h): Include.
++ (usage): Add error argument. Print to stdout/stderr depending on
++ setting. Exit according to setting. Print bug URL.
++ (parselist): Add argument to usage() calls.
++ (long_opts): New array.
++ (main): Use getopt_long. Add argument to usage() invocations.
++ Handle --help, --version options.
++ * configure.ac (ACX_PKGVERSION, ACX_BUGURL): Add.
++ * Makefile.am (ACLOCAL_AMFLAGS): Add.
++ (conv_SOURCES): Add conv-version.h.
++ (conv-version.h): Add build rule.
++ (convert.c): Add dependency on conv-version.h.
++ * version.h: New.
++ * Makefile.in: Regenerate.
++ * configure.ac: Regenerate.
++ * aclocal.m4: Regenerate.
++
++2008-03-07 Julian Brown <julian@codesourcery.com>
++
++ convert/
++ * Makefile.am (install-exec-local): Don't install "conv" binary with
++ no target triplet.
++ * Makefile.in: Regenerate.
++
++2008-03-06 Joseph Myers <joseph@codesourcery.com>
++
++ ld/testsuite/
++ * lib/ld-lib.exp (check_gc_sections_available): Return 0 for
++ *-*-mingw*.
++
++2008-03-06 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ bfd/
++
++ * elf32-m68k.c (elf_m68k_get_bfd2got_entry): Handle search mode.
++ (elf_m68k_relocate_section): Fix to handle _GLOBAL_OFFSET_TABLE_
++ relocations in case of empty local/global GOT.
++
++2008-03-04 Mark Shinwell <shinwell@codesourcery.com>
++ Sandra Loosemore <sandra@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_final_link_relocate): Use correct formula
++ for sign-extending 16-bit offsets in MOVW/MOVT relocations.
++
++2008-03-02 Joseph Myers <joseph@codesourcery.com>
++
++ ld/
++ * emulparams/m68kelf.sh (GENERATE_PIE_SCRIPT): Define.
++
++2008-02-29 Paul Brook <paul@codesourery.com>
++
++ bfd/
++ * elf32-arm.c (insert_thumb_branch): Rewrite. Handle b.w.
++ (elf32_thumb_to_arm_stub): Adjust for new insert_thumb_branch.
++
++ ld/testsuite/
++ * ld-arm/arm-app.r: Updated expected outpu for new test.
++ * ld-arm/arm-elf.exp (armeabitests): Add thumb2-b-interwork.
++ * ld-arm/thumb2-b-interwork.d: New test.
++ * ld-arm/thumb2-b-interwork.s: New test.
++
++2008-02-29 Julian Brown <julian@codesourcery.com>
++
++ convert/
++ * config.h.in: Regenerate.
++
++2008-02-29 Julian Brown <julian@codesourcery.com>
++
++ convert/
++ * convert.c (xmalloc): Remove (duplicate definition in libiberty).
++
++2008-02-28 Julian Brown <julian@codesourcery.com>
++
++ * configure.ac (mips*-sde-elf*): Merge duplicated cases into one.
++ Test --with-newlib for !yes rather than no.
++ * Makefile.def (all-convert): Add dependency on libiberty to fix
++ parallel make.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++
++ convert/
++ * Makefile.in: Disable HTML documentation, and HTML and PDF
++ documentation installation.
++ * Makefile.am: Regenerate.
++ * configure: Regenerate.
++ * aclocal.m4: Regenerate.
++
++2008-02-28 Julian Brown <julian@codesourcery.com>
++
++ Revert: (moved to separate module)
++
++ 2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ * sdemdi: New directory. SDE/MDI glue.
++ * Makefile.def: Add sdemdi target module.
++
++ sdemdi/
++ * ChangeLog: New.
++ * configure.ac: New.
++ * Makefile.am: New.
++ * config-ml.in: New.
++ * crt0.S: New.
++ * fileio.c: New.
++ * m32cache.S: New.
++ * mdi.h: New.
++ * mdilow.S: New.
++ * mdisyscall.S: New.
++ * mdixcpt.h: New.
++ * rtpxlite.c: New.
++ * rtpxliteasm.S: New.
++ * rtpxstub.c: New.
++ * sdemdi32.ld: New.
++ * sdemdi32hi.ld: New.
++ * sdemdi64.ld: New.
++ * sdemdi64hi.ld: New.
++ * simlow.S: New.
++
++2008-02-28 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Fix testcase to handle hack for SDElib below.
++ Don't push upstream.
++
++ gas/testsuite/
++
++ * gas/mips/set-arch.d: Expect ehb.
++
++2008-02-27 Paul Brook <paul@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_check_relocs): Only set h->needs_plt for
++ branch/call relocations.
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (armelftests): Add arm-app-movw.
++
++2008-02-27 Paul Brook <paul@codesourcery.com>
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp (armelftests): Use arm.ld in movw-merge.
++
++2008-02-26 Joseph Myers <joseph@codesourcery.com>
++
++ Backport:
++
++ binutils/testsuite/
++ 2008-02-26 Joseph Myers <joseph@codesourcery.com>
++ * config/default.exp (gcc_gas_flag, dlltool_gas_flag): Define to
++ empty for testing an installed toolchain.
++
++2008-02-25 Sandra Loosemore <sandra@codesourcery.com>
++
++ binutils/
++ Reapply:
++ 2006-05-17 Carlos O'Donell <carlos@codesourcery.com>
++
++ * doc/binutils.texi: Use "Binutils Index" for index name.
++
++2008-02-23 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ * release-notes-csl.xml (ColdFire multi-GOT support): Fix release
++ note to not include uClinux.
++
++2008-02-20 Mark Mitchell <mark@codesourcery.com>
++
++ ld/testsuite/
++ * ld-elf/seg.d: Expect .reginfo section on MIPS.
++
++2008-02-16 Paul Brook <paul@codesourcery.com>
++
++ Merged from //mirrors/binutils/trunk revision 193546.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ 2005-03-21 Maciej W. Rozycki <macro@mips.com>
++
++ * config/tc-mips.c (append_insn): Disable swapping of MIPS16
++ branches as it breaks DWARF-2 line information.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ bfd/
++ * elfxx-mips.c (mips_elf_merge_obj_attributes): Add support for
++ -mips32r2 -mfp64.
++ * readelf.c (display_mips_gnu_attribute): Add 64-bit float tag support.
++
++ include/
++ * elf/mips.h (Tag_GNU_MIPS_ABI_FP): Update comment.
++
++ ld/testsuite/
++ * ld-mips-elf/mips-elf.exp: Add run-dump-tests for attr-gnu-4-04,
++ attr-gnu-4-05, attr-gnu-4-15, attr-gnu-4-24, attr-gnu-4-25,
++ attr-gnu-4-34, attr-gnu-4-35, attr-gnu-4-40, attr-gnu-4-42,
++ attr-gnu-4-43, attr-gnu-4-44, attr-gnu-4-45, attr-gnu-4-51.
++ * ld-mips-elf/attr-gnu-4-14.d: Fix warning.
++ * ld-mips-elf/attr-gnu-4-41.d: Likewise.
++ * ld-mips-elf/attr-gnu-4-5.s: New.
++ * ld-mips-elf/attr-gnu-4-04.d: New.
++ * ld-mips-elf/attr-gnu-4-05.d: New.
++ * ld-mips-elf/attr-gnu-4-15.d: New.
++ * ld-mips-elf/attr-gnu-4-24.d: New.
++ * ld-mips-elf/attr-gnu-4-25.d: New.
++ * ld-mips-elf/attr-gnu-4-34.d: New.
++ * ld-mips-elf/attr-gnu-4-35.d: New.
++ * ld-mips-elf/attr-gnu-4-40.d: New.
++ * ld-mips-elf/attr-gnu-4-42.d: New.
++ * ld-mips-elf/attr-gnu-4-43.d: New.
++ * ld-mips-elf/attr-gnu-4-44.d: New.
++ * ld-mips-elf/attr-gnu-4-45.d: New.
++ * ld-mips-elf/attr-gnu-4-51.d: New.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ 2004-09-09 Nigel Stephens <nigel@mips.com>
++
++ bfd/
++ * ihex.c (ihex_write_object_contents): Truncate address to 32 bits
++ if the top 32 bits are a simple sign extension of the bottom.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ gas/
++ * config/tc-mips.c (OPTION_MIPS16E, OPTION_NOMIPS16E): Add
++ backward-compatibility options for SDE.
++ (OPTION_COMPAT_ARCH_BASE): Bump to +16.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ * sdemdi: New directory. SDE/MDI glue.
++ * Makefile.def: Add sdemdi target module.
++
++ sdemdi/
++ * ChangeLog: New.
++ * configure.ac: New.
++ * Makefile.am: New.
++ * config-ml.in: New.
++ * crt0.S: New.
++ * fileio.c: New.
++ * m32cache.S: New.
++ * mdi.h: New.
++ * mdilow.S: New.
++ * mdisyscall.S: New.
++ * mdixcpt.h: New.
++ * rtpxlite.c: New.
++ * rtpxliteasm.S: New.
++ * rtpxstub.c: New.
++ * sdemdi32.ld: New.
++ * sdemdi32hi.ld: New.
++ * sdemdi64.ld: New.
++ * sdemdi64hi.ld: New.
++ * simlow.S: New.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ * convert: New directory. Elf to binary converter.
++
++ convert/
++ * ChangeLog: New.
++ * Makefile.am: New.
++ * Makefile.def: New.
++ * acinclude.m4: New.
++ * configure.ac: New.
++ * convert.c: New.
++ * sysdep.h: New.
++ * srec.c: New.
++ * elf.h: New.
++ * stagbin.c: New.
++ * elfmips.h: New.
++ * alloca.c: New.
++ * bin.c: New.
++ * mipsflash.c: New.
++ * idtbin.c: New.
++ * elfout.c: New.
++ * lsifast.c: New.
++ * elfio.c: New.
++ * conv.1: New.
++ * conv.texi: New.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS (This patch is a hack to make SDElib happy);
++ don't push upstream:
++
++ 2004-10-06 David Ung <davidu@mips.com>
++
++ * mips-opc.c: Change membership to I1 for instructions ssnop and
++ ehb.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS:
++
++ * config/mt-sde (CFLAGS_FOR_TARGET): Add -mno-gpopt.
++ (CXXFLAGS_FOR_TARGET): Likewise.
++ * configure.ac (mips*-sde-elf*): Remove libgloss and libiberty when not
++ building Newlib. Add sde-conv host tool and MDI glue library.
++ * configure: Regenerate.
++
++2008-02-11 Julian Brown <julian@codesourcery.com>
++
++ Merge from MIPS/backport from FSF:
++
++ 2007-09-14 Alan Modra <amodra@bigpond.net.au>
++
++ bfd/
++ * opncls.c (find_separate_debug_file): Ensure bfd_set_error has
++ been called on all error return paths.
++ (bfd_fill_in_gnu_debuglink_section): Use bfd_malloc, not malloc.
++ Clear padding after filename
++
++ 2007-09-14 Alan Modra <amodra@bigpond.net.au>
++
++ bfd/
++ * format.c (bfd_check_format_matches): Record matching targets even
++ when "matching" is NULL to allow bfd_associated_vector matches.
++ Consolidate error return code. Consolidate ok return code. Always
++ restore original target and format on error.
++
++2008-02-02 Sandra Loosemore <sandra@codesourcery.com>
++
++ * release-notes-csl.xml: Fix mistaken uses of &csl_prod; to use
++ &csl_sgxx; instead.
++
++2008-02-01 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ ld/testsuite/
++
++ * ld-m68k/got-12.s: Remove .ident.
++ * ld-m68k/got-13.s: Ditto.
++ * ld-m68k/got-14.s: Ditto.
++ * ld-m68k/got-15.s: Ditto.
++ * ld-m68k/got-34.s: Ditto.
++ * ld-m68k/got-35.s: Ditto.
++ * ld-m68k/xgot-15.s: Ditto.
++
++2008-02-01 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Add -mxgot tests to ld.
++
++ ld/testsuite/
++
++ * ld-m68k/xgot-15.s: New source.
++ * ld-m68k/got-xgot-15-ok.d: New test.
++ * ld-m68k/got-xgot-12-13-14-15-34-35-ok.d: New test.
++ * ld-m68k/m68k.exp: Run new tests.
++
++2008-01-29 Julian Brown <julian@codesourcery.com>
++
++ gas/
++ * read.c (cons_worker): Report error if user tries to specify string
++ after .byte, etc. directive.
++
++2008-01-28 Paul Brook <paul@codesourcery.com>
++
++ ld/
++ * emultempl/armelf.em (OPTION_FIX_V4BX_INTERWORKING): Define.
++ (PARSE_AND_LIST_LONGOPTS): Add fix-v4bx-interworking.
++ (PARSE_AND_LIST_OPTIONS): Ditto.
++ (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FIX_V4BX_INTERWORKING.
++ * emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Add .v4_bx.
++ * emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Ditto.
++ * emulparams/armnto.sh (OTHER_TEXT_SECTIONS): Ditto.
++ * ld.texinfo: Document --fix-v4bx-interworking.
++
++ ld/testsuite/
++ * ld-arm/armv4-bx.d: New test.
++ * ld-arm/armv4-bx.s: New test.
++ * ld-arm/arm.ld: Add .v4bx.
++ * ld-arm/arm-elf.exp: Add armv4-bx.
++
++ gas/testsuite/
++ * gas/arm/thumb.d: Exclude EABI targets.
++ * gas/arm/arch4t.d: Exclude EABI targts.
++ * gas/arm/v4bx.d: New test.
++ * gas/arm/v4bx.s: New test.
++ * gas/arm/thumb-eabi.d: New test.
++ * gas/arm/arch4t-eabi.d: New test.
++
++ gas/
++ * config/tc-arm.c (fix_v4bx): New variable.
++ (do_bx): Generate V4BX relocations.
++ (md_assemble): Allow bx on v4 codes when fix_v4bx.
++ (md_apply_fix): Handle BFD_RELOC_ARM_V4BX.
++ (tc_gen_reloc): Ditto.
++ (OPTION_FIX_V4BX): Define.
++ (md_longopts): Add fix-v4bx.
++ (md_parse_option): Handle OPTION_FIX_V4BX.
++ (md_show_usage): Document --fix-v4bx.
++ * doc/c-arm.texi: Document --fix-v4bx.
++
++ bfd/
++ * reloc.c: Add BFD_RELOC_ARM_V4BX.
++ * elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_V4BX.
++ (ARM_BX_GLUE_SECTION_NAME, ARM_BX_GLUE_SECTION_NAME): Define.
++ (elf32_arm_link_hash_table): Add bx_glue_size and bx_glue_offset.
++ Update comment for fix_v4bx.
++ (elf32_arm_link_hash_table_create): Zero bx_glue_size and
++ bx_glue_offset.
++ (ARM_BX_VENEER_SIZE, armbx1_tst_insn, armbx2_moveq_insn,
++ armbx3_bx_insn): New.
++ (bfd_elf32_arm_allocate_interworking_sections): Allocate BX veneer
++ section.
++ (bfd_elf32_arm_add_glue_sections_to_bfd): Ditto.
++ (bfd_elf32_arm_process_before_allocation): Record BX veneers.
++ (record_arm_bx_glue, elf32_arm_bx_glue): New functions.
++ (elf32_arm_final_link_relocate): Handle BX veneers.
++ (elf32_arm_output_arch_local_syms): Output mapping symbol for .v4_bx.
++ * bfd-in2.h: Regenerate.
++ * libbfd.h: Regenerate.
++
++2008-01-28 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Handle weakdefs in copy_indirect hook.
++
++ bfd/
++
++ elf32-m68k.c (elf_m68k_copy_indirect_symbol): Handle weakdefs.
++
++2008-01-26 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Multi-GOT support for m68k.
++
++ * release-notes-csl.xml: Document feature.
++
++ bfd/
++
++ * elf32-m68k.c (struct elf_m68k_link_hash_entry: got_entry_key,
++ glist): New fields.
++ (struct elf_m68k_got_entry_key, struct elf_m68k_got_entry,
++ struct elf_m68k_got, struct elf_m68k_bfd2got_entry,
++ struct elf_m68k_multi_got): New data structures.
++ (struct elf_m68k_link_hash_table: local_gp_p, use_neg_got_offsets_p,
++ allow_multigot_p, multi_got_): New fields.
++ (elf_m68k_multi_got): New macro.
++ (elf_m68k_link_hash_newfunc): Initialize new fields of
++ struct elf_m68k_link_hash_entry.
++ (elf_m68k_link_hash_table_create): Initialize new fields of
++ struct elf_m68k_link_hash_table.
++ (elf_m68k_link_hash_table_free): New static function implementing hook.
++ (elf_m68k_init_got, elf_m68k_clear_got, elf_m68k_create_empty_got): New
++ static functions for struct elf_m68k_got.
++ (elf_m68k_init_got_entry_key, elf_m68k_got_entry_hash,
++ elf_m68k_got_entry_eq): New static functions for
++ struct elf_m68k_got_entry.
++ (ELF_M68K_REL_8O_MAX_N_ENTRIES_IN_GOT,
++ ELF_M68K_REL_8O_16O_MAX_N_ENTRIES_IN_GOT): New macros.
++ (enum elf_m68k_get_entry_howto): New enum.
++ (elf_m68k_get_got_entry, elf_m68k_update_got_entry_type,
++ elf_m68k_remove_got_entry_type): New static functions for
++ struct elf_m68k_got_entry.
++ (elf_m68k_add_entry_to_got): New static function.
++ (elf_m68k_bfd2got_entry_hash, elf_m68k_bfd2got_entry_eq,
++ elf_m68k_bfd2got_entry_del, elf_m68k_get_bfd2got_entry): New static
++ functions for struct elf_m68k_bfd2got_entry.
++ (struct elf_m68k_can_merge_gots_arg, elf_m68k_can_merge_gots_1,
++ elf_m68k_can_merge_gots): New traversal.
++ (struct elf_m68k_merge_gots_arg, elf_m68k_merge_gots_1,
++ elf_m68k_merge_gots): Ditto.
++ (struct elf_m68k_finalize_got_offsets_arg,
++ elf_m68k_finalize_got_offsets_1, elf_m68k_finalize_got_offsets): Ditto.
++ (struct elf_m68k_partition_multi_got_arg,
++ elf_m68k_partition_multi_got_1, elf_m68k_init_symndx2h_1,
++ elf_m68k_partition_multi_got): Ditto.
++ (elf_m68k_find_got_entry_ptr, elf_m68k_remove_got_entry): New static
++ functions.
++ (elf_m68k_copy_indirect_symbol): New static function implementing
++ a hook.
++ (elf_m68k_check_relocs): Update to add entries to multi-GOT.
++ (elf_m68k_gc_sweep_hook): Update to remove entries from multi-GOT.
++ (elf_m68k_always_size_sections): Assign BFDs to GOTs.
++ (elf_m68k_relocate_section): Update to properly handle GOT relocations.
++ (elf_m68k_finish_dynamic_symbol): Update to traverse all GOT entries
++ of a global symbol.
++ (bfd_elf_m68k_set_target_options): New function.
++ (bfd_elf32_bfd_link_hash_table_free): Define hook.
++ (bfd_elf32_bfd_final_link): Change expansion to bfd_elf_final_link
++ to skip generic calculation of GOT offsets.
++ (elf_backend_copy_indirect_symbol): Define hook.
++
++ * bfd-in.h (bfd_elf_m68k_set_target_options): Declare function.
++ * bfd-in2.h: Regenerate.
++
++ ld/
++
++ * configure.in (--enable-got): New option. Handle it.
++ * configure: Regenerate.
++ * config.in: Regenerate.
++
++ * emultempl/m68kelf.em: (got_handling_target_default): New shell
++ variable.
++ (GOT_HANDLING_TARGET_DEFAULT): New macro.
++ (GOT_HANDLING_DEFAULT): New macro. Initialize it from configure
++ option if one was given.
++ (got_handling): New static variable.
++ (elf_m68k_create_output_section_statements): New static function
++ implementing hook.
++ (PARSE_AND_LIST_PROLOGUE): Define shell variable.
++ (OPTION_GOT): New macro.
++ (PARSE_AND_LIST_LONGOPTS): Define shell variable. Specify
++ --got option.
++ (got): New linker option.
++ (PARSE_AND_LIST_OPTIONS): Define shell variable. Print help string
++ for --got option.
++ (PARSE_AND_LIST_ARGS_CASES): Define shell variable. Handle --got
++ option.
++
++ * ld.texinfo: Document --got=<type> option.
++ * gen-doc.texi: Add M68K.
++
++ ld/testsuite/
++
++ * ld-m68k/got-12.s: New file.
++ * ld-m68k/got-13.s: New file.
++ * ld-m68k/got-14.s: New file.
++ * ld-m68k/got-15.s: New file.
++ * ld-m68k/got-34.s: New file.
++ * ld-m68k/got-35.s: New file.
++ * ld-m68k/got-single-12-ok.d: New dump test.
++ * ld-m68k/got-single-13-er.d: New dump test.
++ * ld-m68k/got-negative-14-ok.d: New dump test.
++ * ld-m68k/got-negative-15-er.d: New dump test.
++ * ld-m68k/got-negative-12-13-14-34-ok.d: New dump test.
++ * ld-m68k/got-negative-12-13-14-35-er.d: New dump test.
++ * ld-m68k/got-multigot-14-ok.d: New dump test.
++ * ld-m68k/got-multigot-15-er.d: New dump test.
++ * ld-m68k/got-multigot-12-13-14-34-35-ok.d: New dump test.
++ * ld-m68k/m68k.exp: Run new tests.
++
++2008-01-25 Joseph Myers <joseph@codesourcery.com>
++
++ include/
++ * libiberty.h (cygpath): Declare.
++
++ libiberty/
++ * cygpath.c (cygpath): Remove static. Return int.
++ * pex-win32.c (pex_win32_open_read, pex_win32_open_write): Use
++ open not _open.
++
++2008-01-22 Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
++
++ gas/doc/
++ * c-arm.texi: Add cortex-a9.
++
++2008-01-22 Paul Brook <paul@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_relocate_section): Handle MOVW and MOVT
++ relocations. Improve safety check for other weird relocations.
++ * elf32-arm.c (elf32_arm_howto_table): Fix masks for MOVW/MOVT.
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp: Add movw-merge.
++ * ld-arm/movw-merge.d: New test.
++ * ld-arm/movw-merge.s: New test.
++
++2008-01-09 Joseph Myers <joseph@codesourcery.com>
++
++ * configure.ac (host_makefile_frag): Use config/mh-mingw on
++ *-mingw32*.
++ * configure: Regenerate.
++
++ config/
++ * config/mh-mingw: New.
++
++2008-01-07 Joseph Myers <joseph@codesourcery.com>
++
++ NOT ASSIGNED TO FSF
++ COPYRIGHT CAVIUM
++ Merge from Cavium binutils-2.16.1.diff.gz:
++
++ gas/
++ * config/tc-mips.c (macro): Support M_SAA_AB and M_SAAD_AB.
++
++ gas/testsuite/
++ * gas/mips/mips.exp: Add octeon_saa_saad test.
++ * gas/mips/octeon_saa_saad.d: New.
++ * gas/mips/octeon_saa_saad.s: New.
++
++ include/opcode/
++ * mips.h (M_SAA_AB, M_SAAD_AB): New.
++
++ opcodes/
++ * mips-opc.c (mips_builtin_opcodes): Add saa and saad
++ instructions.
++
++2008-01-03 Catherine Moore <clm@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c (mips_ip): Check operands on jalr instruction.
++
++ gas/testsuite
++ * gas/mips/jalr.s: New test.
++ * gas/mips/jalr.l: New test output.
++ * gas/mips/mips.exp: Run new test.
++
++2007-12-19 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #2297
++ ld/testsuite/
++ * ld-elf/seg.t: New.
++ * ld-elf/seg.d: New.
++ * ld-elf/seg.s: New.
++
++2007-12-12 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ 2007-09-15 Alan Modra <amodra@bigpond.net.au>
++ * configure.ac: Correct makeinfo version check.
++ * configure: Regenerate.
++
++2007-12-12 Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * doc/c-arm.texi: Document new VFP -mfpu= options.
++ * config/tc-arm.c (arm_option_cpu_value): Rename vfp3-d16 to
++ vfpv3-d16. Add vfpv2 and vfpv3.
++
++ gas/testsuite/
++ * gas/arm/vfpv3-d16-bad.d: Rename vfp3-d16 to vfpv3-d16.
++
++2007-12-11 Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
++ (parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
++ (arm_option_cpu_value): Add vfpv3-d16.
++ (aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
++
++ gas/testsuite/
++ * gas/arm/vfpv3-d16-bad.d: New test.
++ * gas/arm/vfpv3-d16-bad.l: New test.
++
++ include/opcode/
++ * arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
++
++ binutils/
++ * readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".
++
++ bfd/
++ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
++ Tag_VFP_arch values.
++
++2007-12-10 Catherine Moore <clm@codesourcery.com>
++
++ Issue #2285
++ bfd/
++ * elf.c (bfd_copy_private_symbol_data): Do not copy if
++ the shndx is zero.
++
++ gas/testsuite/
++ * elf/elf.exp: Exceute symtab test.
++ * elf/symtab.s: New test.
++ * elf/symtab.d: New test output file.
++
++ * release-notes-csl.xml: Document fix.
++
++2007-11-29 Mark Shinwell <shinwell@codesourcery.com>
++
++ include/opcode/
++ * mips.h (INSN_LOONGSON_2E, INSN_LOONGSON_2F,
++ INSN_OCTEON): Rearrange masks so Loongson flags match
++ upstream.
++
++2007-11-28 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue #2297
++ include/elf/
++ * internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with
++ segments at the end of memory.
++
++2007-11-13 Joseph Myers <joseph@codesourcery.com>
++
++ Backport:
++ bfd/
++ 2007-11-05 Alan Modra <amodra@bigpond.net.au>
++ * merge.c (sec_merge_hash_lookup): Revert last change.
++ (record_section): Likewise.
++ (_bfd_merge_sections): Likewise.
++ (_bfd_merged_section_offset): Properly handle NULL secinfo.
++ (_bfd_add_merge_section): Allocate extra space for a zero
++ terminator on SEC_STRINGS sections.
++
++ ld/testsuite/
++ 2007-11-05 Alan Modra <amodra@bigpond.net.au>
++ * ld-elf/merge3.d, ld-elf/merge3.s: Delete.
++
++2007-11-06 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (do_mull): Allow overlapping Rm for armv6.
++
++ gas/testsuite/
++ * gas/arm/mul-overlap.s: Add umull and smlal.
++ * gas/arm/mul-overlap.l: Update expected results.
++
++2007-10-30 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * merge.c (sec_merge_hash_lookup): Add parameter sec_end. Check
++ for unterminated strings. All callers changed.
++ (_bfd_write_merged_section, _bfd_merged_section_offset): Handle
++ NULL secinfo from merge failures.
++
++ ld/testsuite/
++ * ld-elf/merge3.d, ld-elf/merge3.s: New.
++
++2007-10-24 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elfxx-mips.c (_bfd_mips_elf_modify_segment_map): Do not add
++ PT_NULL header when not linking.
++
++2007-10-18 Joseph Myers <joseph@codesourcery.com>
++
++ NOT ASSIGNED TO FSF
++ COPYRIGHT RAZA
++ * config.sub (mipsisa64xlr, ipsisa64xlrel): Add new machine names.
++
++ bfd/
++ * aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
++ * archures.c (bfd_mach_mips_xlr): New.
++ * cpu-mips.c (I_xlr): New enum value.
++ (arch_info_struct): Add XLR entry.
++ * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
++ (mips_set_isa_flags): Handle bfd_mach_mips_xlr.
++ (mips_mach_extensions): Add XLR entry.
++ * bfd-in2.h: Regenerate.
++
++ binutils/
++ * readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.
++
++ gas/
++ * config/tc-mips.c (macro): Handle XLR instructions.
++ (mips_cpu_info_table): Add xlr.
++ * doc/c-mips.texi (MIPS architecture options): Add xlr to list of
++ -march options.
++
++ gas/testsuite/
++ * gas/mips/xlr-ext.d, /gas/mips/xlr-ext.s: New.
++ * gas/mips/mips.exp (xlr): New arch.
++ (xlr-ext): Run test.
++
++ include/elf/
++ * mips.h (E_MIPS_MACH_XLR): Define.
++
++ include/opcode/
++ * mips.h (INSN_XLR, CPU_XLR): Define.
++ (OPCODE_IS_MEMBER): Handle XLR.
++ (M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define
++ enum values.
++
++ opcodes/
++ * mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): New.
++ (mips_arch_choices): Add XLR entry.
++ * mips-opc.c (XLR): Define.
++ (mips_builtin_opcodes): Add XLR opcodes.
++
++2007-10-17 Nathan Sidwell <nathan@codesourcery.com>
++
++ opcodes/
++ * m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
++ coldfire.
++
++ gas/testsuite/
++ * gas/m68k/mcf-movsr.s: New.
++ * gas/m68k/mcf-movsr.d: New.
++ * gas/m68k/all.exp: Add mcf-movsr test.
++
++2007-10-09 Daniel Jacobowitz <dan@codesourcery.com>
++
++ bfd/
++ * elfxx-mips.c (mips_elf_sort_hash_table_f): Handle forced
++ local symbols specially.
++ (mips_elf_set_global_got_offset): Skip forced local symbols.
++
++ Revert:
++ 2007-10-04 Joseph Myers <joseph@codesourcery.com>
++ bfd/
++ * elfxx-mips.c (struct mips_got_info): Add forced_local_count.
++ (struct mips_elf_hash_sort_data): Add forced_local and
++ prev_forced_local.
++ (mips_elf_sort_hash_table): Subtract g->forced_local_count in
++ computing hsd.min_got_dynindx. Initialize hsd.forced_local and
++ hsd.prev_forced_local. Set g->forced_local_count after sorting.
++ (mips_elf_sort_hash_table_f): Count forced-local symbols. Handle
++ them as unreferenced where allowed for in calculation of
++ min_got_dynindx.
++ (mips_elf_make_got_per_bfd, mips_elf_multi_got,
++ mips_elf_create_got_section): Initialize forced_local_count.
++ (_bfd_mips_elf_always_size_sections): Subtract forced_local_count
++ in calculating global_gotno.
++ (_bfd_mips_elf_final_link): Subtract forced_local_count in
++ assertion.
++ (mips_elf_set_global_got_offset): Check for forced-local symbols
++ before assigning global GOT offsets.
++
++2007-10-05 Daniel Jacobowitz <dan@codesourcery.com>
++
++ * release-notes-csl.xml: Add lost </para>.
++
++2007-10-05 Carlos O'Donell <carlos@codesourcery.com>
++
++ binutils/
++ * resrc.c (read_rc_file): Rename e to edit, and c to dir.
++ Pass dir to windres_add_include_dir. Add comments.
++ (close_input_stream): Check pclose error, and call fatal if
++ the preprocessor failed.
++ * windres.c (windres_add_include_dir): Assert that p is non-NULL,
++ and not an empty string.
++
++2007-10-04 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elfxx-mips.c (struct mips_got_info): Add forced_local_count.
++ (struct mips_elf_hash_sort_data): Add forced_local and
++ prev_forced_local.
++ (mips_elf_sort_hash_table): Subtract g->forced_local_count in
++ computing hsd.min_got_dynindx. Initialize hsd.forced_local and
++ hsd.prev_forced_local. Set g->forced_local_count after sorting.
++ (mips_elf_sort_hash_table_f): Count forced-local symbols. Handle
++ them as unreferenced where allowed for in calculation of
++ min_got_dynindx.
++ (mips_elf_make_got_per_bfd, mips_elf_multi_got,
++ mips_elf_create_got_section): Initialize forced_local_count.
++ (_bfd_mips_elf_always_size_sections): Subtract forced_local_count
++ in calculating global_gotno.
++ (_bfd_mips_elf_final_link): Subtract forced_local_count in
++ assertion.
++ (mips_elf_set_global_got_offset): Check for forced-local symbols
++ before assigning global GOT offsets.
++
++ ld/testsuite/
++ * ld-mips-elf/multi-got-hidden-1.d,
++ ld-mips-elf/multi-got-hidden-1.s,
++ ld-mips-elf/multi-got-hidden-2.d,
++ ld-mips-elf/multi-got-hidden-2.s: New.
++ * ld-mips-elf/mips-elf.exp: Run multi-got-hidden tests.
++
++2007-10-01 Carlos O'Donell <carlos@codesourcery.com>
++
++ Backport:
++ binutils/
++ 2007-09-17 Alon Bar-Lev <alon.barlev@gmail.com>
++
++ PR binutils/4987
++ * resrc.c: (read_rc_file): Move 'filename' default initialization
++ to start of function.
++
++2007-09-28 Carlos O'Donell <carlos@codesourcery.com>
++
++ Backport:
++ gas/
++ 2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
++ * config/tc-mips.c (s_align): Set max_alignment to 28.
++ gas/testsuite/
++ 2007-09-24 Carlos O'Donell <carlos@codesourcery.com>
++ * gas/mips/align.s, gas/mips/align.d: New test.
++ * gas/mips/mips.exp: Run it.
++
++2007-09-25 Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c: Enforce register constraints on Thumb-1 add.
++
++ gas/testsuite/
++ * gas/arm/t16-bad.s: Add low reg non flags setting add.
++ * gas/arm/t16-bad.l: Update expected output.
++ * gas/arm/archv6m.s: Add low reg non flags setting add.
++ * gas/arm/archv6m.d: Update expected output.
++
++2007-09-24 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Backport:
++ bfd/
++ 2007-09-24 Daniel Jacobowitz <dan@codesourcery.com>
++ * elf.c (assign_file_positions_for_load_sections): Trust
++ p_align_valid.
++ (copy_elf_program_header): Copy PT_NULL segments.
++
++2007-09-24 Daniel Jacobowitz <dan@codesourcery.com>
++
++ gas/testsuite/
++ * gas/mips/loongson-2f.d: Specify a 64-bit ABI.
++ * gas/mips/loongson-2e.d: Likewise.
++
++2007-09-21 Joseph Myers <joseph@codesourcery.com>
++
++ * release-notes-csl.xml: Add release notes for GOT patch.
++
++ ld/testsuite/
++ * ld-mips-elf/got-page-3.d: Assemble with -mips3.
++
++2007-09-21 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from
++ <http://sourceware.org/ml/binutils/2007-09/msg00308.html>:
++
++ bfd/
++ 2007-09-21 Richard Sandiford <rsandifo@nildram.co.uk>
++ * elfxx-mips.c (mips_got_page_range): New structure.
++ (mips_got_page_entry): Likewise.
++ (mips_got_info): Add page_gotno and got_page_entries fields.
++ (mips_elf_got_per_bfd_arg): Add max_pages field. Delete
++ primary_count and current_count fields.
++ (mips_got_page_entry_hash, mips_got_page_entry_eq): New functions.
++ (mips_elf_pages_for_range, mips_elf_record_got_page_entry): Likewise.
++ (mips_elf_get_got_for_bfd): New function, split out from
++ mips_elf_make_got_per_bfd. Initialize the page_gotno and
++ got_page_entries fields when creating a new GOT structure.
++ (mips_elf_make_got_pages_per_bfd): New function.
++ (mips_elf_merge_got_with): New function, split out from
++ mips_elf_make_got_per_bfd. Merge page entries as well as
++ non-page entries. Use the minimum of max_pages and the sum
++ of the page_gotnos to estimate the number of page entries.
++ (mips_elf_merge_gots): Use the minimum of max_pages and the
++ bfd's page_gotno to estimate the number of page entries.
++ Use the above functions.
++ (mips_elf_multi_got): Add page entries as well as non-page entries
++ to the individual per-bfd GOTs. Initialize got_per_bfd_arg.max_pages.
++ Initialize the page_gotno and got_page_entries fields when creating
++ a new primary GOT. Use the minimum of pages and page_gotno when
++ adding the number of pages entries to local_gotno.
++ (mips_elf_create_got_section): Initialize the page_gotno and
++ got_page_entries fields of the GOT structure.
++ (mips_elf_rel_relocation_p, mips_elf_read_rel_addend)
++ (mips_elf_add_lo16_rel_addend, mips_elf_get_section_contents): New
++ functions, split out from...
++ (_bfd_mips_elf_relocate_section): ...here.
++ (_bfd_mips_elf_check_relocs): Record GOT page entries too.
++ (_bfd_mips_relax_section): Use mips_elf_get_section_contents.
++ (_bfd_mips_elf_always_size_sections): Use the smaller of the
++ loadable_size- and page_gotno-derived estimates.
++
++ ld/testsuite/
++ 2007-09-21 Richard Sandiford <rsandifo@nildram.co.uk>
++ Joseph Myers <joseph@codesourcery.com>
++ * ld-mips-elf/got-page-1.d, ld-mips-elf/got-page-1.s,
++ * ld-mips-elf/got-page-2.d, ld-mips-elf/got-page-2.s,
++ * ld-mips-elf/got-page-3.d, ld-mips-elf/got-page-3a.s,
++ * ld-mips-elf/got-page-3b.s, ld-mips-elf/got-page-3c.s,
++ * ld-mips-elf/got-page-1.ld: New tests.
++ * ld-mips-elf/mips-elf.exp: Run them.
++ * ld-mips-elf/multi-got-1.d, ld-mips-elf/multi-got-no-shared.d,
++ * ld-mips-elf/tls-hidden2-got.d, ld-mips-elf/tls-hidden2.d,
++ * ld-mips-elf/tls-hidden3.d, ld-mips-elf/tls-hidden3.got,
++ * ld-mips-elf/tls-hidden3.r, ld-mips-elf/tls-hidden4.got,
++ * ld-mips-elf/tls-hidden4.r, ld-mips-elf/tls-multi-got-1.d,
++ * ld-mips-elf/tls-multi-got-1.got, ld-mips-elf/tls-multi-got-1.r,
++ * ld-mips-elf/tlsbin-o32.d, ld-mips-elf/tlsbin-o32.got,
++ * ld-mips-elf/tlsdyn-o32-1.d, ld-mips-elf/tlsdyn-o32-1.got,
++ * ld-mips-elf/tlsdyn-o32-2.d, ld-mips-elf/tlsdyn-o32-2.got,
++ * ld-mips-elf/tlsdyn-o32-3.d, ld-mips-elf/tlsdyn-o32-3.got,
++ * ld-mips-elf/tlsdyn-o32.d, ld-mips-elf/tlsdyn-o32.got,
++ * ld-mips-elf/tlslib-o32-hidden.got, ld-mips-elf/tlslib-o32-ver.got,
++ * ld-mips-elf/tlslib-o32.d, ld-mips-elf/tlslib-o32.got: Update for
++ GOT allocation changes.
++
++2007-09-19 Daniel Jacobowitz <dan@codesourcery.com>
++
++ ld/testsuite/
++ * ld-scripts/rgn-over.s: Use sections .txt and .dat.
++ * ld-scripts/rgn-over1.t, ld-scripts/rgn-over2.t,
++ ld-scripts/rgn-over3.t, ld-scripts/rgn-over4.t, ld-scripts/rgn-over5.t,
++ ld-scripts/rgn-over6.t, ld-scripts/rgn-over7.t: Discard other
++ sections. Handle changed names.
++ * ld-scripts/rgn-over1.d, ld-scripts/rgn-over2.d,
++ ld-scripts/rgn-over3.d, ld-scripts/rgn-over4.d, ld-scripts/rgn-over5.d,
++ ld-scripts/rgn-over6.d, ld-scripts/rgn-over7.d: Expect discarded
++ sections and changed names.
++
++2007-09-19 Daniel Jacobowitz <dan@codesourcery.com>
++
++ bfd/
++ * elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Make sure .got
++ will be output.
++
++2007-09-18 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ * release-notes-csl.xml (ColdFire 51QE support): New.
++
++2007-09-07 Nathan Froyd <froydnj@codesourcery.com>
++
++ gas/
++ * config/tc-ppc.c (parse_cpu): Handle -mpmr option.
++
++2007-08-31 Joseph Myers <joseph@codesourcery.com>
++
++ Revert:
++ 2007-06-04 Joseph Myers <joseph@codesourcery.com>
++ bfd/
++ * elflink.c (bfd_elf_link_record_dynamic_symbol): Do not set
++ dynindx for indirect symbols.
++
++2007-08-30 Brooks Moses <brooks@codesourcery.com>
++
++ Add files missing from 2007-08-20 merge from FSF trunk:
++ * ld/emultempl/cr16elf.em: New.
++ * ld/testsuite/ld-elf/dl2a.list: New.
++ * ld/testsuite/ld-ia64/merge1.d: New.
++ * ld/testsuite/ld-ia64/merge1.s: New.
++ * ld/testsuite/ld-ia64/merge2.d: New.
++ * ld/testsuite/ld-ia64/merge2.s: New.
++ * ld/testsuite/ld-ia64/merge3.d: New.
++ * ld/testsuite/ld-ia64/merge3.s: New.
++ * ld/testsuite/ld-ia64/merge4.d: New.
++ * ld/testsuite/ld-ia64/merge4.s: New.
++ * ld/testsuite/ld-ia64/merge5.d: New.
++ * ld/testsuite/ld-ia64/merge5.s: New.
++ * ld/testsuite/ld-pe/secrel_64.d: New.
++ * compile: New.
++ * lt~obsolete.m4: New.
++
++2007-08-30 Daniel Jacobowitz <dan@codesourcery.com>
++
++ ld/testsuite/
++ * ld-elf/weak-dyn-1.rd: Resolve merge conflict.
++
++2007-08-29 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Issue #1771
++ Backport:
++ 2007-08-29 Daniel Jacobowitz <dan@codesourcery.com>
++ gas/
++ * dwarf2dbg.c (dwarf2_directive_loc): Emit duplicate .loc directives.
++
++ gas/testsuite/
++ * gas/lns/lns-duplicate.d, gas/lns/lns-duplicate.s: New.
++ * gas/lns/lns.exp: Run lns-duplicate.
++
++2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
++ Joseph Myers <joseph@codesourcery.com>
++
++ ld/testsuite/
++ * ld-scripts/rgn-over1.d: Disallow space before "ld" at start of
++ line, not ":".
++ * ld-scripts/rgn-over2.d: Likewise.
++ * ld-scripts/rgn-over3.d: Likewise.
++ * ld-scripts/rgn-over4.d: Likewise.
++ * ld-scripts/rgn-over5.d: Likewise.
++ * ld-scripts/rgn-over6.d: Likewise.
++ * ld-scripts/rgn-over7.d: Likewise.
++
++ Backport from FSF:
++
++ bfd/
++ * elf32-arm.c (elf32_arm_compare_mapping): Compare first on vma,
++ then on type.
++
++ binutils/testsuite/
++ * binutils-all/ar.exp (long_filenames): Delete temporary files on
++ the host.
++ * binutils-all/arm/objdump.exp: Only check "which $OBJDUMP" if
++ host is local.
++ * binutils-all/objcopy.exp: Use ${srecfile} to get the name of the
++ srec file to be passed to binutils_run.
++ (objcopy_test_readelf): Use remote_exec.
++ * binutils-all/readelf.exp (readelf_find_size): Use remote_exec.
++ (readelf_test): Likewise.
++ (readelf_wi_test): Likewise.
++ * lib/utils-lib.exp (run_dump_test): Only check "which $binary" if
++ host is local. Use remote_exec. Use $tempfile not
++ tmpdir/bintest.o.
++
++ gas/
++ * as.c (main): Flush stderr before printing listings to ensure
++ consistent output order across platforms.
++
++ gas/testsuite/
++ * lib/gas-defs.exp (gas_version): Use remote_* functions instead
++ of exec.
++ (gas_host_run): New.
++ (gas_run): Use gas_host_run.
++ (gas_start): Likewise.
++ (run_dump_test): Likewise.
++ (objdump): Use gas_host_run.
++ (objdump_start_no_subdir): Likewise.
++ * lib/gas-dg.exp (gas-dg-test): Use "remote_file host delete".
++ * lib/run: Remove.
++ * gas/macros/macros.exp: Download app4b.s to host.
++ * gas/i386/i386.exp (gas_64_check): Use gas_host_run.
++ (gas_32_check): Likewise.
++ * gas/maxq10/maxq10.exp (gas_64_check): Likewise
++ (gas_32_check): Likewise.
++ * gas/maxq20/maxq20.exp (gas_64_check): Likewise
++ (gas_32_check): Likewise.
++ * gas/sparc/sparc.exp (gas_64_check): Likewise.
++ * gas/cfi/cfi.exp: Likewise.
++ * gas/elf/elf.exp (run_list_test): Likewise. Use temporary file
++ for readelf output in place of pipe.
++ * gas/all/gas.exp: Download incbin.dat to host.
++ (do_comment): Allow \r\r\n.
++
++ ld/
++ * ldlang.c (sort_sections_by_lma): Sort by internal id after lma
++ for stable sort.
++
++ ld/testsuite/
++ * ld-elfcomm/elfcomm.exp: Use run_host_cmd. Only check "which
++ $CC" if host is local.
++ * ld-checks/checks.exp: Use run_host_cmd.
++ * ld-elf/exclude.exp: Likewise.
++ * ld-elf/elf.exp: Download merge.ld if host is remote.
++ * ld-elf/binutils.exp (binutils_test): Use remote_exec.
++ * ld-elf/tls_common.exp: Use run_host_cmd.
++ * lib/ld-lib.exp (ld_version): Only check "which $ld" if host is
++ local. Use remote_exec.
++ (run_host_cmd): New.
++ (run_host_cmd_yesno): New.
++ (default_ld_relocate): Use run_host_cmd_yesno.
++ (default_ld_link): Likewise.
++ (default_ld_simple_link): Use run_host_cmd.
++ (default_ld_compile): Only check "which $ccprog" if host is local.
++ Use remote_file and remote_exec.
++ (default_ld_assemble): Only check "which $as" if host is local.
++ Use run_host_cmd.
++ (default_ld_nm): Use remote_exec, remote_upload and remote_file.
++ (run_dump_test): Use remote_exec, remote_upload and remote_file.
++ Only check "which $binary" if host is local.
++ (run_ld_link_tests): Use remote_exec, remote_upload and
++ remote_file.
++ * ld-selective/selective.exp: Only check "which $CXX" if host is
++ local. Use remote_exec.
++ * ld-scripts/phdrs.exp: Only check "which $objdump" if host is
++ local. Use run_host_cmd.
++ * ld-scripts/phdrs2.exp: Likewise.
++ * ld-scripts/weak.exp: Likewise.
++ * ld-undefined/weak-undef.exp: Likewise.
++ * ld-scripts/crossref.exp: Only check "which $CC" if host is local.
++ Use run_host_cmd.
++ * ld-scripts/map-address.exp: Upload map_address.map if host is
++ remote.
++ * ld-srec/srec.exp (run_srec_tests): Use run_host_cmd. Only check
++ "which $CC" and "which $CXX" if host is local.
++ * ld-undefined/undefined.exp: Only check "which $CC" if host is
++ local. Use remote_file and run_host_cmd.
++ * config/default.exp: Use remote_exec to create tmpdir.
++
++2007-08-28 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
++ (m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.
++
++ include/elf/
++ * m68k.h (EF_M68K_CF_ISA_C_NODIV): New.
++
++ bfd/
++ * elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV.
++ (elf32_m68k_print_private_bfd_data): Likewise.
++
++2007-08-25 Mark Shinwell <shinwell@codesourcery.com>
++
++ Add files missing from previous commit:
++ gas/testsuite/
++ * gas/mips/loongson-2e.d: New.
++ * gas/mips/loongson-2e.s: New.
++ * gas/mips/loongson-2f.d: New.
++ * gas/mips/loongson-2f.s: New.
++
++2007-08-25 Mark Shinwell <shinwell@codesourcery.com>
++
++ * release-notes-csl.xml
++ (Loongson-2E and Loongson-2F processor support): New.
++
++2007-08-25 Mark Shinwell <shinwell@codesourcery.com>
++
++ bfd/
++ * archures.c (bfd_mach_mips_loongson_2e): New.
++ (bfd_mach_mips_loongson_2f): New.
++ * bfd-in2.h (bfd_mach_mips_loongson_2e): New.
++ (bfd_mach_mips_loongson_2f): New.
++ * cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
++ anonymous enum.
++ (arch_info_struct): Add Loongson-2E and Loongson-2F entries.
++ * elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
++ and Loongson-2F flags.
++ (mips_set_isa_flags): Likewise.
++ (mips_mach_extensions): Add Loongson-2E and Loongson-2F
++ entries.
++
++ binutils/
++ * readelf.c (get_machine_flags): Handle Loongson-2E and -2F
++ flags.
++
++ gas/
++ * config/tc-mips.c (mips_cpu_info_table): Add loongson2e
++ and loongson2f entries.
++ * doc/c-mips.texi: Document -march=loongson{2e,2f} options.
++
++ gas/testsuite/
++ * gas/mips/mips.exp: Add loongson-2e and -2f tests.
++ * gas/mips/loongson-2e.d: New.
++ * gas/mips/loongson-2e.s: New.
++ * gas/mips/loongson-2f.d: New.
++ * gas/mips/loongson-2f.s: New.
++
++ include/elf/
++ * mips.h (E_MIPS_MACH_LS2E): New.
++ (E_MIPS_MACH_LS2F): New.
++
++ include/opcode/
++ * mips.h (INSN_LOONGSON_2E): New.
++ (INSN_LOONGSON_2F): New.
++ (CPU_LOONGSON_2E): New.
++ (CPU_LOONGSON_2F): New.
++ (OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
++
++ opcodes/
++ * mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
++ entries.
++ * mips-opc.c (IL2E): New.
++ (IL2F): New.
++ (mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
++ Allow movz and movn for Loongson-2E and -2F. Add movnz entry.
++ Move coprocessor encodings to the end of the table. Allow
++ certain MIPS V .ps instructions on the Loongson-2E and -2F.
++
++2007-08-24 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Rename 51QE to 51qe.
++
++ binutils/
++
++ * gas/config/tc-m68k.c (mcf51QE_ctrl): Rename to mcf51qe_ctrl.
++ (m68k_cpus): Update.
++
++2007-08-24 Mark Shinwell <shinwell@codesourcery.com>
++
++ include/opcode/
++ * mips.h (INSN_ISA*): Redefine certain values as an
++ enumeration. Update comments.
++ (mips_isa_table): New.
++ (ISA_MIPS*): Redefine to match enumeration.
++ (OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
++ values.
++
++ opcodes/
++ * mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New.
++ (mips_builtin_opcodes): Use these new I* values.
++
++2007-08-23 Nathan Sidwell <nathan@codesourcery.com>
++
++ bfd/
++ * archures.c: Add bfd_mach_mcf_isa_c_nodiv,
++ bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac.
++ * bfd/ieee.c (ieee_write_processor): Update coldfire architecture
++ list.
++ * bfd-in2.h: Rebuilt.
++ * cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures.
++ (m68k_arch_features): Likewise.
++
++2007-08-22 Daniel Jacobowitz <dan@codesourcery.com>
++
++ * release-notes-csl.xml: Mention GDB support for MIPS -msoft-float
++ tags.
++
++2007-08-21 Maxim Kuvyrkov <maxim@codesourcery.com>
++
++ Add ColdFire V1 devices.
++
++ binutils/gas
++
++ * config/tc-m68k.c (mcf51QE_ctrl): Define 51QE control registers.
++ (m68k_cpus): Define 51QE cpu.
++
++2007-08-20 Brooks Moses <brooks@codesourcery.com>
++
++ Merged from //mirrors/binutils/trunk revision 179541.
++
++2007-08-16 Daniel Jacobowitz <dan@codesourcery.com>
++
++ * release-notes-csl.xml: Mention MIPS linker warnings.
++
++2007-08-16 Daniel Jacobowitz <dan@codesourcery.com>
++
++ ld/testsuite/
++ * ld-powerpc/attr-gnu-8-31.d, ld-powerpc/attr-gnu-8-1.s,
++ ld-powerpc/attr-gnu-8-11.d, ld-powerpc/attr-gnu-8-3.s: New.
++
++ include/elf/
++ * ppc.h (Tag_GNU_Power_ABI_Vector): New.
++
++ binutils/
++ * readelf.c (display_power_gnu_attribute): Handle
++ Tag_GNU_Power_ABI_Vector.
++
++ bfd/
++ * elf32-ppc.c (ppc_elf_merge_obj_attributes): Handle
++ Tag_GNU_Power_ABI_Vector.
++
++2007-08-11 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ bfd/
++ 2007-08-11 Richard Sandiford <richard@codesourcery.com>
++
++ * config.bfd (sh-*-vxworks): Define targ_underscore to "yes".
++
++2007-08-09 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (relaxed_symbol_addr): Compensate for alignment.
++
++ gas/testsuite/
++ * gas/arm/relax_load_align.d: new test.
++ * gas/arm/relax_load_align.s: new test.
++
++2007-08-07 Kazu Hirata <kazu@codesourcery.com>
++
++ Backport from mainline:
++ ld/testsuite/
++ 2007-05-17 Paul Brook <paul@codesourcery.com>
++ * ld-elf/multibss1.s: Use %nobits instead of @nobits.
++
++2007-08-03 Daniel Jacobowitz <dan@codesourcery.com>
++
++ Backport from mainline:
++ ld/testsuite/
++ 2007-08-03 Daniel Jacobowitz <dan@codesourcery.com>
++ * ld-srec/srec.exp: XFAIL for powerpc*-*-*.
++
++2007-07-23 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ bfd/
++ 2007-07-23 Richard Sandiford <richard@codesourcery.com>
++
++ * elflink.c (_bfd_elf_fix_symbol_flags): Only assert the type
++ of weakdef->root.type if weakdef has no regular definition.
++
++ ld/testsuite/
++ 2007-07-23 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-elf/weak-dyn-1a.s, ld-elf/weak-dyn-1b.s, ld-elf/weak-dyn-1.ld,
++ * ld-elf/weak-dyn-1.rd: New test.
++ * ld-elf/elf.exp: Run it.
++
++2007-07-18 Zack Weinberg <zack@codesourcery.com>
++
++ Issue 1494
++ ld/
++ * ldlang.c (lang_check_section_addresses): Also report size of
++ overflow for any overflowed memory regions.
++ (os_region_check): Diagnose an overflowed region only once per
++ region. Do not reset region->current on overflow.
++
++ ld/testsuite/
++ * ld-scripts/rgn-over.exp: New driver.
++ * ld-scripts/rgn-over.s: New file.
++ * ld-scripts/rgn-over1.d, ld-scripts/rgn-over1.t
++ * ld-scripts/rgn-over2.d, ld-scripts/rgn-over2.t
++ * ld-scripts/rgn-over3.d, ld-scripts/rgn-over3.t
++ * ld-scripts/rgn-over4.d, ld-scripts/rgn-over4.t
++ * ld-scripts/rgn-over5.d, ld-scripts/rgn-over5.t
++ * ld-scripts/rgn-over6.d, ld-scripts/rgn-over6.t
++ * ld-scripts/rgn-over7.d, ld-scripts/rgn-over7.t:
++ New test cases.
++
++2007-07-13 Nathan Sidwell <nathan@codesourcery.com>
++
++ ld/testsuite/
++ * ld-scripts/assert.t: Tweak to avoid relying on empty's VMA being
++ zero.
++
++2007-07-12 Nathan Sidwell <nathan@codesourcery.com>
++
++ #1765
++ ld/
++ * scripttempl/pe.sc: Don't include .gcc_except_table and
++ .eh_frame on partial links.
++
++2007-07-09 Nathan Sidwell <nathan@codesourcery.com>
++
++ Issue 1702
++ bfd/
++ * elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Don't eliminate
++ copy relocs on vxworks.
++
++2007-07-05 Kazu Hirata <kazu@codesourcery.com>
++
++ Issue 1775
++ gas/
++ * config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
++ (last_movec_reg): Change to MBO.
++ * config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
++ (m68k_ip): Use MBO instead of MBO.
++ (init_table): Use MBO instead of MBO. Add an entry for mbo.
++
++ gas/testsuite/
++ * gas/m68k/fido.s: Add tests for %mbo.
++ * gas/m68k/fido.d: Update accordingly.
++
++ opcodes/
++ * m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
++
++ * release-notes-csl.xml: Add a note for the addition of %mbo.
++
++2007-07-05 Nathan Sidwell <nathan@codesourcery.com>
++
++ * opcodes/ppc-opc (PPC7450): New.
++ (powerpc_opcodes): Use it in dcba.
++
++2007-07-04 Richard Sandiford <richard@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c (mips_cpu_info_table): Add 74kf3_2.
++ * doc/c-mips.texi: Document it.
++
++2007-07-04 Richard Sandiford <richard@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c (mips_cpu_info_table): Add new entries for
++ {24k,24ke,34k,74k}f{2_1,1_1,x}.
++ * doc/c-mips.texi: Document them.
++
++2007-07-03 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from FSF:
++
++ bfd/
++ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Copy type from
++ input attributes if value has been copied.
++
++ ld/testsuite/
++ * ld-arm/attr-merge-2a.s, ld-arm/attr-merge-2b.s,
++ ld-arm/attr-merge-2.attr: New.
++ * ld-arm/arm-elf.exp (armelftests): Add new test.
++
++2007-07-02 Nathan Froyd <froydnj@codesourcery.com>
++
++ Backport from FSF:
++
++ bfd/
++ * elf32-ppc.c (ppc_elf_info_to_howto): Check for invalid relocation
++ types.
++
++2007-07-02 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ bfd/
++ * elf32-arm.c (bfd_elf32_arm_process_before_allocation): Suppress
++ call veneers for call relocations against undefined symbols.
++ (elf32_arm_final_link_relocate): Turn call to undefined symbol
++ into a jump to the next instruction.
++
++ ld/testuite/
++ * ld-arm/arm-elf.exp (armelftests): Add callweak.
++ * ld-arm/callweak.d: New test.
++ * ld-arm/callweak.s: New test.
++
++2007-07-02 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from FSF:
++
++ bfd/
++ * elfxx-mips.c (mips_elf_calculate_relocation): Handle
++ R_MIPS_TLS_DTPREL32 and R_MIPS_TLS_DTPREL64.
++ * elf64-mips.c (mips_elf64_howto_table_rela): Support
++ R_MIPS_TLS_DTPREL64.
++
++ gas/
++ * config/tc-mips.c (s_dtprelword, s_dtpreldword,
++ s_dtprel_internal): New.
++ (mips_pseudo_table): Add .dtprelword and .dtpreldword.
++ (md_apply_fix): Handle BFD_RELOC_MIPS_TLS_DTPREL32 and
++ BFD_RELOC_MIPS_TLS_DTPREL64.
++
++2007-06-29 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from FSF:
++
++ bfd/
++ * elf32-ppc.c (ppc_elf_merge_obj_attributes): New.
++ (ppc_elf_merge_private_bfd_data): Call it.
++
++ binutils/
++ * readelf.c (display_power_gnu_attribute, process_power_specific):
++ New.
++ (process_arch_specific): Call process_power_specific.
++
++ include/elf/
++ * ppc.h (Tag_GNU_Power_ABI_FP): Define.
++
++ ld/testsuite/
++ * ld-powerpc/attr-gnu-4-0.s, ld-powerpc/attr-gnu-4-00.d,
++ ld-powerpc/attr-gnu-4-01.d, ld-powerpc/attr-gnu-4-02.d,
++ ld-powerpc/attr-gnu-4-1.s, ld-powerpc/attr-gnu-4-10.d,
++ ld-powerpc/attr-gnu-4-11.d, ld-powerpc/attr-gnu-4-12.d,
++ ld-powerpc/attr-gnu-4-13.d, ld-powerpc/attr-gnu-4-2.s,
++ ld-powerpc/attr-gnu-4-20.d, ld-powerpc/attr-gnu-4-21.d,
++ ld-powerpc/attr-gnu-4-22.d, ld-powerpc/attr-gnu-4-3.s,
++ ld-powerpc/attr-gnu-4-31.d: New.
++ * ld-powerpc/powerpc.exp: Run these new tests.
++
++2007-06-29 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from FSF:
++
++ gas/
++ * as.c (main): Only call create_obj_attrs_section if IS_ELF.
++
++2007-06-29 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from FSF:
++
++ bfd/
++ * elfxx-mips.c (mips_elf_merge_obj_attributes): New.
++ (_bfd_mips_elf_merge_private_bfd_data): Call it.
++
++ binutils/
++ * readelf.c (display_mips_gnu_attribute): New.
++ (process_mips_specific): Call process_attributes.
++
++ include/elf/
++ * mips.h (Tag_GNU_MIPS_ABI_FP): Define.
++
++ ld/testsuite/
++ * ld-mips-elf/attr-gnu-4-0.s, ld-mips-elf/attr-gnu-4-00.d,
++ ld-mips-elf/attr-gnu-4-01.d, ld-mips-elf/attr-gnu-4-02.d,
++ ld-mips-elf/attr-gnu-4-03.d, ld-mips-elf/attr-gnu-4-1.s,
++ ld-mips-elf/attr-gnu-4-10.d, ld-mips-elf/attr-gnu-4-11.d,
++ ld-mips-elf/attr-gnu-4-12.d, ld-mips-elf/attr-gnu-4-13.d,
++ ld-mips-elf/attr-gnu-4-14.d, ld-mips-elf/attr-gnu-4-2.s,
++ ld-mips-elf/attr-gnu-4-20.d, ld-mips-elf/attr-gnu-4-21.d,
++ ld-mips-elf/attr-gnu-4-22.d, ld-mips-elf/attr-gnu-4-23.d,
++ ld-mips-elf/attr-gnu-4-3.s, ld-mips-elf/attr-gnu-4-30.d,
++ ld-mips-elf/attr-gnu-4-31.d, ld-mips-elf/attr-gnu-4-32.d,
++ ld-mips-elf/attr-gnu-4-33.d, ld-mips-elf/attr-gnu-4-4.s,
++ ld-mips-elf/attr-gnu-4-41.d: New.
++ * ld-mips-elf/mips-elf.exp: Run these new tests.
++
++2007-06-29 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from FSF:
++
++ bfd/
++ * elf-attrs.c: New.
++ * Makefile.am (BFD32_BACKENDS): Add elf-attrs.lo.
++ (BFD32_BACKENDS_CFILES): Add elf-attrs.c.
++ (elf-attrs.lo): Generate dependencies.
++ * Makefile.in: Regenerate.
++ * configure.in (elf): Add elf-attrs.lo.
++ * configure: Regenerate.
++ * elf-bfd.h (struct elf_backend_data): Add entries for object
++ attributes.
++ (NUM_KNOWN_OBJ_ATTRIBUTES, obj_attribute, obj_attribute_list,
++ OBJ_ATTR_PROC, OBJ_ATTR_GNU, OBJ_ATTR_FIRST, OBJ_ATTR_LAST,
++ Tag_NULL, Tag_File, Tag_Section, Tag_Symbol, Tag_compatibility):
++ New.
++ (struct elf_obj_tdata): Add entries for object attributes.
++ (elf_known_obj_attributes, elf_other_obj_attributes,
++ elf_known_obj_attributes_proc, elf_other_obj_attributes_proc):
++ New.
++ (bfd_elf_obj_attr_size, bfd_elf_set_obj_attr_contents,
++ bfd_elf_get_obj_attr_int, bfd_elf_add_obj_attr_int,
++ bfd_elf_add_proc_attr_int, bfd_elf_add_obj_attr_string,
++ bfd_elf_add_proc_attr_string, bfd_elf_add_obj_attr_compat,
++ bfd_elf_add_proc_attr_compat, _bfd_elf_attr_strdup,
++ _bfd_elf_copy_obj_attributes, _bfd_elf_obj_attrs_arg_type,
++ _bfd_elf_parse_attributes, _bfd_elf_merge_object_attributes): New.
++ * elf.c (_bfd_elf_copy_private_bfd_data): Copy object attributes.
++ (bfd_section_from_shdr): Handle attributes sections.
++ * elflink.c (bfd_elf_final_link): Handle attributes sections.
++ * elfxx-target.h (elf_backend_obj_attrs_vendor,
++ elf_backend_obj_attrs_section, elf_backend_obj_attrs_arg_type,
++ elf_backend_obj_attrs_section_type): New.
++ (elfNN_bed): Update.
++ * elf32-arm.c (NUM_KNOWN_ATTRIBUTES, aeabi_attribute,
++ aeabi_attribute_list): Remove.
++ (struct elf32_arm_obj_tdata): Remove object attributes fields.
++ (check_use_blx, bfd_elf32_arm_set_vfp11_fix, using_thumb2,
++ elf32_arm_copy_private_bfd_data, elf32_arm_merge_eabi_attributes):
++ Update for new object attributes interfaces.
++ (uleb128_size, is_default_attr, eabi_attr_size,
++ elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
++ elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
++ elf32_arm_new_eabi_attr, elf32_arm_get_eabi_attr_int,
++ elf32_arm_add_eabi_attr_int, attr_strdup,
++ elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
++ copy_eabi_attributes, elf32_arm_parse_attributes): Remove. Moved
++ to generic code in elf-attrs.c.
++ (elf32_arm_obj_attrs_arg_type): New.
++ (elf32_arm_fake_sections): Do not handle .ARM.attributes.
++ (elf32_arm_section_from_shdr): Do not handle SHT_ARM_ATTRIBUTES.
++ (bfd_elf32_bfd_final_link): Remove.
++ (elf_backend_obj_attrs_vendor, elf_backend_obj_attrs_section,
++ elf_backend_obj_attrs_arg_type,
++ elf_backend_obj_attrs_section_type): New.
++ * elf32-bfin.c (bfin_elf_copy_private_bfd_data): Copy object
++ attributes.
++ * elf32-frv.c (frv_elf_copy_private_bfd_data): Likewise.
++ * elf32-iq2000.c (iq2000_elf_copy_private_bfd_data): Likewise.
++ * elf32-mep.c (mep_elf_copy_private_bfd_data): Likewise.
++ * elf32-mt.c (mt_elf_copy_private_bfd_data): Likewise.
++ * elf32-sh.c (sh_elf_copy_private_data): Likewise.
++ * elf64-sh64.c (sh_elf64_copy_private_data_internal): Likewise.
++
++ binutils/
++ * readelf.c (display_gnu_attribute): New.
++ (process_arm_specific): Rearrange as process_attributes.
++ (process_arm_specific): Replace by wrapper of process_attributes.
++
++ gas/
++ * as.c (create_obj_attrs_section): New.
++ (main): Call create_obj_attrs_section for ELF.
++ * read.c (s_gnu_attribute, skip_whitespace, skip_past_char,
++ skip_past_comma, s_vendor_attribute): New.
++ (potable): Add gnu_attribute for ELF.
++ * read.h (s_vendor_attribute): Declare.
++ * config/tc-arm.c (s_arm_eabi_attribute): Replace by wrapper
++ round s_vendor_attribute.
++ (aeabi_set_public_attributes): Update for new attributes
++ interfaces.
++ (arm_md_end): Remove attributes contents setting now done
++ generically.
++
++ include/elf/
++ * arm.h (elf32_arm_add_eabi_attr_int,
++ elf32_arm_add_eabi_attr_string, elf32_arm_add_eabi_attr_compat,
++ elf32_arm_get_eabi_attr_int, elf32_arm_set_eabi_attr_contents,
++ elf32_arm_eabi_attr_size, Tag_NULL, Tag_File, Tag_Section,
++ Tag_Symbol, Tag_compatibility): Remove.
++ * common.h (SHT_GNU_ATTRIBUTES): Define.
++
++ ld/
++ * emulparams/armelf.sh (OTHER_SECTIONS): Remove .ARM.attributes.
++ (ATTRS_SECTIONS): Define.
++ * scripttempl/elf.sc, scripttempl/elf32sh-symbian.sc,
++ scripttempl/elf_chaos.sc, scripttempl/elfi370.sc,
++ scripttempl/elfxtensa.sc: Handle ATTRS_SECTIONS.
++
++2007-06-26 Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (parse_operands): Accept generic coprocessor regs
++ for OP_RVC.
++ (reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.
++
++ gas/testsuite/
++ * gas/arm/vfp1xD.d: Add new fmrx/fmxr tests.
++ * gas/arm/vfp1xD.s: Ditto.
++ * gas/arm/vfp1xD_t2.d: Ditto.
++ * gas/arm/vfp1xD_t2.s: Ditto.
++
++ opcodes/
++ * arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
++
++2007-06-26 Joseph Myers <joseph@codesourcery.com>
++
++ * release-notes-csl.xml: Add release notes for attribute merging
++ fix.
++
++2007-06-26 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (copy_eabi_attributes): Copy type of attributes.
++
++ ld/testsuite/
++ * ld-arm/attr-merge.s, ld-arm/attr-merge.attr: New.
++ * ld-arm/arm-elf.exp (armelftests): Add new test.
++
++2007-06-25 Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (do_t_mov_cmp): Handle shift by register and
++ narrow shift by immediate.
++
++ gas/testsuite/
++ * gas/arm/thumb32.s: Add tests for shift instructions.
++ * gas/arm/thumb32.d: Ditto.
++
++2007-06-25 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ bfd/
++ 2007-06-25 Richard Sandiford <richard@codesourcery.com>
++
++ * elfxx-mips.c (mips_elf_calculate_relocation): Allow local stubs
++ to be used for calls from MIPS16 code.
++
++ gas/
++ 2007-06-25 Richard Sandiford <richard@codesourcery.com>
++
++ * config/tc-mips.h (TC_SYMFIELD_TYPE): New.
++ * config/tc-mips.c (append_insn): Record which symbols have
++ R_MIPS16_26 relocations against them.
++ (mips_fix_adjustable): Don't reduce relocations against such symbols.
++
++ ld/testsuite/
++ 2007-06-25 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-mips-elf/mips16-local-stubs-1.s,
++ * ld-mips-elf/mips16-local-stubs-1.d: New tests.
++ * ld-mips-elf/mips-elf.exp: Run them.
++
++2007-06-18 Nathan Sidwell <nathan@codesourcery.com>
++
++ Bug 1722
++ gas/testsuite/
++ * gas/m68k/mcf-coproc.d: New.
++ * gas/m68k/mcf-coproc.s: New.
++ * gas/m68k/all.exp: Add it.
++
++ gas/
++ * config/tc-m68k.c (m68k_ip): Add j & K operand types.
++ (install_operand): Add E encoding.
++ (md_begin): Check and skip initial '.' arg character.
++ (get_num): Add 0..511 case.
++
++ include/
++ * opcode/m68k.h: Document j K & E.
++
++ opcodes/
++ * m68k-dis.c (fetch_arg): Add E. Replace length switch with
++ direct masking.
++ (print_ins_arg): Add j & K operand types.
++ (match_insn_m68k): Check and skip initial '.' arg character.
++ (m68k_scan_mask): Likewise.
++ * m68k-opc.c (m68k_opcodes): Add coprocessor instructions.
++
++2007-06-14 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (mcf52235_ctrl): Add cache registers.
++ (mcf5253_ctrl): Add RAMBAR, MBAR, MBAR2.
++ (mcf5407_ctrl): New.
++ (m68k_cpus): Adjust 5407 entry.
++
++2007-06-13 Joseph Myers <joseph@codesourcery.com>
++
++ ld/
++ * config.in: Regenerate.
++ * ld.h (args_type): Add poison_system_directories.
++ * ld.texinfo (--no-poison-system-directories): Document.
++ * ldfile.c (ldfile_add_library_path): Check
++ command_line.poison_system_directories.
++ * ldmain.c (main): Initialize
++ command_line.poison_system_directories.
++ * lexsup.c (enum option_values): Add
++ OPTION_NO_POISON_SYSTEM_DIRECTORIES.
++ (ld_options): Add --no-poison-system-directories.
++ (parse_args): Handle new option.
++
++2007-06-13 Nathan Sidwell <nathan@codesourcery.com>
++
++ ld/
++ * ldexp.c (foldname): ALIGNOF should not be divided by opb.
++
++2007-06-11 Julian Brown <julian@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (bfd_elf32_arm_vfp11_erratum_scan): Skip BFDs with
++ EXEC_P or DYNAMIC flags, and skip sections which are being linked
++ with --just-symbols (-R).
++
++2007-06-11 Nathan Sidwell <nathan@codesourcery.com>
++
++ binutils/
++ * dwarf.c (decode_location_expression): Add DW_OP_form_tls_address.
++
++ ld/
++ * ldlex.l, ldgram.y: Add ALIGNOF.
++ * ldexp.c (exp_print_token, foldname): Likewise.
++ * ld.texinfo: Likewise.
++
++ ld/testsuite/
++ * ld-scripts/alignof.s: New.
++ * ld-scripts/alignof.t: New
++ * ld-scripts/alignof.exp: New.
++
++2007-06-06 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (s_align): Pad code sections appropriately.
++
++ gas/testsuite/
++ * gas/arm/thumb.d: Update expected output.
++ * gas/arm/thumb2_relax.d: Ditto.
++
++2007-06-06 Joseph Myers <joseph@codesourcery.com>
++ Paul Brook <paul@codesourcery.com>
++
++ gas/
++ * remap.c: New.
++ * as.h (remap_debug_filename, add_debug_prefix_map): Declare.
++ * as.c (show_usage): Document --debug-prefix-map option.
++ (parse_args): Handle --debug-prefix-map.
++ * dwarf2dbg.c (out_file_list, out_debug_info): Remap debug paths.
++ * stabs.c (stabs_generate_asm_file): Remap debug paths.
++ * Makefile.am (GAS_CFILES): Add remap.c
++ (GENERIC_OBJS): Add remap.o.
++ * Makefile.in: Regenerate.
++ * doc/as.texinfo (--debug-prefix-map): Document.
++
++2007-06-05 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.
++
++ gas/testsuite/
++ * gas/arm/thumb32.d: Add writeback addressing mode tests.
++ * gas/arm/thumb32.s: Update expected output.
++
++ opcodes/
++ * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
++
++2007-06-04 Joseph Myers <joseph@codesourcery.com>
++
++ bfd/
++ * elflink.c (bfd_elf_link_record_dynamic_symbol): Do not set
++ dynindx for indirect symbols.
++
++2007-05-31 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (insns): Allow strex on M profile cores.
++
++2007-05-27 Nathan Sidwell <nathan@codesourcery.com>
++
++ Bug 1652
++ gas/
++ * app.c (do_scrub_chars): Cope with \ at end of buffer.
++
++ * release-notes-csl.xml: Document fix.
++
++2007-03-25 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ gas/
++ * config/tc-arm.c (T2_SUBS_PC_LR): Define.
++ (do_t_add_sub): Correctly encode subs pc, lr, #const.
++ (do_t_mov_cmp): Correctly encode movs pc, lr.
++
++ gas/testsulte/
++ * gas/arm/thumb32.s: Add tests for subs pc, lr.
++ * gas/arm/thumb32.d: Change error-output: to stderr:.
++ Update expected output.
++
++2007-05-24 Nathan Sidwell <nathan@codesourcery.com>
++
++ ld/
++ * ldlex.l: ASSERT is recognized in SCRIPT env. NAMES cannot
++ contain commas in EXP env.
++ * ldgram.y (extern_name_list): Push to EXP env, move body to ...
++ (extern_name_list_body): ... here.
++ (script_file, ifile_list): Reformat.
++ (statement): Add ASSERT.
++
++ ld/testsuite/
++ * ld/ld-scripts/assert.t: Add additional cases.
++ * ld-scripts/extern.t, ld-scripts/extern.s,
++ ld-scripts/extern.exp: New.
++
++2007-05-22 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ ld/testsuite/
++ * ld-arm/arm-pic-veneer.d: Update expected output.
++ * ld-arm/arm-call.d: Ditto.
++
++ bfd/
++ * elf32-arm.c (output_arch_syminfo): Replace plt_shndx and plt_offset
++ with sec and sec_shndx.
++ (elf32_arm_ouput_plt_map_sym): Use them.
++ (elf32_arm_output_arch_local_syms): Output mapping symbols for
++ interworking glue.
++
++2007-05-22 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF.
++ bunutils/
++ * objdump.c (find_symbol_for_address): Merge section and target
++ specific filtering code.
++
++ ld/testsuite/
++ * ld-arm-mixed-lib.d: Update expected output.
++ * ld-arm/arm-app.d: Ditto.
++ * ld-arm/mixed-app.d: Ditto.
++ * ld-arm/arm-lib-plt32.d: Ditto.
++ * ld-arm/arm-app-abs32.d: Ditto.
++ * ld-arm/mixed-app-v5.d: Ditto.
++ * ld-arm/armthumb-lib.d: Ditto.
++ * ld-arm/arm-lib.d: Ditto.
++
++ gas/testsuite/
++ * gas/arm/backslash-at.d: Update expected output.
++
++2007-05-21 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ binutils/
++ 2007-05-21 Richard Sandiford <richard@codesourcery.com>
++
++ * objdump.c (disassemble_bytes): Ignore disassembler_needs_relocs
++ for executables and shared libraries.
++
++ ld/testsuite/
++ 2007-05-21 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-arm/emit-relocs1.d, ld-arm/emit-relocs1.s,
++ * ld-arm/emit-relocs1-vxworks.d: New tests.
++ * ld-arm/arm-elf.exp: Run them.
++ * ld-arm/vxworks1.dd: Expect proper branch targets.
++
++2007-05-18 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (LONG_BRANCH_VIA_COND): New.
++ (BRANCHBWPL, FRAG_VAR_SIZE): New.
++ (md_relax_table): Add BRANCHBWPL entries.
++ (m68k_ip): Choose BRANCHBWPL relaxation if necessary.
++ (md_assemble): Use FRAG_VAR_SIZE.
++ (md_convert_frag_1): Add BRANCHBWPL cases.
++ (md_estimate_size_before_relaz): Likewise.
++
++ gas/testsuite/
++ * gas/m68k/br-isaa.d: Dump relocs too.
++ * gas/m68k/br-isab.d: Likewise.
++ * gas/m68k/br-isac.d: Likewise. Adjust for long branch relaxation.
++
++2007-05-18 Joseph Myers <joseph@codesourcery.com>
++
++ * release-notes-csl.xml: Add release notes for .set change.
++
++2007-05-18 Joseph Myers <joseph@codesourcery.com>
++
++ ld/testsuite/
++ * ld-elf/group.ld: Discard .reginfo.
++
++2007-05-18 Joseph Myers <joseph@codesourcery.com>
++
++ gas/
++ * config/tc-mips.c (s_mipsset): Use generic s_set for directives
++ containing a comma.
++
++2007-05-18 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ ld/
++ 2007-05-18 Richard Sandiford <richard@codesourcery.com>
++
++ * emulparams/elf32ebmipvxworks.sh (OTHER_READONLY_SECTIONS)
++ (OTHER_READWRITE_SECTIONS): Define. Add .rdata sections.
++
++2007-05-18 Paul Brook <paul@codesourcery.com>
++
++ Backport from FSF:
++ bfd/
++ * elf32-arm.c (ARM2THUMB_V5_STATIC_GLUE_SIZE): Define.
++ (a2t1v5_ldr_insn, a2t1v5_ldr_insn): New.
++ (record_arm_to_thumb_glue): Add v5t non-pic glue.
++ (elf32_arm_create_thumb_stub): Ditto.
++
++ ld/testsuite/
++ * ld-arm/arm-call.d: Update expected output.
++
++2007-05-16 Paul Brook <paul@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (elf32_arm_link_hash_entry): Add
++ plt_maybe_thumb_refcount.
++ (elf32_arm_link_hash_newfunc): Set plt_maybe_thumb_refcount.
++ (elf32_arm_copy_indirect_symbol): Ditto.
++ (elf32_arm_adjust_dynamic_symbol): Ditto.
++ (bfd_elf32_arm_process_before_allocation): Handle R_ARM_THM_JUMP24.
++ (arm_add_to_rel): Ditto.
++ (elf32_arm_final_link_relocate): Merge R_ARM_THM_JUMP24 with
++ R_ARM_THM_CALL. Handle R_ARM_THM_JUMP19 against a PLT stub.
++ (elf32_arm_gc_sweep_hook): Call check_use_blx. Update plt counts
++ for R_ARM_THM_JUMP24 and R_ARM_THM_JUMP19.
++ (elf32_arm_check_relocs): Update plt counts for R_ARM_THM_JUMP24
++ and R_ARM_THM_JUMP19.
++ (allocate_dynrelocs): Use plt_maybe_thumb_refcount.
++ (elf32_arm_finish_dynamic_symbol): Ditto.
++ (elf32_arm_output_plt_map): Ditto.
++
++2007-05-16 Paul Brook <paul@codesourcery.com>
++
++ * config/tc-arm.c (v7m_psrs): Add uppercase PSR names and xpsr.
++
++2007-05-16 Joseph Myers <joseph@codesourcery.com>
++
++ binutils/testsuite/
++ * binutils-all/strip-3.d: Strip .pdr section.
++
++2007-05-16 Nathan Sidwell <nathan@codesourcery.com>
++
++ ld/testsuite/
++ * ld-m68k-merge-error-1a.d: Mismatch is an error.
++ * ld-m68k-merge-error-1b.d: Likewise.
++ * ld-m68k-merge-error-1c.d: Likewise.
++ * ld-m68k-merge-error-1d.d: Likewise.
++ * ld-m68k-merge-error-1e.d: Likewise.
++
++ gas/
++ * config/tc-m68k.c (md_apply_fix): Show value of out of range
++ fixups in error message.
++ (md_conver_frag_1): Propagate the fix source location and use
++ as_bad_where rather than fatal, for better error messages.
++
++2007-05-15 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ ld/testsuite/
++ 2007-05-15 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-arm/vxworks1.ld: Swap .bss and .data.
++ * ld-arm/vxworks1-lib.rd: Update accordingly.
++ * ld-arm/vxworks1-lib.td: New test.
++ * ld-arm/arm-elf.exp: Run it.
++
++ * ld-i386/vxworks1.ld: Swap .bss and .data.
++ * ld-i386/vxworks1-lib.rd: Update accordingly.
++ * ld-i386/vxworks1-lib.td: New test.
++ * ld-i386/i386.exp: Run it.
++
++ * ld-mips-elf/vxworks1.ld: Swap .bss and .data.
++ * ld-mips-elf/vxworks1-lib.rd: Update accordingly.
++ * ld-mips-elf/vxworks1.rd: Likewise.
++
++ * ld-powerpc/vxworks1.ld: Swap .bss and .data.
++ * ld-powerpc/vxworks1-lib.rd: Update accordingly.
++ * ld-powerpc/vxworks1-lib.td: New test.
++ * ld-powerpc/powerpc.exp: Run it.
++
++ * ld-sh/vxworks1.ld: Swap .bss and .data.
++ * ld-sh/vxworks1-lib.rd: Update accordingly.
++ * ld-sh/vxworks1-lib.td: New test.
++ * ld-sh/sh-vxworks.exp: Run it.
++
++ * ld-sparc/vxworks1.ld: Swap .bss and .data.
++ * ld-sparc/vxworks1-lib.rd: Update accordingly.
++ * ld-sparc/vxworks1-lib.td: New test.
++ * ld-sparc/sparc.exp: Run it.
++
++2007-05-15 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ bfd/
++ 2007-05-15 Richard Sandiford <richard@codesourcery.com>
++
++ * elfxx-mips.c (mips_elf_create_local_got_entry): Remove
++ input_section argument. Create .rela.dyn relocations against
++ symbol 0 rather than the section symbol.
++ (mips_elf_local_got_index): Remove input_section argument.
++ Update call to mips_elf_create_local_got_entry.
++ (mips_elf_got_page, mips_elf_got16_entry): Likewise.
++ (mips_elf_calculate_relocation): Update calls to
++ mips_elf_local_got_index, mips_elf_got16_entry and mips_elf_got_page.
++
++ ld/testsuite/
++ 2007-05-15 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-mips-elf/vxworks1-lib.rd: Expect the GOT relocation to be
++ against symbol 0.
++
++2007-05-14 Richard Sandiford <richard@codesourcery.com>
++
++ bfd/
++ * coff-rs6000.c (rs6000coff_vec, pmac_xcoff_vec): Initialize
++ _bfd_copy_link_hash_symbol_type.
++
++2007-05-14 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from mainline:
++ bfd/
++ 2007-05-12 Alan Modra <amodra@bigpond.net.au>
++ PR 4497
++ * elf-eh-frame.c (struct cie): Add "local_personality". Make
++ "personality" a union.
++ (cie_eq): Compare local_personality too. Adjust personality
++ comparison.
++ (_bfd_elf_discard_section_eh_frame): Check binding on personality
++ reloc sym to allow for bad symtab. Use stashed local syms rather
++ than reading personality local sym. Handle discarded sections.
++
++2007-05-14 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ ld/testsuite/
++ 2007-05-14 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-sh/vxworks1.dd: Remove hexadecimal prefixes from constant pool
++ contents. Consistently use "!" as the comment character.
++ Consistently use _PROCEDURE_LINKAGE_TABLE_ in the first PLT entry.
++ * ld-sh/vxworks1-le.dd: Likewise.
++ * ld-sh/vxworks1-lib.dd: Likewise.
++ * ld-sh/vxworks1-lib-le.dd: Likewise.
++ * ld-sh/vxworks3.dd: Likewise.
++ * ld-sh/vxworks3-le.dd: Likewise.
++
++2007-05-11 Paul Brook <paul@codesourcery.com>
++
++ ld/
++ * ldexp.c (exp_fold_tree_1): Copy symbol type for simple
++ assignments.
++
++ ld/testsuite/
++ * ld-arm/script-type.s: New test.
++ * ld-arm/arm-elf.exp: New test.
++ * ld-arm/script-type.ld: New test.
++
++ bfd/
++ * elf-bfd.h (_bfd_elf_copy_link_hash_symbol_type): Add prototype.
++ * libbfd-in.h (_bfd_generic_copy_link_hash_symbol_type): Add
++ prototype.
++ * elflink.c (_bfd_elf_copy_link_hash_symbol_type): New function.
++ * linker.c (_bfd_generic_copy_link_hash_symbol_type): New
++ function.
++ * targets.c (BFD_JUMP_TABLE_LINK, struct bfd_target): Add
++ _copy_link_hash_symbol_type.
++ * aout-adobe.c (aout_32_bfd_copy_link_hash_symbol_type): Define.
++ * aout-target.h (MY_bfd_copy_link_hash_symbol_type): Define.
++ * aout-tic30.c (MY_bfd_copy_link_hash_symbol_type): Define.
++ * binary.c (binary_bfd_copy_link_hash_symbol_type): Define.
++ * bout.c (b_out_bfd_copy_link_hash_symbol_type): Define.
++ * coffcode.h (coff_bfd_copy_link_hash_symbol_type): Define.
++ * elfxx-target.h (bfd_elfNN_bfd_copy_link_hash_symbol_type): Define.
++ * i386msdos.c (msdos_bfd_copy_link_hash_symbol_type): Define.
++ * i386os9k.c (os9k_bfd_copy_link_hash_symbol_type): Define.
++ * ieee.c (ieee_bfd_copy_link_hash_symbol_type): Define.
++ * ihex.c (ihex_bfd_copy_link_hash_symbol_type): Define.
++ * libecoff.h (_bfd_ecoff_bfd_copy_link_hash_symbol_type): Define.
++ * mach-o.c (bfd_mach_o_bfd_copy_link_hash_symbol_type): Define.
++ * mmo.c (mmo_bfd_copy_link_hash_symbol_type): Define.
++ * nlm-target.h (nlm_bfd_copy_link_hash_symbol_type): Define.
++ * oasys.c (oasys_bfd_copy_link_hash_symbol_type): Define.
++ * pef.c (bfd_pef_bfd_copy_link_hash_symbol_type): Define.
++ * ppcboot.c (ppcboot_bfd_copy_link_hash_symbol_type): Define.
++ * som.c (som_bfd_copy_link_hash_symbol_type): Define.
++ * srec.c (srec_bfd_copy_link_hash_symbol_type): Define.
++ * tekhex.c (tekhex_bfd_copy_link_hash_symbol_type): Define.
++ * versados.c (versados_bfd_copy_link_hash_symbol_type): Define.
++ * vms.c (vms_bfd_copy_link_hash_symbol_type): Define.
++ * xsym.c (bfd_sym_bfd_copy_link_hash_symbol_type): Define.
++ * bfd-in2.h: Regenerate.
++ * libbfd.h: Regenerate.
++
++2007-05-11 Joseph Myers <joseph@codesourcery.com>
++
++ Backport from mainline:
++ gas/
++ 2007-04-30 Alan Modra <amodra@bigpond.net.au>
++ PR 4436
++ * config/tc-ppc.c (ppc_insert_operand): Disable range check if
++ min > max.
++
++ opcodes/
++ 2007-04-30 Alan Modra <amodra@bigpond.net.au>
++ PR 4436
++ * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
++
++ gas/
++ 2007-05-02 Alan Modra <amodra@bigpond.net.au>
++ PR 4448
++ * config/tc-ppc.c (ppc_insert_operand): Don't increase min for
++ PPC_OPERAND_PLUS1.
++
++ include/opcode/
++ 2007-05-02 Alan Modra <amodra@bigpond.net.au>
++ * ppc.h (PPC_OPERAND_PLUS1): Update comment.
++
++2007-05-10 Carlos O'Donell <carlos@codesourcery.com>
++
++ * Makefile.tpl: Add install-pdf to install target deps.
++ * Makefile.in: Regenerate.
++
++2007-05-10 Carlos O'Donell <carlos@codesourcery.com>
++
++ bfd/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am
++ and install-pdf-recursive targets. Define pdfdir.
++ * doc/Makefile.am: Define pdf__strip_dir. Add
++ install-pdf and install-pdf-am targets.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate
++ * doc/Makefile.in: Regenerate.
++
++ binutils/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets.
++ * doc/Makefile.am: Define pdf__strip_dir. Add
++ install-pdf and install-pdf-am targets.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++ * doc/Makefile.in: Regenerate.
++
++ etc/
++ * configure.in: ACSUBST pdfdir.
++ * configure: Regenerate.
++
++ opcodes/
++ * Makefile.am: Add install-pdf target.
++ * po/Make-in: Add install-pdf target.
++ * Makefile.in: Regenerate.
++
++ gas/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets.
++ * doc/Makefile.am: Define pdf__strip_dir. Add
++ install-pdf and install-pdf-am targets.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++ * doc/Makefile.in: Regenerate.
++
++ gprof/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets. Define pdf__strip_dir.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++
++ ld/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets. Define pdf__strip_dir.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++
++2007-05-10 Kazu Hirata <kazu@codesourcery.com>
++
++ Issue 1569
++ Backport from mainline:
++ bfd/
++ 2007-05-11 Alan Modra <amodra@bigpond.net.au>
++ PR 4454
++ * elf-eh-frame.c (struct cie): Make "personality" a bfd_vma.
++ (_bfd_elf_discard_section_eh_frame): Handle local syms on
++ personality relocation.
++
++2007-05-10 Nathan Sidwell <nathan@codesourcery.com>
++
++ * Makefile.tpl: Add install-pdf to install target deps.
++ * Makefile.in: Regenerate.
++
++2007-05-10 Carlos O'Donell <carlos@codesourcery.com>
++
++ bfd/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am
++ and install-pdf-recursive targets. Define pdfdir.
++ * doc/Makefile.am: Define pdf__strip_dir. Add
++ install-pdf and install-pdf-am targets.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate
++ * doc/Makefile.in: Regenerate.
++
++ binutils/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets.
++ * doc/Makefile.am: Define pdf__strip_dir. Add
++ install-pdf and install-pdf-am targets.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++ * doc/Makefile.in: Regenerate.
++
++ etc/
++ * configure.in: ACSUBST pdfdir.
++ * configure: Regenerate.
++
++ opcodes/
++ * Makefile.am: Add install-pdf target.
++ * po/Make-in: Add install-pdf target.
++ * Makefile.in: Regenerate.
++
++ gas/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets.
++ * doc/Makefile.am: Define pdf__strip_dir. Add
++ install-pdf and install-pdf-am targets.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++ * doc/Makefile.in: Regenerate.
++
++ gprof/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets. Define pdf__strip_dir.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++
++ ld/
++ * configure.in: ACSUBST pdfdir.
++ * Makefile.am: Add install-pdf, install-pdf-am,
++ and install-pdf-recursive targets. Define pdf__strip_dir.
++ * po/Make-in: Add install-pdf target.
++ * configure: Regenerate.
++ * Makefile.in: Regenerate.
++
++2007-05-10 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ bfd/
++ 2007-05-10 Richard Sandiford <richard@codesourcery.com>
++
++ * elf32-arm.c (elf32_arm_check_relocs): Don't create PLT entries
++ for R_ARM_ABS12 relocs.
++ (elf32_arm_finish_dynamic_symbol): Fix the loop that creates
++ non-shared VxWorks PLT entries.
++
++ ld/testsuite/
++ 2007-05-10 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-arm/vxworks1-lib.dd: Expect "push" instead of stmdb and
++ "pop" instead of ldmia. Don't require specific symbolic addresses
++ for in-text addresses. Expect data to be rendered as .words rather
++ than disassembled.
++ * ld-arm/vxworks1.dd: Likewise.
++
++2007-05-10 Richard Sandiford <richard@codesourcery.com>
++
++ Backport from mainline:
++
++ bfd/
++ 2007-05-10 Richard Sandiford <richard@codesourcery.com>
++
++ * elf.c (assign_file_positions_for_load_sections): Use p_memsz
++ rather than p_filesz to calculate the LMA of the end of a segment.
++
++ ld/testsuite/
++ 2007-05-10 Richard Sandiford <richard@codesourcery.com>
++
++ * ld-elf/multibss1.d, ld-elf/multibss1.s: New test.
++
++2007-05-10 Kazu Hirata <kazu@codesourcery.com>
++
++ Issue 1569
++ Backport from mainline:
++ bfd/
++ 2007-05-11 Alan Modra <amodra@bigpond.net.au>
++ PR 4454
++ * elf-eh-frame.c (struct cie): Make "personality" a bfd_vma.
++ (_bfd_elf_discard_section_eh_frame): Handle local syms on
++ personality relocation.
++
++2007-05-09 Nathan Sidwell <nathan@codesourcery.com>
++
++ * release-notes-csl.xml: Document fix.
++
++ opcodes/
++ * m68k-opc.c (m68k_opcodes): Add wdebugl variants.
++
++2007-05-09 Kazu Hirata <kazu@codesourcery.com>
++
++ * release-notes-csl.xml: Insert a blank line before the first
++ release note fragment.
++
++2007-05-04 Mark Shinwell <shinwell@codesourcery.com>
++
++ * release-notes-csl.xml (ARM EABI compliance): New.
++
++ gas/
++ * config/te-armeabi.h (EABI_DEFAULT): Use EF_ARM_EABI_VER5.
++ * config/te-armlinuxeabi.h (EABI_DEFAULT): Likewise.
++
++2007-05-04 Kazu Hirata <kazu@codesourcery.com>
++
++ Backport from mainline:
++ gas/testsuite/
++ * gas/m68k/all.exp: Skip fmoveml on fido.
++
++2007-05-04 Mark Shinwell <shinwell@codesourcery.com>
++
++ binutils/testsuite/
++ * binutils-all/strip-3.d: Strip .ARM.attributes section.
++
++2007-05-04 Mark Shinwell <shinwell@codesourcery.com>
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-04-20 Mark Shinwell <shinwell@codesourcery.com>
++
++ * release-notes-csl.xml (Conditional Thumb-2 branch
++ instructions): New.
++
++ bfd/
++ * elf32-arm.c (elf32_arm_final_link_relocate): Correctly
++ handle the Thumb-2 JUMP19 relocation.
++
++ ld/testsuite/
++ * ld-arm/arm-elf.exp: Add jump19 testcase.
++ * ld-arm/jump19.d: New.
++ * ld-arm/jump19.s: New.
++
++2007-05-04 Mark Shinwell <shinwell@codesourcery.com>
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-04-20 Mark Shinwell <shinwell@codesourcery.com>
++
++ * release-notes-csl.xml (Linking of non-ELF images): New.
++
++ bfd/
++ * elf32-arm.c (bfd_elf32_arm_vfp11_erratum_scan): Don't
++ attempt to scan if the bfd doesn't correspond to an ELF image.
++ (bfd_elf32_arm_vfp11_fix_veneer_locations): Likewise.
++
++2007-05-03 Mark Shinwell <shinwell@codesourcery.com>
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-04-27 Mark Shinwell <shinwell@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (md_apply_fix): Generate more accurate
++ diagnostic when 8-bit immediate range is exceeded for
++ BFD_RELOC_ARM_OFFSET_IMM8.
++
++2007-05-03 Sandra Loosemore <sandra@codesourcery.com>
++
++ bfd/
++ * elf32-arm.c (allocate_dynrelocs): Fix typo in comment.
++
++2007-05-03 Paul Brook <paul@codesourcery.com>
++
++ Merge from CSL-2.17 branch.
++ 2007-04-17 Paul Brook <paul@codesourcery.com>
++ gas/
++ * config/tc-arm.c (arm_ext_msr): New variable.
++ (md_assemble): Allow v6-M 32-bit instructions without requiring
++ Thumb-2.
++ (insns): Use arm_ext_msr for Thumb MSR and MRS.
++ (cpu_arch): Add V6M. Fix numbering of V6K and V6T2.
++ gas/testsuite/
++ * gas/arm/archv6m.d: New test.
++ * gas/arm/archv6m.s: New test.
++ include/opcode/
++ * arm.h (ARM_EXT_THUMB_MSR): Define.
++ (ARM_AEXT_V6T2, ARM_AEXT_V6M): Use it.
++
++ 2006-12-15 Paul Brook <paul@codesourcery.com>
++ gas/
++ * config/tc-arm.c (arm_ext_barrier, arm_ext_m): New.
++ (do_t_mrs): Use arm_ext_m.
++ (insns): Allow dmb, dsb and isb on ARMv6-M.
++ (arm_cpu_option_table): Add cortex-m1.
++ (arm_arch_option_table): Add armv6-m.
++ (aeabi_set_public_attributes): Use arm_ext_m.
++ include/
++ * opcode/arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_AEXT_V6M,
++ ARM_ARCH_V6M): Define.
++ (ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Include ARM_EXT_BARRIER.
++
++2007-04-27 Mark Shinwell <shinwell@codesourcery.com>
++
++ * release-notes-csl.xml (The \@ assembler pseudo-variable):
++ New.
++
++ gas/
++ * app.c (do_scrub_chars): Don't damage \@ pseudo-variables.
++
++ gas/testsuite/
++ * gas/arm/backslash-at.d: New.
++ * gas/arm/backslash-at.s: New.
++
++2007-04-25 Mark Mitchell <mark@codesourcery.com>
++
++ libiberty/
++ * cygpath.c (<process.h>): Include it.
++ (cygpath_log): New variable.
++ (cygpath_log_msg_arg): New function.
++ (cygpath_log_msg): Likewise.
++ (cygpath_perror): Likewise.
++ (cygpath_close): Declare as prototyped function. Close the log
++ file.
++ (cygpath): Log interaction with cygpath. If cygpath dies
++ unexpectedly, restart it.
++ (set_errno_from_windows_code): Avoid signed/unsigned comparison.
++
++2007-04-23 Joseph Myers <joseph@codesourcery.com>
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-01-24 Joseph Myers <joseph@codesourcery.com>
++ bfd/
++ * config.bfd (mips*el-*-linux*, mips*-*-linux*): Remove
++ ecoff_little_vec and ecoff_big_vec.
++
++2007-04-23 Sandra Loosemore <sandra@codesourcery.com>
++
++ * release-notes-csl.xml (Binutils update): New.
++
++2007-04-23 Richard Sandiford <richard@codesourcery.com>
++
++ gas/testsuite/
++ * gas/mips/ulh3.s, gas/mips/ulh3-el.d, gas/mips/ulh3-eb.d,
++ * gas/mips/octeon1.s, gas/mips/octeon1.l, gas/mips/octeon2.s,
++ * gas/mips/octeon2-un.d, gas/mips/octeon2-noun.d,
++ * gas/mips/octeon2-mix.d, gas/mips/octeon3.s,
++ * gas/mips/octeon3.d: New tests.
++ * gas/mips/mips.exp: Run them. Don't run ulh2 on mips32r2 targets.
++
++2007-04-23 Richard Sandiford <richard@codesourcery.com>
++
++ Adapted from a patch by Cavium Networks.
++
++ include/elf/
++ * mips.h (E_MIPS_MACH_OCTEON): New macro.
++
++ include/opcode/
++ * mips.h: Document '^', ';' and 'y'.
++ (OP_MASK_BITIND, OP_SH_BITIND): New macros.
++ (INSN_OCTEON, CPU_OCTEON): Likewise.
++ (OPCODE_IS_MEMBER): Handle CPU_OCTEON.
++
++ bfd/
++ * archures.c (bfd_mach_mips_octeon): Define.
++ * bfd-in2.h: Regenerate.
++ * cpu-mips.c (I_mipsocteon): Define.
++ (arch_info_struct): Add a "mips:octeon" entry.
++ * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_OCTEON.
++ (mips_set_isa_flags): Handle bfd_mach_mips_octeon.
++ (mips_mach_extensions): List bfd_mach_mips_octeon as an extension
++ of bfd_mach_mipsisa64.
++
++ binutils/
++ * readelf.c (get_machine_flags): Handle E_MIPS_MACH_OCTEON.
++
++ opcodes/
++ * mips-dis.c (octeon_use_unalign): New variable.
++ (mips_cp0_names_octeon, mips_cp0sel_names_octeon): New tables.
++ (mips_arch_choices): Add an octeon entry.
++ (parse_mips_dis_option): Handle octeon-useun and no-octeon-useun.
++ (print_insn_args): Handle '^' and 'y'.
++ (print_insn_mips): Skip aliases of uld, ulw, usd and usw when
++ unaligned octeon instructions are allowed. Print ldr, lwr,
++ sdr and swr as nops in that case.
++ (print_mips_disassembler_options): Print help for octeon-useun and
++ no-octeon-useun.
++ * mips-opc.c (IOCTEON): Define.
++ (mips_builtin_opcodes): Add Octeon baddu, bbit032, bbit0, bbit132,
++ bbit1, cins32, cins, dmul, dpop, exts32, exts, exts, mtm0, mtm1,
++ mtm2, mtp0, mtp1, mtp2, pop, seq, seqi, sne, snei, syncio,
++ synciobdma, syncioall, syncs, syncw, syncws, uld, ulw, usd, usw,
++ v3mulu, vmm0, vmulu, dmfc2 and dmtc2 instructions.
++
++ gas/
++ * config/tc-mips.c (octeon_use_unalign): New variable.
++ (ISA_HAS_INS): New macro.
++ (CPU_HAS_DROR): Return true for CPU_OCTEON.
++ (CPU_HAS_INS): New macro.
++ (macro_build): Handle '^' and 'y'.
++ (macro2): Try to use "ins" instead of "sll" and "or" in the
++ implementation of ulh and ulhu. Treat uld, ulw, usd and usw
++ as normal stores if the Octeon unaligned instructions are allowed.
++ (validate_mips_insn): Handle '^', ';' and 'y'.
++ (mips_ip): Ignore the uld, ulw, usd and usw hardware instructions
++ unless they have been enabled. Refuse to assemble left/right stores
++ when uld, ulw, usd and usw are enabled. Handle '^', ';' and 'y'.
++ (OPTION_OCTEON_UNALIGNED, OPTION_NO_OCTEON_UNALIGNED): New macros.
++ (OPTION_ELF_BASE): Bump by two.
++ (md_longopts): Add -mocteon-useun and -mno-octeon-useun.
++ (md_parse_option): Handle them.
++ (mips_cpu_info_table): Add an "octeon" entry.
++ (md_show_usage): Mention -mocteon-useun and -mno-octeon-useun.
++
++2007-04-22 Mark Shinwell <shinwell@codesourcery.com>
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-02-02 Mark Shinwell <shinwell@codesourcery.com>
++
++ gas/
++ * config/tc-arm.c (arm_ext_marvell_f): New.
++ (do_marvell_div): New.
++ (insns): Add entries for Marvell-specific sdiv and udiv encodings.
++ (arm_cpu_option_table): Add marvell-f entry.
++ (arm_arch_option_table): Add marvell-f entry.
++ * include/opcode/arm.h (ARM_CEXT_MARVELL_F): New.
++ (ARM_ARCH_MARVELL_F): New.
++
++ gas/testsuite/
++ * gas/arm/marvell-f-div.d: New.
++ * gas/arm/marvell-f-div.s: New.
++
++ 2007-01-03 Mark Shinwell <shinwell@codesourcery.com>
++
++ NOT ASSIGNED TO FSF
++ Port from Marvell compiler:
++ gas/
++ * config/tc-arm.c (arm_cpus): Add marvell-f entry.
++
++2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/testsuite/
++ * gas/m68k/br-isaa.s: New.
++ * gas/m68k/br-isaa.d: New.
++ * gas/m68k/br-isab.s: New.
++ * gas/m68k/br-isab.d: New.
++ * gas/m68k/br-isac.s: New.
++ * gas/m68k/br-isac.d: New.
++ * gas/m68k/all.exp: Adjust.
++
++ gas/
++ * config/tc-m68k.c (mcf54455_ctrl): New.
++ (HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
++ (m68k_archs): Add isac.
++ (m68k_cpus): Add 54455 family.
++ (m68k_ip): Split Bg into Bb, Bs, Bg.
++ (m68k_elf_final_processing): Add ISA_C.
++ * doc/c-m68k.texi (M680x0 Options): Add isac.
++
++ include/opcode/
++ * m68k.h (mcfisa_c): New.
++ (mcfusp, mcf_mask): Adjust.
++
++ bfd/
++ * archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
++ bfd_mach_mcf_isa_c_emac): New.
++ * elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
++ elf_isac_plt_entry, elf_isac_plt_info): New.
++ (elf32_m68k_object_p): Add ISA_C.
++ (elf32_m68k_print_private_bfd_data): Print ISA_C.
++ (elf32_m68k_get_plt_info): Detect ISA_C.
++ * cpu-m68k.c (arch_info): Add ISAC.
++ (m68k_arch_features): Likewise,
++ (bfd_m68k_compatible): ISAs B & C are not compatible.
++
++ opcodes/
++ * m68k-opc.c: Mark mcfisa_c instructions.
++
++2007-04-20 Joseph Myers <joseph@codesourcery.com>
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-03-20 Joseph Myers <joseph@codesourcery.com>
++ Based on patch by Mark Hatle <mark.hatle@windriver.com>.
++ ld/
++ * configure.in (--enable-poison-system-directories): New option.
++ * configure, config.in: Regenerate.
++ * ldfile.c (ldfile_add_library_path): If
++ ENABLE_POISON_SYSTEM_DIRECTORIES defined, warn for use of /lib,
++ /usr/lib, /usr/local/lib or /usr/X11R6/lib.
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-03-22 Julian Brown <julian@codesourcery.com>
++ bfd/
++ * elf32-arm.c (bfd_elf32_arm_set_vfp11_fix): Default to fixing for
++ scalar code on pre-ARMv7.
++ ld/
++ * ld.texinfo: Document this default.
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-03-23 Richard Sandiford <richard@codesourcery.com>
++ bfd/
++ From Phil Edwards <phil@codesourcery.com>:
++ * cache.c (bfd_cache_delete): Work around ClearCase bug.
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2006-04-12 Carlos O'Donell <carlos@codesourcery.com>
++ * Makefile.tpl: Add install-html to install target deps.
++ * Makefile.in: Regenerate.
++
++2007-04-20 Mark Mitchell <mark@codesourcery.com>
++ Vladimir Prus <vladimir@codesourcery.com>
++ Carlos O'Donell <carlos@codesourcery.com>
++ Joseph Myers <joseph@codesourcery.com>
++
++ libiberty/
++ * configure.ac: Add cygpath for mingw hosts.
++ * configure: Rebuilt.
++ * Makefile.in: Add cygpath.
++ * cygpath.c: New.
++
++2007-04-20 Joseph Myers <joseph@codesourcery.com>
++
++ Merge from Sourcery G++ binutils 2.17:
++
++ 2007-03-01 Joseph Myers <joseph@codesourcery.com>
++ gas/
++ * configure.in (mips64el-sicortex-linux-gnu): Set
++ mips_default_abi=N64_ABI.
++ * configure: Regenerate.
++
++ 2007-02-20 Carlos O'Donell <carlos@codesourcery.com>
++ Issue #1271
++ ld/
++ * configure.tgt (mips64el-sicortex-linux-gnu): Set targ_emul to
++ elf64ltsmip, and set targ_extra_emuls appropriately.
++
++2007-04-20 Nathan Sidwell <nathan@codesourcery.com>
++
++ gas/
++ * config/tc-m68k.c (mcf5253_ctrl): New.
++ (mcf52223_ctrl): New.
++ (m68k_cpus): Add 5253, 52221, 52223.
++
++ gas/
++ * config/m68k-parse.h (RAMBAR_ALT): New.
++ * config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New.
++ (mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl,
++ mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl,
++ mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl,
++ mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for
++ RAMBAR1.
++ (mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT.
++ (m68k_cpus): Adjust 5206, 5206e & 5307 entries.
++ (m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used. Add it
++ to control register mapping.
++
++ gas/testsuite/
++ * gas/m68k/ctrl-1.d, gas/m68k/ctrl-1.s: New.
++ * gas/m68k/ctrl-2.d, gas/m68k/ctrl-2.s: New.
++ * gas/m68k/all.exp: Add them.
++
++ opcodes/
++ * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
++ rambar1.
++
++\f
++Local Variables:
++mode: change-log
++change-log-default-name: "ChangeLog.csl"
++End:
+--- a/Makefile.def
++++ b/Makefile.def
+@@ -128,6 +128,7 @@ host_modules= { module= libtermcap; no_c
+ missing=distclean;
+ missing=maintainer-clean; };
+ host_modules= { module= utils; no_check=true; };
++host_modules= { module= convert; no_check=true; };
+ host_modules= { module= gnattools; };
+
+ target_modules = { module= libstdc++-v3; lib_path=.libs; raw_cxx=true; };
+@@ -485,6 +486,9 @@ dependencies = { module=all-send-pr; on=
+ dependencies = { module=all-tar; on=all-build-texinfo; };
+ dependencies = { module=all-uudecode; on=all-build-texinfo; };
+
++// MIPS special
++dependencies = { module=all-convert; on=all-libiberty; };
++
+ // Target modules. These can also have dependencies on the language
+ // environment (e.g. on libstdc++). By default target modules depend
+ // on libgcc and newlib/libgloss.
+--- a/Makefile.in
++++ b/Makefile.in
+@@ -744,6 +744,7 @@ configure-host: \
+ maybe-configure-tk \
+ maybe-configure-libtermcap \
+ maybe-configure-utils \
++ maybe-configure-convert \
+ maybe-configure-gnattools
+ .PHONY: configure-target
+ configure-target: \
+@@ -903,6 +904,7 @@ all-host: maybe-all-guile
+ all-host: maybe-all-tk
+ all-host: maybe-all-libtermcap
+ all-host: maybe-all-utils
++all-host: maybe-all-convert
+ all-host: maybe-all-gnattools
+
+ .PHONY: all-target
+@@ -1019,6 +1021,7 @@ info-host: maybe-info-guile
+ info-host: maybe-info-tk
+ info-host: maybe-info-libtermcap
+ info-host: maybe-info-utils
++info-host: maybe-info-convert
+ info-host: maybe-info-gnattools
+
+ .PHONY: info-target
+@@ -1128,6 +1131,7 @@ dvi-host: maybe-dvi-guile
+ dvi-host: maybe-dvi-tk
+ dvi-host: maybe-dvi-libtermcap
+ dvi-host: maybe-dvi-utils
++dvi-host: maybe-dvi-convert
+ dvi-host: maybe-dvi-gnattools
+
+ .PHONY: dvi-target
+@@ -1237,6 +1241,7 @@ pdf-host: maybe-pdf-guile
+ pdf-host: maybe-pdf-tk
+ pdf-host: maybe-pdf-libtermcap
+ pdf-host: maybe-pdf-utils
++pdf-host: maybe-pdf-convert
+ pdf-host: maybe-pdf-gnattools
+
+ .PHONY: pdf-target
+@@ -1346,6 +1351,7 @@ html-host: maybe-html-guile
+ html-host: maybe-html-tk
+ html-host: maybe-html-libtermcap
+ html-host: maybe-html-utils
++html-host: maybe-html-convert
+ html-host: maybe-html-gnattools
+
+ .PHONY: html-target
+@@ -1455,6 +1461,7 @@ TAGS-host: maybe-TAGS-guile
+ TAGS-host: maybe-TAGS-tk
+ TAGS-host: maybe-TAGS-libtermcap
+ TAGS-host: maybe-TAGS-utils
++TAGS-host: maybe-TAGS-convert
+ TAGS-host: maybe-TAGS-gnattools
+
+ .PHONY: TAGS-target
+@@ -1564,6 +1571,7 @@ install-info-host: maybe-install-info-gu
+ install-info-host: maybe-install-info-tk
+ install-info-host: maybe-install-info-libtermcap
+ install-info-host: maybe-install-info-utils
++install-info-host: maybe-install-info-convert
+ install-info-host: maybe-install-info-gnattools
+
+ .PHONY: install-info-target
+@@ -1673,6 +1681,7 @@ install-pdf-host: maybe-install-pdf-guil
+ install-pdf-host: maybe-install-pdf-tk
+ install-pdf-host: maybe-install-pdf-libtermcap
+ install-pdf-host: maybe-install-pdf-utils
++install-pdf-host: maybe-install-pdf-convert
+ install-pdf-host: maybe-install-pdf-gnattools
+
+ .PHONY: install-pdf-target
+@@ -1782,6 +1791,7 @@ install-html-host: maybe-install-html-gu
+ install-html-host: maybe-install-html-tk
+ install-html-host: maybe-install-html-libtermcap
+ install-html-host: maybe-install-html-utils
++install-html-host: maybe-install-html-convert
+ install-html-host: maybe-install-html-gnattools
+
+ .PHONY: install-html-target
+@@ -1891,6 +1901,7 @@ installcheck-host: maybe-installcheck-gu
+ installcheck-host: maybe-installcheck-tk
+ installcheck-host: maybe-installcheck-libtermcap
+ installcheck-host: maybe-installcheck-utils
++installcheck-host: maybe-installcheck-convert
+ installcheck-host: maybe-installcheck-gnattools
+
+ .PHONY: installcheck-target
+@@ -2000,6 +2011,7 @@ mostlyclean-host: maybe-mostlyclean-guil
+ mostlyclean-host: maybe-mostlyclean-tk
+ mostlyclean-host: maybe-mostlyclean-libtermcap
+ mostlyclean-host: maybe-mostlyclean-utils
++mostlyclean-host: maybe-mostlyclean-convert
+ mostlyclean-host: maybe-mostlyclean-gnattools
+
+ .PHONY: mostlyclean-target
+@@ -2109,6 +2121,7 @@ clean-host: maybe-clean-guile
+ clean-host: maybe-clean-tk
+ clean-host: maybe-clean-libtermcap
+ clean-host: maybe-clean-utils
++clean-host: maybe-clean-convert
+ clean-host: maybe-clean-gnattools
+
+ .PHONY: clean-target
+@@ -2218,6 +2231,7 @@ distclean-host: maybe-distclean-guile
+ distclean-host: maybe-distclean-tk
+ distclean-host: maybe-distclean-libtermcap
+ distclean-host: maybe-distclean-utils
++distclean-host: maybe-distclean-convert
+ distclean-host: maybe-distclean-gnattools
+
+ .PHONY: distclean-target
+@@ -2327,6 +2341,7 @@ maintainer-clean-host: maybe-maintainer-
+ maintainer-clean-host: maybe-maintainer-clean-tk
+ maintainer-clean-host: maybe-maintainer-clean-libtermcap
+ maintainer-clean-host: maybe-maintainer-clean-utils
++maintainer-clean-host: maybe-maintainer-clean-convert
+ maintainer-clean-host: maybe-maintainer-clean-gnattools
+
+ .PHONY: maintainer-clean-target
+@@ -2490,6 +2505,7 @@ check-host: \
+ maybe-check-tk \
+ maybe-check-libtermcap \
+ maybe-check-utils \
++ maybe-check-convert \
+ maybe-check-gnattools
+
+ .PHONY: check-target
+@@ -2625,6 +2641,7 @@ install-host-nogcc: \
+ maybe-install-tk \
+ maybe-install-libtermcap \
+ maybe-install-utils \
++ maybe-install-convert \
+ maybe-install-gnattools
+
+ .PHONY: install-host
+@@ -2701,6 +2718,7 @@ install-host: \
+ maybe-install-tk \
+ maybe-install-libtermcap \
+ maybe-install-utils \
++ maybe-install-convert \
+ maybe-install-gnattools
+
+ .PHONY: install-target
+@@ -42242,6 +42260,424 @@ maintainer-clean-utils:
+
+
+
++.PHONY: configure-convert maybe-configure-convert
++maybe-configure-convert:
++@if gcc-bootstrap
++configure-convert: stage_current
++@endif gcc-bootstrap
++@if convert
++maybe-configure-convert: configure-convert
++configure-convert:
++ @: $(MAKE); $(unstage)
++ @r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ test ! -f $(HOST_SUBDIR)/convert/Makefile || exit 0; \
++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/convert ; \
++ $(HOST_EXPORTS) \
++ echo Configuring in $(HOST_SUBDIR)/convert; \
++ cd "$(HOST_SUBDIR)/convert" || exit 1; \
++ case $(srcdir) in \
++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++ *) topdir=`echo $(HOST_SUBDIR)/convert/ | \
++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++ esac; \
++ srcdiroption="--srcdir=$${topdir}/convert"; \
++ libsrcdir="$$s/convert"; \
++ $(SHELL) $${libsrcdir}/configure \
++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
++ --target=${target_alias} $${srcdiroption} \
++ || exit 1
++@endif convert
++
++
++
++
++
++.PHONY: all-convert maybe-all-convert
++maybe-all-convert:
++@if gcc-bootstrap
++all-convert: stage_current
++@endif gcc-bootstrap
++@if convert
++TARGET-convert=all
++maybe-all-convert: all-convert
++all-convert: configure-convert
++ @: $(MAKE); $(unstage)
++ @r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(FLAGS_TO_PASS) $(TARGET-convert))
++@endif convert
++
++
++
++
++.PHONY: check-convert maybe-check-convert
++maybe-check-convert:
++@if convert
++maybe-check-convert: check-convert
++
++check-convert:
++
++@endif convert
++
++.PHONY: install-convert maybe-install-convert
++maybe-install-convert:
++@if convert
++maybe-install-convert: install-convert
++
++install-convert: installdirs
++ @: $(MAKE); $(unstage)
++ @r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(FLAGS_TO_PASS) install)
++
++@endif convert
++
++# Other targets (info, dvi, pdf, etc.)
++
++.PHONY: maybe-info-convert info-convert
++maybe-info-convert:
++@if convert
++maybe-info-convert: info-convert
++
++info-convert: \
++ configure-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing info in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ info) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-dvi-convert dvi-convert
++maybe-dvi-convert:
++@if convert
++maybe-dvi-convert: dvi-convert
++
++dvi-convert: \
++ configure-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing dvi in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ dvi) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-pdf-convert pdf-convert
++maybe-pdf-convert:
++@if convert
++maybe-pdf-convert: pdf-convert
++
++pdf-convert: \
++ configure-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing pdf in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ pdf) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-html-convert html-convert
++maybe-html-convert:
++@if convert
++maybe-html-convert: html-convert
++
++html-convert: \
++ configure-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing html in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ html) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-TAGS-convert TAGS-convert
++maybe-TAGS-convert:
++@if convert
++maybe-TAGS-convert: TAGS-convert
++
++TAGS-convert: \
++ configure-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing TAGS in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ TAGS) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-install-info-convert install-info-convert
++maybe-install-info-convert:
++@if convert
++maybe-install-info-convert: install-info-convert
++
++install-info-convert: \
++ configure-convert \
++ info-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing install-info in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ install-info) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-install-pdf-convert install-pdf-convert
++maybe-install-pdf-convert:
++@if convert
++maybe-install-pdf-convert: install-pdf-convert
++
++install-pdf-convert: \
++ configure-convert \
++ pdf-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing install-pdf in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ install-pdf) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-install-html-convert install-html-convert
++maybe-install-html-convert:
++@if convert
++maybe-install-html-convert: install-html-convert
++
++install-html-convert: \
++ configure-convert \
++ html-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing install-html in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ install-html) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-installcheck-convert installcheck-convert
++maybe-installcheck-convert:
++@if convert
++maybe-installcheck-convert: installcheck-convert
++
++installcheck-convert: \
++ configure-convert
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing installcheck in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ installcheck) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-mostlyclean-convert mostlyclean-convert
++maybe-mostlyclean-convert:
++@if convert
++maybe-mostlyclean-convert: mostlyclean-convert
++
++mostlyclean-convert:
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing mostlyclean in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ mostlyclean) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-clean-convert clean-convert
++maybe-clean-convert:
++@if convert
++maybe-clean-convert: clean-convert
++
++clean-convert:
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing clean in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ clean) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-distclean-convert distclean-convert
++maybe-distclean-convert:
++@if convert
++maybe-distclean-convert: distclean-convert
++
++distclean-convert:
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing distclean in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ distclean) \
++ || exit 1
++
++@endif convert
++
++.PHONY: maybe-maintainer-clean-convert maintainer-clean-convert
++maybe-maintainer-clean-convert:
++@if convert
++maybe-maintainer-clean-convert: maintainer-clean-convert
++
++maintainer-clean-convert:
++ @: $(MAKE); $(unstage)
++ @[ -f ./convert/Makefile ] || exit 0; \
++ r=`${PWD_COMMAND}`; export r; \
++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++ $(HOST_EXPORTS) \
++ for flag in $(EXTRA_HOST_FLAGS) ; do \
++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++ done; \
++ echo "Doing maintainer-clean in convert" ; \
++ (cd $(HOST_SUBDIR)/convert && \
++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++ "RANLIB=$${RANLIB}" \
++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++ maintainer-clean) \
++ || exit 1
++
++@endif convert
++
++
++
+ .PHONY: configure-gnattools maybe-configure-gnattools
+ maybe-configure-gnattools:
+ @if gcc-bootstrap
+@@ -55724,6 +56160,7 @@ all-sed: maybe-all-build-texinfo
+ all-send-pr: maybe-all-prms
+ all-tar: maybe-all-build-texinfo
+ all-uudecode: maybe-all-build-texinfo
++all-convert: maybe-all-libiberty
+ configure-target-boehm-gc: maybe-configure-target-qthreads
+ configure-target-boehm-gc: maybe-all-target-libstdc++-v3
+ configure-target-fastjar: maybe-configure-target-zlib
+--- a/bfd/aout-adobe.c
++++ b/bfd/aout-adobe.c
+@@ -467,6 +467,8 @@ aout_adobe_sizeof_headers (bfd *ignore_a
+ #define aout_32_bfd_link_hash_table_free _bfd_generic_link_hash_table_free
+ #define aout_32_bfd_link_add_symbols _bfd_generic_link_add_symbols
+ #define aout_32_bfd_link_just_syms _bfd_generic_link_just_syms
++#define aout_32_bfd_copy_link_hash_symbol_type \
++ _bfd_generic_copy_link_hash_symbol_type
+ #define aout_32_bfd_final_link _bfd_generic_final_link
+ #define aout_32_bfd_link_split_section _bfd_generic_link_split_section
+
+--- a/bfd/aout-target.h
++++ b/bfd/aout-target.h
+@@ -520,6 +520,10 @@ MY_bfd_final_link (bfd *abfd, struct bfd
+ #ifndef MY_bfd_link_just_syms
+ #define MY_bfd_link_just_syms _bfd_generic_link_just_syms
+ #endif
++#ifndef MY_bfd_copy_link_hash_symbol_type
++#define MY_bfd_copy_link_hash_symbol_type \
++ _bfd_generic_copy_link_hash_symbol_type
++#endif
+ #ifndef MY_bfd_link_split_section
+ #define MY_bfd_link_split_section _bfd_generic_link_split_section
+ #endif
+--- a/bfd/aout-tic30.c
++++ b/bfd/aout-tic30.c
+@@ -977,6 +977,10 @@ tic30_aout_set_arch_mach (bfd *abfd,
+ #ifndef MY_bfd_link_just_syms
+ #define MY_bfd_link_just_syms _bfd_generic_link_just_syms
+ #endif
++#ifndef MY_bfd_copy_link_hash_symbol_type
++#define MY_bfd_copy_link_hash_symbol_type \
++ _bfd_generic_copy_link_hash_symbol_type
++#endif
+ #ifndef MY_bfd_link_split_section
+ #define MY_bfd_link_split_section _bfd_generic_link_split_section
+ #endif
+--- a/bfd/bfd-in.h
++++ b/bfd/bfd-in.h
+@@ -821,10 +821,19 @@ extern void bfd_elf32_arm_init_maps
+ extern void bfd_elf32_arm_set_vfp11_fix
+ (bfd *, struct bfd_link_info *);
+
++extern void bfd_elf32_arm_validate_janus_2cc_fix
++ (bfd *, struct bfd_link_info *);
++
++extern void bfd_elf32_arm_set_cortex_a8_fix
++ (bfd *, struct bfd_link_info *);
++
+ extern bfd_boolean bfd_elf32_arm_vfp11_erratum_scan
+ (bfd *, struct bfd_link_info *);
+
+-extern void bfd_elf32_arm_vfp11_fix_veneer_locations
++extern bfd_boolean bfd_elf32_arm_janus_2cc_erratum_scan
++ (bfd *, struct bfd_link_info *);
++
++extern void bfd_elf32_arm_fix_veneer_locations
+ (bfd *, struct bfd_link_info *);
+
+ /* ARM Interworking support. Called from linker. */
+@@ -856,7 +865,7 @@ extern bfd_boolean bfd_elf32_arm_process
+
+ void bfd_elf32_arm_set_target_relocs
+ (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix,
+- int, int, int);
++ int, int, int, int, int);
+
+ extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+@@ -894,7 +903,11 @@ extern bfd_boolean elf32_arm_size_stubs
+ struct bfd_section * (*) (const char *, struct bfd_section *), void (*) (void));
+ extern bfd_boolean elf32_arm_build_stubs
+ (struct bfd_link_info *);
+-
++
++/* ARM unwind section editing support. */
++extern bfd_boolean elf32_arm_fix_exidx_coverage
++ (struct bfd_section **, unsigned int, struct bfd_link_info *);
++
+ /* TI COFF load page support. */
+ extern void bfd_ticoff_set_section_load_page
+ (struct bfd_section *, int);
+--- a/bfd/bfd-in2.h
++++ b/bfd/bfd-in2.h
+@@ -828,10 +828,19 @@ extern void bfd_elf32_arm_init_maps
+ extern void bfd_elf32_arm_set_vfp11_fix
+ (bfd *, struct bfd_link_info *);
+
++extern void bfd_elf32_arm_validate_janus_2cc_fix
++ (bfd *, struct bfd_link_info *);
++
++extern void bfd_elf32_arm_set_cortex_a8_fix
++ (bfd *, struct bfd_link_info *);
++
+ extern bfd_boolean bfd_elf32_arm_vfp11_erratum_scan
+ (bfd *, struct bfd_link_info *);
+
+-extern void bfd_elf32_arm_vfp11_fix_veneer_locations
++extern bfd_boolean bfd_elf32_arm_janus_2cc_erratum_scan
++ (bfd *, struct bfd_link_info *);
++
++extern void bfd_elf32_arm_fix_veneer_locations
+ (bfd *, struct bfd_link_info *);
+
+ /* ARM Interworking support. Called from linker. */
+@@ -863,7 +872,7 @@ extern bfd_boolean bfd_elf32_arm_process
+
+ void bfd_elf32_arm_set_target_relocs
+ (bfd *, struct bfd_link_info *, int, char *, int, int, bfd_arm_vfp11_fix,
+- int, int, int);
++ int, int, int, int, int);
+
+ extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
+ (bfd *, struct bfd_link_info *);
+@@ -901,7 +910,11 @@ extern bfd_boolean elf32_arm_size_stubs
+ struct bfd_section * (*) (const char *, struct bfd_section *), void (*) (void));
+ extern bfd_boolean elf32_arm_build_stubs
+ (struct bfd_link_info *);
+-
++
++/* ARM unwind section editing support. */
++extern bfd_boolean elf32_arm_fix_exidx_coverage
++ (struct bfd_section **, unsigned int, struct bfd_link_info *);
++
+ /* TI COFF load page support. */
+ extern void bfd_ticoff_set_section_load_page
+ (struct bfd_section *, int);
+@@ -5406,6 +5419,7 @@ typedef struct bfd_target
+ NAME##_bfd_link_hash_table_free, \
+ NAME##_bfd_link_add_symbols, \
+ NAME##_bfd_link_just_syms, \
++ NAME##_bfd_copy_link_hash_symbol_type, \
+ NAME##_bfd_final_link, \
+ NAME##_bfd_link_split_section, \
+ NAME##_bfd_gc_sections, \
+@@ -5436,6 +5450,12 @@ typedef struct bfd_target
+ /* Indicate that we are only retrieving symbol values from this section. */
+ void (*_bfd_link_just_syms) (asection *, struct bfd_link_info *);
+
++ /* Copy the symbol type of a linker hash table entry. */
++#define bfd_copy_link_hash_symbol_type(b, t, f) \
++ BFD_SEND (b, _bfd_copy_link_hash_symbol_type, (b, t, f))
++ void (*_bfd_copy_link_hash_symbol_type)
++ (bfd *, struct bfd_link_hash_entry *, struct bfd_link_hash_entry *);
++
+ /* Do a link based on the link_order structures attached to each
+ section of the BFD. */
+ bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *);
+--- a/bfd/binary.c
++++ b/bfd/binary.c
+@@ -319,6 +319,8 @@ binary_sizeof_headers (bfd *abfd ATTRIBU
+ #define binary_bfd_link_hash_table_create _bfd_generic_link_hash_table_create
+ #define binary_bfd_link_hash_table_free _bfd_generic_link_hash_table_free
+ #define binary_bfd_link_just_syms _bfd_generic_link_just_syms
++#define binary_bfd_copy_link_hash_symbol_type \
++ _bfd_generic_copy_link_hash_symbol_type
+ #define binary_bfd_link_add_symbols _bfd_generic_link_add_symbols
+ #define binary_bfd_final_link _bfd_generic_final_link
+ #define binary_bfd_link_split_section _bfd_generic_link_split_section
+--- a/bfd/bout.c
++++ b/bfd/bout.c
+@@ -1382,6 +1382,8 @@ b_out_bfd_get_relocated_section_contents
+ #define b_out_bfd_link_hash_table_free _bfd_generic_link_hash_table_free
+ #define b_out_bfd_link_add_symbols _bfd_generic_link_add_symbols
+ #define b_out_bfd_link_just_syms _bfd_generic_link_just_syms
++#define b_out_bfd_copy_link_hash_symbol_type \
++ _bfd_generic_copy_link_hash_symbol_type
+ #define b_out_bfd_final_link _bfd_generic_final_link
+ #define b_out_bfd_link_split_section _bfd_generic_link_split_section
+ #define b_out_bfd_gc_sections bfd_generic_gc_sections
+--- a/bfd/cache.c
++++ b/bfd/cache.c
+@@ -120,6 +120,13 @@ bfd_cache_delete (bfd *abfd)
+
+ if (fclose ((FILE *) abfd->iostream) == 0)
+ ret = TRUE;
++ /* ClearCase has an entertaining bug where close will fail and set
++ errno to EROFS when applied to any file in a read-only view, even
++ if the file was opened for reading. Detect this situation and
++ ignore the error. */
++ else if (errno == EROFS && (abfd->direction == no_direction
++ || abfd->direction == read_direction))
++ ret = TRUE;
+ else
+ {
+ ret = FALSE;
+--- a/bfd/coff-arm.c
++++ b/bfd/coff-arm.c
+@@ -2208,7 +2208,7 @@ coff_arm_merge_private_bfd_data (bfd * i
+ {
+ _bfd_error_handler
+ /* xgettext: c-format */
+- (_("ERROR: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
++ (_("error: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"),
+ ibfd, obfd,
+ APCS_26_FLAG (ibfd) ? 26 : 32,
+ APCS_26_FLAG (obfd) ? 26 : 32
+@@ -2224,10 +2224,10 @@ coff_arm_merge_private_bfd_data (bfd * i
+
+ if (APCS_FLOAT_FLAG (ibfd))
+ /* xgettext: c-format */
+- msg = _("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers");
++ msg = _("error: %B passes floats in float registers, whereas %B passes them in integer registers");
+ else
+ /* xgettext: c-format */
+- msg = _("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers");
++ msg = _("error: %B passes floats in integer registers, whereas %B passes them in float registers");
+
+ _bfd_error_handler (msg, ibfd, obfd);
+
+@@ -2241,10 +2241,10 @@ coff_arm_merge_private_bfd_data (bfd * i
+
+ if (PIC_FLAG (ibfd))
+ /* xgettext: c-format */
+- msg = _("ERROR: %B is compiled as position independent code, whereas target %B is absolute position");
++ msg = _("error: %B is compiled as position independent code, whereas target %B is absolute position");
+ else
+ /* xgettext: c-format */
+- msg = _("ERROR: %B is compiled as absolute position code, whereas target %B is position independent");
++ msg = _("error: %B is compiled as absolute position code, whereas target %B is position independent");
+ _bfd_error_handler (msg, ibfd, obfd);
+
+ bfd_set_error (bfd_error_wrong_format);
+--- a/bfd/coff-rs6000.c
++++ b/bfd/coff-rs6000.c
+@@ -4212,6 +4212,7 @@ const bfd_target rs6000coff_vec =
+ _bfd_generic_link_hash_table_free,
+ _bfd_xcoff_bfd_link_add_symbols,
+ _bfd_generic_link_just_syms,
++ _bfd_generic_copy_link_hash_symbol_type,
+ _bfd_xcoff_bfd_final_link,
+ _bfd_generic_link_split_section,
+ bfd_generic_gc_sections,
+@@ -4464,6 +4465,7 @@ const bfd_target pmac_xcoff_vec =
+ _bfd_generic_link_hash_table_free,
+ _bfd_xcoff_bfd_link_add_symbols,
+ _bfd_generic_link_just_syms,
++ _bfd_generic_copy_link_hash_symbol_type,
+ _bfd_xcoff_bfd_final_link,
+ _bfd_generic_link_split_section,
+ bfd_generic_gc_sections,
+--- a/bfd/coff64-rs6000.c
++++ b/bfd/coff64-rs6000.c
+@@ -2762,6 +2762,7 @@ const bfd_target rs6000coff64_vec =
+ _bfd_generic_link_hash_table_free,
+ _bfd_xcoff_bfd_link_add_symbols,
+ _bfd_generic_link_just_syms,
++ _bfd_generic_copy_link_hash_symbol_type,
+ _bfd_xcoff_bfd_final_link,
+ _bfd_generic_link_split_section,
+ bfd_generic_gc_sections,
+@@ -3015,6 +3016,7 @@ const bfd_target aix5coff64_vec =
+ _bfd_generic_link_hash_table_free,
+ _bfd_xcoff_bfd_link_add_symbols,
+ _bfd_generic_link_just_syms,
++ _bfd_generic_copy_link_hash_symbol_type,
+ _bfd_xcoff_bfd_final_link,
+ _bfd_generic_link_split_section,
+ bfd_generic_gc_sections,
+--- a/bfd/coffcode.h
++++ b/bfd/coffcode.h
+@@ -5169,6 +5169,8 @@ dummy_reloc16_extra_cases (bfd *abfd ATT
+ #endif /* ! defined (coff_relocate_section) */
+
+ #define coff_bfd_link_just_syms _bfd_generic_link_just_syms
++#define coff_bfd_copy_link_hash_symbol_type \
++ _bfd_generic_copy_link_hash_symbol_type
+ #define coff_bfd_link_split_section _bfd_generic_link_split_section
+
+ #ifndef coff_start_final_link
+--- a/bfd/config.bfd
++++ b/bfd/config.bfd
+@@ -959,6 +959,10 @@ case "${targ}" in
+ targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
+ want64=true
+ ;;
++ mips64octeon*-*-elf*)
++ targ_defvec=bfd_elf32_tradbigmips_vec
++ targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
++ ;;
+ mips*el-*-elf* | mips*el-*-vxworks* | mips*-*-chorus*)
+ targ_defvec=bfd_elf32_littlemips_vec
+ targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
+@@ -1000,12 +1004,12 @@ case "${targ}" in
+ #endif
+ mips*el-*-linux*)
+ targ_defvec=bfd_elf32_tradlittlemips_vec
+- targ_selvecs="bfd_elf32_tradbigmips_vec ecoff_little_vec ecoff_big_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec"
++ targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec"
+ want64=true
+ ;;
+ mips*-*-linux*)
+ targ_defvec=bfd_elf32_tradbigmips_vec
+- targ_selvecs="bfd_elf32_tradlittlemips_vec ecoff_big_vec ecoff_little_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec"
++ targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec"
+ want64=true
+ ;;
+ #ifdef BFD64
+--- a/bfd/cpu-arm.c
++++ b/bfd/cpu-arm.c
+@@ -187,7 +187,7 @@ bfd_arm_merge_machines (bfd *ibfd, bfd *
+ || out == bfd_mach_arm_iWMMXt2))
+ {
+ _bfd_error_handler (_("\
+-ERROR: %B is compiled for the EP9312, whereas %B is compiled for XScale"),
++error: %B is compiled for the EP9312, whereas %B is compiled for XScale"),
+ ibfd, obfd);
+ bfd_set_error (bfd_error_wrong_format);
+ return FALSE;
+@@ -198,7 +198,7 @@ ERROR: %B is compiled for the EP9312, wh
+ || in == bfd_mach_arm_iWMMXt2))
+ {
+ _bfd_error_handler (_("\
+-ERROR: %B is compiled for the EP9312, whereas %B is compiled for XScale"),
++error: %B is compiled for the EP9312, whereas %B is compiled for XScale"),
+ obfd, ibfd);
+ bfd_set_error (bfd_error_wrong_format);
+ return FALSE;
+--- a/bfd/dwarf2.c
++++ b/bfd/dwarf2.c
+@@ -417,48 +417,47 @@ read_section (bfd * abfd,
+ bfd_boolean section_is_compressed = FALSE;
+
+ /* read_section is a noop if the section has already been read. */
+- if (*section_buffer)
+- return TRUE;
+-
+- msec = bfd_get_section_by_name (abfd, section_name);
+- if (! msec && compressed_section_name)
+- {
+- msec = bfd_get_section_by_name (abfd, compressed_section_name);
+- section_is_compressed = TRUE;
+- }
+- if (! msec)
++ if (!*section_buffer)
+ {
+- (*_bfd_error_handler) (_("Dwarf Error: Can't find %s section."), section_name);
+- bfd_set_error (bfd_error_bad_value);
+- return FALSE;
+- }
++ msec = bfd_get_section_by_name (abfd, section_name);
++ if (! msec && compressed_section_name)
++ {
++ msec = bfd_get_section_by_name (abfd, compressed_section_name);
++ section_is_compressed = TRUE;
++ }
++ if (! msec)
++ {
++ (*_bfd_error_handler) (_("Dwarf Error: Can't find %s section."), section_name);
++ bfd_set_error (bfd_error_bad_value);
++ return FALSE;
++ }
+
+- if (syms)
+- {
+- *section_size = msec->size;
+- *section_buffer
+- = bfd_simple_get_relocated_section_contents (abfd, msec, NULL, syms);
+- if (! *section_buffer)
+- return FALSE;
+- }
+- else
+- {
+ *section_size = msec->rawsize ? msec->rawsize : msec->size;
+- *section_buffer = bfd_malloc (*section_size);
+- if (! *section_buffer)
+- return FALSE;
+- if (! bfd_get_section_contents (abfd, msec, *section_buffer,
+- 0, *section_size))
+- return FALSE;
+- }
++ if (syms)
++ {
++ *section_buffer
++ = bfd_simple_get_relocated_section_contents (abfd, msec, NULL, syms);
++ if (! *section_buffer)
++ return FALSE;
++ }
++ else
++ {
++ *section_buffer = bfd_malloc (*section_size);
++ if (! *section_buffer)
++ return FALSE;
++ if (! bfd_get_section_contents (abfd, msec, *section_buffer,
++ 0, *section_size))
++ return FALSE;
++ }
+
+- if (section_is_compressed)
+- {
+- if (! bfd_uncompress_section_contents (section_buffer, section_size))
++ if (section_is_compressed)
+ {
+- (*_bfd_error_handler) (_("Dwarf Error: unable to decompress %s section."), compressed_section_name);
+- bfd_set_error (bfd_error_bad_value);
+- return FALSE;
++ if (! bfd_uncompress_section_contents (section_buffer, section_size))
++ {
++ (*_bfd_error_handler) (_("Dwarf Error: unable to decompress %s section."), compressed_section_name);
++ bfd_set_error (bfd_error_bad_value);
++ return FALSE;
++ }
+ }
+ }
+
+--- a/bfd/elf-attrs.c
++++ b/bfd/elf-attrs.c
+@@ -564,7 +564,7 @@ _bfd_elf_merge_object_attributes (bfd *i
+ if (in_attr->i > 0 && strcmp (in_attr->s, "gnu") != 0)
+ {
+ _bfd_error_handler
+- (_("ERROR: %B: Must be processed by '%s' toolchain"),
++ (_("error: %B: Must be processed by '%s' toolchain"),
+ ibfd, in_attr->s);
+ return FALSE;
+ }
+@@ -572,7 +572,7 @@ _bfd_elf_merge_object_attributes (bfd *i
+ if (in_attr->i != out_attr->i
+ || (in_attr->i != 0 && strcmp (in_attr->s, out_attr->s) != 0))
+ {
+- _bfd_error_handler (_("ERROR: %B: Object tag '%d, %s' is "
++ _bfd_error_handler (_("error: %B: Object tag '%d, %s' is "
+ "incompatible with tag '%d, %s'"),
+ ibfd,
+ in_attr->i, in_attr->s ? in_attr->s : "",
+--- a/bfd/elf-bfd.h
++++ b/bfd/elf-bfd.h
+@@ -1705,6 +1705,8 @@ extern asection *_bfd_elf_check_kept_sec
+ (asection *, struct bfd_link_info *);
+ extern void _bfd_elf_link_just_syms
+ (asection *, struct bfd_link_info *);
++extern void _bfd_elf_copy_link_hash_symbol_type
++ (bfd *, struct bfd_link_hash_entry *, struct bfd_link_hash_entry *);
+ extern bfd_boolean _bfd_elf_copy_private_header_data
+ (bfd *, bfd *);
+ extern bfd_boolean _bfd_elf_copy_private_symbol_data
+--- a/bfd/elf32-arm.c
++++ b/bfd/elf32-arm.c
+@@ -20,6 +20,8 @@
+ MA 02110-1301, USA. */
+
+ #include "sysdep.h"
++#include <limits.h>
++
+ #include "bfd.h"
+ #include "libiberty.h"
+ #include "libbfd.h"
+@@ -61,6 +63,11 @@
+
+ static struct elf_backend_data elf32_arm_vxworks_bed;
+
++static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
++ struct bfd_link_info *link_info,
++ asection *sec,
++ bfd_byte *contents);
++
+ /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
+ R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
+ in that slot. */
+@@ -1881,7 +1888,8 @@ typedef unsigned short int insn16;
+ interworkable. */
+ #define INTERWORK_FLAG(abfd) \
+ (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
+- || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
++ || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
++ || ((abfd)->flags & BFD_LINKER_CREATED))
+
+ /* The linker script knows the section names for placement.
+ The entry_names are used to do simple name mangling on the stubs.
+@@ -1894,7 +1902,12 @@ typedef unsigned short int insn16;
+ #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
+
+ #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
+-#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
++#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x%s"
++
++#define JANUS_2CC_ERRATUM_VENEER_SECTION_NAME ".janus_2cc_veneer"
++#define JANUS_2CC_ERRATUM_VENEER_ENTRY_NAME "__janus_2cc_veneer_%x%s"
++
++#define MAX_ERRATUM_SYMBOL_LENGTH 64
+
+ #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
+ #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
+@@ -2010,53 +2023,129 @@ static const bfd_vma elf32_arm_symbian_p
+ #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
+ #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
+
+-static const bfd_vma arm_long_branch_stub[] =
++enum stub_insn_type
+ {
+- 0xe51ff004, /* ldr pc, [pc, #-4] */
+- 0x00000000, /* dcd R_ARM_ABS32(X) */
++ THUMB16_TYPE = 1,
++ THUMB32_TYPE,
++ ARM_TYPE,
++ DATA_TYPE
++ };
++
++#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
++/* A bit of a hack. A Thumb conditional branch, in which the proper condition
++ is inserted in arm_build_one_stub(). */
++#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
++#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
++#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
++#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
++#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
++#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
++
++typedef struct
++{
++ bfd_vma data;
++ enum stub_insn_type type;
++ unsigned int reloc_type;
++ int reloc_addend;
++} insn_sequence;
++
++/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
++ to reach the stub if necessary. */
++static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
++ {
++ ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
++ DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
++ };
++
++/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
++ available. */
++static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
++ {
++ ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */
++ ARM_INSN(0xe12fff1c), /* bx ip */
++ DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
++ };
++
++/* Thumb -> Thumb long branch stub. Used on architectures which
++ support only this mode, or on V4T where it is expensive to switch
++ to ARM. */
++static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
++ {
++ THUMB16_INSN(0xb401), /* push {r0} */
++ THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */
++ THUMB16_INSN(0x4684), /* mov ip, r0 */
++ THUMB16_INSN(0xbc01), /* pop {r0} */
++ THUMB16_INSN(0x4760), /* bx ip */
++ THUMB16_INSN(0xbf00), /* nop */
++ DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
++ };
++
++/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
++ available. */
++static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
++ {
++ THUMB16_INSN(0x4778), /* bx pc */
++ THUMB16_INSN(0x46c0), /* nop */
++ ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */
++ DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
+ };
+
+-static const bfd_vma arm_thumb_v4t_long_branch_stub[] =
++/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
++ one, when the destination is close enough. */
++static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
+ {
+- 0xe59fc000, /* ldr ip, [pc, #0] */
+- 0xe12fff1c, /* bx ip */
+- 0x00000000, /* dcd R_ARM_ABS32(X) */
++ THUMB16_INSN(0x4778), /* bx pc */
++ THUMB16_INSN(0x46c0), /* nop */
++ ARM_REL_INSN(0xea000000, -8), /* b (X-8) */
+ };
+
+-static const bfd_vma arm_thumb_thumb_long_branch_stub[] =
++/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
++ blx to reach the stub if necessary. */
++static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
+ {
+- 0x4e02b540, /* push {r6, lr} */
+- /* ldr r6, [pc, #8] */
+- 0x473046fe, /* mov lr, pc */
+- /* bx r6 */
+- 0xbf00bd40, /* pop {r6, pc} */
+- /* nop */
+- 0x00000000, /* dcd R_ARM_ABS32(X) */
++ ARM_INSN(0xe59fc000), /* ldr r12, [pc] */
++ ARM_INSN(0xe08ff00c), /* add pc, pc, ip */
++ DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
+ };
+
+-static const bfd_vma arm_thumb_arm_v4t_long_branch_stub[] =
++/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
++ blx to reach the stub if necessary. We can not add into pc;
++ it is not guaranteed to mode switch (different in ARMv6 and
++ ARMv7). */
++static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
++ {
++ ARM_INSN(0xe59fc004), /* ldr r12, [pc, #4] */
++ ARM_INSN(0xe08fc00c), /* add ip, pc, ip */
++ ARM_INSN(0xe12fff1c), /* bx ip */
++ DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
++ };
++
++/* Cortex-A8 erratum-workaround stubs. */
++
++/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
++ can't use a conditional branch to reach this stub). */
++
++static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
+ {
+- 0x4e03b540, /* push {r6, lr} */
+- /* ldr r6, [pc, #12] */
+- 0x473046fe, /* mov lr, pc */
+- /* bx r6 */
+- 0xe8bd4040, /* pop {r6, pc} */
+- 0xe12fff1e, /* bx lr */
+- 0x00000000, /* dcd R_ARM_ABS32(X) */
++ THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */
++ THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */
++ THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */
+ };
+
+-static const bfd_vma arm_thumb_arm_v4t_short_branch_stub[] =
++/* Stub used for b.w and bl.w instructions. */
++
++static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
+ {
+- 0x46c04778, /* bx pc */
+- /* nop */
+- 0xea000000, /* b (X) */
++ THUMB32_B_INSN(0xf000b800, -4)
+ };
+
+-static const bfd_vma arm_pic_long_branch_stub[] =
++/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
++ instruction to point to this stub, which switches to ARM mode. Jump to the
++ real destination using an ARM-mode branch. */
++
++static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
+ {
+- 0xe59fc000, /* ldr r12, [pc] */
+- 0xe08ff00c, /* add pc, pc, ip */
+- 0x00000000, /* dcd R_ARM_REL32(X) */
++ ARM_REL_INSN(0xea000000, -8)
+ };
+
+ /* Section name for stubs is the associated section name plus this
+@@ -2066,12 +2155,17 @@ static const bfd_vma arm_pic_long_branch
+ enum elf32_arm_stub_type
+ {
+ arm_stub_none,
+- arm_stub_long_branch,
+- arm_thumb_v4t_stub_long_branch,
+- arm_thumb_thumb_stub_long_branch,
+- arm_thumb_arm_v4t_stub_long_branch,
+- arm_thumb_arm_v4t_stub_short_branch,
+- arm_stub_pic_long_branch,
++ arm_stub_long_branch_any_any,
++ arm_stub_long_branch_v4t_arm_thumb,
++ arm_stub_long_branch_thumb_only,
++ arm_stub_long_branch_v4t_thumb_arm,
++ arm_stub_short_branch_v4t_thumb_arm,
++ arm_stub_long_branch_any_arm_pic,
++ arm_stub_long_branch_any_thumb_pic,
++ arm_stub_a8_veneer_b_cond,
++ arm_stub_a8_veneer_b,
++ arm_stub_a8_veneer_bl,
++ arm_stub_a8_veneer_blx
+ };
+
+ struct elf32_arm_stub_hash_entry
+@@ -2090,7 +2184,21 @@ struct elf32_arm_stub_hash_entry
+ bfd_vma target_value;
+ asection *target_section;
+
++ /* Offset to apply to relocation referencing target_value. */
++ bfd_vma target_addend;
++
++ /* The instruction which caused this stub to be generated (only valid for
++ Cortex-A8 erratum workaround stubs at present). */
++ unsigned long orig_insn;
++
++ /* The stub type. */
+ enum elf32_arm_stub_type stub_type;
++ /* Its encoding size in bytes. */
++ int stub_size;
++ /* Its template. */
++ const insn_sequence *stub_template;
++ /* The size of the template (number of entries). */
++ int stub_template_size;
+
+ /* The symbol table entry, if any, that this was derived from. */
+ struct elf32_arm_link_hash_entry *h;
+@@ -2124,43 +2232,111 @@ typedef enum
+ {
+ VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
+ VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
++ JANUS_2CC_ERRATUM_BRANCH_TO_ARM_VENEER,
+ VFP11_ERRATUM_ARM_VENEER,
+- VFP11_ERRATUM_THUMB_VENEER
++ VFP11_ERRATUM_THUMB_VENEER,
++ JANUS_2CC_ERRATUM_ARM_VENEER
+ }
+-elf32_vfp11_erratum_type;
++elf32_cpu_erratum_type;
+
+-typedef struct elf32_vfp11_erratum_list
++typedef struct elf32_cpu_erratum_list
+ {
+- struct elf32_vfp11_erratum_list *next;
++ struct elf32_cpu_erratum_list *next;
+ bfd_vma vma;
+ union
+ {
+ struct
+ {
+- struct elf32_vfp11_erratum_list *veneer;
+- unsigned int vfp_insn;
++ struct elf32_cpu_erratum_list *veneer;
++ unsigned int orig_insn;
+ } b;
+ struct
+ {
+- struct elf32_vfp11_erratum_list *branch;
++ struct elf32_cpu_erratum_list *branch;
+ unsigned int id;
+ } v;
+ } u;
+- elf32_vfp11_erratum_type type;
++ elf32_cpu_erratum_type type;
++}
++elf32_cpu_erratum_list;
++
++typedef enum
++{
++ DELETE_EXIDX_ENTRY,
++ INSERT_EXIDX_CANTUNWIND_AT_END
+ }
+-elf32_vfp11_erratum_list;
++arm_unwind_edit_type;
++
++/* A (sorted) list of edits to apply to an unwind table. */
++typedef struct arm_unwind_table_edit
++{
++ arm_unwind_edit_type type;
++ /* Note: we sometimes want to insert an unwind entry corresponding to a
++ section different from the one we're currently writing out, so record the
++ (text) section this edit relates to here. */
++ asection *linked_section;
++ unsigned int index;
++ struct arm_unwind_table_edit *next;
++}
++arm_unwind_table_edit;
+
+ typedef struct _arm_elf_section_data
+ {
++ /* Information about mapping symbols. */
+ struct bfd_elf_section_data elf;
+ unsigned int mapcount;
+ unsigned int mapsize;
+ elf32_arm_section_map *map;
++ /* Information about CPU errata. */
+ unsigned int erratumcount;
+- elf32_vfp11_erratum_list *erratumlist;
++ elf32_cpu_erratum_list *erratumlist;
++ /* Information about unwind tables. */
++ union
++ {
++ /* Unwind info attached to a text section. */
++ struct
++ {
++ asection *arm_exidx_sec;
++ } text;
++
++ /* Unwind info attached to an .ARM.exidx section. */
++ struct
++ {
++ arm_unwind_table_edit *unwind_edit_list;
++ arm_unwind_table_edit *unwind_edit_tail;
++ } exidx;
++ } u;
+ }
+ _arm_elf_section_data;
+
++/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
++ These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
++ so may be created multiple times: we use an array of these entries whilst
++ relaxing which we can refresh easily, then create stubs for each potentially
++ erratum-triggering instruction once we've settled on a solution. */
++
++struct a8_erratum_fix {
++ bfd *input_bfd;
++ asection *section;
++ bfd_vma offset;
++ bfd_vma addend;
++ unsigned long orig_insn;
++ char *stub_name;
++ enum elf32_arm_stub_type stub_type;
++};
++
++/* A table of relocs applied to branches which might trigger Cortex-A8
++ erratum. */
++
++struct a8_erratum_reloc {
++ bfd_vma from;
++ bfd_vma destination;
++ unsigned int r_type;
++ unsigned char st_type;
++ const char *sym_name;
++ bfd_boolean non_a8_stub;
++};
++
+ #define elf32_arm_section_data(sec) \
+ ((_arm_elf_section_data *) elf_section_data (sec))
+
+@@ -2295,6 +2471,16 @@ struct elf32_arm_link_hash_table
+ veneers. */
+ bfd_size_type vfp11_erratum_glue_size;
+
++ /* The size in bytes of the section containing glue for Janus 2CC erratum
++ veneers. */
++ bfd_size_type janus_2cc_erratum_glue_size;
++
++ /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
++ holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
++ elf32_arm_write_section(). */
++ struct a8_erratum_fix *a8_erratum_fixes;
++ unsigned int num_a8_erratum_fixes;
++
+ /* An arbitrary input BFD chosen to hold the glue sections. */
+ bfd * bfd_of_glue_owner;
+
+@@ -2313,6 +2499,15 @@ struct elf32_arm_link_hash_table
+ 2 = Generate v4 interworing stubs. */
+ int fix_v4bx;
+
++ /* Whether we should fix/report Janus 2CC errata for ARM/Thumb. */
++ int fix_janus_2cc;
++
++ /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
++ int fix_cortex_a8;
++
++ /* Global counter for the number of fixes we have emitted. */
++ int num_errata_fixes;
++
+ /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
+ int use_blx;
+
+@@ -2459,6 +2654,9 @@ stub_hash_newfunc (struct bfd_hash_entry
+ eh->target_value = 0;
+ eh->target_section = NULL;
+ eh->stub_type = arm_stub_none;
++ eh->stub_size = 0;
++ eh->stub_template = NULL;
++ eh->stub_template_size = 0;
+ eh->h = NULL;
+ eh->id_sec = NULL;
+ }
+@@ -2648,7 +2846,10 @@ elf32_arm_link_hash_table_create (bfd *a
+ memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset));
+ ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
+ ret->vfp11_erratum_glue_size = 0;
+- ret->num_vfp11_fixes = 0;
++ ret->fix_janus_2cc = 0;
++ ret->fix_cortex_a8 = 0;
++ ret->janus_2cc_erratum_glue_size = 0;
++ ret->num_errata_fixes = 0;
+ ret->bfd_of_glue_owner = NULL;
+ ret->byteswap_code = 0;
+ ret->target1_is_rel = 0;
+@@ -2731,9 +2932,9 @@ arm_stub_is_thumb (enum elf32_arm_stub_t
+ {
+ switch (stub_type)
+ {
+- case arm_thumb_thumb_stub_long_branch:
+- case arm_thumb_arm_v4t_stub_long_branch:
+- case arm_thumb_arm_v4t_stub_short_branch:
++ case arm_stub_long_branch_thumb_only:
++ case arm_stub_long_branch_v4t_thumb_arm:
++ case arm_stub_short_branch_v4t_thumb_arm:
+ return TRUE;
+ case arm_stub_none:
+ BFD_FAIL ();
+@@ -2806,20 +3007,27 @@ arm_type_of_stub (struct bfd_link_info *
+ if (!thumb_only)
+ {
+ stub_type = (info->shared | globals->pic_veneer)
++ /* PIC stubs. */
+ ? ((globals->use_blx)
+- ? arm_stub_pic_long_branch
++ /* V5T and above. */
++ ? arm_stub_long_branch_any_thumb_pic
++ /* not yet supported on V4T. */
+ : arm_stub_none)
+- : (globals->use_blx)
+- ? arm_stub_long_branch
+- : arm_stub_none;
++
++ /* non-PIC stubs. */
++ : ((globals->use_blx)
++ /* V5T and above. */
++ ? arm_stub_long_branch_any_any
++ /* V4T. */
++ : arm_stub_long_branch_thumb_only);
+ }
+ else
+ {
+ stub_type = (info->shared | globals->pic_veneer)
++ /* PIC stub not yet supported on V4T. */
+ ? arm_stub_none
+- : (globals->use_blx)
+- ? arm_thumb_thumb_stub_long_branch
+- : arm_stub_none;
++ /* non-PIC stub. */
++ : arm_stub_long_branch_thumb_only;
+ }
+ }
+ else
+@@ -2836,18 +3044,25 @@ arm_type_of_stub (struct bfd_link_info *
+ }
+
+ stub_type = (info->shared | globals->pic_veneer)
++ /* PIC stubs. */
+ ? ((globals->use_blx)
+- ? arm_stub_pic_long_branch
++ /* V5T and above. */
++ ? arm_stub_long_branch_any_arm_pic
++ /* not yet supported on V4T. */
+ : arm_stub_none)
+- : (globals->use_blx)
+- ? arm_stub_long_branch
+- : arm_thumb_arm_v4t_stub_long_branch;
++
++ /* non-PIC stubs. */
++ : ((globals->use_blx)
++ /* V5T and above. */
++ ? arm_stub_long_branch_any_any
++ /* V4T. */
++ : arm_stub_long_branch_v4t_thumb_arm);
+
+ /* Handle v4t short branches. */
+- if ((stub_type == arm_thumb_arm_v4t_stub_long_branch)
++ if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
+ && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
+ && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
+- stub_type = arm_thumb_arm_v4t_stub_short_branch;
++ stub_type = arm_stub_short_branch_v4t_thumb_arm;
+ }
+ }
+ }
+@@ -2863,7 +3078,7 @@ arm_type_of_stub (struct bfd_link_info *
+ {
+ (*_bfd_error_handler)
+ (_("%B(%s): warning: interworking not enabled.\n"
+- " first occurrence: %B: Thumb call to ARM"),
++ " first occurrence: %B: ARM call to Thumb"),
+ sym_sec->owner, input_bfd, name);
+ }
+
+@@ -2874,10 +3089,14 @@ arm_type_of_stub (struct bfd_link_info *
+ || !globals->use_blx)
+ {
+ stub_type = (info->shared | globals->pic_veneer)
+- ? arm_stub_pic_long_branch
+- : (globals->use_blx)
+- ? arm_stub_long_branch
+- : arm_thumb_v4t_stub_long_branch;
++ /* PIC stubs. */
++ ? arm_stub_long_branch_any_thumb_pic
++ /* non-PIC stubs. */
++ : ((globals->use_blx)
++ /* V5T and above. */
++ ? arm_stub_long_branch_any_any
++ /* V4T. */
++ : arm_stub_long_branch_v4t_arm_thumb);
+ }
+ }
+ else
+@@ -2887,8 +3106,10 @@ arm_type_of_stub (struct bfd_link_info *
+ || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
+ {
+ stub_type = (info->shared | globals->pic_veneer)
+- ? arm_stub_pic_long_branch
+- : arm_stub_long_branch;
++ /* PIC stubs. */
++ ? arm_stub_long_branch_any_arm_pic
++ /* non-PIC stubs. */
++ : arm_stub_long_branch_any_any;
+ }
+ }
+ }
+@@ -3064,10 +3285,16 @@ put_thumb_insn (struct elf32_arm_link_ha
+ bfd_putb16 (val, ptr);
+ }
+
++static bfd_reloc_status_type elf32_arm_final_link_relocate
++ (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
++ Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
++ const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **);
++
+ static bfd_boolean
+ arm_build_one_stub (struct bfd_hash_entry *gen_entry,
+ void * in_arg)
+ {
++#define MAXRELOCS 2
+ struct elf32_arm_stub_hash_entry *stub_entry;
+ struct bfd_link_info *info;
+ struct elf32_arm_link_hash_table *htab;
+@@ -3078,9 +3305,12 @@ arm_build_one_stub (struct bfd_hash_entr
+ bfd_vma sym_value;
+ int template_size;
+ int size;
+- const bfd_vma *template;
++ const insn_sequence *template;
+ int i;
+ struct elf32_arm_link_hash_table * globals;
++ int stub_reloc_idx[MAXRELOCS] = {-1, -1};
++ int stub_reloc_offset[MAXRELOCS] = {0, 0};
++ int nrelocs = 0;
+
+ /* Massage our args to the form they really have. */
+ stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
+@@ -3106,102 +3336,229 @@ arm_build_one_stub (struct bfd_hash_entr
+ + stub_entry->target_section->output_offset
+ + stub_entry->target_section->output_section->vma);
+
+- switch (stub_entry->stub_type)
+- {
+- case arm_stub_long_branch:
+- template = arm_long_branch_stub;
+- template_size = (sizeof (arm_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_v4t_stub_long_branch:
+- template = arm_thumb_v4t_long_branch_stub;
+- template_size = (sizeof (arm_thumb_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_thumb_stub_long_branch:
+- template = arm_thumb_thumb_long_branch_stub;
+- template_size = (sizeof (arm_thumb_thumb_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_arm_v4t_stub_long_branch:
+- template = arm_thumb_arm_v4t_long_branch_stub;
+- template_size = (sizeof (arm_thumb_arm_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_arm_v4t_stub_short_branch:
+- template = arm_thumb_arm_v4t_short_branch_stub;
+- template_size = (sizeof(arm_thumb_arm_v4t_short_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_stub_pic_long_branch:
+- template = arm_pic_long_branch_stub;
+- template_size = (sizeof (arm_pic_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- default:
+- BFD_FAIL ();
+- return FALSE;
+- }
++ template = stub_entry->stub_template;
++ template_size = stub_entry->stub_template_size;
+
+ size = 0;
+- for (i = 0; i < (template_size / 4); i++)
++ for (i = 0; i < template_size; i++)
+ {
+- /* A 0 pattern is a placeholder, every other pattern is an
+- instruction. */
+- if (template[i] != 0)
+- put_arm_insn (globals, stub_bfd, template[i], loc + size);
+- else
+- bfd_put_32 (stub_bfd, template[i], loc + size);
++ switch (template[i].type)
++ {
++ case THUMB16_TYPE:
++ {
++ bfd_vma data = template[i].data;
++ if (template[i].reloc_addend != 0)
++ {
++ /* We've borrowed the reloc_addend field to mean we should
++ insert a condition code into this (Thumb-1 branch)
++ instruction. See THUMB16_BCOND_INSN. */
++ BFD_ASSERT ((data & 0xff00) == 0xd000);
++ data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
++ }
++ put_thumb_insn (globals, stub_bfd, data, loc + size);
++ size += 2;
++ }
++ break;
++
++ case THUMB32_TYPE:
++ put_thumb_insn (globals, stub_bfd, (template[i].data >> 16) & 0xffff,
++ loc + size);
++ put_thumb_insn (globals, stub_bfd, template[i].data & 0xffff,
++ loc + size + 2);
++ if (template[i].reloc_type != R_ARM_NONE)
++ {
++ stub_reloc_idx[nrelocs] = i;
++ stub_reloc_offset[nrelocs++] = size;
++ }
++ size += 4;
++ break;
++
++ case ARM_TYPE:
++ put_arm_insn (globals, stub_bfd, template[i].data, loc + size);
++ /* Handle cases where the target is encoded within the
++ instruction. */
++ if (template[i].reloc_type == R_ARM_JUMP24)
++ {
++ stub_reloc_idx[nrelocs] = i;
++ stub_reloc_offset[nrelocs++] = size;
++ }
++ size += 4;
++ break;
++
++ case DATA_TYPE:
++ bfd_put_32 (stub_bfd, template[i].data, loc + size);
++ stub_reloc_idx[nrelocs] = i;
++ stub_reloc_offset[nrelocs++] = size;
++ size += 4;
++ break;
+
+- size += 4;
++ default:
++ BFD_FAIL ();
++ return FALSE;
++ }
+ }
++
+ stub_sec->size += size;
+
++ /* Stub size has already been computed in arm_size_one_stub. Check
++ consistency. */
++ BFD_ASSERT (size == stub_entry->stub_size);
++
+ /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
+ if (stub_entry->st_type == STT_ARM_TFUNC)
+ sym_value |= 1;
+
+- switch (stub_entry->stub_type)
++ /* Assume there is at least one and at most MAXRELOCS entries to relocate
++ in each stub. */
++ BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
++
++ for (i = 0; i < nrelocs; i++)
++ if (template[stub_reloc_idx[i]].reloc_type == R_ARM_THM_JUMP24
++ || template[stub_reloc_idx[i]].reloc_type == R_ARM_THM_JUMP19
++ || template[stub_reloc_idx[i]].reloc_type == R_ARM_THM_CALL
++ || template[stub_reloc_idx[i]].reloc_type == R_ARM_THM_XPC22)
++ {
++ Elf_Internal_Rela rel;
++ bfd_boolean unresolved_reloc;
++ char *error_message;
++ int sym_flags
++ = (template[stub_reloc_idx[i]].reloc_type != R_ARM_THM_XPC22)
++ ? STT_ARM_TFUNC : 0;
++ bfd_vma points_to = sym_value + stub_entry->target_addend;
++
++ rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
++ rel.r_info = ELF32_R_INFO (0, template[stub_reloc_idx[i]].reloc_type);
++ rel.r_addend = template[stub_reloc_idx[i]].reloc_addend;
++
++ if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
++ /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
++ template should refer back to the instruction after the original
++ branch. */
++ points_to = sym_value;
++
++ /* Note: _bfd_final_link_relocate doesn't handle these relocations
++ properly. We should probably use this function unconditionally,
++ rather than only for certain relocations listed in the enclosing
++ conditional. Attempt to avoid perturbing existing code too much
++ pending more testing. */
++ elf32_arm_final_link_relocate (elf32_arm_howto_from_type
++ (template[stub_reloc_idx[i]].reloc_type),
++ stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
++ points_to, info, stub_entry->target_section, "", sym_flags,
++ (struct elf_link_hash_entry *) stub_entry, &unresolved_reloc,
++ &error_message);
++ }
++ else
++ {
++ _bfd_final_link_relocate (elf32_arm_howto_from_type
++ (template[stub_reloc_idx[i]].reloc_type), stub_bfd, stub_sec,
++ stub_sec->contents, stub_entry->stub_offset + stub_reloc_offset[i],
++ sym_value + stub_entry->target_addend,
++ template[stub_reloc_idx[i]].reloc_addend);
++ }
++
++ return TRUE;
++#undef MAXRELOCS
++}
++
++/* Calculate the template, template size and instruction size for a stub.
++ Return value is the instruction size. */
++
++static unsigned int
++find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
++ const insn_sequence **stub_template,
++ int *stub_template_size)
++{
++ const insn_sequence *template = NULL;
++ int template_size = 0, i;
++ unsigned int size;
++
++ switch (stub_type)
+ {
+- case arm_stub_long_branch:
+- _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_ABS32),
+- stub_bfd, stub_sec, stub_sec->contents,
+- stub_entry->stub_offset + 4, sym_value, 0);
++ case arm_stub_long_branch_any_any:
++ template = elf32_arm_stub_long_branch_any_any;
++ template_size = sizeof (elf32_arm_stub_long_branch_any_any)
++ / sizeof (insn_sequence);
+ break;
+- case arm_thumb_v4t_stub_long_branch:
+- _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_ABS32),
+- stub_bfd, stub_sec, stub_sec->contents,
+- stub_entry->stub_offset + 8, sym_value, 0);
++ case arm_stub_long_branch_v4t_arm_thumb:
++ template = elf32_arm_stub_long_branch_v4t_arm_thumb;
++ template_size = sizeof (elf32_arm_stub_long_branch_v4t_arm_thumb)
++ / sizeof (insn_sequence);
+ break;
+- case arm_thumb_thumb_stub_long_branch:
+- _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_ABS32),
+- stub_bfd, stub_sec, stub_sec->contents,
+- stub_entry->stub_offset + 12, sym_value, 0);
++ case arm_stub_long_branch_thumb_only:
++ template = elf32_arm_stub_long_branch_thumb_only;
++ template_size = sizeof (elf32_arm_stub_long_branch_thumb_only)
++ / sizeof (insn_sequence);
+ break;
+- case arm_thumb_arm_v4t_stub_long_branch:
+- _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_ABS32),
+- stub_bfd, stub_sec, stub_sec->contents,
+- stub_entry->stub_offset + 16, sym_value, 0);
++ case arm_stub_long_branch_v4t_thumb_arm:
++ template = elf32_arm_stub_long_branch_v4t_thumb_arm;
++ template_size = sizeof (elf32_arm_stub_long_branch_v4t_thumb_arm)
++ / sizeof (insn_sequence);
+ break;
+- case arm_thumb_arm_v4t_stub_short_branch:
+- {
+- long int rel_offset;
+- static const insn32 t2a3_b_insn = 0xea000000;
+-
+- rel_offset = sym_value - (stub_addr + 8 + 4);
+-
+- put_arm_insn (globals, stub_bfd,
+- (bfd_vma) t2a3_b_insn | ((rel_offset >> 2) & 0x00FFFFFF),
+- loc + 4);
+- }
++ case arm_stub_short_branch_v4t_thumb_arm:
++ template = elf32_arm_stub_short_branch_v4t_thumb_arm;
++ template_size = sizeof (elf32_arm_stub_short_branch_v4t_thumb_arm)
++ / sizeof (insn_sequence);
+ break;
+-
+- case arm_stub_pic_long_branch:
+- /* We want the value relative to the address 8 bytes from the
+- start of the stub. */
+- _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_REL32),
+- stub_bfd, stub_sec, stub_sec->contents,
+- stub_entry->stub_offset + 8, sym_value, 0);
++ case arm_stub_long_branch_any_arm_pic:
++ template = elf32_arm_stub_long_branch_any_arm_pic;
++ template_size = sizeof (elf32_arm_stub_long_branch_any_arm_pic)
++ / sizeof (insn_sequence);
+ break;
+- default:
++ case arm_stub_long_branch_any_thumb_pic:
++ template = elf32_arm_stub_long_branch_any_thumb_pic;
++ template_size = sizeof (elf32_arm_stub_long_branch_any_thumb_pic)
++ / sizeof (insn_sequence);
+ break;
++ case arm_stub_a8_veneer_b_cond:
++ template = elf32_arm_stub_a8_veneer_b_cond;
++ template_size = sizeof (elf32_arm_stub_a8_veneer_b_cond)
++ / sizeof (insn_sequence);
++ break;
++ case arm_stub_a8_veneer_b:
++ case arm_stub_a8_veneer_bl:
++ template = elf32_arm_stub_a8_veneer_b;
++ template_size = sizeof (elf32_arm_stub_a8_veneer_b)
++ / sizeof (insn_sequence);
++ break;
++ case arm_stub_a8_veneer_blx:
++ template = elf32_arm_stub_a8_veneer_blx;
++ template_size = sizeof (elf32_arm_stub_a8_veneer_blx)
++ / sizeof (insn_sequence);
++ break;
++ default:
++ BFD_FAIL ();
++ return 0;
+ }
+
+- return TRUE;
++ size = 0;
++ for (i = 0; i < template_size; i++)
++ {
++ switch (template[i].type)
++ {
++ case THUMB16_TYPE:
++ size += 2;
++ break;
++
++ case ARM_TYPE:
++ case THUMB32_TYPE:
++ case DATA_TYPE:
++ size += 4;
++ break;
++
++ default:
++ BFD_FAIL ();
++ return 0;
++ }
++ }
++
++ if (stub_template)
++ *stub_template = template;
++
++ if (stub_template_size)
++ *stub_template_size = template_size;
++
++ return size;
+ }
+
+ /* As above, but don't actually build the stub. Just bump offset so
+@@ -3213,52 +3570,24 @@ arm_size_one_stub (struct bfd_hash_entry
+ {
+ struct elf32_arm_stub_hash_entry *stub_entry;
+ struct elf32_arm_link_hash_table *htab;
+- const bfd_vma *template;
++ const insn_sequence *template;
+ int template_size;
+ int size;
+- int i;
+
+ /* Massage our args to the form they really have. */
+ stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
+ htab = (struct elf32_arm_link_hash_table *) in_arg;
+
+- switch (stub_entry->stub_type)
+- {
+- case arm_stub_long_branch:
+- template = arm_long_branch_stub;
+- template_size = (sizeof (arm_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_v4t_stub_long_branch:
+- template = arm_thumb_v4t_long_branch_stub;
+- template_size = (sizeof (arm_thumb_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_thumb_stub_long_branch:
+- template = arm_thumb_thumb_long_branch_stub;
+- template_size = (sizeof (arm_thumb_thumb_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_arm_v4t_stub_long_branch:
+- template = arm_thumb_arm_v4t_long_branch_stub;
+- template_size = (sizeof (arm_thumb_arm_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_thumb_arm_v4t_stub_short_branch:
+- template = arm_thumb_arm_v4t_short_branch_stub;
+- template_size = (sizeof(arm_thumb_arm_v4t_short_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- case arm_stub_pic_long_branch:
+- template = arm_pic_long_branch_stub;
+- template_size = (sizeof (arm_pic_long_branch_stub) / sizeof (bfd_vma)) * 4;
+- break;
+- default:
+- BFD_FAIL ();
+- return FALSE;
+- break;
+- }
++ size = find_stub_size_and_template (stub_entry->stub_type, &template,
++ &template_size);
++
++ stub_entry->stub_size = size;
++ stub_entry->stub_template = template;
++ stub_entry->stub_template_size = template_size;
+
+- size = 0;
+- for (i = 0; i < (template_size / 4); i++)
+- size += 4;
+ size = (size + 7) & ~7;
+ stub_entry->stub_sec->size += size;
++
+ return TRUE;
+ }
+
+@@ -3355,12 +3684,12 @@ elf32_arm_next_input_section (struct bfd
+ {
+ asection **list = htab->input_list + isec->output_section->index;
+
+- if (*list != bfd_abs_section_ptr)
++ if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
+ {
+ /* Steal the link_sec pointer for our list. */
+ #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
+ /* This happens to make the list in reverse order,
+- which is what we want. */
++ which we reverse later. */
+ PREV_SEC (isec) = *list;
+ *list = isec;
+ }
+@@ -3369,7 +3698,7 @@ elf32_arm_next_input_section (struct bfd
+
+ /* See whether we can group stub sections together. Grouping stub
+ sections may result in fewer stubs. More importantly, we need to
+- put all .init* and .fini* stubs at the beginning of the .init or
++ put all .init* and .fini* stubs at the end of the .init or
+ .fini output sections respectively, because glibc splits the
+ _init and _fini functions into multiple parts. Putting a stub in
+ the middle of a function is not a good idea. */
+@@ -3377,68 +3706,104 @@ elf32_arm_next_input_section (struct bfd
+ static void
+ group_sections (struct elf32_arm_link_hash_table *htab,
+ bfd_size_type stub_group_size,
+- bfd_boolean stubs_always_before_branch)
++ bfd_boolean stubs_always_after_branch)
+ {
+- asection **list = htab->input_list + htab->top_index;
++ asection **list = htab->input_list;
+
+ do
+ {
+ asection *tail = *list;
++ asection *head;
++ asection *tp;
+
+ if (tail == bfd_abs_section_ptr)
+ continue;
+
+- while (tail != NULL)
++ /* Reverse the list: we must avoid placing stubs at the
++ beginning of the section because the beginning of the text
++ section may be required for an interrupt vector in bare metal
++ code. */
++#define NEXT_SEC PREV_SEC
++ head = tail;
++ tp = NULL;
++ while (head != NULL)
++ {
++ asection *h = PREV_SEC (head);
++ NEXT_SEC (head) = tp;
++ if (h == NULL)
++ break;
++ tp = head;
++ head = h;
++ }
++
++ while (head != NULL)
+ {
+ asection *curr;
+- asection *prev;
++ asection *next;
+ bfd_size_type total;
+
+- curr = tail;
+- total = tail->size;
+- while ((prev = PREV_SEC (curr)) != NULL
+- && ((total += curr->output_offset - prev->output_offset)
++ curr = head;
++ total = head->size;
++ while ((next = NEXT_SEC (curr)) != NULL
++ && ((total += next->output_offset - curr->output_offset)
+ < stub_group_size))
+- curr = prev;
++ curr = next;
+
+- /* OK, the size from the start of CURR to the end is less
++ /* OK, the size from the start to the start of CURR is less
+ than stub_group_size and thus can be handled by one stub
+- section. (Or the tail section is itself larger than
++ section. (Or the head section is itself larger than
+ stub_group_size, in which case we may be toast.)
+ We should really be keeping track of the total size of
+ stubs added here, as stubs contribute to the final output
+ section size. */
+ do
+ {
+- prev = PREV_SEC (tail);
++ next = NEXT_SEC (head);
+ /* Set up this stub group. */
+- htab->stub_group[tail->id].link_sec = curr;
++ htab->stub_group[head->id].link_sec = curr;
+ }
+- while (tail != curr && (tail = prev) != NULL);
++ while (head != curr && (head = next) != NULL);
+
+ /* But wait, there's more! Input sections up to stub_group_size
+- bytes before the stub section can be handled by it too. */
+- if (!stubs_always_before_branch)
++ bytes after the stub section can be handled by it too. */
++ if (!stubs_always_after_branch)
+ {
+ total = 0;
+- while (prev != NULL
+- && ((total += tail->output_offset - prev->output_offset)
++ while (next != NULL
++ && ((total += next->output_offset - head->output_offset)
+ < stub_group_size))
+ {
+- tail = prev;
+- prev = PREV_SEC (tail);
+- htab->stub_group[tail->id].link_sec = curr;
++ head = next;
++ next = NEXT_SEC (head);
++ htab->stub_group[head->id].link_sec = curr;
+ }
+ }
+- tail = prev;
++ head = next;
+ }
+ }
+- while (list-- != htab->input_list);
++ while (list++ != htab->input_list + htab->top_index);
+
+ free (htab->input_list);
+ #undef PREV_SEC
++#undef NEXT_SEC
++}
++
++static int
++a8_reloc_compare (const void *a, const void *b)
++{
++ const struct a8_erratum_reloc *ra = a, *rb = b;
++
++ if (ra->from < rb->from)
++ return -1;
++ else if (ra->from > rb->from)
++ return 1;
++ else
++ return 0;
+ }
+
++static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
++ const char *, char **);
++
+ /* Determine and set the size of the stub section for a final link.
+
+ The basic idea here is to examine all the relocations looking for
+@@ -3454,9 +3819,22 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ void (*layout_sections_again) (void))
+ {
+ bfd_size_type stub_group_size;
+- bfd_boolean stubs_always_before_branch;
++ bfd_boolean stubs_always_after_branch;
+ bfd_boolean stub_changed = 0;
+ struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
++ struct a8_erratum_fix *a8_fixes = NULL;
++ unsigned int num_a8_fixes = 0, prev_num_a8_fixes = 0, a8_fix_table_size = 10;
++ struct a8_erratum_reloc *a8_relocs = NULL;
++ unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10;
++ unsigned int i;
++
++ if (htab->fix_cortex_a8)
++ {
++ a8_fixes = bfd_zmalloc (sizeof (struct a8_erratum_fix)
++ * a8_fix_table_size);
++ a8_relocs = bfd_zmalloc (sizeof (struct a8_erratum_reloc)
++ * a8_reloc_table_size);
++ }
+
+ /* Propagate mach to stub bfd, because it may not have been
+ finalized when we created stub_bfd. */
+@@ -3467,7 +3845,14 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ htab->stub_bfd = stub_bfd;
+ htab->add_stub_section = add_stub_section;
+ htab->layout_sections_again = layout_sections_again;
+- stubs_always_before_branch = group_size < 0;
++ stubs_always_after_branch = group_size < 0;
++
++ /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
++ as the first half of a 32-bit branch straddling two 4K pages. This is a
++ crude way of enforcing that. */
++ if (htab->fix_cortex_a8)
++ stubs_always_after_branch = 1;
++
+ if (group_size < 0)
+ stub_group_size = -group_size;
+ else
+@@ -3487,13 +3872,16 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ stub_group_size = 4170000;
+ }
+
+- group_sections (htab, stub_group_size, stubs_always_before_branch);
++ group_sections (htab, stub_group_size, stubs_always_after_branch);
+
+ while (1)
+ {
+ bfd *input_bfd;
+ unsigned int bfd_indx;
+ asection *stub_sec;
++ unsigned int i;
++
++ num_a8_fixes = 0;
+
+ for (input_bfd = info->input_bfds, bfd_indx = 0;
+ input_bfd != NULL;
+@@ -3503,6 +3891,8 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ asection *section;
+ Elf_Internal_Sym *local_syms = NULL;
+
++ num_a8_relocs = 0;
++
+ /* We'll need the symbol table in a second. */
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ if (symtab_hdr->sh_info == 0)
+@@ -3551,6 +3941,7 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ char *stub_name;
+ const asection *id_sec;
+ unsigned char st_type;
++ bfd_boolean created_stub = FALSE;
+
+ r_type = ELF32_R_TYPE (irela->r_info);
+ r_indx = ELF32_R_SYM (irela->r_info);
+@@ -3564,9 +3955,14 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ goto error_ret_free_local;
+ }
+
+- /* Only look for stubs on call instructions. */
+- if ((r_type != (unsigned int) R_ARM_CALL)
+- && (r_type != (unsigned int) R_ARM_THM_CALL))
++ /* Only look for stubs on call or Thumb-2 call/branch
++ instructions. */
++ if (r_type != (unsigned int) R_ARM_CALL
++ && r_type != (unsigned int) R_ARM_THM_CALL
++ && r_type != (unsigned int) R_ARM_THM_JUMP24
++ && r_type != (unsigned int) R_ARM_THM_JUMP19
++ && r_type != (unsigned int) R_ARM_THM_CALL
++ && r_type != (unsigned int) R_ARM_THM_XPC22)
+ continue;
+
+ /* Now determine the call target, its name, value,
+@@ -3648,79 +4044,393 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ sym_name = hash->root.root.root.string;
+ }
+
+- /* Determine what (if any) linker stub is needed. */
+- stub_type = arm_type_of_stub (info, section, irela, st_type,
+- hash, destination, sym_sec,
+- input_bfd, sym_name);
+- if (stub_type == arm_stub_none)
+- continue;
++ /* Only look for stubs on call instructions. */
++ if (r_type == (unsigned int) R_ARM_CALL
++ || r_type == (unsigned int) R_ARM_THM_CALL)
++ do
++ {
++ /* Determine what (if any) linker stub is needed. */
++ stub_type = arm_type_of_stub (info, section, irela,
++ st_type, hash,
++ destination, sym_sec,
++ input_bfd, sym_name);
++ if (stub_type == arm_stub_none)
++ break;
++
++ /* Support for grouping stub sections. */
++ id_sec = htab->stub_group[section->id].link_sec;
++
++ /* Get the name of this stub. */
++ stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
++ irela);
++ if (!stub_name)
++ goto error_ret_free_internal;
+
+- /* Support for grouping stub sections. */
+- id_sec = htab->stub_group[section->id].link_sec;
++ /* We've either created a stub for this reloc already,
++ or we are about to. */
++ created_stub = TRUE;
++
++ stub_entry = arm_stub_hash_lookup
++ (&htab->stub_hash_table, stub_name,
++ FALSE, FALSE);
++ if (stub_entry != NULL)
++ {
++ /* The proper stub has already been created. */
++ free (stub_name);
++ break;
++ }
++
++ stub_entry = elf32_arm_add_stub (stub_name, section,
++ htab);
++ if (stub_entry == NULL)
++ {
++ free (stub_name);
++ goto error_ret_free_internal;
++ }
+
+- /* Get the name of this stub. */
+- stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela);
+- if (!stub_name)
+- goto error_ret_free_internal;
+-
+- stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
+- stub_name,
+- FALSE, FALSE);
+- if (stub_entry != NULL)
+- {
+- /* The proper stub has already been created. */
+- free (stub_name);
+- continue;
+- }
++ stub_entry->target_value = sym_value;
++ stub_entry->target_section = sym_sec;
++ stub_entry->stub_type = stub_type;
++ stub_entry->h = hash;
++ stub_entry->st_type = st_type;
++
++ if (sym_name == NULL)
++ sym_name = "unnamed";
++ stub_entry->output_name
++ = bfd_alloc (htab->stub_bfd,
++ sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
++ + strlen (sym_name));
++ if (stub_entry->output_name == NULL)
++ {
++ free (stub_name);
++ goto error_ret_free_internal;
++ }
+
+- stub_entry = elf32_arm_add_stub (stub_name, section, htab);
+- if (stub_entry == NULL)
+- {
+- free (stub_name);
+- goto error_ret_free_internal;
+- }
++ /* For historical reasons, use the existing names for
++ ARM-to-Thumb and Thumb-to-ARM stubs. */
++ if (r_type == (unsigned int) R_ARM_THM_CALL
++ && st_type != STT_ARM_TFUNC)
++ sprintf (stub_entry->output_name,
++ THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
++ else if (r_type == (unsigned int) R_ARM_CALL
++ && st_type == STT_ARM_TFUNC)
++ sprintf (stub_entry->output_name,
++ ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
++ else
++ sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
++ sym_name);
+
+- stub_entry->target_value = sym_value;
+- stub_entry->target_section = sym_sec;
+- stub_entry->stub_type = stub_type;
+- stub_entry->h = hash;
+- stub_entry->st_type = st_type;
+-
+- if (sym_name == NULL)
+- sym_name = "unnamed";
+- stub_entry->output_name
+- = bfd_alloc (htab->stub_bfd,
+- sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
+- + strlen (sym_name));
+- if (stub_entry->output_name == NULL)
++ stub_changed = TRUE;
++ }
++ while (0);
++
++ /* Look for relocations which might trigger Cortex-A8
++ erratum. */
++ if (htab->fix_cortex_a8
++ && (r_type == (unsigned int) R_ARM_THM_JUMP24
++ || r_type == (unsigned int) R_ARM_THM_JUMP19
++ || r_type == (unsigned int) R_ARM_THM_CALL
++ || r_type == (unsigned int) R_ARM_THM_XPC22))
+ {
+- free (stub_name);
+- goto error_ret_free_internal;
++ bfd_vma from = section->output_section->vma
++ + section->output_offset
++ + irela->r_offset;
++
++ if ((from & 0xfff) == 0xffe)
++ {
++ /* Found a candidate. Note we haven't checked the
++ destination is within 4K here: if we do so (and
++ don't create an entry in a8_relocs) we can't tell
++ that a branch should have been relocated when
++ scanning later. */
++ if (num_a8_relocs == a8_reloc_table_size)
++ {
++ a8_reloc_table_size *= 2;
++ a8_relocs = bfd_realloc (a8_relocs,
++ sizeof (struct a8_erratum_reloc)
++ * a8_reloc_table_size);
++ }
++
++ a8_relocs[num_a8_relocs].from = from;
++ a8_relocs[num_a8_relocs].destination = destination;
++ a8_relocs[num_a8_relocs].r_type = r_type;
++ a8_relocs[num_a8_relocs].st_type = st_type;
++ a8_relocs[num_a8_relocs].sym_name = sym_name;
++ a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
++
++ num_a8_relocs++;
++ }
+ }
+-
+- /* For historical reasons, use the existing names for
+- ARM-to-Thumb and Thumb-to-ARM stubs. */
+- if (r_type == (unsigned int) R_ARM_THM_CALL
+- && st_type != STT_ARM_TFUNC)
+- sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME,
+- sym_name);
+- else if (r_type == (unsigned int) R_ARM_CALL
+- && st_type == STT_ARM_TFUNC)
+- sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME,
+- sym_name);
+- else
+- sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
+- sym_name);
+-
+- stub_changed = TRUE;
+ }
+
+ /* We're done with the internal relocs, free them. */
+ if (elf_section_data (section)->relocs == NULL)
+ free (internal_relocs);
+ }
++
++ if (!htab->fix_cortex_a8)
++ continue;
++
++ /* Sort relocs which might apply to Cortex-A8 erratum. */
++ qsort (a8_relocs, num_a8_relocs, sizeof (struct a8_erratum_reloc),
++ &a8_reloc_compare);
++
++ /* Scan for branches which might trigger Cortex-A8 erratum. */
++ for (section = input_bfd->sections;
++ section != NULL;
++ section = section->next)
++ {
++ bfd_byte *contents = NULL;
++ struct _arm_elf_section_data *sec_data;
++ unsigned int span;
++ bfd_vma base_vma;
++
++ if (elf_section_type (section) != SHT_PROGBITS
++ || (elf_section_flags (section) & SHF_EXECINSTR) == 0
++ || (section->flags & SEC_EXCLUDE) != 0
++ || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS)
++ || (section->output_section == bfd_abs_section_ptr))
++ continue;
++
++ base_vma = section->output_section->vma
++ + section->output_offset;
++
++ if (elf_section_data (section)->this_hdr.contents != NULL)
++ contents = elf_section_data (section)->this_hdr.contents;
++ else if (! bfd_malloc_and_get_section (input_bfd, section,
++ &contents))
++ goto error_ret_free_local;
++
++ sec_data = elf32_arm_section_data (section);
++
++ for (span = 0; span < sec_data->mapcount; span++)
++ {
++ unsigned int span_start = sec_data->map[span].vma;
++ unsigned int span_end = (span == sec_data->mapcount - 1)
++ ? section->size : sec_data->map[span + 1].vma;
++ unsigned int i;
++ char span_type = sec_data->map[span].type;
++ bfd_boolean last_was_32bit = FALSE;
++
++ if (span_type != 't')
++ continue;
++
++ /* Span is entirely within a single 4KB region: skip
++ scanning. */
++ if (((base_vma + span_start) & ~0xfff)
++ == ((base_vma + span_end) & ~0xfff))
++ continue;
++
++ /* Scan for 32-bit Thumb-2 branches which span two 4K
++ regions, where:
++
++ * The opcode is BLX.W, BL.W, B.W, Bcc.W
++ * The branch target is in the same 4KB region as the
++ first half of the branch.
++ * The instruction before the branch is a 32-bit
++ length non-branch instruction.
++ */
++
++ for (i = span_start; i < span_end;)
++ {
++ unsigned int insn = bfd_getl16 (&contents[i]);
++ bfd_boolean insn_32bit = FALSE;
++
++ if ((insn & 0xe000) == 0xe000
++ && (insn & 0x1800) != 0x0000)
++ insn_32bit = TRUE;
++
++ if (((base_vma + i) & 0xfff) == 0xffe
++ && insn_32bit && last_was_32bit)
++ {
++ bfd_vma offset;
++ bfd_boolean is_blx = FALSE, is_b = FALSE;
++ bfd_boolean is_bl = FALSE, force_target_arm = FALSE;
++ bfd_boolean force_target_thumb = FALSE;
++ bfd_vma target;
++ enum elf32_arm_stub_type stub_type = arm_stub_none;
++ struct a8_erratum_reloc key, *found;
++
++ key.from = base_vma + i;
++ found = bsearch (&key, a8_relocs, num_a8_relocs,
++ sizeof (struct a8_erratum_reloc),
++ &a8_reloc_compare);
++
++ if (found)
++ {
++ char *error_message = NULL;
++ struct elf_link_hash_entry *entry;
++
++ /* We don't care about the error returned from
++ this function, only if there is glue or
++ not. */
++ entry = find_thumb_glue (info, found->sym_name,
++ &error_message);
++
++ if (entry)
++ found->non_a8_stub = TRUE;
++
++ if (found->r_type == R_ARM_THM_CALL
++ && found->st_type != STT_ARM_TFUNC)
++ force_target_arm = TRUE;
++ else if (found->r_type == R_ARM_THM_CALL
++ && found->st_type == STT_ARM_TFUNC)
++ force_target_thumb = TRUE;
++ }
++
++ /* Load the rest of the insn (in manual-friendly
++ order). */
++ insn = (insn << 16)
++ | bfd_getl16 (&contents[i + 2]);
++
++ /* Check if we have an offending branch
++ instruction. */
++
++ /* Encoding T4: B<c>.W. */
++ is_b = (insn & 0xf800d000) == 0xf0009000;
++ /* Encoding T1: BL<c>.W. */
++ is_bl = (insn & 0xf800d000) == 0xf000d000;
++ /* Encoding T2: BLX<c>.W. */
++ is_blx = (insn & 0xf800d000) == 0xf000c000;
++
++ if (found && found->non_a8_stub)
++ /* We've already made a stub for this instruction,
++ e.g. it's a long branch or a Thumb->ARM stub.
++ Assume that stub will suffice to work around the
++ A8 erratum (see setting of always_after_branch
++ above). */
++ ;
++ else if ((insn & 0xf800d000) == 0xf0008000
++ && (insn & 0x07f00000) != 0x03800000)
++ {
++ /* Encoding T3: B<c>.W (not permitted in IT
++ block). */
++ offset = (insn & 0x7ff) << 1;
++ offset |= (insn & 0x3f0000) >> 4;
++ offset |= (insn & 0x2000) ? 0x40000 : 0;
++ offset |= (insn & 0x800) ? 0x80000 : 0;
++ offset |= (insn & 0x4000000) ? 0x100000 : 0;
++ if (offset & 0x100000)
++ offset |= ~0xfffff;
++ stub_type = arm_stub_a8_veneer_b_cond;
++ }
++ else if (is_b || is_bl || is_blx)
++ {
++ int s = (insn & 0x4000000) != 0;
++ int j1 = (insn & 0x2000) != 0;
++ int j2 = (insn & 0x800) != 0;
++ int i1 = !(j1 ^ s);
++ int i2 = !(j2 ^ s);
++
++ offset = (insn & 0x7ff) << 1;
++ offset |= (insn & 0x3ff0000) >> 4;
++ offset |= i2 << 22;
++ offset |= i1 << 23;
++ offset |= s << 24;
++ if (offset & 0x1000000)
++ offset |= ~0xffffff;
++
++ if (is_blx)
++ offset &= ~3u;
++
++ stub_type = is_blx ? arm_stub_a8_veneer_blx :
++ is_bl ? arm_stub_a8_veneer_bl :
++ arm_stub_a8_veneer_b;
++ }
++
++ if (stub_type != arm_stub_none)
++ {
++ bfd_vma pc_for_insn = base_vma + i + 4;
++
++ /* The original instruction is a BL, but the
++ target is an ARM instruction. If we were not
++ making a stub, the BL would have been
++ converted to a BLX. Use the BLX stub instead
++ in that case. */
++ if (htab->use_blx && force_target_arm
++ && stub_type == arm_stub_a8_veneer_bl)
++ {
++ stub_type = arm_stub_a8_veneer_blx;
++ is_blx = TRUE;
++ is_bl = FALSE;
++ }
++ /* Conversely, if the original instruction was
++ BLX but the target is Thumb mode, use the BL
++ stub. */
++ else if (force_target_thumb
++ && stub_type == arm_stub_a8_veneer_blx)
++ {
++ stub_type = arm_stub_a8_veneer_bl;
++ is_blx = FALSE;
++ is_bl = TRUE;
++ }
++
++ if (is_blx)
++ pc_for_insn &= ~3u;
++
++ /* If we found a relocation, use the proper
++ destination, not the offset in the
++ (unrelocated) instruction. Note this is
++ always done if we switched the stub type
++ above. */
++ if (found)
++ offset = found->destination - pc_for_insn;
++
++ target = pc_for_insn + offset;
++
++ /* The BLX stub is ARM-mode code. Adjust the
++ offset to take the different PC value (+8
++ instead of +4) into account. */
++ if (stub_type == arm_stub_a8_veneer_blx)
++ offset += 4;
++
++ if (((base_vma + i) & ~0xfff)
++ == (target & ~0xfff))
++ {
++ char *stub_name;
++
++ if (num_a8_fixes == a8_fix_table_size)
++ {
++ a8_fix_table_size *= 2;
++ a8_fixes = bfd_realloc (a8_fixes,
++ sizeof (struct a8_erratum_fix)
++ * a8_fix_table_size);
++ }
++
++ stub_name = bfd_malloc (8 + 1 + 8 + 1);
++ if (stub_name != NULL)
++ sprintf (stub_name, "%x:%x",
++ section->id, i);
++
++ a8_fixes[num_a8_fixes].input_bfd
++ = input_bfd;
++ a8_fixes[num_a8_fixes].section = section;
++ a8_fixes[num_a8_fixes].offset = i;
++ a8_fixes[num_a8_fixes].addend = offset;
++ a8_fixes[num_a8_fixes].orig_insn = insn;
++ a8_fixes[num_a8_fixes].stub_name
++ = stub_name;
++ a8_fixes[num_a8_fixes].stub_type
++ = stub_type;
++
++ num_a8_fixes++;
++ }
++ }
++ }
++
++ i += insn_32bit ? 4 : 2;
++ last_was_32bit = insn_32bit;
++ }
++ }
++
++ if (elf_section_data (section)->this_hdr.contents == NULL)
++ free (contents);
++ }
+ }
+
++ if (htab->fix_cortex_a8 && num_a8_fixes != prev_num_a8_fixes)
++ stub_changed = TRUE;
++
+ if (!stub_changed)
+ break;
+
+@@ -3729,13 +4439,113 @@ elf32_arm_size_stubs (bfd *output_bfd,
+ for (stub_sec = htab->stub_bfd->sections;
+ stub_sec != NULL;
+ stub_sec = stub_sec->next)
+- stub_sec->size = 0;
++ {
++ /* Ignore non-stub sections. */
++ if (!strstr (stub_sec->name, STUB_SUFFIX))
++ continue;
++
++ stub_sec->size = 0;
++ }
+
+ bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
+
++ /* Add Cortex-A8 erratum veneers to stub section sizes too. */
++ if (htab->fix_cortex_a8)
++ for (i = 0; i < num_a8_fixes; i++)
++ {
++ unsigned int section_id = a8_fixes[i].section->id;
++ asection *link_sec = htab->stub_group[section_id].link_sec;
++ asection *stub_sec = htab->stub_group[section_id].stub_sec;
++
++ /* Copied from elf32_arm_add_stub! Refactor. */
++ if (stub_sec == NULL)
++ {
++ stub_sec = htab->stub_group[link_sec->id].stub_sec;
++ if (stub_sec == NULL)
++ {
++ size_t namelen;
++ bfd_size_type len;
++ char *s_name;
++
++ namelen = strlen (link_sec->name);
++ len = namelen + sizeof (STUB_SUFFIX);
++ s_name = bfd_alloc (htab->stub_bfd, len);
++ if (s_name == NULL)
++ goto error_ret_free_local;
++
++ memcpy (s_name, link_sec->name, namelen);
++ memcpy (s_name + namelen, STUB_SUFFIX,
++ sizeof (STUB_SUFFIX));
++ stub_sec = (*htab->add_stub_section) (s_name, link_sec);
++ if (stub_sec == NULL)
++ goto error_ret_free_local;
++ htab->stub_group[link_sec->id].stub_sec = stub_sec;
++ }
++ htab->stub_group[section_id].stub_sec = stub_sec;
++ }
++
++ stub_sec->size
++ += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
++ NULL);
++ }
++
+ /* Ask the linker to do its stuff. */
+ (*htab->layout_sections_again) ();
+ stub_changed = FALSE;
++ prev_num_a8_fixes = num_a8_fixes;
++ }
++
++ /* Add stubs for Cortex-A8 erratum fixes now. */
++ if (htab->fix_cortex_a8)
++ {
++ for (i = 0; i < num_a8_fixes; i++)
++ {
++ struct elf32_arm_stub_hash_entry *stub_entry;
++ char *stub_name = a8_fixes[i].stub_name;
++ asection *section = a8_fixes[i].section;
++ unsigned int section_id = a8_fixes[i].section->id;
++ asection *link_sec = htab->stub_group[section_id].link_sec;
++ asection *stub_sec = htab->stub_group[section_id].stub_sec;
++ const insn_sequence *template;
++ int template_size, size = 0;
++
++ stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
++ TRUE, FALSE);
++ if (stub_entry == NULL)
++ {
++ (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
++ section->owner,
++ stub_name);
++ return FALSE;
++ }
++
++ stub_entry->stub_sec = stub_sec;
++ stub_entry->stub_offset = 0;
++ stub_entry->id_sec = link_sec;
++ stub_entry->stub_type = a8_fixes[i].stub_type;
++ stub_entry->target_section = a8_fixes[i].section;
++ stub_entry->target_value = a8_fixes[i].offset;
++ stub_entry->target_addend = a8_fixes[i].addend;
++ stub_entry->orig_insn = a8_fixes[i].orig_insn;
++ stub_entry->st_type = STT_ARM_TFUNC;
++
++ size = find_stub_size_and_template (a8_fixes[i].stub_type, &template,
++ &template_size);
++
++ stub_entry->stub_size = size;
++ stub_entry->stub_template = template;
++ stub_entry->stub_template_size = template_size;
++ }
++
++ /* Stash the Cortex-A8 erratum fix array for use later in
++ elf32_arm_write_section(). */
++ htab->a8_erratum_fixes = a8_fixes;
++ htab->num_a8_erratum_fixes = num_a8_fixes;
++ }
++ else
++ {
++ htab->a8_erratum_fixes = NULL;
++ htab->num_a8_erratum_fixes = 0;
+ }
+
+ return TRUE;
+@@ -3913,6 +4723,7 @@ static const insn16 t2a2_noop_insn = 0x4
+ static const insn32 t2a3_b_insn = 0xea000000;
+
+ #define VFP11_ERRATUM_VENEER_SIZE 8
++#define JANUS_2CC_ERRATUM_VENEER_SIZE 12
+
+ #define ARM_BX_VENEER_SIZE 12
+ static const insn32 armbx1_tst_insn = 0xe3100001;
+@@ -3927,7 +4738,16 @@ arm_allocate_glue_section_space (bfd * a
+ bfd_byte * contents;
+
+ if (size == 0)
+- return;
++ {
++ /* Do not include empty glue sections in the output. */
++ if (abfd != NULL)
++ {
++ s = bfd_get_section_by_name (abfd, name);
++ if (s != NULL)
++ s->flags |= SEC_EXCLUDE;
++ }
++ return;
++ }
+
+ BFD_ASSERT (abfd != NULL);
+
+@@ -3964,6 +4784,10 @@ bfd_elf32_arm_allocate_interworking_sect
+ globals->bx_glue_size,
+ ARM_BX_GLUE_SECTION_NAME);
+
++ arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
++ globals->janus_2cc_erratum_glue_size,
++ JANUS_2CC_ERRATUM_VENEER_SECTION_NAME);
++
+ return TRUE;
+ }
+
+@@ -4208,16 +5032,16 @@ elf32_arm_section_map_add (asection *sec
+ }
+ }
+
+-
+-/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
+- veneers are handled for now. */
++/* Record information about a CPU erratum veneer. Only ARM-mode veneers are
++ handled for now. */
+
+ static bfd_vma
+-record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
+- elf32_vfp11_erratum_list *branch,
+- bfd *branch_bfd,
+- asection *branch_sec,
+- unsigned int offset)
++record_cpu_erratum_veneer (struct bfd_link_info *link_info,
++ elf32_cpu_erratum_list *branch,
++ bfd *branch_bfd,
++ asection *branch_sec,
++ unsigned int offset,
++ elf32_cpu_erratum_type erratum_type)
+ {
+ asection *s;
+ struct elf32_arm_link_hash_table *hash_table;
+@@ -4227,27 +5051,43 @@ record_vfp11_erratum_veneer (struct bfd_
+ bfd_vma val;
+ struct _arm_elf_section_data *sec_data;
+ int errcount;
+- elf32_vfp11_erratum_list *newerr;
+-
++ elf32_cpu_erratum_list *newerr;
++ const char *veneer_section_name;
++ const char *veneer_entry_name;
++
++ switch (erratum_type)
++ {
++ case VFP11_ERRATUM_ARM_VENEER:
++ veneer_section_name = VFP11_ERRATUM_VENEER_SECTION_NAME;
++ veneer_entry_name = VFP11_ERRATUM_VENEER_ENTRY_NAME;
++ break;
++
++ case JANUS_2CC_ERRATUM_ARM_VENEER:
++ veneer_section_name = JANUS_2CC_ERRATUM_VENEER_SECTION_NAME;
++ veneer_entry_name = JANUS_2CC_ERRATUM_VENEER_ENTRY_NAME;
++ break;
++
++ default:
++ abort ();
++ }
++
+ hash_table = elf32_arm_hash_table (link_info);
+
+ BFD_ASSERT (hash_table != NULL);
+ BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
+
+ s = bfd_get_section_by_name
+- (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
++ (hash_table->bfd_of_glue_owner, veneer_section_name);
+
+ sec_data = elf32_arm_section_data (s);
+
+ BFD_ASSERT (s != NULL);
+
+- tmp_name = bfd_malloc ((bfd_size_type) strlen
+- (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
++ tmp_name = bfd_malloc (MAX_ERRATUM_SYMBOL_LENGTH);
+
+ BFD_ASSERT (tmp_name);
+
+- sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
+- hash_table->num_vfp11_fixes);
++ sprintf (tmp_name, veneer_entry_name, hash_table->num_errata_fixes, "");
+
+ myh = elf_link_hash_lookup
+ (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
+@@ -4255,7 +5095,21 @@ record_vfp11_erratum_veneer (struct bfd_
+ BFD_ASSERT (myh == NULL);
+
+ bh = NULL;
+- val = hash_table->vfp11_erratum_glue_size;
++
++ switch (erratum_type)
++ {
++ case VFP11_ERRATUM_ARM_VENEER:
++ val = hash_table->vfp11_erratum_glue_size;
++ break;
++
++ case JANUS_2CC_ERRATUM_ARM_VENEER:
++ val = hash_table->janus_2cc_erratum_glue_size;
++ break;
++
++ default:
++ abort ();
++ }
++
+ _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
+ tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
+ NULL, TRUE, FALSE, &bh);
+@@ -4266,20 +5120,19 @@ record_vfp11_erratum_veneer (struct bfd_
+
+ /* Link veneer back to calling location. */
+ errcount = ++(sec_data->erratumcount);
+- newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
++ newerr = bfd_zmalloc (sizeof (elf32_cpu_erratum_list));
+
+- newerr->type = VFP11_ERRATUM_ARM_VENEER;
++ newerr->type = erratum_type;
+ newerr->vma = -1;
+ newerr->u.v.branch = branch;
+- newerr->u.v.id = hash_table->num_vfp11_fixes;
++ newerr->u.v.id = hash_table->num_errata_fixes;
+ branch->u.b.veneer = newerr;
+
+ newerr->next = sec_data->erratumlist;
+ sec_data->erratumlist = newerr;
+
+ /* A symbol for the return from the veneer. */
+- sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
+- hash_table->num_vfp11_fixes);
++ sprintf (tmp_name, veneer_entry_name, hash_table->num_errata_fixes, "_r");
+
+ myh = elf_link_hash_lookup
+ (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
+@@ -4300,7 +5153,10 @@ record_vfp11_erratum_veneer (struct bfd_
+
+ /* Generate a mapping symbol for the veneer section, and explicitly add an
+ entry for that symbol to the code/data map for the section. */
+- if (hash_table->vfp11_erratum_glue_size == 0)
++ if ((erratum_type == VFP11_ERRATUM_ARM_VENEER
++ && hash_table->vfp11_erratum_glue_size == 0)
++ || (erratum_type == JANUS_2CC_ERRATUM_ARM_VENEER
++ && hash_table->janus_2cc_erratum_glue_size == 0))
+ {
+ bh = NULL;
+ /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
+@@ -4321,19 +5177,31 @@ record_vfp11_erratum_veneer (struct bfd_
+ elf32_arm_section_map_add (s, 'a', 0);
+ }
+
+- s->size += VFP11_ERRATUM_VENEER_SIZE;
+- hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
+- hash_table->num_vfp11_fixes++;
++ switch (erratum_type)
++ {
++ case VFP11_ERRATUM_ARM_VENEER:
++ s->size += VFP11_ERRATUM_VENEER_SIZE;
++ hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
++ break;
++
++ case JANUS_2CC_ERRATUM_ARM_VENEER:
++ s->size += JANUS_2CC_ERRATUM_VENEER_SIZE;
++ hash_table->janus_2cc_erratum_glue_size += JANUS_2CC_ERRATUM_VENEER_SIZE;
++ break;
++
++ default:
++ abort ();
++ }
++
++ hash_table->num_errata_fixes++;
+
+ /* The offset of the veneer. */
+ return val;
+ }
+
+-/* Note: we do not include the flag SEC_LINKER_CREATED, as that
+- would prevent elf_link_input_bfd() from processing the contents
+- of the section. */
+ #define ARM_GLUE_SECTION_FLAGS \
+- (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY)
++ (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
++ | SEC_READONLY | SEC_LINKER_CREATED)
+
+ /* Create a fake section for use by the ARM backend of the linker. */
+
+@@ -4372,10 +5240,6 @@ bfd_elf32_arm_add_glue_sections_to_bfd (
+ if (info->relocatable)
+ return TRUE;
+
+- /* Linker stubs don't need glue. */
+- if (!strcmp (abfd->filename, "linker stubs"))
+- return TRUE;
+-
+ return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
+ && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
+ && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
+@@ -4648,6 +5512,47 @@ bfd_elf32_arm_init_maps (bfd *abfd)
+ }
+
+
++/* Check we're not doing applying the (invasive) Janus 2CC erratum fix
++ unnecessarily. */
++
++void
++bfd_elf32_arm_validate_janus_2cc_fix (bfd *obfd,
++ struct bfd_link_info *link_info)
++{
++ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
++ obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
++
++ /* Janus 2CC is archv4t. We should never need the fix on higher architecture
++ versions, so emit an error in that case. */
++ if (globals->fix_janus_2cc
++ && out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V5T)
++ (*_bfd_error_handler) (_("%B: error: Janus 2CC erratum workaround cannot "
++ "be used with selected target architecture"), obfd);
++}
++
++
++/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
++ say what they wanted. */
++
++void
++bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd ATTRIBUTE_UNUSED,
++ struct bfd_link_info *link_info)
++{
++ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
++ obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
++
++ if (globals->fix_cortex_a8 == -1)
++ {
++ /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
++ if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
++ && (out_attr[Tag_CPU_arch_profile].i == 'A'
++ || out_attr[Tag_CPU_arch_profile].i == 0))
++ globals->fix_cortex_a8 = 1;
++ else
++ globals->fix_cortex_a8 = 0;
++ }
++}
++
+ void
+ bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
+ {
+@@ -4671,10 +5576,10 @@ bfd_elf32_arm_set_vfp11_fix (bfd *obfd,
+ }
+ }
+ else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
+- /* For earlier architectures, we might need the workaround, but do not
+- enable it by default. If users is running with broken hardware, they
+- must enable the erratum fix explicitly. */
+- globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
++ /* For earlier architectures, we might need the workaround. The compiler
++ only generates scalar code at present, so this should be sufficient in
++ most cases. */
++ globals->vfp11_fix = BFD_ARM_VFP11_FIX_SCALAR;
+ }
+
+
+@@ -5112,13 +6017,13 @@ bfd_elf32_arm_vfp11_erratum_scan (bfd *a
+
+ if (state == 3)
+ {
+- elf32_vfp11_erratum_list *newerr
+- = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
++ elf32_cpu_erratum_list *newerr
++ = bfd_zmalloc (sizeof (elf32_cpu_erratum_list));
+ int errcount;
+
+ errcount = ++(elf32_arm_section_data (sec)->erratumcount);
+
+- newerr->u.b.vfp_insn = veneer_of_insn;
++ newerr->u.b.orig_insn = veneer_of_insn;
+
+ switch (span_type)
+ {
+@@ -5130,8 +6035,9 @@ bfd_elf32_arm_vfp11_erratum_scan (bfd *a
+ abort ();
+ }
+
+- record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
+- first_fmac);
++ record_cpu_erratum_veneer (link_info, newerr, abfd, sec,
++ first_fmac,
++ VFP11_ERRATUM_ARM_VENEER);
+
+ newerr->vma = -1;
+
+@@ -5165,8 +6071,8 @@ error_return:
+ after sections have been laid out, using specially-named symbols. */
+
+ void
+-bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
+- struct bfd_link_info *link_info)
++bfd_elf32_arm_fix_veneer_locations (bfd *abfd,
++ struct bfd_link_info *link_info)
+ {
+ asection *sec;
+ struct elf32_arm_link_hash_table *globals;
+@@ -5181,13 +6087,12 @@ bfd_elf32_arm_vfp11_fix_veneer_locations
+
+ globals = elf32_arm_hash_table (link_info);
+
+- tmp_name = bfd_malloc ((bfd_size_type) strlen
+- (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
++ tmp_name = bfd_malloc (MAX_ERRATUM_SYMBOL_LENGTH);
+
+ for (sec = abfd->sections; sec != NULL; sec = sec->next)
+ {
+ struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
+- elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
++ elf32_cpu_erratum_list *errnode = sec_data->erratumlist;
+
+ for (; errnode != NULL; errnode = errnode->next)
+ {
+@@ -5200,7 +6105,7 @@ bfd_elf32_arm_vfp11_fix_veneer_locations
+ case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
+ /* Find veneer symbol. */
+ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
+- errnode->u.b.veneer->u.v.id);
++ errnode->u.b.veneer->u.v.id, "");
+
+ myh = elf_link_hash_lookup
+ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
+@@ -5216,11 +6121,30 @@ bfd_elf32_arm_vfp11_fix_veneer_locations
+ errnode->u.b.veneer->vma = vma;
+ break;
+
++ case JANUS_2CC_ERRATUM_BRANCH_TO_ARM_VENEER:
++ /* Find veneer symbol. */
++ sprintf (tmp_name, JANUS_2CC_ERRATUM_VENEER_ENTRY_NAME,
++ errnode->u.b.veneer->u.v.id, "");
++
++ myh = elf_link_hash_lookup
++ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
++
++ if (myh == NULL)
++ (*_bfd_error_handler) (_("%B: unable to find Janus 2CC veneer "
++ "`%s'"), abfd, tmp_name);
++
++ vma = myh->root.u.def.section->output_section->vma
++ + myh->root.u.def.section->output_offset
++ + myh->root.u.def.value;
++
++ errnode->u.b.veneer->vma = vma;
++ break;
++
+ case VFP11_ERRATUM_ARM_VENEER:
+ case VFP11_ERRATUM_THUMB_VENEER:
+ /* Find return location. */
+- sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
+- errnode->u.v.id);
++ sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
++ errnode->u.v.id, "_r");
+
+ myh = elf_link_hash_lookup
+ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
+@@ -5236,6 +6160,25 @@ bfd_elf32_arm_vfp11_fix_veneer_locations
+ errnode->u.v.branch->vma = vma;
+ break;
+
++ case JANUS_2CC_ERRATUM_ARM_VENEER:
++ /* Find return location. */
++ sprintf (tmp_name, JANUS_2CC_ERRATUM_VENEER_ENTRY_NAME,
++ errnode->u.v.id, "_r");
++
++ myh = elf_link_hash_lookup
++ (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
++
++ if (myh == NULL)
++ (*_bfd_error_handler) (_("%B: unable to find Janus 2CC veneer "
++ "`%s'"), abfd, tmp_name);
++
++ vma = myh->root.u.def.section->output_section->vma
++ + myh->root.u.def.section->output_offset
++ + myh->root.u.def.value;
++
++ errnode->u.v.branch->vma = vma;
++ break;
++
+ default:
+ abort ();
+ }
+@@ -5246,6 +6189,183 @@ bfd_elf32_arm_vfp11_fix_veneer_locations
+ }
+
+
++/* Look for instruction sequences which can trigger the Janus 2CC shifter
++ erratum. Any instruction which uses a register-specified shift, which is
++ not followed by a NOP instruction, is susceptible.
++
++ NOTE: This function is only meant to work for architecture v4t, as
++ implemented by Janus 2CC (see bfd_elf32_arm_validate_janus_2cc_fix).
++ Instruction encodings for later architectures (e.g. ARM blx, Thumb-2) will
++ not be handled correctly. */
++
++bfd_boolean
++bfd_elf32_arm_janus_2cc_erratum_scan (bfd *abfd,
++ struct bfd_link_info *link_info)
++{
++ asection *sec;
++ bfd_byte *contents = NULL;
++ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
++
++ /* Don't do anything if Janus 2CC fix is not enabled. */
++ if (!globals->fix_janus_2cc)
++ return TRUE;
++
++ /* If we are only performing a partial link do not bother
++ to construct any glue. */
++ if (link_info->relocatable)
++ return TRUE;
++
++ /* Skip if this bfd does not correspond to an ELF image. */
++ if (! is_arm_elf (abfd))
++ return TRUE;
++
++ /* Skip this BFD if it corresponds to an executable or dynamic object. */
++ if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
++ return TRUE;
++
++ for (sec = abfd->sections; sec != NULL; sec = sec->next)
++ {
++ unsigned int i, next_i, span, veneer_of_insn = 0;
++ struct _arm_elf_section_data *sec_data;
++
++ /* If we don't have executable progbits, we're not interested in this
++ section. Also skip if section is to be excluded. */
++ if (elf_section_type (sec) != SHT_PROGBITS
++ || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
++ || (sec->flags & SEC_EXCLUDE) != 0
++ || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS
++ || sec->output_section == bfd_abs_section_ptr
++ || strcmp (sec->name, JANUS_2CC_ERRATUM_VENEER_SECTION_NAME) == 0)
++ continue;
++
++ sec_data = elf32_arm_section_data (sec);
++
++ if (sec_data->mapcount == 0)
++ continue;
++
++ if (elf_section_data (sec)->this_hdr.contents != NULL)
++ contents = elf_section_data (sec)->this_hdr.contents;
++ else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
++ goto error_return;
++
++ qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
++ elf32_arm_compare_mapping);
++
++ for (span = 0; span < sec_data->mapcount; span++)
++ {
++ unsigned int span_start = sec_data->map[span].vma;
++ unsigned int span_end = (span == sec_data->mapcount - 1)
++ ? sec->size : sec_data->map[span + 1].vma;
++ char span_type = sec_data->map[span].type;
++ int state = 0;
++
++ switch (span_type)
++ {
++ case 'a':
++ for (i = span_start; i < span_end;)
++ {
++ unsigned int insn = bfd_get_32 (abfd, contents + i);
++
++ next_i = i + 4;
++
++ switch (state)
++ {
++ case 0:
++ /* Data processing insn with register shift. */
++ if (((insn & 0x0e000090) == 0x00000010)
++ && ((insn & 0x0ff000f0) != 0x01200010)) /* bx. */
++ {
++ veneer_of_insn = insn;
++ state = 1;
++ }
++ break;
++
++ case 1:
++ /* Not a NOP (only accept mov r0, r0). */
++ if ((insn & 0x0fffffff) != 0x01a00000)
++ {
++ elf32_cpu_erratum_list *newerr;
++ int errcount;
++
++ /* Lose if Rd, Rn or Rm is PC. Don't bother
++ checking Rs. */
++ if ((veneer_of_insn & 0x000f0000) == 0x000f0000
++ || (veneer_of_insn & 0x0000f000) == 0x0000f000
++ || (veneer_of_insn & 0x0000000f) == 0x0000000f)
++ (*_bfd_error_handler) (_("%B(%A+0x%lx): error: ARM "
++ "instruction sequence using PC triggers "
++ "Janus 2CC erratum (must be fixed manually)"),
++ abfd, sec, i);
++
++ newerr
++ = bfd_zmalloc (sizeof (elf32_cpu_erratum_list));
++
++ errcount
++ = ++(elf32_arm_section_data (sec)->erratumcount);
++
++ newerr->u.b.orig_insn = veneer_of_insn;
++ newerr->type = JANUS_2CC_ERRATUM_BRANCH_TO_ARM_VENEER;
++
++ record_cpu_erratum_veneer (link_info, newerr, abfd,
++ sec, i - 4, JANUS_2CC_ERRATUM_ARM_VENEER);
++
++ newerr->vma = -1;
++
++ newerr->next = sec_data->erratumlist;
++ sec_data->erratumlist = newerr;
++ /* Re-scan current instruction in case of adjacent
++ trigger insns. */
++ next_i = i;
++ }
++ state = 0;
++ break;
++ }
++
++ i = next_i;
++ }
++ break;
++
++ case 't':
++ for (i = span_start; i < span_end; i += 2)
++ {
++ unsigned short insn = bfd_get_16 (abfd, contents + i);
++
++ switch (state)
++ {
++ case 0:
++ if (((insn & 0xffc0) == 0x4100) /* ASR. */
++ || ((insn & 0xffc0) == 0x4080) /* LSL. */
++ || ((insn & 0xffc0) == 0x40c0) /* LSR. */
++ || ((insn & 0xffc0) == 0x41c0)) /* ROR. */
++ state = 1;
++ break;
++
++ case 1:
++ /* Not a NOP (only accept cpy r8, r8). */
++ if (insn != 0x46c0)
++ (*_bfd_error_handler) (_("%B(%A+0x%lx): error: Thumb "
++ "instruction sequence triggers Janus 2CC erratum "
++ "(must be fixed manually)"),
++ abfd, sec, i);
++ state = 0;
++ break;
++ }
++ }
++ break;
++
++ default:
++ ;
++ }
++ }
++ }
++
++ return TRUE;
++
++error_return:
++ return FALSE;
++}
++
++
+ /* Set target relocation values needed during linking. */
+
+ void
+@@ -5257,7 +6377,8 @@ bfd_elf32_arm_set_target_relocs (struct
+ int use_blx,
+ bfd_arm_vfp11_fix vfp11_fix,
+ int no_enum_warn, int no_wchar_warn,
+- int pic_veneer)
++ int pic_veneer, int fix_janus_2cc,
++ int fix_cortex_a8)
+ {
+ struct elf32_arm_link_hash_table *globals;
+
+@@ -5279,6 +6400,8 @@ bfd_elf32_arm_set_target_relocs (struct
+ globals->use_blx |= use_blx;
+ globals->vfp11_fix = vfp11_fix;
+ globals->pic_veneer = pic_veneer;
++ globals->fix_janus_2cc = fix_janus_2cc;
++ globals->fix_cortex_a8 = fix_cortex_a8;
+
+ BFD_ASSERT (is_arm_elf (output_bfd));
+ elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
+@@ -7933,72 +9056,378 @@ elf32_arm_relocate_section (bfd *
+ ELF_ST_TYPE (sym->st_info)), h,
+ &unresolved_reloc, &error_message);
+
+- /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
+- because such sections are not SEC_ALLOC and thus ld.so will
+- not process them. */
+- if (unresolved_reloc
+- && !((input_section->flags & SEC_DEBUGGING) != 0
+- && h->def_dynamic))
++ /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
++ because such sections are not SEC_ALLOC and thus ld.so will
++ not process them. */
++ if (unresolved_reloc
++ && !((input_section->flags & SEC_DEBUGGING) != 0
++ && h->def_dynamic))
++ {
++ (*_bfd_error_handler)
++ (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
++ input_bfd,
++ input_section,
++ (long) rel->r_offset,
++ howto->name,
++ h->root.root.string);
++ return FALSE;
++ }
++
++ if (r != bfd_reloc_ok)
++ {
++ switch (r)
++ {
++ case bfd_reloc_overflow:
++ /* If the overflowing reloc was to an undefined symbol,
++ we have already printed one error message and there
++ is no point complaining again. */
++ if ((! h ||
++ h->root.type != bfd_link_hash_undefined)
++ && (!((*info->callbacks->reloc_overflow)
++ (info, (h ? &h->root : NULL), name, howto->name,
++ (bfd_vma) 0, input_bfd, input_section,
++ rel->r_offset))))
++ return FALSE;
++ break;
++
++ case bfd_reloc_undefined:
++ if (!((*info->callbacks->undefined_symbol)
++ (info, name, input_bfd, input_section,
++ rel->r_offset, TRUE)))
++ return FALSE;
++ break;
++
++ case bfd_reloc_outofrange:
++ error_message = _("out of range");
++ goto common_error;
++
++ case bfd_reloc_notsupported:
++ error_message = _("unsupported relocation");
++ goto common_error;
++
++ case bfd_reloc_dangerous:
++ /* error_message should already be set. */
++ goto common_error;
++
++ default:
++ error_message = _("unknown error");
++ /* Fall through. */
++
++ common_error:
++ BFD_ASSERT (error_message != NULL);
++ if (!((*info->callbacks->reloc_dangerous)
++ (info, error_message, input_bfd, input_section,
++ rel->r_offset)))
++ return FALSE;
++ break;
++ }
++ }
++ }
++
++ return TRUE;
++}
++
++/* Add a new unwind edit to the list described by HEAD, TAIL. If INDEX is zero,
++ adds the edit to the start of the list. (The list must be built in order of
++ ascending INDEX: the function's callers are primarily responsible for
++ maintaining that condition). */
++
++static void
++add_unwind_table_edit (arm_unwind_table_edit **head,
++ arm_unwind_table_edit **tail,
++ arm_unwind_edit_type type,
++ asection *linked_section,
++ unsigned int index)
++{
++ arm_unwind_table_edit *new_edit = xmalloc (sizeof (arm_unwind_table_edit));
++
++ new_edit->type = type;
++ new_edit->linked_section = linked_section;
++ new_edit->index = index;
++
++ if (index > 0)
++ {
++ new_edit->next = NULL;
++
++ if (*tail)
++ (*tail)->next = new_edit;
++
++ (*tail) = new_edit;
++
++ if (!*head)
++ (*head) = new_edit;
++ }
++ else
++ {
++ new_edit->next = *head;
++
++ if (!*tail)
++ *tail = new_edit;
++
++ *head = new_edit;
++ }
++}
++
++static _arm_elf_section_data *get_arm_elf_section_data (asection *);
++
++/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
++static void
++adjust_exidx_size(asection *exidx_sec, int adjust)
++{
++ asection *out_sec;
++
++ if (!exidx_sec->rawsize)
++ exidx_sec->rawsize = exidx_sec->size;
++
++ bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
++ out_sec = exidx_sec->output_section;
++ /* Adjust size of output section. */
++ bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
++}
++
++/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
++static void
++insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
++{
++ struct _arm_elf_section_data *exidx_arm_data;
++
++ exidx_arm_data = get_arm_elf_section_data (exidx_sec);
++ add_unwind_table_edit (
++ &exidx_arm_data->u.exidx.unwind_edit_list,
++ &exidx_arm_data->u.exidx.unwind_edit_tail,
++ INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
++
++ adjust_exidx_size(exidx_sec, 8);
++}
++
++/* Scan .ARM.exidx tables, and create a list describing edits which should be
++ made to those tables, such that:
++
++ 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
++ 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
++ codes which have been inlined into the index).
++
++ The edits are applied when the tables are written
++ (in elf32_arm_write_section).
++*/
++
++bfd_boolean
++elf32_arm_fix_exidx_coverage (asection **text_section_order,
++ unsigned int num_text_sections,
++ struct bfd_link_info *info)
++{
++ bfd *inp;
++ unsigned int last_second_word = 0, i;
++ asection *last_exidx_sec = NULL;
++ asection *last_text_sec = NULL;
++ int last_unwind_type = -1;
++
++ /* Walk over all EXIDX sections, and create backlinks from the corrsponding
++ text sections. */
++ for (inp = info->input_bfds; inp != NULL; inp = inp->link_next)
++ {
++ asection *sec;
++
++ for (sec = inp->sections; sec != NULL; sec = sec->next)
++ {
++ struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
++ Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
++
++ if (hdr->sh_type != SHT_ARM_EXIDX)
++ continue;
++
++ if (elf_sec->linked_to)
++ {
++ Elf_Internal_Shdr *linked_hdr
++ = &elf_section_data (elf_sec->linked_to)->this_hdr;
++ struct _arm_elf_section_data *linked_sec_arm_data
++ = get_arm_elf_section_data (linked_hdr->bfd_section);
++
++ if (linked_sec_arm_data == NULL)
++ continue;
++
++ /* Link this .ARM.exidx section back from the text section it
++ describes. */
++ linked_sec_arm_data->u.text.arm_exidx_sec = sec;
++ }
++ }
++ }
++
++ /* Walk all text sections in order of increasing VMA. Eilminate duplicate
++ index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
++ and add EXIDX_CANTUNWIND entries for sections with no unwind table data.
++ */
++
++ for (i = 0; i < num_text_sections; i++)
++ {
++ asection *sec = text_section_order[i];
++ asection *exidx_sec;
++ struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
++ struct _arm_elf_section_data *exidx_arm_data;
++ bfd_byte *contents = NULL;
++ int deleted_exidx_bytes = 0;
++ bfd_vma j;
++ arm_unwind_table_edit *unwind_edit_head = NULL;
++ arm_unwind_table_edit *unwind_edit_tail = NULL;
++ Elf_Internal_Shdr *hdr;
++ bfd *ibfd;
++
++ if (arm_data == NULL)
++ continue;
++
++ exidx_sec = arm_data->u.text.arm_exidx_sec;
++ if (exidx_sec == NULL)
+ {
+- (*_bfd_error_handler)
+- (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
+- input_bfd,
+- input_section,
+- (long) rel->r_offset,
+- howto->name,
+- h->root.root.string);
+- return FALSE;
++ /* Section has no unwind data. */
++ if (last_unwind_type == 0 || !last_exidx_sec)
++ continue;
++
++ /* Ignore zero sized sections. */
++ if (sec->size == 0)
++ continue;
++
++ insert_cantunwind_after(last_text_sec, last_exidx_sec);
++ last_unwind_type = 0;
++ continue;
+ }
+
+- if (r != bfd_reloc_ok)
++ if (bfd_is_abs_section (exidx_sec->output_section))
++ /* The linker script probably has /DISCARD/ for this section. */
++ continue;
++
++ hdr = &elf_section_data (exidx_sec)->this_hdr;
++ if (hdr->sh_type != SHT_ARM_EXIDX)
++ continue;
++
++ exidx_arm_data = get_arm_elf_section_data (exidx_sec);
++ if (exidx_arm_data == NULL)
++ continue;
++
++ ibfd = exidx_sec->owner;
++
++ if (hdr->contents != NULL)
++ contents = hdr->contents;
++ else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
++ /* An error? */
++ continue;
++
++ for (j = 0; j < hdr->sh_size; j += 8)
+ {
+- switch (r)
++ unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
++ int unwind_type;
++ int elide = 0;
++
++ /* An EXIDX_CANTUNWIND entry. */
++ if (second_word == 1)
+ {
+- case bfd_reloc_overflow:
+- /* If the overflowing reloc was to an undefined symbol,
+- we have already printed one error message and there
+- is no point complaining again. */
+- if ((! h ||
+- h->root.type != bfd_link_hash_undefined)
+- && (!((*info->callbacks->reloc_overflow)
+- (info, (h ? &h->root : NULL), name, howto->name,
+- (bfd_vma) 0, input_bfd, input_section,
+- rel->r_offset))))
+- return FALSE;
+- break;
++ if (last_unwind_type == 0)
++ elide = 1;
++ unwind_type = 0;
++ }
++ /* Inlined unwinding data. Merge if equal to previous. */
++ else if ((second_word & 0x80000000) != 0)
++ {
++ if (last_second_word == second_word && last_unwind_type == 1)
++ elide = 1;
++ unwind_type = 1;
++ last_second_word = second_word;
++ }
++ /* Normal table entry. In theory we could merge these too,
++ but duplicate entries are likely to be much less common. */
++ else
++ unwind_type = 2;
+
+- case bfd_reloc_undefined:
+- if (!((*info->callbacks->undefined_symbol)
+- (info, name, input_bfd, input_section,
+- rel->r_offset, TRUE)))
+- return FALSE;
+- break;
++ if (elide)
++ {
++ add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
++ DELETE_EXIDX_ENTRY, NULL, j / 8);
+
+- case bfd_reloc_outofrange:
+- error_message = _("out of range");
+- goto common_error;
++ deleted_exidx_bytes += 8;
++ }
+
+- case bfd_reloc_notsupported:
+- error_message = _("unsupported relocation");
+- goto common_error;
++ last_unwind_type = unwind_type;
++ }
+
+- case bfd_reloc_dangerous:
+- /* error_message should already be set. */
+- goto common_error;
++ /* Free contents if we allocated it ourselves. */
++ if (contents != hdr->contents)
++ free (contents);
+
+- default:
+- error_message = _("unknown error");
+- /* Fall through. */
++ /* Record edits to be applied later (in elf32_arm_write_section). */
++ exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
++ exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
++
++ if (deleted_exidx_bytes > 0)
++ adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
++
++ last_exidx_sec = exidx_sec;
++ last_text_sec = sec;
++ }
+
+- common_error:
+- BFD_ASSERT (error_message != NULL);
+- if (!((*info->callbacks->reloc_dangerous)
+- (info, error_message, input_bfd, input_section,
+- rel->r_offset)))
+- return FALSE;
+- break;
+- }
+- }
++ /* Add terminating CANTUNWIND entry. */
++ if (last_exidx_sec && last_unwind_type != 0)
++ insert_cantunwind_after(last_text_sec, last_exidx_sec);
++
++ return TRUE;
++}
++
++static bfd_boolean
++elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
++ bfd *ibfd, const char *name)
++{
++ asection *sec, *osec;
++
++ sec = bfd_get_section_by_name (ibfd, name);
++ if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
++ return TRUE;
++
++ osec = sec->output_section;
++ if (elf32_arm_write_section (obfd, info, sec, sec->contents))
++ return TRUE;
++
++ if (! bfd_set_section_contents (obfd, osec, sec->contents,
++ sec->output_offset, sec->size))
++ return FALSE;
++
++ return TRUE;
++}
++
++static bfd_boolean
++elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
++{
++ struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
++
++ /* Invoke the regular ELF backend linker to do all the work. */
++ if (!bfd_elf_final_link (abfd, info))
++ return FALSE;
++
++ /* Write out any glue sections now that we have created all the
++ stubs. */
++ if (globals->bfd_of_glue_owner != NULL)
++ {
++ if (! elf32_arm_output_glue_section (info, abfd,
++ globals->bfd_of_glue_owner,
++ ARM2THUMB_GLUE_SECTION_NAME))
++ return FALSE;
++
++ if (! elf32_arm_output_glue_section (info, abfd,
++ globals->bfd_of_glue_owner,
++ THUMB2ARM_GLUE_SECTION_NAME))
++ return FALSE;
++
++ if (! elf32_arm_output_glue_section (info, abfd,
++ globals->bfd_of_glue_owner,
++ VFP11_ERRATUM_VENEER_SECTION_NAME))
++ return FALSE;
++
++ if (! elf32_arm_output_glue_section (info, abfd,
++
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