--- /dev/null
+/*
+ * TP-LINK TL-WDR3320 v2 board support
+ *
+ * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2015 Weijie Gao <hackpascal@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/pci.h>
+#include <linux/phy.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/ath9k_platform.h>
+
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#include "common.h"
+#include "dev-ap9x-pci.h"
+#include "dev-eth.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
+#include "dev-spi.h"
+#include "dev-usb.h"
+#include "dev-wmac.h"
+#include "machtypes.h"
+
+#define WDR3320_GPIO_LED_WLAN5G 12
+#define WDR3320_GPIO_LED_SYSTEM 14
+#define WDR3320_GPIO_LED_QSS 15
+#define WDR3320_GPIO_LED_WAN 4
+#define WDR3320_GPIO_LED_LAN1 18
+#define WDR3320_GPIO_LED_LAN2 20
+#define WDR3320_GPIO_LED_LAN3 21
+#define WDR3320_GPIO_LED_LAN4 22
+
+#define WDR3320_GPIO_BTN_RESET 16
+
+#define WDR3320_KEYS_POLL_INTERVAL 20 /* msecs */
+#define WDR3320_KEYS_DEBOUNCE_INTERVAL (3 * WDR3320_KEYS_POLL_INTERVAL)
+
+#define WDR3320_WMAC_CALDATA_OFFSET 0x1000
+#define WDR3320_PCIE_CALDATA_OFFSET 0x5000
+
+static const char *wdr3320_part_probes[] = {
+ "tp-link",
+ NULL,
+};
+
+static struct flash_platform_data wdr3320_flash_data = {
+ .part_probes = wdr3320_part_probes,
+};
+
+static struct gpio_led wdr3320_leds_gpio[] __initdata = {
+ {
+ .name = "tp-link:green:qss",
+ .gpio = WDR3320_GPIO_LED_QSS,
+ .active_low = 1,
+ },
+ {
+ .name = "tp-link:green:system",
+ .gpio = WDR3320_GPIO_LED_SYSTEM,
+ .active_low = 1,
+ },
+ {
+ .name = "tp-link:green:wlan5g",
+ .gpio = WDR3320_GPIO_LED_WLAN5G,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button wdr3320_gpio_keys[] __initdata = {
+ {
+ .desc = "reset",
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = WDR3320_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = WDR3320_GPIO_BTN_RESET,
+ .active_low = 1,
+ },
+};
+
+static void __init wdr3320_setup(void)
+{
+ u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 tmpmac[ETH_ALEN];
+
+ ath79_register_m25p80(&wdr3320_flash_data);
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3320_leds_gpio),
+ wdr3320_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, WDR3320_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(wdr3320_gpio_keys),
+ wdr3320_gpio_keys);
+
+ ath79_init_mac(tmpmac, mac, 0);
+ ath79_register_wmac(art + WDR3320_WMAC_CALDATA_OFFSET, tmpmac);
+
+ ath79_init_mac(tmpmac, mac, -1);
+ ap9x_pci_setup_wmac_led_pin(0, 0);
+ ap91_pci_init(art + WDR3320_PCIE_CALDATA_OFFSET, tmpmac);
+
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE);
+
+ ath79_register_mdio(1, 0x0);
+
+ /* LAN */
+ ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
+
+ /* GMAC1 is connected to the internal switch */
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+
+ ath79_register_eth(1);
+
+ /* WAN */
+ ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
+
+ /* GMAC0 is connected to the PHY4 of the internal switch */
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_switch_data.phy_poll_mask = BIT(4);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
+
+ ath79_register_eth(0);
+
+ ath79_register_usb();
+
+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN1,
+ AR934X_GPIO_OUT_LED_LINK0);
+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN2,
+ AR934X_GPIO_OUT_LED_LINK1);
+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN3,
+ AR934X_GPIO_OUT_LED_LINK2);
+ ath79_gpio_output_select(WDR3320_GPIO_LED_LAN4,
+ AR934X_GPIO_OUT_LED_LINK3);
+ ath79_gpio_output_select(WDR3320_GPIO_LED_WAN,
+ AR934X_GPIO_OUT_LED_LINK4);
+}
+
+MIPS_MACHINE(ATH79_MACH_TL_WDR3320_V2, "TL-WDR3320-v2",
+ "TP-LINK TL-WDR3320 v2",
+ wdr3320_setup);
$(if $(findstring sysupgrade,$1),-s) && mv $@.new $@ || rm -f $@
endef
+define Build/mktplinkfw-chn-v2
+ -$(STAGING_DIR_HOST)/bin/mktplinkfw \
+ -H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) -m 2 \
+ -k $(word 1,$^) \
+ -r $@ \
+ -o $@.new \
+ -j -X 0x40000 \
+ -a $(call rootfs_align,$(FILESYSTEM)) \
+ $(if $(findstring sysupgrade,$1),-s) && mv $@.new $@ || rm -f $@
+endef
+
# -c combined image
define Build/mktplinkfw-initramfs
$(STAGING_DIR_HOST)/bin/mktplinkfw \
@mv $@.new $@
endef
+define Build/mktplinkfw-initramfs-chn-v2
+ $(STAGING_DIR_HOST)/bin/mktplinkfw \
+ -H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) -N OpenWrt -V $(REVISION) -m 2 \
+ -k $@ \
+ -o $@.new \
+ -s -S \
+ -c
+ @mv $@.new $@
+endef
+
define Build/loader-common
rm -rf $@.src
$(MAKE) -C lzma-loader \
IMAGE/factory.bin := append-rootfs | mktplinkfw factory
endef
+define Device/tplink-chn-v2
+ TPLINK_HWREV := 0x1
+ KERNEL := kernel-bin | patch-cmdline | lzma
+ KERNEL_INITRAMFS := kernel-bin | patch-cmdline | lzma | mktplinkfw-initramfs-chn-v2
+ IMAGES := sysupgrade.bin factory.bin
+ IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw-chn-v2 sysupgrade
+ IMAGE/factory.bin := append-rootfs | mktplinkfw-chn-v2 factory
+endef
+
define Device/tplink-nolzma
$(Device/tplink)
LOADER_FLASH_OFFS := 0x22000
IMAGE_SIZE := 15872k
endef
+define Device/tplink-chn-v2-4mlzma
+$(Device/tplink-chn-v2)
+ TPLINK_FLASHLAYOUT := 4Mlzma
+ IMAGE_SIZE := 3904k
+endef
+
define Device/tl-wdr4300-v1
$(Device/tplink-8mlzma)
BOARDNAME = TL-WDR4300
$(Device/tl-wdr4300-v1)
TPLINK_HWID := 0x45300001
endef
-TARGET_DEVICES += tl-wdr3500-v1 tl-wdr3600-v1 tl-wdr4300-v1 tl-wdr4300-v1-il tl-wdr4310-v1 mw4530r-v1
+
+define Device/tl-wdr3320-v2
+$(Device/tplink-chn-v2-4mlzma)
+ BOARDNAME = TL-WDR3320-v2
+ DEVICE_PROFILE = TLWDR3320V2
+ TPLINK_HWID := 0x33200002
+endef
+
+TARGET_DEVICES += tl-wdr3500-v1 tl-wdr3600-v1 tl-wdr4300-v1 tl-wdr4300-v1-il tl-wdr4310-v1 mw4530r-v1 tl-wdr3320-v2
define Device/archer-c5
$(Device/tplink-16mlzma)
--- /dev/null
+--- a/arch/mips/ath79/Kconfig
++++ b/arch/mips/ath79/Kconfig
+@@ -1031,6 +1031,17 @@
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_WMAC
+
++config ATH79_MACH_TL_WDR3320_V2
++ bool "TP-LINK TL-WDR3320 v2 board support"
++ select SOC_AR934X
++ select ATH79_DEV_AP9X_PCI if PCI
++ select ATH79_DEV_ETH
++ select ATH79_DEV_GPIO_BUTTONS
++ select ATH79_DEV_LEDS_GPIO
++ select ATH79_DEV_M25P80
++ select ATH79_DEV_USB
++ select ATH79_DEV_WMAC
++
+ config ATH79_MACH_TL_WDR3500
+ bool "TP-LINK TL-WDR3500 board support"
+ select SOC_AR934X
+--- a/arch/mips/ath79/machtypes.h
++++ b/arch/mips/ath79/machtypes.h
+@@ -152,6 +152,7 @@
+ ATH79_MACH_TL_WA901ND, /* TP-LINK TL-WA901ND */
+ ATH79_MACH_TL_WA901ND_V2, /* TP-LINK TL-WA901ND v2 */
+ ATH79_MACH_TL_WA901ND_V3, /* TP-LINK TL-WA901ND v3 */
++ ATH79_MACH_TL_WDR3320_V2, /* TP-LINK TL-WDR3320 v2 */
+ ATH79_MACH_TL_WDR3500, /* TP-LINK TL-WDR3500 */
+ ATH79_MACH_TL_WDR4300, /* TP-LINK TL-WDR4300 */
+ ATH79_MACH_TL_WDR6500_V2, /* TP-LINK TL-WDR6500 v2 */
+--- a/arch/mips/ath79/Makefile
++++ b/arch/mips/ath79/Makefile
+@@ -128,6 +128,7 @@
+ obj-$(CONFIG_ATH79_MACH_TL_WA830RE_V2) += mach-tl-wa830re-v2.o
+ obj-$(CONFIG_ATH79_MACH_TL_WA901ND) += mach-tl-wa901nd.o
+ obj-$(CONFIG_ATH79_MACH_TL_WA901ND_V2) += mach-tl-wa901nd-v2.o
++obj-$(CONFIG_ATH79_MACH_TL_WDR3320_V2) += mach-tl-wdr3320-v2.o
+ obj-$(CONFIG_ATH79_MACH_TL_WDR3500) += mach-tl-wdr3500.o
+ obj-$(CONFIG_ATH79_MACH_TL_WDR4300) += mach-tl-wdr4300.o
+ obj-$(CONFIG_ATH79_MACH_TL_WDR6500_V2) += mach-tl-wdr6500-v2.o
projects / openwrt / openwrt.git / commitdiff