layerscape: drop linux 4.4 support
authorYangbo Lu <yangbo.lu@nxp.com>
Fri, 22 Sep 2017 07:57:12 +0000 (15:57 +0800)
committerJohn Crispin <john@phrozen.org>
Sat, 7 Oct 2017 21:13:22 +0000 (23:13 +0200)
This patch is to drop linux 4.4 for layerscape.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
251 files changed:
target/linux/layerscape/armv8_32b/config-default [deleted file]
target/linux/layerscape/armv8_64b/config-default [deleted file]
target/linux/layerscape/config-4.4 [deleted file]
target/linux/layerscape/patches-4.4/0051-PCI-designware-Ensure-ATU-is-enabled-before-IO-conf-.patch [deleted file]
target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch [deleted file]
target/linux/layerscape/patches-4.4/0053-PCI-designware-Make-config-accessor-override-checkin.patch [deleted file]
target/linux/layerscape/patches-4.4/0054-PCI-designware-Explain-why-we-don-t-program-ATU-for-.patch [deleted file]
target/linux/layerscape/patches-4.4/0055-PCI-designware-Remove-PCI_PROBE_ONLY-handling.patch [deleted file]
target/linux/layerscape/patches-4.4/0056-PCI-designware-Add-generic-dw_pcie_wait_for_link.patch [deleted file]
target/linux/layerscape/patches-4.4/0057-PCI-designware-Add-default-link-up-check-if-sub-driv.patch [deleted file]
target/linux/layerscape/patches-4.4/0058-PCI-designware-Move-Root-Complex-setup-code-to-dw_pc.patch [deleted file]
target/linux/layerscape/patches-4.4/0059-PCI-designware-Remove-incorrect-RC-memory-base-limit.patch [deleted file]
target/linux/layerscape/patches-4.4/0140-config-add-freescale-config-for-amr64.patch [deleted file]
target/linux/layerscape/patches-4.4/0238-arm64-disable-CONFIG_EEPROM_AT24-for-freescale.confi.patch [deleted file]
target/linux/layerscape/patches-4.4/0239-ARM-dts-ls1021a-add-PCIe-dts-node.patch [deleted file]
target/linux/layerscape/patches-4.4/0240-ARM-dts-ls1021a-add-SCFG-MSI-dts-node.patch [deleted file]
target/linux/layerscape/patches-4.4/0241-dt-bindings-Add-bindings-for-Layerscape-SCFG-MSI.patch [deleted file]
target/linux/layerscape/patches-4.4/1074-mtd-nand-spi-nor-assign-MTD-of_node.patch [deleted file]
target/linux/layerscape/patches-4.4/1075-mtd-spi-nor-convert-to-spi_nor_-get-set-_flash_node.patch [deleted file]
target/linux/layerscape/patches-4.4/1076-mtd-spi-nor-drop-unnecessary-partition-parser-data.patch [deleted file]
target/linux/layerscape/patches-4.4/1077-mtd-add-get-set-of_node-flash_node-helpers.patch [deleted file]
target/linux/layerscape/patches-4.4/1078-mtd-spi-nor-drop-flash_node-field.patch [deleted file]
target/linux/layerscape/patches-4.4/1079-mtd-spi-nor-remove-unnecessary-leading-space-from-db.patch [deleted file]
target/linux/layerscape/patches-4.4/1080-mtd-fsl-quadspi-possible-NULL-dereference.patch [deleted file]
target/linux/layerscape/patches-4.4/1081-mtd-spi-nor-provide-default-erase_sector-implementat.patch [deleted file]
target/linux/layerscape/patches-4.4/1083-mtd-spi-nor-Fix-error-message-with-unrecognized-JEDE.patch [deleted file]
target/linux/layerscape/patches-4.4/1084-mtd-spi-nor-fix-error-handling-in-spi_nor_erase.patch [deleted file]
target/linux/layerscape/patches-4.4/1085-mtd-spi-nor-Check-the-return-value-from-read_sr.patch [deleted file]
target/linux/layerscape/patches-4.4/1086-mtd-spi-nor-wait-until-lock-unlock-operations-are-re.patch [deleted file]
target/linux/layerscape/patches-4.4/1087-mtd-spi-nor-fsl-quadspi-add-big-endian-support.patch [deleted file]
target/linux/layerscape/patches-4.4/1088-mtd-spi-nor-fsl-quadspi-add-support-for-ls1021a.patch [deleted file]
target/linux/layerscape/patches-4.4/1089-mtd-spi-nor-fsl-quadspi-add-support-for-layerscape.patch [deleted file]
target/linux/layerscape/patches-4.4/1090-mtd-spi-nor-Add-SPI-NOR-layer-PM-support.patch [deleted file]
target/linux/layerscape/patches-4.4/1091-mtd-spi-nor-change-return-value-of-read-write.patch [deleted file]
target/linux/layerscape/patches-4.4/1092-mtd-fsl-quadspi-return-amount-of-data-read-written-o.patch [deleted file]
target/linux/layerscape/patches-4.4/1093-mtd-spi-nor-check-return-value-from-read-write.patch [deleted file]
target/linux/layerscape/patches-4.4/1094-mtd-spi-nor-stop-passing-around-retlen.patch [deleted file]
target/linux/layerscape/patches-4.4/1095-mtd-spi-nor-simplify-write-loop.patch [deleted file]
target/linux/layerscape/patches-4.4/1096-mtd-spi-nor-add-read-loop.patch [deleted file]
target/linux/layerscape/patches-4.4/1097-mtd-fsl-quadspi-use-the-property-fields-of-SPI-NOR.patch [deleted file]
target/linux/layerscape/patches-4.4/1098-mtd-fsl-quadspi-Rename-SEQID_QUAD_READ-to-SEQID_READ.patch [deleted file]
target/linux/layerscape/patches-4.4/1099-mtd-spi-nor-fsl-quadspi-Add-fast-read-mode-support.patch [deleted file]
target/linux/layerscape/patches-4.4/1100-mtd-spi_nor-Disable-Micron-flash-HW-protection.patch [deleted file]
target/linux/layerscape/patches-4.4/1101-mtd-spi-nor-fsl-quadspi-extend-support-for-some-spec.patch [deleted file]
target/linux/layerscape/patches-4.4/1102-mtd-spi-nor-fsl-quadspi-Support-qspi-for-ls2080a.patch [deleted file]
target/linux/layerscape/patches-4.4/1103-mtd-spi-nor-Support-R-W-for-S25FS-S-family-flash.patch [deleted file]
target/linux/layerscape/patches-4.4/1104-mtd-fsl-quadspi-Add-quad-mode-for-flash-n25q128.patch [deleted file]
target/linux/layerscape/patches-4.4/1105-mtd-spi-nor-add-DDR-quad-read-support.patch [deleted file]
target/linux/layerscape/patches-4.4/1106-mtd-fsl-quadspi-add-DDR-quad-read-for-Spansion.patch [deleted file]
target/linux/layerscape/patches-4.4/1107-mtd-fsl-quadspi-disable-AHB-buffer-prefetch.patch [deleted file]
target/linux/layerscape/patches-4.4/1108-mtd-fsl-quadspi-add-multi-flash-chip-R-W-on-ls2080a.patch [deleted file]
target/linux/layerscape/patches-4.4/1109-drivers-mtd-spi-nor-Enable-QSPI-Flash-in-Kernel.patch [deleted file]
target/linux/layerscape/patches-4.4/1110-mtd-spi-nor-fsl-quad-add-flash-S25FS-extra-support.patch [deleted file]
target/linux/layerscape/patches-4.4/1111-mtd-spi-nor-disable-4kb-sector-erase-for-s25fl128.patch [deleted file]
target/linux/layerscape/patches-4.4/1112-driver-spi-fsl-quad-Hang-memcpy-Unhandled-fault-alig.patch [deleted file]
target/linux/layerscape/patches-4.4/1113-mtd-spi-nor-fsl-quad-move-mtd_device_register-to-the.patch [deleted file]
target/linux/layerscape/patches-4.4/1239-mtd-extend-physmap_of-to-let-the-device-tree-specify.patch [deleted file]
target/linux/layerscape/patches-4.4/2006-armv8-aarch32-Add-the-default-config-ls_aarch32_defc.patch [deleted file]
target/linux/layerscape/patches-4.4/2027-armv8-aarch32-update-defconfig-for-LayerScape-SoC.patch [deleted file]
target/linux/layerscape/patches-4.4/2119-armv8-aarch32-defconfig-Enable-CAAM-support.patch [deleted file]
target/linux/layerscape/patches-4.4/2120-armv8-aarch32-defconfig-Enable-firmware-loading.patch [deleted file]
target/linux/layerscape/patches-4.4/2121-armv8-aarch32-defconfig-Enable-support-for-AHCI-SATA.patch [deleted file]
target/linux/layerscape/patches-4.4/2122-armv8-aarch32-defconfig-Enable-USB-and-related-confi.patch [deleted file]
target/linux/layerscape/patches-4.4/2123-armv8-aarch32-defconfig-Enable-KVM-related-configura.patch [deleted file]
target/linux/layerscape/patches-4.4/2124-armv8-aarch32-defconfig-Enable-FTM-alarm-support.patch [deleted file]
target/linux/layerscape/patches-4.4/3001-arm64-ls1043a-add-DTS-for-Freescale-LS1043A-SoC.patch [deleted file]
target/linux/layerscape/patches-4.4/3002-dts-ls1043a-add-LS1043ARDB-board-support.patch [deleted file]
target/linux/layerscape/patches-4.4/3003-arm64-dts-Update-address-cells-and-reg-properties-of.patch [deleted file]
target/linux/layerscape/patches-4.4/3004-armv8-aarch32-Add-ITS-file-for-AArch32-Linux-on-LS10.patch [deleted file]
target/linux/layerscape/patches-4.4/3005-armv8-aarch32-change-FS-file-name-in-ITS.patch [deleted file]
target/linux/layerscape/patches-4.4/3007-armv8-aarch32-Run-32-bit-Linux-in-AArch32-execution-.patch [deleted file]
target/linux/layerscape/patches-4.4/3008-armv8-aarch32-Add-SMP-support-for-32-bit-Linux.patch [deleted file]
target/linux/layerscape/patches-4.4/3009-armv8-aarch32-Allow-RAM-to-be-mapped-for-LayerScape-.patch [deleted file]
target/linux/layerscape/patches-4.4/3010-arm-add-pgprot_cached-and-pgprot_cached_ns-support.patch [deleted file]
target/linux/layerscape/patches-4.4/3011-arm-add-new-non-shareable-ioremap.patch [deleted file]
target/linux/layerscape/patches-4.4/3012-dts-ls1043a-add-fman-bman-qman-ethernet-nodes.patch [deleted file]
target/linux/layerscape/patches-4.4/3013-dts-ls1043ardb-add-mdio-phy-nodes.patch [deleted file]
target/linux/layerscape/patches-4.4/3022-dt-move-guts-devicetree-doc-out-of-powerpc-directory.patch [deleted file]
target/linux/layerscape/patches-4.4/3023-powerpc-fsl-move-mpc85xx.h-to-include-linux-fsl.patch [deleted file]
target/linux/layerscape/patches-4.4/3025-arm64-dts-align-to-the-new-clocking-model.patch [deleted file]
target/linux/layerscape/patches-4.4/3028-dts-ls1043-update-dts-for-ls1043.patch [deleted file]
target/linux/layerscape/patches-4.4/3032-arm64-Add-pdev_archdata-for-dmamask.patch [deleted file]
target/linux/layerscape/patches-4.4/3033-arm64-add-ioremap-for-normal-cacheable-non-shareable.patch [deleted file]
target/linux/layerscape/patches-4.4/3034-arm64-add-support-to-remap-kernel-cacheable-memory-t.patch [deleted file]
target/linux/layerscape/patches-4.4/3035-arm64-pgtable-add-support-to-map-cacheable-and-non-s.patch [deleted file]
target/linux/layerscape/patches-4.4/3039-arch-arm-add-ARM-specific-fucntions-required-for-ehc.patch [deleted file]
target/linux/layerscape/patches-4.4/3063-arm64-add-NO_IRQ-macro.patch [deleted file]
target/linux/layerscape/patches-4.4/3071-arm64-dts-add-device-tree-for-ls1012a-SoC-and-boards.patch [deleted file]
target/linux/layerscape/patches-4.4/3117-armv8-aarch32-Run-32-bit-Linux-for-LayerScape-SoCs.patch [deleted file]
target/linux/layerscape/patches-4.4/3118-armv8-aarch32-Add-KVM-support-for-AArch32-on-ARMv8.patch [deleted file]
target/linux/layerscape/patches-4.4/3131-arm64-ls1046a-add-DTS-for-Freescale-LS1046A-SoC.patch [deleted file]
target/linux/layerscape/patches-4.4/3132-dts-ls1046a-add-LS1046ARDB-board-support.patch [deleted file]
target/linux/layerscape/patches-4.4/3133-ls1046ardb-add-ITS-file.patch [deleted file]
target/linux/layerscape/patches-4.4/3135-arm64-Add-DTS-support-for-FSL-s-LS1088ARDB.patch [deleted file]
target/linux/layerscape/patches-4.4/3139-ls1088ardb-add-ITS-file.patch [deleted file]
target/linux/layerscape/patches-4.4/3141-caam-add-caam-node-for-ls1088a.patch [deleted file]
target/linux/layerscape/patches-4.4/3143-armv8-aarch32-Execute-32-bit-Linux-for-ls1046a.patch [deleted file]
target/linux/layerscape/patches-4.4/3226-mtd-spi-nor-fsl-quadspi-Enable-fast-read-for-LS1088A.patch [deleted file]
target/linux/layerscape/patches-4.4/3227-ls2088a-dts-add-ls2088a-dts.patch [deleted file]
target/linux/layerscape/patches-4.4/3228-ls2088a-add-ls2088a-its.patch [deleted file]
target/linux/layerscape/patches-4.4/3229-arm-dts-ls1021a-fix-typo-of-MSI-compatible-string.patch [deleted file]
target/linux/layerscape/patches-4.4/3230-arm64-dts-ls1043a-fix-typo-of-MSI-compatible-string.patch [deleted file]
target/linux/layerscape/patches-4.4/3231-arm-dts-ls1021a-share-all-MSIs.patch [deleted file]
target/linux/layerscape/patches-4.4/3232-arm64-dts-ls1043a-share-all-MSIs.patch [deleted file]
target/linux/layerscape/patches-4.4/3233-arm64-dts-ls1046a-update-MSI-dts-node.patch [deleted file]
target/linux/layerscape/patches-4.4/3234-dts-ls1043a-change-GIC-register-for-rev1.1.patch [deleted file]
target/linux/layerscape/patches-4.4/4043-driver-memory-Removal-of-deprecated-NO_IRQ.patch [deleted file]
target/linux/layerscape/patches-4.4/4044-drivers-memory-Add-deep-sleep-support-for-IFC.patch [deleted file]
target/linux/layerscape/patches-4.4/4045-driver-memory-Update-dependency-of-IFC-for-Layerscap.patch [deleted file]
target/linux/layerscape/patches-4.4/4046-mtd-ifc-Segregate-IFC-fcm-and-runtime-registers.patch [deleted file]
target/linux/layerscape/patches-4.4/4047-drivers-memory-Fix-build-error-for-arm64.patch [deleted file]
target/linux/layerscape/patches-4.4/4234-fsl-ifc-fix-compilation-error-when-COMPAT-not-enable.patch [deleted file]
target/linux/layerscape/patches-4.4/7014-temp-QE-headers-are-needed-by-FMD.patch [deleted file]
target/linux/layerscape/patches-4.4/7015-fmd-add-fman-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7016-dpa-add-dpaa_eth-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7017-fsl_qbman-add-qbman-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7018-devres-add-devm_alloc_percpu.patch [deleted file]
target/linux/layerscape/patches-4.4/7019-net-readd-skb_recycle.patch [deleted file]
target/linux/layerscape/patches-4.4/7020-net-add-custom-NETIF-flags.patch [deleted file]
target/linux/layerscape/patches-4.4/7021-net-Make-the-netdev-watchdog-aware-of-hardware-multi.patch [deleted file]
target/linux/layerscape/patches-4.4/7024-Add-APIs-to-setup-HugeTLB-mappings-for-USDPAA.patch [deleted file]
target/linux/layerscape/patches-4.4/7029-fmd-SGMII-PCS-needs-to-be-reprogrammed-after-sleep.patch [deleted file]
target/linux/layerscape/patches-4.4/7030-fmd-use-kernel-api-for-64bit-division.patch [deleted file]
target/linux/layerscape/patches-4.4/7031-fsl_qbman-Enable-DPAA1-QBMan-for-ARM64-platforms.patch [deleted file]
target/linux/layerscape/patches-4.4/7064-dpaa_eth-repair-issue-introduced-with-2.5G-support.patch [deleted file]
target/linux/layerscape/patches-4.4/7065-dpaa_eth-replace-sgmii-2500-with-qsgmii.patch [deleted file]
target/linux/layerscape/patches-4.4/7066-fmd-add-2.5G-SGMII-mode-suport.patch [deleted file]
target/linux/layerscape/patches-4.4/7067-net-phy-add-SGMII-2500-PHY.patch [deleted file]
target/linux/layerscape/patches-4.4/7068-dpaa_ethernet-fix-link-state-detect-for-10G-interfac.patch [deleted file]
target/linux/layerscape/patches-4.4/7072-LS1012-Add-PPFE-driver-in-Linux.patch [deleted file]
target/linux/layerscape/patches-4.4/7126-net-phy-add-driver-for-aquantia-AQR106-107-phy.patch [deleted file]
target/linux/layerscape/patches-4.4/7144-dpaa-call-arch_setup_dma_ops-before-using-dma_ops.patch [deleted file]
target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch [deleted file]
target/linux/layerscape/patches-4.4/7146-staging-fsl-mc-Added-GICv3-ITS-support-for-FSL-MC-MS.patch [deleted file]
target/linux/layerscape/patches-4.4/7147-staging-fsl-mc-Extended-MC-bus-allocator-to-include-.patch [deleted file]
target/linux/layerscape/patches-4.4/7148-staging-fsl-mc-Changed-DPRC-built-in-portal-s-mc_io-.patch [deleted file]
target/linux/layerscape/patches-4.4/7149-staging-fsl-mc-Populate-the-IRQ-pool-for-an-MC-bus-i.patch [deleted file]
target/linux/layerscape/patches-4.4/7150-staging-fsl-mc-set-MSI-domain-for-DPRC-objects.patch [deleted file]
target/linux/layerscape/patches-4.4/7151-staging-fsl-mc-Fixed-bug-in-dprc_probe-error-path.patch [deleted file]
target/linux/layerscape/patches-4.4/7152-staging-fsl-mc-Added-DPRC-interrupt-handler.patch [deleted file]
target/linux/layerscape/patches-4.4/7153-staging-fsl-mc-Added-MSI-support-to-the-MC-bus-drive.patch [deleted file]
target/linux/layerscape/patches-4.4/7154-staging-fsl-mc-Remove-unneeded-parentheses.patch [deleted file]
target/linux/layerscape/patches-4.4/7155-staging-fsl-mc-Do-not-allow-building-as-a-module.patch [deleted file]
target/linux/layerscape/patches-4.4/7156-staging-fsl-mc-Avoid-section-mismatch.patch [deleted file]
target/linux/layerscape/patches-4.4/7157-staging-fsl-mc-Remove-unneeded-else-following-a-retu.patch [deleted file]
target/linux/layerscape/patches-4.4/7158-staging-fsl-mc-Drop-unneeded-void-pointer-cast.patch [deleted file]
target/linux/layerscape/patches-4.4/7159-staging-fsl-mc-bus-Eliminate-double-function-call.patch [deleted file]
target/linux/layerscape/patches-4.4/7160-Staging-fsl-mc-Replace-pr_debug-with-dev_dbg.patch [deleted file]
target/linux/layerscape/patches-4.4/7161-Staging-fsl-mc-Replace-pr_err-with-dev_err.patch [deleted file]
target/linux/layerscape/patches-4.4/7162-staging-fsl-mc-fix-incorrect-type-passed-to-dev_dbg-.patch [deleted file]
target/linux/layerscape/patches-4.4/7163-staging-fsl-mc-fix-incorrect-type-passed-to-dev_err-.patch [deleted file]
target/linux/layerscape/patches-4.4/7164-staging-fsl-mc-get-rid-of-mutex_locked-variables.patch [deleted file]
target/linux/layerscape/patches-4.4/7165-staging-fsl-mc-TODO-updates.patch [deleted file]
target/linux/layerscape/patches-4.4/7166-staging-fsl-mc-DPAA2-overview-readme-update.patch [deleted file]
target/linux/layerscape/patches-4.4/7167-staging-fsl-mc-update-dpmcp-binary-interface-to-v3.0.patch [deleted file]
target/linux/layerscape/patches-4.4/7168-staging-fsl-mc-update-dpbp-binary-interface-to-v2.2.patch [deleted file]
target/linux/layerscape/patches-4.4/7169-staging-fsl-mc-update-dprc-binary-interface-to-v5.1.patch [deleted file]
target/linux/layerscape/patches-4.4/7170-staging-fsl-mc-don-t-use-object-versions-to-make-bin.patch [deleted file]
target/linux/layerscape/patches-4.4/7171-staging-fsl-mc-set-up-coherent-dma-ops-for-added-dev.patch [deleted file]
target/linux/layerscape/patches-4.4/7172-staging-fsl-mc-set-cacheable-flag-for-added-devices-.patch [deleted file]
target/linux/layerscape/patches-4.4/7173-staging-fsl-mc-get-version-of-root-dprc-from-MC-hard.patch [deleted file]
target/linux/layerscape/patches-4.4/7174-staging-fsl-mc-add-dprc-version-check.patch [deleted file]
target/linux/layerscape/patches-4.4/7175-staging-fsl-mc-add-quirk-handling-for-dpseci-objects.patch [deleted file]
target/linux/layerscape/patches-4.4/7176-staging-fsl-mc-add-dpmcp-version-check.patch [deleted file]
target/linux/layerscape/patches-4.4/7177-staging-fsl-mc-return-EINVAL-for-all-fsl_mc_portal_a.patch [deleted file]
target/linux/layerscape/patches-4.4/7178-staging-fsl-mc-bus-Drop-warning.patch [deleted file]
target/linux/layerscape/patches-4.4/7179-staging-fsl-mc-add-support-for-the-modalias-sysfs-at.patch [deleted file]
target/linux/layerscape/patches-4.4/7180-staging-fsl-mc-implement-uevent-callback-and-set-the.patch [deleted file]
target/linux/layerscape/patches-4.4/7181-staging-fsl-mc-clean-up-the-device-id-struct.patch [deleted file]
target/linux/layerscape/patches-4.4/7182-staging-fsl-mc-add-support-for-device-table-matching.patch [deleted file]
target/linux/layerscape/patches-4.4/7183-staging-fsl-mc-export-mc_get_version.patch [deleted file]
target/linux/layerscape/patches-4.4/7184-staging-fsl-mc-make-fsl_mc_is_root_dprc-global.patch [deleted file]
target/linux/layerscape/patches-4.4/7185-staging-fsl-mc-fix-asymmetry-in-destroy-of-mc_io.patch [deleted file]
target/linux/layerscape/patches-4.4/7186-staging-fsl-mc-dprc-add-missing-irq-free.patch [deleted file]
target/linux/layerscape/patches-4.4/7187-staging-fsl-mc-dprc-fix-ordering-problem-freeing-res.patch [deleted file]
target/linux/layerscape/patches-4.4/7188-staging-fsl-mc-properly-set-hwirq-in-msi-set_desc.patch [deleted file]
target/linux/layerscape/patches-4.4/7189-staging-fsl-mc-update-dpcon-binary-interface-to-v2.2.patch [deleted file]
target/linux/layerscape/patches-4.4/7190-staging-fsl-mc-root-dprc-rescan-attribute-to-sync-ke.patch [deleted file]
target/linux/layerscape/patches-4.4/7191-staging-fsl-mc-bus-rescan-attribute-to-sync-kernel-w.patch [deleted file]
target/linux/layerscape/patches-4.4/7192-staging-fsl-mc-Propagate-driver_override-for-a-child.patch [deleted file]
target/linux/layerscape/patches-4.4/7193-staging-fsl-mc-add-device-binding-path-driver_overri.patch [deleted file]
target/linux/layerscape/patches-4.4/7194-staging-fsl-mc-export-irq-cleanup-for-vfio-to-use.patch [deleted file]
target/linux/layerscape/patches-4.4/7195-increment-MC_CMD_COMPLETION_TIMEOUT_MS.patch [deleted file]
target/linux/layerscape/patches-4.4/7196-staging-fsl-mc-make-fsl_mc_get_root_dprc-public.patch [deleted file]
target/linux/layerscape/patches-4.4/7197-staging-fsl-mc-Management-Complex-restool-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7198-staging-fsl-mc-dpio-services-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7199-dpaa2-dpio-Cosmetic-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7200-staging-fsl-mc-dpio-driver-match-id-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7201-staging-dpaa2-eth-initial-commit-of-dpaa2-eth-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7202-staging-fsl-dpaa2-eth-code-cleanup-for-upstreaming.patch [deleted file]
target/linux/layerscape/patches-4.4/7203-fsl-dpaa2-eth-Update-description-of-DPNI-counters.patch [deleted file]
target/linux/layerscape/patches-4.4/7204-fsl-dpaa2-eth-dpni-Clear-compiler-warnings.patch [deleted file]
target/linux/layerscape/patches-4.4/7205-fsl-dpaa2-eth-sanitize-supported-private-flags.patch [deleted file]
target/linux/layerscape/patches-4.4/7206-fsl-dpaa2-eth-match-id-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7207-fsl-dpaa2-eth-add-device-table-to-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7208-staging-fsl-dpaa2-mac-Added-MAC-PHY-interface-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7209-staging-fsl-dpaa2-mac-Interrupt-code-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7210-staging-fsl-dpaa2-mac-Fix-unregister_netdev-issue.patch [deleted file]
target/linux/layerscape/patches-4.4/7211-staging-fsl-dpaa2-mac-Don-t-call-devm_free_irq.patch [deleted file]
target/linux/layerscape/patches-4.4/7212-staging-fsl-dpaa2-mac-Use-of_property_read_32.patch [deleted file]
target/linux/layerscape/patches-4.4/7213-staging-fsl-dpaa2-mac-Remove-version-checks.patch [deleted file]
target/linux/layerscape/patches-4.4/7214-staging-fsl-dpaa2-mac-match-id-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7215-dpaa2-evb-Added-Edge-Virtual-Bridge-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7216-dpaa2-evb-Fix-interrupt-handling.patch [deleted file]
target/linux/layerscape/patches-4.4/7217-dpaa2-evb-Add-object-version-check.patch [deleted file]
target/linux/layerscape/patches-4.4/7218-dpaa2-evb-Cosmetic-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7219-dpaa2-evb-match-id-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7220-dpaa2-ethsw-Ethernet-Switch-driver.patch [deleted file]
target/linux/layerscape/patches-4.4/7221-dpaa2-ethsw-match-id-cleanup.patch [deleted file]
target/linux/layerscape/patches-4.4/7222-dpaa2-ethsw-fix-compile-error-on-backport-to-4.4.patch [deleted file]
target/linux/layerscape/patches-4.4/7223-irqdomain-Added-domain-bus-token-DOMAIN_BUS_FSL_MC_M.patch [deleted file]
target/linux/layerscape/patches-4.4/7224-fsl-mc-msi-Added-FSL-MC-specific-member-to-the-msi_d.patch [deleted file]
target/linux/layerscape/patches-4.4/7225-dpaa2-evb-fix-4.4-backport-compile-error.patch [deleted file]
target/linux/layerscape/patches-4.4/7226-dpaa_eth-fix-adjust_link-for-10G-2.5G.patch [deleted file]
target/linux/layerscape/patches-4.4/8026-cpufreq-qoriq-Don-t-look-at-clock-implementation-det.patch [deleted file]
target/linux/layerscape/patches-4.4/8036-ls2085a-Add-support-for-reset.patch [deleted file]
target/linux/layerscape/patches-4.4/8037-ls1043a-Add-support-for-reset.patch [deleted file]
target/linux/layerscape/patches-4.4/8038-reset-driver-Kconfig-Change-define-to-ARCH_LAYERSCAP.patch [deleted file]
target/linux/layerscape/patches-4.4/8042-drivers-gpio-Port-gpio-driver-to-support-layerscape-.patch [deleted file]
target/linux/layerscape/patches-4.4/8048-mmc-sdhci-of-esdhc-add-remove-some-quirks-according-.patch [deleted file]
target/linux/layerscape/patches-4.4/8049-PCI-layerscape-Add-fsl-ls2085a-pcie-compatible-ID.patch [deleted file]
target/linux/layerscape/patches-4.4/8050-PCI-layerscape-Fix-MSG-TLP-drop-setting.patch [deleted file]
target/linux/layerscape/patches-4.4/8060-irqchip-Add-Layerscape-SCFG-MSI-controller-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8061-arm64-layerscape-Enable-PCIe-for-Layerscape.patch [deleted file]
target/linux/layerscape/patches-4.4/8062-armv8-aarch32-enable-pci_domains-for-armv8-32bit.patch [deleted file]
target/linux/layerscape/patches-4.4/8073-ls1012a-added-clock-configuration.patch [deleted file]
target/linux/layerscape/patches-4.4/8114-drivers-PCIE-enable-for-Linux.patch [deleted file]
target/linux/layerscape/patches-4.4/8115-PCI-layerscape-call-dw_pcie_setup_rc-in-host-initial.patch [deleted file]
target/linux/layerscape/patches-4.4/8125-rtc-pcf2127-add-pcf2129-device-id.patch [deleted file]
target/linux/layerscape/patches-4.4/8127-ls1046a-msi-Add-LS1046A-MSI-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8128-pci-layerscape-add-LS1046A-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8129-clk-qoriq-add-ls1046a-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8130-ls1046a-sata-Add-LS1046A-sata-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8134-pci-layerscape-add-LUT-DBG-reigster-offset-member.patch [deleted file]
target/linux/layerscape/patches-4.4/8136-drivers-mmc-Add-compatible-string-for-LS1088A.patch [deleted file]
target/linux/layerscape/patches-4.4/8137-armv8-ls1088a-Add-PCIe-compatible.patch [deleted file]
target/linux/layerscape/patches-4.4/8138-pci-layerscape-add-MSI-interrupt-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8142-drivers-mmc-Add-compatible-string-for-LS1046A.patch [deleted file]
target/linux/layerscape/patches-4.4/8229-drivers-clk-qoriq-Add-ls2088a-key-to-chipinfo-table.patch [deleted file]
target/linux/layerscape/patches-4.4/8230-layerscape-pci-fix-linkup-issue.patch [deleted file]
target/linux/layerscape/patches-4.4/8231-driver-clk-qoriq-Add-ls2088a-clk-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8233-i2c-pca954x-Add-option-to-skip-disabling-PCA954x-Mux.patch [deleted file]
target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch [deleted file]
target/linux/layerscape/patches-4.4/8236-clk-add-API-of-clks.patch [deleted file]
target/linux/layerscape/patches-4.4/8237-pcie-ls208x-use-unified-compatible-fsl-ls2080a-pcie-.patch [deleted file]
target/linux/layerscape/patches-4.4/8238-irqchip-ls-scfg-msi-fix-typo-of-MSI-compatible-strin.patch [deleted file]
target/linux/layerscape/patches-4.4/8239-irqchip-ls-scfg-msi-add-LS1046a-MSI-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8240-irqchip-ls-scfg-msi-add-LS1043a-v1.1-MSI-support.patch [deleted file]
target/linux/layerscape/patches-4.4/8241-irqchip-ls-scfg-msi-add-MSI-affinity-support.patch [deleted file]
target/linux/layerscape/patches-4.4/9069-Revert-arm64-simplify-dma_get_ops.patch [deleted file]
target/linux/layerscape/patches-4.4/9070-Revert-arm64-use-fixmap-region-for-permanent-FDT-map.patch [deleted file]

diff --git a/target/linux/layerscape/armv8_32b/config-default b/target/linux/layerscape/armv8_32b/config-default
deleted file mode 100644 (file)
index 7aa0dd5..0000000
+++ /dev/null
@@ -1,152 +0,0 @@
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_ARCH_AXXIA is not set
-CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_MXC=y
-CONFIG_ARCH_NR_GPIO=0
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_ARM=y
-# CONFIG_ARM_CPU_SUSPEND is not set
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_ARM_ERRATA_764369=y
-CONFIG_ARM_ERRATA_775420=y
-CONFIG_ARM_HAS_SG_CHAIN=y
-CONFIG_ARM_HEAVY_MB=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-CONFIG_ARM_LPAE=y
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-CONFIG_ARM_PMU=y
-CONFIG_ARM_THUMB=y
-# CONFIG_ARM_THUMBEE is not set
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ATAGS=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_CACHE_L2X0=y
-CONFIG_CLKSRC_IMX_GPT=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_COMMON=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
-CONFIG_CPU_HAS_ASID=y
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_PABRT_V7=y
-# CONFIG_CPU_THERMAL is not set
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_DEBUG_IMX_UART_PORT=1
-CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
-# CONFIG_DEBUG_UART_8250 is not set
-# CONFIG_DEBUG_USER is not set
-CONFIG_EDAC_ATOMIC_SCRUB=y
-# CONFIG_ENABLE_DEFAULT_TRACERS is not set
-CONFIG_EXTCON=y
-CONFIG_FEC=y
-# CONFIG_FSL_QMAN_FQ_LOOKUP is not set
-# CONFIG_FTRACE_SYSCALLS is not set
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GPIO_MXC=y
-CONFIG_HAVE_ARM_ARCH_TIMER=y
-CONFIG_HAVE_HW_BREAKPOINT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IMX_SRC=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_OPTPROBES=y
-CONFIG_HAVE_PROC_CPU=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SMP=y
-CONFIG_HZ_FIXED=0
-# CONFIG_IMX_WEIM is not set
-CONFIG_MICREL_PHY=y
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGHT_HAVE_PCI=y
-# CONFIG_MMC_SDHCI_ESDHC_IMX is not set
-# CONFIG_MMC_MXC is not set
-CONFIG_MODULES_TREE_LOOKUP=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MULTI_IRQ_HANDLER=y
-CONFIG_NEON=y
-CONFIG_NET_PTP_CLASSIFY=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PAGE_OFFSET=0x80000000
-# CONFIG_PATA_IMX is not set
-CONFIG_PERF_EVENTS=y
-CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_SINGLE is not set
-CONFIG_PL310_ERRATA_588369=y
-CONFIG_PL310_ERRATA_727915=y
-# CONFIG_PL310_ERRATA_753970 is not set
-CONFIG_PL310_ERRATA_769419=y
-CONFIG_PM_OPP=y
-CONFIG_PPS=y
-# CONFIG_PROBE_EVENTS is not set
-CONFIG_PTP_1588_CLOCK=y
-CONFIG_RTC_CLASS=y
-# CONFIG_RTC_DRV_IMXDI is not set
-# CONFIG_RTC_DRV_MXC is not set
-# CONFIG_SERIAL_IMX is not set
-CONFIG_SMP_ON_UP=y
-CONFIG_SOC_BUS=y
-# CONFIG_SOC_IMX50 is not set
-# CONFIG_SOC_IMX51 is not set
-# CONFIG_SOC_IMX53 is not set
-# CONFIG_SOC_IMX6Q is not set
-# CONFIG_SOC_IMX6SL is not set
-# CONFIG_SOC_IMX6SX is not set
-# CONFIG_SOC_IMX6UL is not set
-# CONFIG_SOC_IMX7D is not set
-# CONFIG_SOC_LS1021A is not set
-# CONFIG_SOC_VF610 is not set
-# CONFIG_SPI_IMX is not set
-CONFIG_SRAM=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_THERMAL_WRITABLE_TRIPS=y
-# CONFIG_THUMB2_KERNEL is not set
-CONFIG_TRACING_EVENTS_GPIO=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-# CONFIG_USB_IMX21_HCD is not set
-CONFIG_USE_OF=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_VFP=y
-CONFIG_VFPv3=y
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/layerscape/armv8_64b/config-default b/target/linux/layerscape/armv8_64b/config-default
deleted file mode 100644 (file)
index 960b077..0000000
+++ /dev/null
@@ -1,183 +0,0 @@
-CONFIG_64BIT=y
-CONFIG_ACPI=y
-CONFIG_ACPI_CCA_REQUIRED=y
-# CONFIG_ACPI_CONTAINER is not set
-# CONFIG_ACPI_CUSTOM_DSDT is not set
-# CONFIG_ACPI_DEBUG is not set
-# CONFIG_ACPI_DEBUGGER is not set
-# CONFIG_ACPI_DOCK is not set
-# CONFIG_ACPI_EC_DEBUGFS is not set
-CONFIG_ACPI_FAN=y
-CONFIG_ACPI_GENERIC_GSI=y
-# CONFIG_ACPI_PCI_SLOT is not set
-CONFIG_ACPI_PROCESSOR=y
-CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y
-CONFIG_ACPI_THERMAL=y
-# CONFIG_ARCH_BCM_IPROC is not set
-CONFIG_ARCH_DMA_ADDR_T_64BIT=y
-# CONFIG_ARCH_EXYNOS7 is not set
-CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
-CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
-# CONFIG_ARCH_SEATTLE is not set
-CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_ARCH_SPARSEMEM_DEFAULT=y
-CONFIG_ARCH_SPARSEMEM_ENABLE=y
-# CONFIG_ARCH_SPRD is not set
-# CONFIG_ARCH_STRATIX10 is not set
-# CONFIG_ARCH_THUNDER is not set
-CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
-CONFIG_ARCH_WANT_FRAME_POINTERS=y
-CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
-# CONFIG_ARCH_XGENE is not set
-# CONFIG_ARCH_ZYNQMP is not set
-CONFIG_ARM64=y
-# CONFIG_ARM64_16K_PAGES is not set
-CONFIG_ARM64_4K_PAGES=y
-# CONFIG_ARM64_64K_PAGES is not set
-# CONFIG_ARM64_CRYPTO is not set
-CONFIG_ARM64_ERRATUM_819472=y
-CONFIG_ARM64_ERRATUM_824069=y
-CONFIG_ARM64_ERRATUM_826319=y
-CONFIG_ARM64_ERRATUM_827319=y
-CONFIG_ARM64_ERRATUM_832075=y
-CONFIG_ARM64_ERRATUM_843419=y
-CONFIG_ARM64_ERRATUM_845719=y
-CONFIG_ARM64_HW_AFDBM=y
-# CONFIG_ARM64_LSE_ATOMICS is not set
-CONFIG_ARM64_PAN=y
-# CONFIG_ARM64_PTDUMP is not set
-# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
-CONFIG_ARM64_VA_BITS=39
-CONFIG_ARM64_VA_BITS_39=y
-# CONFIG_ARM64_VA_BITS_48 is not set
-# CONFIG_ARMV8_DEPRECATED is not set
-CONFIG_ARM_AMBA=y
-CONFIG_ARM_GIC_V2M=y
-CONFIG_ARM_GIC_V3=y
-CONFIG_ARM_GIC_V3_ITS=y
-# CONFIG_ARM_PL172_MPMC is not set
-CONFIG_ARM_PSCI_FW=y
-# CONFIG_ARM_SP805_WATCHDOG is not set
-CONFIG_ATOMIC64_SELFTEST=y
-CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
-CONFIG_BLOCK_COMPAT=y
-CONFIG_BOUNCE=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_BUILD_BIN2C=y
-# CONFIG_CAVIUM_ERRATUM_22375 is not set
-# CONFIG_CAVIUM_ERRATUM_23154 is not set
-CONFIG_CLKSRC_ACPI=y
-CONFIG_CLK_SP810=y
-CONFIG_CLK_VEXPRESS_OSC=y
-CONFIG_CMDLINE="console=ttyAMA0"
-CONFIG_COMMON_CLK_VERSATILE=y
-CONFIG_COMMON_CLK_XGENE=y
-CONFIG_COMPAT=y
-CONFIG_COMPAT_BINFMT_ELF=y
-CONFIG_COMPAT_NETLINK_MESSAGES=y
-CONFIG_COMPAT_OLD_SIGACTION=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CUSE=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEFAULT_IOSCHED="noop"
-CONFIG_DEFAULT_NOOP=y
-CONFIG_DMI=y
-CONFIG_DMIID=y
-# CONFIG_DMI_SYSFS is not set
-CONFIG_EFI=y
-# CONFIG_EFIVAR_FS is not set
-CONFIG_EFI_ARMSTUB=y
-CONFIG_EFI_ESRT=y
-CONFIG_EFI_PARAMS_FROM_FDT=y
-CONFIG_EFI_RUNTIME_WRAPPERS=y
-CONFIG_EFI_STUB=y
-# CONFIG_EFI_VARS is not set
-CONFIG_FSL_MC_BUS=y
-CONFIG_FSL_QMAN_FQ_LOOKUP=y
-CONFIG_FS_MBCACHE=y
-CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
-CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_CSUM=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GPIO_ACPI=y
-# CONFIG_GPIO_AMDPT is not set
-# CONFIG_GPIO_XGENE is not set
-CONFIG_GRACE_PERIOD=y
-CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
-CONFIG_HAVE_ARCH_KASAN=y
-CONFIG_HAVE_CMPXCHG_DOUBLE=y
-CONFIG_HAVE_CMPXCHG_LOCAL=y
-CONFIG_HAVE_DEBUG_BUGVERBOSE=y
-CONFIG_HAVE_MEMORY_PRESENT=y
-CONFIG_HAVE_PATA_PLATFORM=y
-# CONFIG_HPET is not set
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_VIRTIO=y
-CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
-# CONFIG_IOSCHED_DEADLINE is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_RARP is not set
-CONFIG_JBD2=y
-# CONFIG_LIQUIDIO is not set
-CONFIG_LOCKD=y
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_CLUT224=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MFD_CORE=y
-CONFIG_MFD_VEXPRESS_SYSREG=y
-CONFIG_MODULES_USE_ELF_RELA=y
-CONFIG_NEED_SG_DMA_LENGTH=y
-CONFIG_NFS_FS=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NO_HZ=y
-CONFIG_PCI_BUS_ADDR_T_64BIT=y
-# CONFIG_PCI_HISI is not set
-CONFIG_PCI_LABEL=y
-# CONFIG_PHY_XGENE is not set
-# CONFIG_PMIC_OPREGION is not set
-CONFIG_PNP=y
-CONFIG_PNPACPI=y
-CONFIG_PNP_DEBUG_MESSAGES=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
-# CONFIG_PREEMPT_NONE is not set
-CONFIG_PREEMPT_VOLUNTARY=y
-CONFIG_PROFILING=y
-# CONFIG_POWER_RESET_VEXPRESS is not set
-CONFIG_ROOT_NFS=y
-# CONFIG_SCSI_LOWLEVEL is not set
-# CONFIG_SCSI_PROC_FS is not set
-CONFIG_SERIAL_8250_PNP=y
-# CONFIG_SERIAL_AMBA_PL010 is not set
-CONFIG_SERIAL_AMBA_PL011=y
-CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-CONFIG_SMC91X=y
-CONFIG_SPARSEMEM=y
-CONFIG_SPARSEMEM_EXTREME=y
-CONFIG_SPARSEMEM_MANUAL=y
-CONFIG_SPARSEMEM_VMEMMAP=y
-CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
-CONFIG_SUNRPC=y
-# CONFIG_SWAP is not set
-CONFIG_SYSCTL_EXCEPTION_TRACE=y
-CONFIG_SYSVIPC_COMPAT=y
-# CONFIG_THUNDER_NIC_BGX is not set
-# CONFIG_THUNDER_NIC_PF is not set
-# CONFIG_THUNDER_NIC_VF is not set
-CONFIG_UCS2_STRING=y
-CONFIG_VEXPRESS_CONFIG=y
-CONFIG_VEXPRESS_SYSCFG=y
-CONFIG_VFAT_FS=y
-CONFIG_VIDEOMODE_HELPERS=y
-CONFIG_VIRTIO=y
-CONFIG_VIRTIO_BLK=y
-# CONFIG_VIRTIO_CONSOLE is not set
-CONFIG_VIRTIO_MMIO=y
-# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set
-CONFIG_VIRTIO_NET=y
diff --git a/target/linux/layerscape/config-4.4 b/target/linux/layerscape/config-4.4
deleted file mode 100644 (file)
index 6894af0..0000000
+++ /dev/null
@@ -1,310 +0,0 @@
-CONFIG_AQUANTIA_PHY=y
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
-CONFIG_ARCH_LAYERSCAPE=y
-CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
-CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_ARM_ARCH_TIMER=y
-CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
-CONFIG_ARM_GIC=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CAVIUM_ERRATUM_27456 is not set
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLKSRC_PROBE=y
-CONFIG_CLK_QORIQ=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_COMMON_CLK=y
-CONFIG_CPU_RMAP=y
-CONFIG_CRC16=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DTC=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_EXT4_FS=y
-CONFIG_FAT_FS=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_FMAN_ARM=y
-# CONFIG_FMAN_MIB_CNT_OVF_IRQ_EN is not set
-# CONFIG_FMAN_P1023 is not set
-# CONFIG_FMAN_P3040_P4080_P5020 is not set
-# CONFIG_FMAN_PFC is not set
-# CONFIG_FMAN_V3H is not set
-# CONFIG_FMAN_V3L is not set
-CONFIG_FRAME_POINTER=y
-CONFIG_FSL_BMAN=y
-CONFIG_FSL_BMAN_CONFIG=y
-CONFIG_FSL_BMAN_DEBUGFS=y
-# CONFIG_FSL_BMAN_TEST is not set
-CONFIG_FSL_DPA=y
-# CONFIG_FSL_DPAA_1588 is not set
-CONFIG_FSL_DPAA_ADVANCED_DRIVERS=y
-# CONFIG_FSL_DPAA_CEETM is not set
-CONFIG_FSL_DPAA_CS_THRESHOLD_10G=0x10000000
-CONFIG_FSL_DPAA_CS_THRESHOLD_1G=0x06000000
-# CONFIG_FSL_DPAA_DBG_LOOP is not set
-# CONFIG_FSL_DPAA_ETH_DEBUG is not set
-CONFIG_FSL_DPAA_ETH_DEBUGFS=y
-CONFIG_FSL_DPAA_ETH_MAX_BUF_COUNT=128
-CONFIG_FSL_DPAA_ETH_REFILL_THRESHOLD=80
-CONFIG_FSL_DPAA_ETH_USE_NDO_SELECT_QUEUE=y
-CONFIG_FSL_DPAA_GENERIC_DRIVER=y
-# CONFIG_FSL_DPAA_HOOKS is not set
-CONFIG_FSL_DPAA_INGRESS_CS_THRESHOLD=0x10000000
-# CONFIG_FSL_DPAA_MACSEC is not set
-CONFIG_FSL_DPAA_OFFLINE_PORTS=y
-# CONFIG_FSL_DPAA_TS is not set
-CONFIG_FSL_DPA_CAN_WAIT=y
-CONFIG_FSL_DPA_CAN_WAIT_SYNC=y
-# CONFIG_FSL_DPA_CHECKING is not set
-CONFIG_FSL_DPA_PIRQ_FAST=y
-CONFIG_FSL_DPA_PIRQ_SLOW=y
-CONFIG_FSL_DPA_PORTAL_SHARE=y
-CONFIG_FSL_FM_MAX_FRAME_SIZE=1522
-CONFIG_FSL_FM_RX_EXTRA_HEADROOM=64
-CONFIG_FSL_IFC=y
-CONFIG_FSL_QMAN=y
-CONFIG_FSL_QMAN_CI_SCHED_CFG_BMAN_W=2
-CONFIG_FSL_QMAN_CI_SCHED_CFG_RW_W=2
-CONFIG_FSL_QMAN_CI_SCHED_CFG_SRCCIV=4
-CONFIG_FSL_QMAN_CI_SCHED_CFG_SRQ_W=3
-CONFIG_FSL_QMAN_CONFIG=y
-CONFIG_FSL_QMAN_DEBUGFS=y
-CONFIG_FSL_QMAN_FQD_SZ=10
-CONFIG_FSL_QMAN_INIT_TIMEOUT=10
-CONFIG_FSL_QMAN_PFDR_SZ=13
-CONFIG_FSL_QMAN_PIRQ_DQRR_ITHRESH=12
-CONFIG_FSL_QMAN_PIRQ_IPERIOD=100
-CONFIG_FSL_QMAN_PIRQ_MR_ITHRESH=4
-CONFIG_FSL_QMAN_POLL_LIMIT=32
-# CONFIG_FSL_QMAN_TEST is not set
-CONFIG_FSL_SDK_DPAA_ETH=y
-CONFIG_FSL_SDK_FMAN=y
-# CONFIG_FSL_SDK_FMAN_TEST is not set
-CONFIG_FSL_USDPAA=y
-CONFIG_FSL_XGMAC_MDIO=y
-# CONFIG_FTL is not set
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_MSI_IRQ=y
-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-# CONFIG_GIANFAR is not set
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_DEVRES=y
-CONFIG_GPIO_GENERIC=y
-CONFIG_GPIO_GENERIC_PLATFORM=y
-CONFIG_GPIO_MPC8XXX=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_FSL_QBMAN=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_AUDITSYSCALL=y
-CONFIG_HAVE_ARCH_BITREVERSE=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_BPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_GENERIC_RCU_GUP=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_PERF_REGS=y
-CONFIG_HAVE_PERF_USER_STACK_DUMP=y
-CONFIG_HAVE_RCU_TABLE_FREE=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_UID16=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-# CONFIG_HUGETLBFS is not set
-CONFIG_I2C=y
-# CONFIG_ACPI_I2C_OPREGION is not set
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_IMX=y
-CONFIG_I2C_MUX=y
-CONFIG_I2C_MUX_PCA954x=y
-# CONFIG_IMX2_WDT is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IOMMU_HELPER=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LS_SCFG_MSI=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MEMORY=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_BLOCK_MINORS=8
-CONFIG_MMC_BLOCK_BOUNCE=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
-# CONFIG_MMC_SDHCI_PCI is not set
-# CONFIG_MMC_TIFM_SD is not set
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND_FSL_IFC=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NO_BOOTMEM=y
-CONFIG_NO_HZ_COMMON=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_NR_CPUS=4
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_MTD=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_OF_RESERVED_MEM=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_PCI=y
-CONFIG_PCIEAER=y
-CONFIG_PCIEASPM=y
-# CONFIG_PCIEASPM_DEBUG is not set
-CONFIG_PCIEASPM_DEFAULT=y
-# CONFIG_PCIEASPM_PERFORMANCE is not set
-# CONFIG_PCIEASPM_POWERSAVE is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCIE_DW=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PCI_LAYERSCAPE=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_MSI_IRQ_DOMAIN=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=3
-CONFIG_PHYLIB=y
-CONFIG_PHYS_ADDR_T_64BIT=y
-CONFIG_POWER_RESET=y
-CONFIG_POWER_RESET_LAYERSCAPE=y
-# CONFIG_POWER_RESET_XGENE is not set
-CONFIG_POWER_SUPPLY=y
-CONFIG_QMAN_CEETM_UPDATE_PERIOD=1000
-CONFIG_RAS=y
-CONFIG_RATIONAL=y
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_REALTEK_PHY=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-# CONFIG_SCHED_INFO is not set
-CONFIG_SCSI=y
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SMP=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SQUASHFS=y
-# CONFIG_SQUASHFS_FILE_CACHE is not set
-CONFIG_SQUASHFS_FILE_DIRECT=y
-# CONFIG_SQUASHFS_DECOMP_SINGLE is not set
-# CONFIG_SQUASHFS_DECOMP_MULTI is not set
-CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
-# CONFIG_SQUASHFS_XATTR is not set
-# CONFIG_SQUASHFS_ZLIB is not set
-# CONFIG_SQUASHFS_LZ4 is not set
-# CONFIG_SQUASHFS_LZO is not set
-CONFIG_SQUASHFS_XZ=y
-# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
-# CONFIG_SQUASHFS_EMBEDDED is not set
-CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
-CONFIG_SRCU=y
-CONFIG_SWIOTLB=y
-CONFIG_SYS_SUPPORTS_HUGETLBFS=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
-CONFIG_THERMAL_GOV_STEP_WISE=y
-CONFIG_THERMAL_OF=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TREE_RCU=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USB=y
-CONFIG_VITESSE_PHY=y
-CONFIG_XPS=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_SPI_FSL_QUADSPI=y
-CONFIG_FSL_MC_BUS=y
-CONFIG_FSL_MC_RESTOOL=y
-CONFIG_FSL_MC_DPIO=y
-# CONFIG_FSL_QBMAN_DEBUG is not set
-CONFIG_FSL_DPAA2=y
-CONFIG_FSL_DPAA2_ETH=y
-# CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE is not set
-CONFIG_FSL_DPAA2_MAC=y
-# CONFIG_FSL_DPAA2_MAC_NETDEVS is not set
-CONFIG_FSL_DPAA2_EVB=y
-CONFIG_FSL_DPAA2_ETHSW=y
diff --git a/target/linux/layerscape/patches-4.4/0051-PCI-designware-Ensure-ATU-is-enabled-before-IO-conf-.patch b/target/linux/layerscape/patches-4.4/0051-PCI-designware-Ensure-ATU-is-enabled-before-IO-conf-.patch
deleted file mode 100644 (file)
index c670dac..0000000
+++ /dev/null
@@ -1,43 +0,0 @@
-From 7f434723cdb6823443330cd4847d5c3b8dd30bd7 Mon Sep 17 00:00:00 2001
-From: Stanimir Varbanov <stanimir.varbanov@linaro.org>
-Date: Fri, 18 Dec 2015 14:38:55 +0200
-Subject: [PATCH 51/70] PCI: designware: Ensure ATU is enabled before IO/conf
- space accesses
-
-Read back the ATU CR2 register to ensure ATU programming is effective
-before any subsequent I/O or config space accesses.
-
-Without this, PCI device enumeration is unreliable.
-
-[bhelgaas: changelog, comment]
-Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
----
- drivers/pci/host/pcie-designware.c |    8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -154,6 +154,8 @@ static int dw_pcie_wr_own_conf(struct pc
- static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
-               int type, u64 cpu_addr, u64 pci_addr, u32 size)
- {
-+      u32 val;
-+
-       dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | index,
-                         PCIE_ATU_VIEWPORT);
-       dw_pcie_writel_rc(pp, lower_32_bits(cpu_addr), PCIE_ATU_LOWER_BASE);
-@@ -164,6 +166,12 @@ static void dw_pcie_prog_outbound_atu(st
-       dw_pcie_writel_rc(pp, upper_32_bits(pci_addr), PCIE_ATU_UPPER_TARGET);
-       dw_pcie_writel_rc(pp, type, PCIE_ATU_CR1);
-       dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
-+
-+      /*
-+       * Make sure ATU enable takes effect before any subsequent config
-+       * and I/O accesses.
-+       */
-+      dw_pcie_readl_rc(pp, PCIE_ATU_CR2, &val);
- }
- static struct irq_chip dw_msi_irq_chip = {
diff --git a/target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch b/target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch
deleted file mode 100644 (file)
index 1eef2b6..0000000
+++ /dev/null
@@ -1,121 +0,0 @@
-From 610b32220391c9d271290bdf8f2b8fe1cf8da9a0 Mon Sep 17 00:00:00 2001
-From: Bjorn Helgaas <bhelgaas@google.com>
-Date: Tue, 5 Jan 2016 15:48:11 -0600
-Subject: [PATCH 52/70] PCI: designware: Simplify control flow
-
-Return values immediately when possible to simplify the control flow.
-
-No functional change intended.  Folded in unused variable removal as
-pointed out by Fabio Estevam <fabio.estevam@nxp.com>, Arnd Bergmann
-<arnd@arndb.de>, and Thierry Reding <thierry.reding@gmail.com>.
-
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
----
- drivers/pci/host/pcie-designware.c |   54 ++++++++++++------------------------
- 1 file changed, 18 insertions(+), 36 deletions(-)
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -128,27 +128,19 @@ static inline void dw_pcie_writel_rc(str
- static int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
-                              u32 *val)
- {
--      int ret;
--
-       if (pp->ops->rd_own_conf)
--              ret = pp->ops->rd_own_conf(pp, where, size, val);
--      else
--              ret = dw_pcie_cfg_read(pp->dbi_base + where, size, val);
-+              return pp->ops->rd_own_conf(pp, where, size, val);
--      return ret;
-+      return dw_pcie_cfg_read(pp->dbi_base + where, size, val);
- }
- static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size,
-                              u32 val)
- {
--      int ret;
--
-       if (pp->ops->wr_own_conf)
--              ret = pp->ops->wr_own_conf(pp, where, size, val);
--      else
--              ret = dw_pcie_cfg_write(pp->dbi_base + where, size, val);
-+              return pp->ops->wr_own_conf(pp, where, size, val);
--      return ret;
-+      return dw_pcie_cfg_write(pp->dbi_base + where, size, val);
- }
- static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
-@@ -392,8 +384,8 @@ int dw_pcie_link_up(struct pcie_port *pp
- {
-       if (pp->ops->link_up)
-               return pp->ops->link_up(pp);
--      else
--              return 0;
-+
-+      return 0;
- }
- static int dw_pcie_msi_map(struct irq_domain *domain, unsigned int irq,
-@@ -666,46 +658,36 @@ static int dw_pcie_rd_conf(struct pci_bu
-                       int size, u32 *val)
- {
-       struct pcie_port *pp = bus->sysdata;
--      int ret;
-       if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) {
-               *val = 0xffffffff;
-               return PCIBIOS_DEVICE_NOT_FOUND;
-       }
--      if (bus->number != pp->root_bus_nr)
--              if (pp->ops->rd_other_conf)
--                      ret = pp->ops->rd_other_conf(pp, bus, devfn,
--                                              where, size, val);
--              else
--                      ret = dw_pcie_rd_other_conf(pp, bus, devfn,
--                                              where, size, val);
--      else
--              ret = dw_pcie_rd_own_conf(pp, where, size, val);
-+      if (bus->number == pp->root_bus_nr)
-+              return dw_pcie_rd_own_conf(pp, where, size, val);
--      return ret;
-+      if (pp->ops->rd_other_conf)
-+              return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val);
-+
-+      return dw_pcie_rd_other_conf(pp, bus, devfn, where, size, val);
- }
- static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
-                       int where, int size, u32 val)
- {
-       struct pcie_port *pp = bus->sysdata;
--      int ret;
-       if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0)
-               return PCIBIOS_DEVICE_NOT_FOUND;
--      if (bus->number != pp->root_bus_nr)
--              if (pp->ops->wr_other_conf)
--                      ret = pp->ops->wr_other_conf(pp, bus, devfn,
--                                              where, size, val);
--              else
--                      ret = dw_pcie_wr_other_conf(pp, bus, devfn,
--                                              where, size, val);
--      else
--              ret = dw_pcie_wr_own_conf(pp, where, size, val);
-+      if (bus->number == pp->root_bus_nr)
-+              return dw_pcie_wr_own_conf(pp, where, size, val);
--      return ret;
-+      if (pp->ops->wr_other_conf)
-+              return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val);
-+
-+      return dw_pcie_wr_other_conf(pp, bus, devfn, where, size, val);
- }
- static struct pci_ops dw_pcie_ops = {
diff --git a/target/linux/layerscape/patches-4.4/0053-PCI-designware-Make-config-accessor-override-checkin.patch b/target/linux/layerscape/patches-4.4/0053-PCI-designware-Make-config-accessor-override-checkin.patch
deleted file mode 100644 (file)
index 299e87e..0000000
+++ /dev/null
@@ -1,71 +0,0 @@
-From 6882f9eef932e6f5cc3c57115e3d7d4b5bc19662 Mon Sep 17 00:00:00 2001
-From: Bjorn Helgaas <bhelgaas@google.com>
-Date: Tue, 5 Jan 2016 15:56:30 -0600
-Subject: [PATCH 53/70] PCI: designware: Make config accessor override
- checking symmetric
-
-Drivers based on the DesignWare core can override the config read accessors
-by supplying rd_own_conf() and rd_other_conf() function pointers.
-dw_pcie_rd_conf() calls dw_pcie_rd_own_conf() (for accesses to the root
-bus) or dw_pcie_rd_other_conf():
-
-  dw_pcie_rd_conf
-    dw_pcie_rd_own_conf                # if on root bus
-    dw_pcie_rd_other_conf              # if not on root bus
-
-Previously we checked for rd_other_conf() directly in dw_pcie_rd_conf(),
-but we checked for rd_own_conf() in dw_pcie_rd_own_conf().
-
-Check for rd_other_conf() in dw_pcie_rd_other_conf() to make this symmetric
-with the rd_own_conf() checking, and similarly for the write path.
-
-No functional change intended.
-
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
----
- drivers/pci/host/pcie-designware.c |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -571,6 +571,9 @@ static int dw_pcie_rd_other_conf(struct
-       u64 cpu_addr;
-       void __iomem *va_cfg_base;
-+      if (pp->ops->rd_other_conf)
-+              return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val);
-+
-       busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) |
-                PCIE_ATU_FUNC(PCI_FUNC(devfn));
-@@ -605,6 +608,9 @@ static int dw_pcie_wr_other_conf(struct
-       u64 cpu_addr;
-       void __iomem *va_cfg_base;
-+      if (pp->ops->wr_other_conf)
-+              return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val);
-+
-       busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) |
-                PCIE_ATU_FUNC(PCI_FUNC(devfn));
-@@ -667,9 +673,6 @@ static int dw_pcie_rd_conf(struct pci_bu
-       if (bus->number == pp->root_bus_nr)
-               return dw_pcie_rd_own_conf(pp, where, size, val);
--      if (pp->ops->rd_other_conf)
--              return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val);
--
-       return dw_pcie_rd_other_conf(pp, bus, devfn, where, size, val);
- }
-@@ -684,9 +687,6 @@ static int dw_pcie_wr_conf(struct pci_bu
-       if (bus->number == pp->root_bus_nr)
-               return dw_pcie_wr_own_conf(pp, where, size, val);
--      if (pp->ops->wr_other_conf)
--              return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val);
--
-       return dw_pcie_wr_other_conf(pp, bus, devfn, where, size, val);
- }
diff --git a/target/linux/layerscape/patches-4.4/0054-PCI-designware-Explain-why-we-don-t-program-ATU-for-.patch b/target/linux/layerscape/patches-4.4/0054-PCI-designware-Explain-why-we-don-t-program-ATU-for-.patch
deleted file mode 100644 (file)
index f48150d..0000000
+++ /dev/null
@@ -1,34 +0,0 @@
-From 481b1bc4ce0d58107887558342e50d6323a9601d Mon Sep 17 00:00:00 2001
-From: Jisheng Zhang <jszhang@marvell.com>
-Date: Thu, 7 Jan 2016 14:12:38 +0800
-Subject: [PATCH 54/70] PCI: designware: Explain why we don't program ATU for
- some platforms
-
-Some platforms don't support ATU, e.g., pci-keystone.c.  These platforms
-use their own address translation component rather than ATU, and they
-provide the rd_other_conf and wr_other_conf methods to program the
-translation component and perform the access.
-
-Add a comment to explain why we don't program the ATU for these platforms.
-
-[bhelgaas: changelog]
-Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
----
- drivers/pci/host/pcie-designware.c |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -517,6 +517,11 @@ int dw_pcie_host_init(struct pcie_port *
-       if (pp->ops->host_init)
-               pp->ops->host_init(pp);
-+      /*
-+       * If the platform provides ->rd_other_conf, it means the platform
-+       * uses its own address translation component rather than ATU, so
-+       * we should not program the ATU here.
-+       */
-       if (!pp->ops->rd_other_conf)
-               dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX1,
-                                         PCIE_ATU_TYPE_MEM, pp->mem_base,
diff --git a/target/linux/layerscape/patches-4.4/0055-PCI-designware-Remove-PCI_PROBE_ONLY-handling.patch b/target/linux/layerscape/patches-4.4/0055-PCI-designware-Remove-PCI_PROBE_ONLY-handling.patch
deleted file mode 100644 (file)
index 13639eb..0000000
+++ /dev/null
@@ -1,41 +0,0 @@
-From ee2a430c1691d0bac3098e8db3c29d8f023b04c2 Mon Sep 17 00:00:00 2001
-From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Date: Fri, 29 Jan 2016 11:29:32 +0000
-Subject: [PATCH 55/70] PCI: designware: Remove PCI_PROBE_ONLY handling
-
-The PCIe designware host driver is not used in system configurations
-requiring the PCI_PROBE_ONLY flag to be set to prevent resources
-assignment, therefore the driver code handling the flag can be removed
-from the kernel.
-
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
-Acked-by: Jingoo Han Jingoo Han <jingoohan1@gmail.com>
-Cc: Arnd Bergmann <arnd@arndb.de>
-Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com>
-Cc: Zhou Wang <wangzhou1@hisilicon.com>
----
- drivers/pci/host/pcie-designware.c |   10 ++++------
- 1 file changed, 4 insertions(+), 6 deletions(-)
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -556,13 +556,11 @@ int dw_pcie_host_init(struct pcie_port *
-       pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
- #endif
--      if (!pci_has_flag(PCI_PROBE_ONLY)) {
--              pci_bus_size_bridges(bus);
--              pci_bus_assign_resources(bus);
-+      pci_bus_size_bridges(bus);
-+      pci_bus_assign_resources(bus);
--              list_for_each_entry(child, &bus->children, node)
--                      pcie_bus_configure_settings(child);
--      }
-+      list_for_each_entry(child, &bus->children, node)
-+              pcie_bus_configure_settings(child);
-       pci_bus_add_devices(bus);
-       return 0;
diff --git a/target/linux/layerscape/patches-4.4/0056-PCI-designware-Add-generic-dw_pcie_wait_for_link.patch b/target/linux/layerscape/patches-4.4/0056-PCI-designware-Add-generic-dw_pcie_wait_for_link.patch
deleted file mode 100644 (file)
index b13aba3..0000000
+++ /dev/null
@@ -1,249 +0,0 @@
-From f0c3f31a8bd81b8e7354a187c49200f3ce52740d Mon Sep 17 00:00:00 2001
-From: Joao Pinto <Joao.Pinto@synopsys.com>
-Date: Thu, 10 Mar 2016 14:44:35 -0600
-Subject: [PATCH 56/70] PCI: designware: Add generic dw_pcie_wait_for_link()
-
-commit 886bc5ceb5cc3ad4b219502d72b277e3c3255a32 upstream
-[context adjustment]
-[remove drivers/pci/host/pcie-qcom.c related changes]
-
-Several DesignWare-based drivers (dra7xx, exynos, imx6, keystone, qcom, and
-spear13xx) had similar loops waiting for the link to come up.
-
-Add a generic dw_pcie_wait_for_link() for use by all these drivers so the
-waiting is done consistently, e.g., always using usleep_range() rather than
-mdelay() and using similar timeouts and retry counts.
-
-Note that this changes the Keystone link training/wait for link strategy,
-so we initiate link training, then wait longer for the link to come up
-before re-initiating link training.
-
-[bhelgaas: changelog, split into its own patch, update pci-keystone.c, pcie-qcom.c]
-Signed-off-by: Joao Pinto <jpinto@synopsys.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
-Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
----
- drivers/pci/host/pci-dra7xx.c      |   11 +----------
- drivers/pci/host/pci-exynos.c      |   13 +++----------
- drivers/pci/host/pci-imx6.c        |   13 ++++---------
- drivers/pci/host/pci-keystone.c    |   10 ++++------
- drivers/pci/host/pcie-designware.c |   19 +++++++++++++++++++
- drivers/pci/host/pcie-designware.h |    6 ++++++
- drivers/pci/host/pcie-spear13xx.c  |   14 +-------------
- 7 files changed, 38 insertions(+), 48 deletions(-)
-
---- a/drivers/pci/host/pci-dra7xx.c
-+++ b/drivers/pci/host/pci-dra7xx.c
-@@ -10,7 +10,6 @@
-  * published by the Free Software Foundation.
-  */
--#include <linux/delay.h>
- #include <linux/err.h>
- #include <linux/interrupt.h>
- #include <linux/irq.h>
-@@ -108,7 +107,6 @@ static int dra7xx_pcie_establish_link(st
- {
-       struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pp);
-       u32 reg;
--      unsigned int retries;
-       if (dw_pcie_link_up(pp)) {
-               dev_err(pp->dev, "link is already up\n");
-@@ -119,14 +117,7 @@ static int dra7xx_pcie_establish_link(st
-       reg |= LTSSM_EN;
-       dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg);
--      for (retries = 0; retries < 1000; retries++) {
--              if (dw_pcie_link_up(pp))
--                      return 0;
--              usleep_range(10, 20);
--      }
--
--      dev_err(pp->dev, "link is not up\n");
--      return -EINVAL;
-+      return dw_pcie_wait_for_link(pp);
- }
- static void dra7xx_pcie_enable_interrupts(struct pcie_port *pp)
---- a/drivers/pci/host/pci-exynos.c
-+++ b/drivers/pci/host/pci-exynos.c
-@@ -318,7 +318,6 @@ static int exynos_pcie_establish_link(st
- {
-       struct exynos_pcie *exynos_pcie = to_exynos_pcie(pp);
-       u32 val;
--      unsigned int retries;
-       if (dw_pcie_link_up(pp)) {
-               dev_err(pp->dev, "Link already up\n");
-@@ -357,13 +356,8 @@ static int exynos_pcie_establish_link(st
-                         PCIE_APP_LTSSM_ENABLE);
-       /* check if the link is up or not */
--      for (retries = 0; retries < 10; retries++) {
--              if (dw_pcie_link_up(pp)) {
--                      dev_info(pp->dev, "Link up\n");
--                      return 0;
--              }
--              mdelay(100);
--      }
-+      if (!dw_pcie_wait_for_link(pp))
-+              return 0;
-       while (exynos_phy_readl(exynos_pcie, PCIE_PHY_PLL_LOCKED) == 0) {
-               val = exynos_blk_readl(exynos_pcie, PCIE_PHY_PLL_LOCKED);
-@@ -372,8 +366,7 @@ static int exynos_pcie_establish_link(st
-       /* power off phy */
-       exynos_pcie_power_off_phy(pp);
--      dev_err(pp->dev, "PCIe Link Fail\n");
--      return -EINVAL;
-+      return -ETIMEDOUT;
- }
- static void exynos_pcie_clear_irq_pulse(struct pcie_port *pp)
---- a/drivers/pci/host/pci-imx6.c
-+++ b/drivers/pci/host/pci-imx6.c
-@@ -330,19 +330,14 @@ static void imx6_pcie_init_phy(struct pc
- static int imx6_pcie_wait_for_link(struct pcie_port *pp)
- {
--      unsigned int retries;
-+      /* check if the link is up or not */
-+      if (!dw_pcie_wait_for_link(pp))
-+              return 0;
--      for (retries = 0; retries < 200; retries++) {
--              if (dw_pcie_link_up(pp))
--                      return 0;
--              usleep_range(100, 1000);
--      }
--
--      dev_err(pp->dev, "phy link never came up\n");
-       dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
-               readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),
-               readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));
--      return -EINVAL;
-+      return -ETIMEDOUT;
- }
- static int imx6_pcie_wait_for_speed_change(struct pcie_port *pp)
---- a/drivers/pci/host/pci-keystone.c
-+++ b/drivers/pci/host/pci-keystone.c
-@@ -97,17 +97,15 @@ static int ks_pcie_establish_link(struct
-               return 0;
-       }
--      ks_dw_pcie_initiate_link_train(ks_pcie);
-       /* check if the link is up or not */
--      for (retries = 0; retries < 200; retries++) {
--              if (dw_pcie_link_up(pp))
--                      return 0;
--              usleep_range(100, 1000);
-+      for (retries = 0; retries < 5; retries++) {
-               ks_dw_pcie_initiate_link_train(ks_pcie);
-+              if (!dw_pcie_wait_for_link(pp))
-+                      return 0;
-       }
-       dev_err(pp->dev, "phy link never came up\n");
--      return -EINVAL;
-+      return -ETIMEDOUT;
- }
- static void ks_pcie_msi_irq_handler(struct irq_desc *desc)
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -22,6 +22,7 @@
- #include <linux/pci_regs.h>
- #include <linux/platform_device.h>
- #include <linux/types.h>
-+#include <linux/delay.h>
- #include "pcie-designware.h"
-@@ -380,6 +381,24 @@ static struct msi_controller dw_pcie_msi
-       .teardown_irq = dw_msi_teardown_irq,
- };
-+int dw_pcie_wait_for_link(struct pcie_port *pp)
-+{
-+      int retries;
-+
-+      /* check if the link is up or not */
-+      for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) {
-+              if (dw_pcie_link_up(pp)) {
-+                      dev_info(pp->dev, "link up\n");
-+                      return 0;
-+              }
-+              usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX);
-+      }
-+
-+      dev_err(pp->dev, "phy link never came up\n");
-+
-+      return -ETIMEDOUT;
-+}
-+
- int dw_pcie_link_up(struct pcie_port *pp)
- {
-       if (pp->ops->link_up)
---- a/drivers/pci/host/pcie-designware.h
-+++ b/drivers/pci/host/pcie-designware.h
-@@ -22,6 +22,11 @@
- #define MAX_MSI_IRQS                  32
- #define MAX_MSI_CTRLS                 (MAX_MSI_IRQS / 32)
-+/* Parameters for the waiting for link up routine */
-+#define LINK_WAIT_MAX_RETRIES         10
-+#define LINK_WAIT_USLEEP_MIN          90000
-+#define LINK_WAIT_USLEEP_MAX          100000
-+
- struct pcie_port {
-       struct device           *dev;
-       u8                      root_bus_nr;
-@@ -76,6 +81,7 @@ int dw_pcie_cfg_read(void __iomem *addr,
- int dw_pcie_cfg_write(void __iomem *addr, int size, u32 val);
- irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);
- void dw_pcie_msi_init(struct pcie_port *pp);
-+int dw_pcie_wait_for_link(struct pcie_port *pp);
- int dw_pcie_link_up(struct pcie_port *pp);
- void dw_pcie_setup_rc(struct pcie_port *pp);
- int dw_pcie_host_init(struct pcie_port *pp);
---- a/drivers/pci/host/pcie-spear13xx.c
-+++ b/drivers/pci/host/pcie-spear13xx.c
-@@ -13,7 +13,6 @@
-  */
- #include <linux/clk.h>
--#include <linux/delay.h>
- #include <linux/interrupt.h>
- #include <linux/kernel.h>
- #include <linux/module.h>
-@@ -149,7 +148,6 @@ static int spear13xx_pcie_establish_link
-       struct spear13xx_pcie *spear13xx_pcie = to_spear13xx_pcie(pp);
-       struct pcie_app_reg *app_reg = spear13xx_pcie->app_base;
-       u32 exp_cap_off = EXP_CAP_ID_OFFSET;
--      unsigned int retries;
-       if (dw_pcie_link_up(pp)) {
-               dev_err(pp->dev, "link already up\n");
-@@ -200,17 +198,7 @@ static int spear13xx_pcie_establish_link
-                       | ((u32)1 << REG_TRANSLATION_ENABLE),
-                       &app_reg->app_ctrl_0);
--      /* check if the link is up or not */
--      for (retries = 0; retries < 10; retries++) {
--              if (dw_pcie_link_up(pp)) {
--                      dev_info(pp->dev, "link up\n");
--                      return 0;
--              }
--              mdelay(100);
--      }
--
--      dev_err(pp->dev, "link Fail\n");
--      return -EINVAL;
-+      return dw_pcie_wait_for_link(pp);
- }
- static irqreturn_t spear13xx_pcie_irq_handler(int irq, void *arg)
diff --git a/target/linux/layerscape/patches-4.4/0057-PCI-designware-Add-default-link-up-check-if-sub-driv.patch b/target/linux/layerscape/patches-4.4/0057-PCI-designware-Add-default-link-up-check-if-sub-driv.patch
deleted file mode 100644 (file)
index 7114fbb..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-From a0a4f406c7e90b2be66e88ea8b21699940c0823f Mon Sep 17 00:00:00 2001
-From: Joao Pinto <Joao.Pinto@synopsys.com>
-Date: Thu, 10 Mar 2016 14:44:44 -0600
-Subject: [PATCH 57/70] PCI: designware: Add default link up check if
- sub-driver doesn't override
-
-Add a default DesignWare "link_up" test for use when a sub-driver doesn't
-supply its own pcie_host_ops.link_up() method.
-
-[bhelgaas: changelog, split into its own patch]
-Signed-off-by: Joao Pinto <jpinto@synopsys.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
----
- drivers/pci/host/pcie-designware.c |   10 +++++++++-
- 1 file changed, 9 insertions(+), 1 deletion(-)
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -70,6 +70,11 @@
- #define PCIE_ATU_FUNC(x)              (((x) & 0x7) << 16)
- #define PCIE_ATU_UPPER_TARGET         0x91C
-+/* PCIe Port Logic registers */
-+#define PLR_OFFSET                    0x700
-+#define PCIE_PHY_DEBUG_R1             (PLR_OFFSET + 0x2c)
-+#define PCIE_PHY_DEBUG_R1_LINK_UP     0x00000010
-+
- static struct pci_ops dw_pcie_ops;
- int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val)
-@@ -401,10 +406,13 @@ int dw_pcie_wait_for_link(struct pcie_po
- int dw_pcie_link_up(struct pcie_port *pp)
- {
-+      u32 val;
-+
-       if (pp->ops->link_up)
-               return pp->ops->link_up(pp);
--      return 0;
-+      val = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1);
-+      return val & PCIE_PHY_DEBUG_R1_LINK_UP;
- }
- static int dw_pcie_msi_map(struct irq_domain *domain, unsigned int irq,
diff --git a/target/linux/layerscape/patches-4.4/0058-PCI-designware-Move-Root-Complex-setup-code-to-dw_pc.patch b/target/linux/layerscape/patches-4.4/0058-PCI-designware-Move-Root-Complex-setup-code-to-dw_pc.patch
deleted file mode 100644 (file)
index 5826eb0..0000000
+++ /dev/null
@@ -1,109 +0,0 @@
-From 892a427f8a2b25b561298941cf1fc0373a98b269 Mon Sep 17 00:00:00 2001
-From: Jisheng Zhang <jszhang@marvell.com>
-Date: Wed, 16 Mar 2016 19:40:33 +0800
-Subject: [PATCH 58/70] PCI: designware: Move Root Complex setup code to
- dw_pcie_setup_rc()
-
-dw_pcie_host_init() looks up host bridge resources, ioremaps them, creates
-IRQ domains, and enumerates devices below the bridge.  dw_pcie_setup_rc()
-programs the Root Complex registers.  The Root Complex may lose power
-during suspend-to-RAM, and when we resume, we want to redo the latter but
-not the former.
-
-Move some Root Complex programming from dw_pcie_host_init() to
-dw_pcie_setup_rc() where it belongs.  DesignWare-based drivers can call
-dw_pcie_setup_rc() in their resume paths.
-
-[Niklas Cassel <niklas.cassel@axis.com>:  This change moves outbound ATU
-programming, which uses pp->mem_base, to dw_pcie_setup_rc().  Apply the
-dra7xx pp->mem_base update before calling dw_pcie_setup_rc().]
-
-[bhelgaas: changelog, fold in dra7xx fix from Niklas]
-Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
----
- drivers/pci/host/pci-dra7xx.c      |    4 ++--
- drivers/pci/host/pcie-designware.c |   39 ++++++++++++++++++------------------
- 2 files changed, 21 insertions(+), 22 deletions(-)
-
---- a/drivers/pci/host/pci-dra7xx.c
-+++ b/drivers/pci/host/pci-dra7xx.c
-@@ -142,13 +142,13 @@ static void dra7xx_pcie_enable_interrupt
- static void dra7xx_pcie_host_init(struct pcie_port *pp)
- {
--      dw_pcie_setup_rc(pp);
--
-       pp->io_base &= DRA7XX_CPU_TO_BUS_ADDR;
-       pp->mem_base &= DRA7XX_CPU_TO_BUS_ADDR;
-       pp->cfg0_base &= DRA7XX_CPU_TO_BUS_ADDR;
-       pp->cfg1_base &= DRA7XX_CPU_TO_BUS_ADDR;
-+      dw_pcie_setup_rc(pp);
-+
-       dra7xx_pcie_establish_link(pp);
-       if (IS_ENABLED(CONFIG_PCI_MSI))
-               dw_pcie_msi_init(pp);
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -434,7 +434,6 @@ int dw_pcie_host_init(struct pcie_port *
-       struct platform_device *pdev = to_platform_device(pp->dev);
-       struct pci_bus *bus, *child;
-       struct resource *cfg_res;
--      u32 val;
-       int i, ret;
-       LIST_HEAD(res);
-       struct resource_entry *win;
-@@ -544,25 +543,6 @@ int dw_pcie_host_init(struct pcie_port *
-       if (pp->ops->host_init)
-               pp->ops->host_init(pp);
--      /*
--       * If the platform provides ->rd_other_conf, it means the platform
--       * uses its own address translation component rather than ATU, so
--       * we should not program the ATU here.
--       */
--      if (!pp->ops->rd_other_conf)
--              dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX1,
--                                        PCIE_ATU_TYPE_MEM, pp->mem_base,
--                                        pp->mem_bus_addr, pp->mem_size);
--
--      dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0);
--
--      /* program correct class for RC */
--      dw_pcie_wr_own_conf(pp, PCI_CLASS_DEVICE, 2, PCI_CLASS_BRIDGE_PCI);
--
--      dw_pcie_rd_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, &val);
--      val |= PORT_LOGIC_SPEED_CHANGE;
--      dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val);
--
-       pp->root_bus_nr = pp->busn->start;
-       if (IS_ENABLED(CONFIG_PCI_MSI)) {
-               bus = pci_scan_root_bus_msi(pp->dev, pp->root_bus_nr,
-@@ -800,6 +780,25 @@ void dw_pcie_setup_rc(struct pcie_port *
-       val |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
-               PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
-       dw_pcie_writel_rc(pp, val, PCI_COMMAND);
-+
-+      /*
-+       * If the platform provides ->rd_other_conf, it means the platform
-+       * uses its own address translation component rather than ATU, so
-+       * we should not program the ATU here.
-+       */
-+      if (!pp->ops->rd_other_conf)
-+              dw_pcie_prog_outbound_atu(pp, PCIE_ATU_REGION_INDEX1,
-+                                        PCIE_ATU_TYPE_MEM, pp->mem_base,
-+                                        pp->mem_bus_addr, pp->mem_size);
-+
-+      dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0);
-+
-+      /* program correct class for RC */
-+      dw_pcie_wr_own_conf(pp, PCI_CLASS_DEVICE, 2, PCI_CLASS_BRIDGE_PCI);
-+
-+      dw_pcie_rd_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, &val);
-+      val |= PORT_LOGIC_SPEED_CHANGE;
-+      dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val);
- }
- MODULE_AUTHOR("Jingoo Han <jg1.han@samsung.com>");
diff --git a/target/linux/layerscape/patches-4.4/0059-PCI-designware-Remove-incorrect-RC-memory-base-limit.patch b/target/linux/layerscape/patches-4.4/0059-PCI-designware-Remove-incorrect-RC-memory-base-limit.patch
deleted file mode 100644 (file)
index 5eb0bb1..0000000
+++ /dev/null
@@ -1,45 +0,0 @@
-From ae717a9744a3e18f2ed0a6aa44e279c89ad5052c Mon Sep 17 00:00:00 2001
-From: Gabriele Paoloni <gabriele.paoloni@huawei.com>
-Date: Sat, 16 Apr 2016 12:03:39 +0100
-Subject: [PATCH 59/70] PCI: designware: Remove incorrect RC memory base/limit
- configuration
-
-Currently dw_pcie_setup_rc() configures memory base and memory limit in the
-type1 configuration header for the root complex.  In doing so it uses the
-CPU address (pp->mem_base) rather than the bus address (pp->mem_bus_addr).
-This is wrong and it is useless since the configuration is overwritten
-later on when pci_bus_assign_resources() is called.
-
-Remove this configuration from dw_pcie_setup_rc().
-
-Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
----
- drivers/pci/host/pcie-designware.c |    8 --------
- 1 file changed, 8 deletions(-)
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -708,8 +708,6 @@ static struct pci_ops dw_pcie_ops = {
- void dw_pcie_setup_rc(struct pcie_port *pp)
- {
-       u32 val;
--      u32 membase;
--      u32 memlimit;
-       /* set the number of lanes */
-       dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val);
-@@ -768,12 +766,6 @@ void dw_pcie_setup_rc(struct pcie_port *
-       val |= 0x00010100;
-       dw_pcie_writel_rc(pp, val, PCI_PRIMARY_BUS);
--      /* setup memory base, memory limit */
--      membase = ((u32)pp->mem_base & 0xfff00000) >> 16;
--      memlimit = (pp->mem_size + (u32)pp->mem_base) & 0xfff00000;
--      val = memlimit | membase;
--      dw_pcie_writel_rc(pp, val, PCI_MEMORY_BASE);
--
-       /* setup command register */
-       dw_pcie_readl_rc(pp, PCI_COMMAND, &val);
-       val &= 0xffff0000;
diff --git a/target/linux/layerscape/patches-4.4/0140-config-add-freescale-config-for-amr64.patch b/target/linux/layerscape/patches-4.4/0140-config-add-freescale-config-for-amr64.patch
deleted file mode 100644 (file)
index 74ff44b..0000000
+++ /dev/null
@@ -1,148 +0,0 @@
-From 880b7aa2e2c62e54245fb77d92db502175232d86 Mon Sep 17 00:00:00 2001
-From: Zhao Qiang <qiang.zhao@nxp.com>
-Date: Wed, 12 Oct 2016 11:01:17 +0800
-Subject: [PATCH 140/141] config: add freescale config for amr64
-
-Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
----
- arch/arm64/configs/freescale.config |  134 +++++++++++++++++++++++++++++++++++
- 1 file changed, 134 insertions(+)
- create mode 100644 arch/arm64/configs/freescale.config
-
---- /dev/null
-+++ b/arch/arm64/configs/freescale.config
-@@ -0,0 +1,134 @@
-+# general options
-+CONFIG_LOCALVERSION_AUTO=y
-+CONFIG_SLAB=y
-+CONFIG_MODULE_FORCE_LOAD=y
-+CONFIG_MODVERSIONS=y
-+CONFIG_ARM64_VA_BITS_48=y
-+CONFIG_BLK_DEV_RAM=y
-+CONFIG_BLK_DEV_RAM_SIZE=262144
-+CONFIG_PRINTK_TIME=y
-+CONFIG_PID_IN_CONTEXTIDR=y
-+CONFIG_IPV6=y
-+# iommu
-+CONFIG_IOMMU_SUPPORT=y
-+CONFIG_ARM_SMMU=y
-+# dpaa2
-+CONFIG_STAGING=y
-+CONFIG_FSL_MC_BUS=y
-+CONFIG_FSL_MC_RESTOOL=y
-+CONFIG_FSL_MC_DPIO=y
-+CONFIG_FSL_DPAA2=y
-+CONFIG_NET_NS=y
-+CONFIG_FSL_DPAA2_DCE=y
-+CONFIG_FSL_DCE_FLOW_LIMIT=65536
-+CONFIG_FSL_DCE_API_TIME_TRIAL=m
-+CONFIG_LS_SOC_DRIVERS=y
-+# mdio
-+CONFIG_FSL_XGMAC_MDIO=y
-+CONFIG_MDIO_BUS_MUX_MMIOREG=y
-+# phy
-+CONFIG_AQUANTIA_PHY=y
-+CONFIG_VITESSE_PHY=y
-+CONFIG_REALTEK_PHY=y
-+CONFIG_FIXED_PHY=y
-+# reset support
-+CONFIG_POWER_RESET_LAYERSCAPE=y
-+# pci
-+CONFIG_PCI_LAYERSCAPE=y
-+CONFIG_PCI_HOST_GENERIC=y
-+CONFIG_E1000=y
-+CONFIG_E1000E=y
-+# clock driver
-+CONFIG_CLK_QORIQ=y
-+# usb
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_DWC3=y
-+CONFIG_DMADEVICES=y
-+# ahci/sata
-+CONFIG_AHCI_QORIQ=y
-+# esdhc
-+CONFIG_MMC_SDHCI_OF_ESDHC=y
-+# virtualization
-+CONFIG_VHOST_NET=y
-+CONFIG_KVM_ARM_MAX_VCPUS=8
-+# I2C
-+CONFIG_I2C=y
-+CONFIG_I2C_CHARDEV=y
-+CONFIG_I2C_MUX=y
-+CONFIG_I2C_MUX_PCA954x=y
-+CONFIG_I2C_IMX=y
-+# hardware monitor
-+CONFIG_SENSORS_LM90=y
-+CONFIG_SENSORS_INA2XX=y
-+# DPAA 1
-+CONFIG_HAS_FSL_QBMAN=y
-+CONFIG_CRYPTO_DEV_FSL_CAAM=y
-+# network
-+CONFIG_BRIDGE=m
-+CONFIG_MACVLAN=y
-+CONFIG_FSL_SDK_FMAN=y
-+CONFIG_FMAN_ARM=y
-+CONFIG_FSL_SDK_DPAA_ETH=y
-+CONFIG_INET_ESP=y
-+CONFIG_XFRM_USER=y
-+CONFIG_NET_KEY=y
-+# vfio
-+CONFIG_VFIO=y
-+CONFIG_VFIO_PCI=y
-+CONFIG_VFIO_FSL_MC=y
-+# CPU Frequency scaling
-+CONFIG_CPU_FREQ=y
-+CONFIG_CPU_FREQ_GOV_COMMON=y
-+CONFIG_CPU_FREQ_STAT=y
-+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-+CONFIG_CPU_FREQ_GOV_USERSPACE=y
-+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-+CONFIG_QORIQ_CPUFREQ=y
-+#ifc
-+CONFIG_MTD_OF_PARTS=y
-+CONFIG_MTD_GEN_PROBE=y
-+CONFIG_MTD=y
-+CONFIG_MTD_CMDLINE_PARTS=y
-+CONFIG_MTD_BLOCK=y
-+CONFIG_MTD_CFI=y
-+CONFIG_MTD_CFI_ADV_OPTIONS=y
-+CONFIG_MTD_CFI_INTELEXT=y
-+CONFIG_MTD_CFI_AMDSTD=y
-+CONFIG_MTD_CFI_STAA=y
-+CONFIG_MTD_PHYSMAP_OF=y
-+CONFIG_MTD_NAND=y
-+CONFIG_MTD_NAND_FSL_IFC=y
-+#spi
-+CONFIG_SPI_FSL_DSPI=y
-+CONFIG_MTD_SPI_NOR=y
-+CONFIG_MTD_DATAFLASH=y
-+CONFIG_MTD_M25P80=y
-+CONFIG_MTD_SST25L=y
-+#RTC
-+CONFIG_RTC_DRV_DS3232=y
-+#CryptoAPI
-+CONFIG_CRYPTO_SHA256=y
-+CONFIG_CRYPTO_SHA512=y
-+# ls1046a
-+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-+CONFIG_SPI_FSL_QUADSPI=y
-+CONFIG_RTC_DRV_PCF2127=y
-+CONFIG_WATCHDOG=y
-+CONFIG_IMX2_WDT=y
-+CONFIG_HWMON=y
-+CONFIG_SENSORS_LM90=y
-+CONFIG_SENSORS_INA2XX=y
-+CONFIG_EEPROM_AT24=y
-+# lpuart
-+CONFIG_SERIAL_FSL_LPUART=y
-+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
-+# ftm
-+CONFIG_FTM_ALARM=y
-+# qDMA
-+CONFIG_FSL_QDMA=y
-+CONFIG_DMATEST=y
-+#NVMe
-+CONFIG_BLK_DEV_NVME=y
diff --git a/target/linux/layerscape/patches-4.4/0238-arm64-disable-CONFIG_EEPROM_AT24-for-freescale.confi.patch b/target/linux/layerscape/patches-4.4/0238-arm64-disable-CONFIG_EEPROM_AT24-for-freescale.confi.patch
deleted file mode 100644 (file)
index a16524a..0000000
+++ /dev/null
@@ -1,24 +0,0 @@
-From fbc31a61b7bcfbc9ae1a8acda547de891f4b8ee4 Mon Sep 17 00:00:00 2001
-From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 31 Oct 2016 17:50:03 +0800
-Subject: [PATCH 238/238] arm64: disable CONFIG_EEPROM_AT24 for
- freescale.config
-
-Disable CONFIG_EEPROM_AT24 in freescale.config. Otherwise, i2cdump
-for EEPROM will get resource busy issue.
-
-Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
----
- arch/arm64/configs/freescale.config |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm64/configs/freescale.config
-+++ b/arch/arm64/configs/freescale.config
-@@ -121,7 +121,6 @@ CONFIG_IMX2_WDT=y
- CONFIG_HWMON=y
- CONFIG_SENSORS_LM90=y
- CONFIG_SENSORS_INA2XX=y
--CONFIG_EEPROM_AT24=y
- # lpuart
- CONFIG_SERIAL_FSL_LPUART=y
- CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
diff --git a/target/linux/layerscape/patches-4.4/0239-ARM-dts-ls1021a-add-PCIe-dts-node.patch b/target/linux/layerscape/patches-4.4/0239-ARM-dts-ls1021a-add-PCIe-dts-node.patch
deleted file mode 100644 (file)
index 1e47060..0000000
+++ /dev/null
@@ -1,68 +0,0 @@
-From 1f58043afef0dca3d12dc23ac3a35d7074412939 Mon Sep 17 00:00:00 2001
-From: Minghuan Lian <Minghuan.Lian@nxp.com>
-Date: Tue, 2 Feb 2016 16:30:07 +0800
-Subject: [PATCH 01/13] ARM: dts: ls1021a: add PCIe dts node
-
-Cherry-pick upstream patch.
-
-LS1021a contains two PCIe controllers. The patch adds their node to
-dts file.
-
-Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
-Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
----
- arch/arm/boot/dts/ls1021a.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
-
---- a/arch/arm/boot/dts/ls1021a.dtsi
-+++ b/arch/arm/boot/dts/ls1021a.dtsi
-@@ -539,5 +539,49 @@
-                       dr_mode = "host";
-                       snps,quirk-frame-length-adjustment = <0x20>;
-               };
-+
-+              pcie@3400000 {
-+                      compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
-+                      reg = <0x00 0x03400000 0x0 0x00010000   /* controller registers */
-+                             0x40 0x00000000 0x0 0x00002000>; /* configuration space */
-+                      reg-names = "regs", "config";
-+                      interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */
-+                      fsl,pcie-scfg = <&scfg 0>;
-+                      #address-cells = <3>;
-+                      #size-cells = <2>;
-+                      device_type = "pci";
-+                      num-lanes = <4>;
-+                      bus-range = <0x0 0xff>;
-+                      ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
-+                                0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+                      #interrupt-cells = <1>;
-+                      interrupt-map-mask = <0 0 0 7>;
-+                      interrupt-map = <0000 0 0 1 &gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH>,
-+                                      <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
-+                                      <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
-+                                      <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
-+              };
-+
-+              pcie@3500000 {
-+                      compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
-+                      reg = <0x00 0x03500000 0x0 0x00010000   /* controller registers */
-+                             0x48 0x00000000 0x0 0x00002000>; /* configuration space */
-+                      reg-names = "regs", "config";
-+                      interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
-+                      fsl,pcie-scfg = <&scfg 1>;
-+                      #address-cells = <3>;
-+                      #size-cells = <2>;
-+                      device_type = "pci";
-+                      num-lanes = <4>;
-+                      bus-range = <0x0 0xff>;
-+                      ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
-+                                0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+                      #interrupt-cells = <1>;
-+                      interrupt-map-mask = <0 0 0 7>;
-+                      interrupt-map = <0000 0 0 1 &gic GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH>,
-+                                      <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
-+                                      <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
-+                                      <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
-+              };
-       };
- };
diff --git a/target/linux/layerscape/patches-4.4/0240-ARM-dts-ls1021a-add-SCFG-MSI-dts-node.patch b/target/linux/layerscape/patches-4.4/0240-ARM-dts-ls1021a-add-SCFG-MSI-dts-node.patch
deleted file mode 100644 (file)
index ca2663b..0000000
+++ /dev/null
@@ -1,56 +0,0 @@
-From b57dcab78fdc76a6c56c2df71518fb022429e244 Mon Sep 17 00:00:00 2001
-From: Minghuan Lian <Minghuan.Lian@nxp.com>
-Date: Wed, 6 Apr 2016 19:02:07 +0800
-Subject: [PATCH 02/13] ARM: dts: ls1021a: add SCFG MSI dts node
-
-Cherry-pick upstream patch.
-
-Add SCFG MSI dts node and add msi-parent property to PCIe dts node
-that points to the corresponding MSI node.
-
-Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
-Tested-by: Alexander Stein <alexander.stein@systec-electronic.com>
-Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
----
- arch/arm/boot/dts/ls1021a.dtsi | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
---- a/arch/arm/boot/dts/ls1021a.dtsi
-+++ b/arch/arm/boot/dts/ls1021a.dtsi
-@@ -119,6 +119,20 @@
-               };
-+              msi1: msi-controller@1570e00 {
-+                      compatible = "fsl,1s1021a-msi";
-+                      reg = <0x0 0x1570e00 0x0 0x8>;
-+                      msi-controller;
-+                      interrupts =  <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
-+              };
-+
-+              msi2: msi-controller@1570e08 {
-+                      compatible = "fsl,1s1021a-msi";
-+                      reg = <0x0 0x1570e08 0x0 0x8>;
-+                      msi-controller;
-+                      interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
-+              };
-+
-               ifc: ifc@1530000 {
-                       compatible = "fsl,ifc", "simple-bus";
-                       reg = <0x0 0x1530000 0x0 0x10000>;
-@@ -554,6 +568,7 @@
-                       bus-range = <0x0 0xff>;
-                       ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
-                                 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+                      msi-parent = <&msi1>;
-                       #interrupt-cells = <1>;
-                       interrupt-map-mask = <0 0 0 7>;
-                       interrupt-map = <0000 0 0 1 &gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH>,
-@@ -576,6 +591,7 @@
-                       bus-range = <0x0 0xff>;
-                       ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
-                                 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+                      msi-parent = <&msi2>;
-                       #interrupt-cells = <1>;
-                       interrupt-map-mask = <0 0 0 7>;
-                       interrupt-map = <0000 0 0 1 &gic GIC_SPI 92  IRQ_TYPE_LEVEL_HIGH>,
diff --git a/target/linux/layerscape/patches-4.4/0241-dt-bindings-Add-bindings-for-Layerscape-SCFG-MSI.patch b/target/linux/layerscape/patches-4.4/0241-dt-bindings-Add-bindings-for-Layerscape-SCFG-MSI.patch
deleted file mode 100644 (file)
index 463df7d..0000000
+++ /dev/null
@@ -1,53 +0,0 @@
-From 066320dd0643e66bc5afe0d0984e77b2e938a6f4 Mon Sep 17 00:00:00 2001
-From: Minghuan Lian <Minghuan.Lian@nxp.com>
-Date: Wed, 23 Mar 2016 19:08:19 +0800
-Subject: [PATCH 03/13] dt/bindings: Add bindings for Layerscape SCFG MSI
-
-Cherry-pick upstream patch.
-
-Some Layerscape SoCs use a simple MSI controller implementation.
-It contains only two SCFG register to trigger and describe a
-group 32 MSI interrupts. The patch adds bindings to describe
-the controller.
-
-Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
----
- .../interrupt-controller/fsl,ls-scfg-msi.txt       | 30 ++++++++++++++++++++++
- 1 file changed, 30 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
-@@ -0,0 +1,30 @@
-+* Freescale Layerscape SCFG PCIe MSI controller
-+
-+Required properties:
-+
-+- compatible: should be "fsl,<soc-name>-msi" to identify
-+            Layerscape PCIe MSI controller block such as:
-+              "fsl,1s1021a-msi"
-+              "fsl,1s1043a-msi"
-+- msi-controller: indicates that this is a PCIe MSI controller node
-+- reg: physical base address of the controller and length of memory mapped.
-+- interrupts: an interrupt to the parent interrupt controller.
-+
-+Optional properties:
-+- interrupt-parent: the phandle to the parent interrupt controller.
-+
-+This interrupt controller hardware is a second level interrupt controller that
-+is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based
-+platforms. If interrupt-parent is not provided, the default parent interrupt
-+controller will be used.
-+Each PCIe node needs to have property msi-parent that points to
-+MSI controller node
-+
-+Examples:
-+
-+      msi1: msi-controller@1571000 {
-+              compatible = "fsl,1s1043a-msi";
-+              reg = <0x0 0x1571000 0x0 0x8>,
-+              msi-controller;
-+              interrupts = <0 116 0x4>;
-+      };
diff --git a/target/linux/layerscape/patches-4.4/1074-mtd-nand-spi-nor-assign-MTD-of_node.patch b/target/linux/layerscape/patches-4.4/1074-mtd-nand-spi-nor-assign-MTD-of_node.patch
deleted file mode 100644 (file)
index 358b512..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From f560fdb9d71aaf3adc54341a1650577c78495df9 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:22 -0700
-Subject: [PATCH 074/113] mtd: {nand,spi-nor}: assign MTD of_node
-
-We should pass along our flash DT node to the MTD layer, so it can set
-up ofpart for us.
-
-cherry-pick{
-remove the code:
-drivers/mtd/nand/nand_base.c | 3 +
-commit:3e63b26bdd4069c3df2cd7ce7217a21d06801b41
-}
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1228,6 +1228,7 @@ int spi_nor_scan(struct spi_nor *nor, co
-               mtd->flags |= MTD_NO_ERASE;
-       mtd->dev.parent = dev;
-+      mtd_set_of_node(mtd, np);
-       nor->page_size = info->page_size;
-       mtd->writebufsize = nor->page_size;
diff --git a/target/linux/layerscape/patches-4.4/1075-mtd-spi-nor-convert-to-spi_nor_-get-set-_flash_node.patch b/target/linux/layerscape/patches-4.4/1075-mtd-spi-nor-convert-to-spi_nor_-get-set-_flash_node.patch
deleted file mode 100644 (file)
index bbe29b6..0000000
+++ /dev/null
@@ -1,80 +0,0 @@
-From f906ec330da9aa83de5382653436be36273c63d3 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:24 -0700
-Subject: [PATCH 075/113] mtd: spi-nor: convert to spi_nor_{get,
- set}_flash_node()
-
-Used semantic patch with 'make coccicheck MODE=patch COCCI=script.cocci':
-
----8<----
-virtual patch
-
-@@
-struct spi_nor b;
-struct spi_nor *c;
-expression d;
-@@
-(
--(b).flash_node = (d)
-+spi_nor_set_flash_node(&b, d)
-|
--(c)->flash_node = (d)
-+spi_nor_set_flash_node(c, d)
-)
----8<----
-
-And a manual conversion for the one use of spi_nor_get_flash_node().
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/devices/m25p80.c      |    2 +-
- drivers/mtd/spi-nor/fsl-quadspi.c |    2 +-
- drivers/mtd/spi-nor/nxp-spifi.c   |    2 +-
- drivers/mtd/spi-nor/spi-nor.c     |    2 +-
- 4 files changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -221,7 +221,7 @@ static int m25p_probe(struct spi_device
-       nor->read_reg = m25p80_read_reg;
-       nor->dev = &spi->dev;
--      nor->flash_node = spi->dev.of_node;
-+      spi_nor_set_flash_node(nor, spi->dev.of_node);
-       nor->priv = flash;
-       spi_set_drvdata(spi, flash);
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -1013,7 +1013,7 @@ static int fsl_qspi_probe(struct platfor
-               mtd = &nor->mtd;
-               nor->dev = dev;
--              nor->flash_node = np;
-+              spi_nor_set_flash_node(nor, np);
-               nor->priv = q;
-               /* fill the hooks */
---- a/drivers/mtd/spi-nor/nxp-spifi.c
-+++ b/drivers/mtd/spi-nor/nxp-spifi.c
-@@ -330,7 +330,7 @@ static int nxp_spifi_setup_flash(struct
-       writel(ctrl, spifi->io_base + SPIFI_CTRL);
-       spifi->nor.dev   = spifi->dev;
--      spifi->nor.flash_node = np;
-+      spi_nor_set_flash_node(&spifi->nor, np);
-       spifi->nor.priv  = spifi;
-       spifi->nor.read  = nxp_spifi_read;
-       spifi->nor.write = nxp_spifi_write;
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1120,7 +1120,7 @@ int spi_nor_scan(struct spi_nor *nor, co
-       const struct flash_info *info = NULL;
-       struct device *dev = nor->dev;
-       struct mtd_info *mtd = &nor->mtd;
--      struct device_node *np = nor->flash_node;
-+      struct device_node *np = spi_nor_get_flash_node(nor);
-       int ret;
-       int i;
diff --git a/target/linux/layerscape/patches-4.4/1076-mtd-spi-nor-drop-unnecessary-partition-parser-data.patch b/target/linux/layerscape/patches-4.4/1076-mtd-spi-nor-drop-unnecessary-partition-parser-data.patch
deleted file mode 100644 (file)
index 0960f53..0000000
+++ /dev/null
@@ -1,83 +0,0 @@
-From e36da6d0a0841ea3a75d5189057bd020d737e71a Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:26 -0700
-Subject: [PATCH 076/113] mtd: spi-nor: drop unnecessary partition parser data
-
-Now that the SPI-NOR/MTD framework pass the 'flash_node' through to the
-partition parsing code, we don't have to do it ourselves.
-
-Also convert to mtd_device_register(), since we don't need the 2nd and
-3rd parameters anymore.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/devices/m25p80.c      |    8 ++------
- drivers/mtd/spi-nor/fsl-quadspi.c |    4 +---
- drivers/mtd/spi-nor/nxp-spifi.c   |    4 +---
- 3 files changed, 4 insertions(+), 12 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -197,7 +197,6 @@ static int m25p80_erase(struct spi_nor *
-  */
- static int m25p_probe(struct spi_device *spi)
- {
--      struct mtd_part_parser_data     ppdata;
-       struct flash_platform_data      *data;
-       struct m25p *flash;
-       struct spi_nor *nor;
-@@ -249,11 +248,8 @@ static int m25p_probe(struct spi_device
-       if (ret)
-               return ret;
--      ppdata.of_node = spi->dev.of_node;
--
--      return mtd_device_parse_register(&nor->mtd, NULL, &ppdata,
--                      data ? data->parts : NULL,
--                      data ? data->nr_parts : 0);
-+      return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
-+                                 data ? data->nr_parts : 0);
- }
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -927,7 +927,6 @@ static void fsl_qspi_unprep(struct spi_n
- static int fsl_qspi_probe(struct platform_device *pdev)
- {
-       struct device_node *np = pdev->dev.of_node;
--      struct mtd_part_parser_data ppdata;
-       struct device *dev = &pdev->dev;
-       struct fsl_qspi *q;
-       struct resource *res;
-@@ -1038,8 +1037,7 @@ static int fsl_qspi_probe(struct platfor
-               if (ret)
-                       goto mutex_failed;
--              ppdata.of_node = np;
--              ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
-+              ret = mtd_device_register(mtd, NULL, 0);
-               if (ret)
-                       goto mutex_failed;
---- a/drivers/mtd/spi-nor/nxp-spifi.c
-+++ b/drivers/mtd/spi-nor/nxp-spifi.c
-@@ -271,7 +271,6 @@ static void nxp_spifi_dummy_id_read(stru
- static int nxp_spifi_setup_flash(struct nxp_spifi *spifi,
-                                struct device_node *np)
- {
--      struct mtd_part_parser_data ppdata;
-       enum read_mode flash_read;
-       u32 ctrl, property;
-       u16 mode = 0;
-@@ -361,8 +360,7 @@ static int nxp_spifi_setup_flash(struct
-               return ret;
-       }
--      ppdata.of_node = np;
--      ret = mtd_device_parse_register(&spifi->nor.mtd, NULL, &ppdata, NULL, 0);
-+      ret = mtd_device_register(&spifi->nor.mtd, NULL, 0);
-       if (ret) {
-               dev_err(spifi->dev, "mtd device parse failed\n");
-               return ret;
diff --git a/target/linux/layerscape/patches-4.4/1077-mtd-add-get-set-of_node-flash_node-helpers.patch b/target/linux/layerscape/patches-4.4/1077-mtd-add-get-set-of_node-flash_node-helpers.patch
deleted file mode 100644 (file)
index eeba1e9..0000000
+++ /dev/null
@@ -1,62 +0,0 @@
-From a2f87e7df641b482e217f5b0efbaf41f6b8a0cf6 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:20 -0700
-Subject: [PATCH 077/113] mtd: add get/set of_node/flash_node helpers
-
-We are going to begin using the mtd->dev.of_node field for MTD device
-nodes, so let's add helpers for it. Also, we'll be making some
-conversions on spi_nor (and nand_chip eventually) too, so get that ready
-with their own helpers.
-
-commit:28b8b26b308e656edfa9467867d5f79212da2ec3
-delete the include/linux/mtd/nand.h
-just upgrade the code about spi.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
----
- include/linux/mtd/mtd.h     |   11 +++++++++++
- include/linux/mtd/spi-nor.h |   11 +++++++++++
- 2 files changed, 22 insertions(+)
-
---- a/include/linux/mtd/mtd.h
-+++ b/include/linux/mtd/mtd.h
-@@ -258,6 +258,17 @@ struct mtd_info {
-       int usecount;
- };
-+static inline void mtd_set_of_node(struct mtd_info *mtd,
-+                                 struct device_node *np)
-+{
-+      mtd->dev.of_node = np;
-+}
-+
-+static inline struct device_node *mtd_get_of_node(struct mtd_info *mtd)
-+{
-+      return mtd->dev.of_node;
-+}
-+
- int mtd_erase(struct mtd_info *mtd, struct erase_info *instr);
- int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,
-             void **virt, resource_size_t *phys);
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -184,6 +184,17 @@ struct spi_nor {
-       void *priv;
- };
-+static inline void spi_nor_set_flash_node(struct spi_nor *nor,
-+                                        struct device_node *np)
-+{
-+      nor->flash_node = np;
-+}
-+
-+static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
-+{
-+      return nor->flash_node;
-+}
-+
- /**
-  * spi_nor_scan() - scan the SPI NOR
-  * @nor:      the spi_nor structure
diff --git a/target/linux/layerscape/patches-4.4/1078-mtd-spi-nor-drop-flash_node-field.patch b/target/linux/layerscape/patches-4.4/1078-mtd-spi-nor-drop-flash_node-field.patch
deleted file mode 100644 (file)
index dc551df..0000000
+++ /dev/null
@@ -1,57 +0,0 @@
-From df36b4601bc9f84684249a26eb39b818d6785fb8 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 20:33:27 -0700
-Subject: [PATCH 078/113] mtd: spi-nor: drop flash_node field
-
-We can just alias to the MTD of_node.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    1 -
- include/linux/mtd/spi-nor.h   |    6 ++----
- 2 files changed, 2 insertions(+), 5 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1228,7 +1228,6 @@ int spi_nor_scan(struct spi_nor *nor, co
-               mtd->flags |= MTD_NO_ERASE;
-       mtd->dev.parent = dev;
--      mtd_set_of_node(mtd, np);
-       nor->page_size = info->page_size;
-       mtd->writebufsize = nor->page_size;
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -123,7 +123,6 @@ enum spi_nor_option_flags {
-  * @mtd:              point to a mtd_info structure
-  * @lock:             the lock for the read/write/erase/lock/unlock operations
-  * @dev:              point to a spi device, or a spi nor controller device.
-- * @flash_node:               point to a device node describing this flash instance.
-  * @page_size:                the page size of the SPI NOR
-  * @addr_width:               number of address bytes
-  * @erase_opcode:     the opcode for erasing a sector
-@@ -154,7 +153,6 @@ struct spi_nor {
-       struct mtd_info         mtd;
-       struct mutex            lock;
-       struct device           *dev;
--      struct device_node      *flash_node;
-       u32                     page_size;
-       u8                      addr_width;
-       u8                      erase_opcode;
-@@ -187,12 +185,12 @@ struct spi_nor {
- static inline void spi_nor_set_flash_node(struct spi_nor *nor,
-                                         struct device_node *np)
- {
--      nor->flash_node = np;
-+      mtd_set_of_node(&nor->mtd, np);
- }
- static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
- {
--      return nor->flash_node;
-+      return mtd_get_of_node(&nor->mtd);
- }
- /**
diff --git a/target/linux/layerscape/patches-4.4/1079-mtd-spi-nor-remove-unnecessary-leading-space-from-db.patch b/target/linux/layerscape/patches-4.4/1079-mtd-spi-nor-remove-unnecessary-leading-space-from-db.patch
deleted file mode 100644 (file)
index 13b30cf..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-From 3ea419cf269832f5743d9b5ad75ece5178b02b09 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Fri, 30 Oct 2015 12:56:22 -0700
-Subject: [PATCH 079/113] mtd: spi-nor: remove unnecessary leading space from
- dbg print
-
-As Cyrille noted [1], this line is wrong.
-
-[1] http://lists.infradead.org/pipermail/linux-mtd/2015-September/061725.html
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Cc: Cyrille Pitchen <cyrille.pitchen@atmel.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -862,7 +862,7 @@ static const struct flash_info *spi_nor_
-       tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
-       if (tmp < 0) {
--              dev_dbg(nor->dev, " error %d reading JEDEC ID\n", tmp);
-+              dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp);
-               return ERR_PTR(tmp);
-       }
diff --git a/target/linux/layerscape/patches-4.4/1080-mtd-fsl-quadspi-possible-NULL-dereference.patch b/target/linux/layerscape/patches-4.4/1080-mtd-fsl-quadspi-possible-NULL-dereference.patch
deleted file mode 100644 (file)
index 76898ab..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-From bd02decd1ad7cc883ce388e769a34a3c402b90c4 Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Mon, 16 Nov 2015 10:45:30 -0800
-Subject: [PATCH 080/113] mtd: fsl-quadspi: possible NULL dereference
-
-It is theoretically possible to probe this driver without a matching
-device tree, so let's guard against this.
-
-Also, use the of_device_get_match_data() helper to make this a bit
-simpler.
-
-Coverity complained about this one.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Acked-by: Han xu <han.xu@freescale.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -269,7 +269,7 @@ struct fsl_qspi {
-       struct clk *clk, *clk_en;
-       struct device *dev;
-       struct completion c;
--      struct fsl_qspi_devtype_data *devtype_data;
-+      const struct fsl_qspi_devtype_data *devtype_data;
-       u32 nor_size;
-       u32 nor_num;
-       u32 clk_rate;
-@@ -933,8 +933,6 @@ static int fsl_qspi_probe(struct platfor
-       struct spi_nor *nor;
-       struct mtd_info *mtd;
-       int ret, i = 0;
--      const struct of_device_id *of_id =
--                      of_match_device(fsl_qspi_dt_ids, &pdev->dev);
-       q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL);
-       if (!q)
-@@ -945,7 +943,9 @@ static int fsl_qspi_probe(struct platfor
-               return -ENODEV;
-       q->dev = dev;
--      q->devtype_data = (struct fsl_qspi_devtype_data *)of_id->data;
-+      q->devtype_data = of_device_get_match_data(dev);
-+      if (!q->devtype_data)
-+              return -ENODEV;
-       platform_set_drvdata(pdev, q);
-       /* find the resources */
diff --git a/target/linux/layerscape/patches-4.4/1081-mtd-spi-nor-provide-default-erase_sector-implementat.patch b/target/linux/layerscape/patches-4.4/1081-mtd-spi-nor-provide-default-erase_sector-implementat.patch
deleted file mode 100644 (file)
index e966caf..0000000
+++ /dev/null
@@ -1,105 +0,0 @@
-From 56bd0e13d8bc3b4486251b10ac9d2ba7434c21ee Mon Sep 17 00:00:00 2001
-From: Brian Norris <computersforpeace@gmail.com>
-Date: Tue, 10 Nov 2015 12:15:27 -0800
-Subject: [PATCH 081/113] mtd: spi-nor: provide default erase_sector
- implementation
-
-Some spi-nor drivers perform sector erase by duplicating their
-write_reg() command. Let's not require that the driver fill this out,
-and provide a default instead.
-
-Tested on m25p80.c and Medatek's MT8173 SPI NOR flash driver.
-
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   37 +++++++++++++++++++++++++++++++++----
- include/linux/mtd/spi-nor.h   |    3 ++-
- 2 files changed, 35 insertions(+), 5 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -38,6 +38,7 @@
- #define CHIP_ERASE_2MB_READY_WAIT_JIFFIES     (40UL * HZ)
- #define SPI_NOR_MAX_ID_LEN    6
-+#define SPI_NOR_MAX_ADDR_WIDTH        4
- struct flash_info {
-       char            *name;
-@@ -314,6 +315,29 @@ static void spi_nor_unlock_and_unprep(st
- }
- /*
-+ * Initiate the erasure of a single sector
-+ */
-+static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
-+{
-+      u8 buf[SPI_NOR_MAX_ADDR_WIDTH];
-+      int i;
-+
-+      if (nor->erase)
-+              return nor->erase(nor, addr);
-+
-+      /*
-+       * Default implementation, if driver doesn't have a specialized HW
-+       * control
-+       */
-+      for (i = nor->addr_width - 1; i >= 0; i--) {
-+              buf[i] = addr & 0xff;
-+              addr >>= 8;
-+      }
-+
-+      return nor->write_reg(nor, nor->erase_opcode, buf, nor->addr_width);
-+}
-+
-+/*
-  * Erase an address range on the nor chip.  The address range may extend
-  * one or more erase sectors.  Return an error is there is a problem erasing.
-  */
-@@ -372,10 +396,9 @@ static int spi_nor_erase(struct mtd_info
-               while (len) {
-                       write_enable(nor);
--                      if (nor->erase(nor, addr)) {
--                              ret = -EIO;
-+                      ret = spi_nor_erase_sector(nor, addr);
-+                      if (ret)
-                               goto erase_err;
--                      }
-                       addr += mtd->erasesize;
-                       len -= mtd->erasesize;
-@@ -1107,7 +1130,7 @@ static int set_quad_mode(struct spi_nor
- static int spi_nor_check(struct spi_nor *nor)
- {
-       if (!nor->dev || !nor->read || !nor->write ||
--              !nor->read_reg || !nor->write_reg || !nor->erase) {
-+              !nor->read_reg || !nor->write_reg) {
-               pr_err("spi-nor: please fill all the necessary fields!\n");
-               return -EINVAL;
-       }
-@@ -1310,6 +1333,12 @@ int spi_nor_scan(struct spi_nor *nor, co
-               nor->addr_width = 3;
-       }
-+      if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
-+              dev_err(dev, "address width is too large: %u\n",
-+                      nor->addr_width);
-+              return -EINVAL;
-+      }
-+
-       nor->read_dummy = spi_nor_read_dummy_cycles(nor);
-       dev_info(dev, "%s (%lld Kbytes)\n", info->name,
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -142,7 +142,8 @@ enum spi_nor_option_flags {
-  * @read:             [DRIVER-SPECIFIC] read data from the SPI NOR
-  * @write:            [DRIVER-SPECIFIC] write data to the SPI NOR
-  * @erase:            [DRIVER-SPECIFIC] erase a sector of the SPI NOR
-- *                    at the offset @offs
-+ *                    at the offset @offs; if not provided by the driver,
-+ *                    spi-nor will send the erase opcode via write_reg()
-  * @flash_lock:               [FLASH-SPECIFIC] lock a region of the SPI NOR
-  * @flash_unlock:     [FLASH-SPECIFIC] unlock a region of the SPI NOR
-  * @flash_is_locked:  [FLASH-SPECIFIC] check if a region of the SPI NOR is
diff --git a/target/linux/layerscape/patches-4.4/1083-mtd-spi-nor-Fix-error-message-with-unrecognized-JEDE.patch b/target/linux/layerscape/patches-4.4/1083-mtd-spi-nor-Fix-error-message-with-unrecognized-JEDE.patch
deleted file mode 100644 (file)
index 6ebbdb4..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 30e609daed95664824e95344e85c7eaedd1bfcf3 Mon Sep 17 00:00:00 2001
-From: Ricardo Ribalda <ricardo.ribalda@gmail.com>
-Date: Mon, 30 Nov 2015 20:41:17 +0100
-Subject: [PATCH 083/113] mtd: spi-nor: Fix error message with unrecognized
- JEDEC
-
-The error message was:
-
-m25p80 spi32766.0: unrecognized JEDEC id bytes: 00,  0,  0
-
-The new error message:
-
-m25p80 spi32766.0: unrecognized JEDEC id bytes: 00, 00, 00
-
-Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -896,7 +896,7 @@ static const struct flash_info *spi_nor_
-                               return &spi_nor_ids[tmp];
-               }
-       }
--      dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %2x, %2x\n",
-+      dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
-               id[0], id[1], id[2]);
-       return ERR_PTR(-ENODEV);
- }
diff --git a/target/linux/layerscape/patches-4.4/1084-mtd-spi-nor-fix-error-handling-in-spi_nor_erase.patch b/target/linux/layerscape/patches-4.4/1084-mtd-spi-nor-fix-error-handling-in-spi_nor_erase.patch
deleted file mode 100644 (file)
index 5350131..0000000
+++ /dev/null
@@ -1,39 +0,0 @@
-From 9e473594776da97245049019f1d1e9608ff1214a Mon Sep 17 00:00:00 2001
-From: Heiner Kallweit <hkallweit1@gmail.com>
-Date: Tue, 17 Nov 2015 20:18:54 +0100
-Subject: [PATCH 084/113] mtd: spi-nor: fix error handling in spi_nor_erase
-
-The documenting comment of mtd_erase in mtdcore.c states:
-Device drivers are supposed to call instr->callback() whenever
-the operation completes, even if it completes with a failure.
-
-Currently the callback isn't called in case of failure. Fix this.
-
-Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    8 ++------
- 1 file changed, 2 insertions(+), 6 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -411,17 +411,13 @@ static int spi_nor_erase(struct mtd_info
-       write_disable(nor);
-+erase_err:
-       spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
--      instr->state = MTD_ERASE_DONE;
-+      instr->state = ret ? MTD_ERASE_FAILED : MTD_ERASE_DONE;
-       mtd_erase_callback(instr);
-       return ret;
--
--erase_err:
--      spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_ERASE);
--      instr->state = MTD_ERASE_FAILED;
--      return ret;
- }
- static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs,
diff --git a/target/linux/layerscape/patches-4.4/1085-mtd-spi-nor-Check-the-return-value-from-read_sr.patch b/target/linux/layerscape/patches-4.4/1085-mtd-spi-nor-Check-the-return-value-from-read_sr.patch
deleted file mode 100644 (file)
index cca7ac1..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-From d05c68e35f42a46b352d2a4bdaef9954c946e20a Mon Sep 17 00:00:00 2001
-From: Fabio Estevam <fabio.estevam@freescale.com>
-Date: Fri, 20 Nov 2015 16:26:11 -0200
-Subject: [PATCH 085/113] mtd: spi-nor: Check the return value from read_sr()
-
-[context adjustment]
-
-We should better check the return value from read_sr() and
-propagate it in the case of error.
-
-Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -479,11 +479,13 @@ static int stm_is_locked_sr(struct spi_n
- static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
- {
-       struct mtd_info *mtd = &nor->mtd;
--      u8 status_old, status_new;
-+      int status_old, status_new;
-       u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
-       u8 shift = ffs(mask) - 1, pow, val;
-       status_old = read_sr(nor);
-+      if (status_old < 0)
-+              return status_old;
-       /* SPI NOR always locks to the end */
-       if (ofs + len != mtd->size) {
-@@ -529,11 +531,13 @@ static int stm_lock(struct spi_nor *nor,
- static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
- {
-       struct mtd_info *mtd = &nor->mtd;
--      uint8_t status_old, status_new;
-+      int status_old, status_new;
-       u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
-       u8 shift = ffs(mask) - 1, pow, val;
-       status_old = read_sr(nor);
-+      if (status_old < 0)
-+              return status_old;
-       /* Cannot unlock; would unlock larger region than requested */
-       if (stm_is_locked_sr(nor, ofs - mtd->erasesize, mtd->erasesize,
-@@ -1038,6 +1042,8 @@ static int macronix_quad_enable(struct s
-       int ret, val;
-       val = read_sr(nor);
-+      if (val < 0)
-+              return val;
-       write_enable(nor);
-       write_sr(nor, val | SR_QUAD_EN_MX);
diff --git a/target/linux/layerscape/patches-4.4/1086-mtd-spi-nor-wait-until-lock-unlock-operations-are-re.patch b/target/linux/layerscape/patches-4.4/1086-mtd-spi-nor-wait-until-lock-unlock-operations-are-re.patch
deleted file mode 100644 (file)
index 47f2c83..0000000
+++ /dev/null
@@ -1,66 +0,0 @@
-From 3a06c61b48fbc23046928275e37a693e1055ae74 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ezequiel=20Garc=C3=ADa?= <ezequiel@vanguardiasur.com.ar>
-Date: Mon, 28 Dec 2015 17:54:51 -0300
-Subject: [PATCH 086/113] mtd: spi-nor: wait until lock/unlock operations are
- ready
-
-On Micron and Numonyx devices, the status register write command
-(WRSR), raises a work-in-progress bit (WIP) on the status register.
-The datasheets for these devices specify that while the status
-register write is in progress, the status register WIP bit can still
-be read to check the end of the operation.
-
-This commit adds a wait_till_ready call on lock/unlock operations,
-which is required for Micron and Numonyx but should be harmless for
-others. This is needed to prevent applications from issuing erase or
-program operations before the unlock operation is completed.
-
-Reported-by: Stas Sergeev <stsp@list.ru>
-Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -482,6 +482,7 @@ static int stm_lock(struct spi_nor *nor,
-       int status_old, status_new;
-       u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
-       u8 shift = ffs(mask) - 1, pow, val;
-+      int ret;
-       status_old = read_sr(nor);
-       if (status_old < 0)
-@@ -520,7 +521,10 @@ static int stm_lock(struct spi_nor *nor,
-               return -EINVAL;
-       write_enable(nor);
--      return write_sr(nor, status_new);
-+      ret = write_sr(nor, status_new);
-+      if (ret)
-+              return ret;
-+      return spi_nor_wait_till_ready(nor);
- }
- /*
-@@ -534,6 +538,7 @@ static int stm_unlock(struct spi_nor *no
-       int status_old, status_new;
-       u8 mask = SR_BP2 | SR_BP1 | SR_BP0;
-       u8 shift = ffs(mask) - 1, pow, val;
-+      int ret;
-       status_old = read_sr(nor);
-       if (status_old < 0)
-@@ -570,7 +575,10 @@ static int stm_unlock(struct spi_nor *no
-               return -EINVAL;
-       write_enable(nor);
--      return write_sr(nor, status_new);
-+      ret = write_sr(nor, status_new);
-+      if (ret)
-+              return ret;
-+      return spi_nor_wait_till_ready(nor);
- }
- /*
diff --git a/target/linux/layerscape/patches-4.4/1087-mtd-spi-nor-fsl-quadspi-add-big-endian-support.patch b/target/linux/layerscape/patches-4.4/1087-mtd-spi-nor-fsl-quadspi-add-big-endian-support.patch
deleted file mode 100644 (file)
index 9ceddd6..0000000
+++ /dev/null
@@ -1,400 +0,0 @@
-From c58b398221d88ac0db29c3bb7522a4f48dfa102c Mon Sep 17 00:00:00 2001
-From: Yuan Yao <yao.yuan@freescale.com>
-Date: Tue, 17 Nov 2015 16:13:47 +0800
-Subject: [PATCH 087/113] mtd: spi-nor: fsl-quadspi: add big-endian support
-
-Add R/W functions for big- or little-endian registers:
-The qSPI controller's endian is independent of the CPU core's endian.
-So far, the qSPI have two versions for big-endian and little-endian.
-
-Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
-Acked-by: Han xu <han.xu@freescale.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |  157 +++++++++++++++++++++++--------------
- 1 file changed, 97 insertions(+), 60 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -275,6 +275,7 @@ struct fsl_qspi {
-       u32 clk_rate;
-       unsigned int chip_base_addr; /* We may support two chips. */
-       bool has_second_chip;
-+      bool big_endian;
-       struct mutex lock;
-       struct pm_qos_request pm_qos_req;
- };
-@@ -300,6 +301,28 @@ static inline int needs_wakeup_wait_mode
- }
- /*
-+ * R/W functions for big- or little-endian registers:
-+ * The qSPI controller's endian is independent of the CPU core's endian.
-+ * So far, although the CPU core is little-endian but the qSPI have two
-+ * versions for big-endian and little-endian.
-+ */
-+static void qspi_writel(struct fsl_qspi *q, u32 val, void __iomem *addr)
-+{
-+      if (q->big_endian)
-+              iowrite32be(val, addr);
-+      else
-+              iowrite32(val, addr);
-+}
-+
-+static u32 qspi_readl(struct fsl_qspi *q, void __iomem *addr)
-+{
-+      if (q->big_endian)
-+              return ioread32be(addr);
-+      else
-+              return ioread32(addr);
-+}
-+
-+/*
-  * An IC bug makes us to re-arrange the 32-bit data.
-  * The following chips, such as IMX6SLX, have fixed this bug.
-  */
-@@ -310,14 +333,14 @@ static inline u32 fsl_qspi_endian_xchg(s
- static inline void fsl_qspi_unlock_lut(struct fsl_qspi *q)
- {
--      writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);
--      writel(QUADSPI_LCKER_UNLOCK, q->iobase + QUADSPI_LCKCR);
-+      qspi_writel(q, QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);
-+      qspi_writel(q, QUADSPI_LCKER_UNLOCK, q->iobase + QUADSPI_LCKCR);
- }
- static inline void fsl_qspi_lock_lut(struct fsl_qspi *q)
- {
--      writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);
--      writel(QUADSPI_LCKER_LOCK, q->iobase + QUADSPI_LCKCR);
-+      qspi_writel(q, QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);
-+      qspi_writel(q, QUADSPI_LCKER_LOCK, q->iobase + QUADSPI_LCKCR);
- }
- static irqreturn_t fsl_qspi_irq_handler(int irq, void *dev_id)
-@@ -326,8 +349,8 @@ static irqreturn_t fsl_qspi_irq_handler(
-       u32 reg;
-       /* clear interrupt */
--      reg = readl(q->iobase + QUADSPI_FR);
--      writel(reg, q->iobase + QUADSPI_FR);
-+      reg = qspi_readl(q, q->iobase + QUADSPI_FR);
-+      qspi_writel(q, reg, q->iobase + QUADSPI_FR);
-       if (reg & QUADSPI_FR_TFF_MASK)
-               complete(&q->c);
-@@ -348,7 +371,7 @@ static void fsl_qspi_init_lut(struct fsl
-       /* Clear all the LUT table */
-       for (i = 0; i < QUADSPI_LUT_NUM; i++)
--              writel(0, base + QUADSPI_LUT_BASE + i * 4);
-+              qspi_writel(q, 0, base + QUADSPI_LUT_BASE + i * 4);
-       /* Quad Read */
-       lut_base = SEQID_QUAD_READ * 4;
-@@ -364,14 +387,15 @@ static void fsl_qspi_init_lut(struct fsl
-               dummy = 8;
-       }
--      writel(LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-+      qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-                       base + QUADSPI_LUT(lut_base));
--      writel(LUT0(DUMMY, PAD1, dummy) | LUT1(FSL_READ, PAD4, rxfifo),
-+      qspi_writel(q, LUT0(DUMMY, PAD1, dummy) | LUT1(FSL_READ, PAD4, rxfifo),
-                       base + QUADSPI_LUT(lut_base + 1));
-       /* Write enable */
-       lut_base = SEQID_WREN * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_WREN), base + QUADSPI_LUT(lut_base));
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_WREN),
-+                      base + QUADSPI_LUT(lut_base));
-       /* Page Program */
-       lut_base = SEQID_PP * 4;
-@@ -385,13 +409,15 @@ static void fsl_qspi_init_lut(struct fsl
-               addrlen = ADDR32BIT;
-       }
--      writel(LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-+      qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-                       base + QUADSPI_LUT(lut_base));
--      writel(LUT0(FSL_WRITE, PAD1, 0), base + QUADSPI_LUT(lut_base + 1));
-+      qspi_writel(q, LUT0(FSL_WRITE, PAD1, 0),
-+                      base + QUADSPI_LUT(lut_base + 1));
-       /* Read Status */
-       lut_base = SEQID_RDSR * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_RDSR) | LUT1(FSL_READ, PAD1, 0x1),
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_RDSR) |
-+                      LUT1(FSL_READ, PAD1, 0x1),
-                       base + QUADSPI_LUT(lut_base));
-       /* Erase a sector */
-@@ -400,40 +426,46 @@ static void fsl_qspi_init_lut(struct fsl
-       cmd = q->nor[0].erase_opcode;
-       addrlen = q->nor_size <= SZ_16M ? ADDR24BIT : ADDR32BIT;
--      writel(LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-+      qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-                       base + QUADSPI_LUT(lut_base));
-       /* Erase the whole chip */
-       lut_base = SEQID_CHIP_ERASE * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_CHIP_ERASE),
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_CHIP_ERASE),
-                       base + QUADSPI_LUT(lut_base));
-       /* READ ID */
-       lut_base = SEQID_RDID * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_RDID) | LUT1(FSL_READ, PAD1, 0x8),
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_RDID) |
-+                      LUT1(FSL_READ, PAD1, 0x8),
-                       base + QUADSPI_LUT(lut_base));
-       /* Write Register */
-       lut_base = SEQID_WRSR * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_WRSR) | LUT1(FSL_WRITE, PAD1, 0x2),
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_WRSR) |
-+                      LUT1(FSL_WRITE, PAD1, 0x2),
-                       base + QUADSPI_LUT(lut_base));
-       /* Read Configuration Register */
-       lut_base = SEQID_RDCR * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_RDCR) | LUT1(FSL_READ, PAD1, 0x1),
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_RDCR) |
-+                      LUT1(FSL_READ, PAD1, 0x1),
-                       base + QUADSPI_LUT(lut_base));
-       /* Write disable */
-       lut_base = SEQID_WRDI * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_WRDI), base + QUADSPI_LUT(lut_base));
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_WRDI),
-+                      base + QUADSPI_LUT(lut_base));
-       /* Enter 4 Byte Mode (Micron) */
-       lut_base = SEQID_EN4B * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_EN4B), base + QUADSPI_LUT(lut_base));
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_EN4B),
-+                      base + QUADSPI_LUT(lut_base));
-       /* Enter 4 Byte Mode (Spansion) */
-       lut_base = SEQID_BRWR * 4;
--      writel(LUT0(CMD, PAD1, SPINOR_OP_BRWR), base + QUADSPI_LUT(lut_base));
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_BRWR),
-+                      base + QUADSPI_LUT(lut_base));
-       fsl_qspi_lock_lut(q);
- }
-@@ -488,15 +520,16 @@ fsl_qspi_runcmd(struct fsl_qspi *q, u8 c
-                       q->chip_base_addr, addr, len, cmd);
-       /* save the reg */
--      reg = readl(base + QUADSPI_MCR);
-+      reg = qspi_readl(q, base + QUADSPI_MCR);
--      writel(q->memmap_phy + q->chip_base_addr + addr, base + QUADSPI_SFAR);
--      writel(QUADSPI_RBCT_WMRK_MASK | QUADSPI_RBCT_RXBRD_USEIPS,
-+      qspi_writel(q, q->memmap_phy + q->chip_base_addr + addr,
-+                      base + QUADSPI_SFAR);
-+      qspi_writel(q, QUADSPI_RBCT_WMRK_MASK | QUADSPI_RBCT_RXBRD_USEIPS,
-                       base + QUADSPI_RBCT);
--      writel(reg | QUADSPI_MCR_CLR_RXF_MASK, base + QUADSPI_MCR);
-+      qspi_writel(q, reg | QUADSPI_MCR_CLR_RXF_MASK, base + QUADSPI_MCR);
-       do {
--              reg2 = readl(base + QUADSPI_SR);
-+              reg2 = qspi_readl(q, base + QUADSPI_SR);
-               if (reg2 & (QUADSPI_SR_IP_ACC_MASK | QUADSPI_SR_AHB_ACC_MASK)) {
-                       udelay(1);
-                       dev_dbg(q->dev, "The controller is busy, 0x%x\n", reg2);
-@@ -507,21 +540,22 @@ fsl_qspi_runcmd(struct fsl_qspi *q, u8 c
-       /* trigger the LUT now */
-       seqid = fsl_qspi_get_seqid(q, cmd);
--      writel((seqid << QUADSPI_IPCR_SEQID_SHIFT) | len, base + QUADSPI_IPCR);
-+      qspi_writel(q, (seqid << QUADSPI_IPCR_SEQID_SHIFT) | len,
-+                      base + QUADSPI_IPCR);
-       /* Wait for the interrupt. */
-       if (!wait_for_completion_timeout(&q->c, msecs_to_jiffies(1000))) {
-               dev_err(q->dev,
-                       "cmd 0x%.2x timeout, addr@%.8x, FR:0x%.8x, SR:0x%.8x\n",
--                      cmd, addr, readl(base + QUADSPI_FR),
--                      readl(base + QUADSPI_SR));
-+                      cmd, addr, qspi_readl(q, base + QUADSPI_FR),
-+                      qspi_readl(q, base + QUADSPI_SR));
-               err = -ETIMEDOUT;
-       } else {
-               err = 0;
-       }
-       /* restore the MCR */
--      writel(reg, base + QUADSPI_MCR);
-+      qspi_writel(q, reg, base + QUADSPI_MCR);
-       return err;
- }
-@@ -533,7 +567,7 @@ static void fsl_qspi_read_data(struct fs
-       int i = 0;
-       while (len > 0) {
--              tmp = readl(q->iobase + QUADSPI_RBDR + i * 4);
-+              tmp = qspi_readl(q, q->iobase + QUADSPI_RBDR + i * 4);
-               tmp = fsl_qspi_endian_xchg(q, tmp);
-               dev_dbg(q->dev, "chip addr:0x%.8x, rcv:0x%.8x\n",
-                               q->chip_base_addr, tmp);
-@@ -561,9 +595,9 @@ static inline void fsl_qspi_invalid(stru
- {
-       u32 reg;
--      reg = readl(q->iobase + QUADSPI_MCR);
-+      reg = qspi_readl(q, q->iobase + QUADSPI_MCR);
-       reg |= QUADSPI_MCR_SWRSTHD_MASK | QUADSPI_MCR_SWRSTSD_MASK;
--      writel(reg, q->iobase + QUADSPI_MCR);
-+      qspi_writel(q, reg, q->iobase + QUADSPI_MCR);
-       /*
-        * The minimum delay : 1 AHB + 2 SFCK clocks.
-@@ -572,7 +606,7 @@ static inline void fsl_qspi_invalid(stru
-       udelay(1);
-       reg &= ~(QUADSPI_MCR_SWRSTHD_MASK | QUADSPI_MCR_SWRSTSD_MASK);
--      writel(reg, q->iobase + QUADSPI_MCR);
-+      qspi_writel(q, reg, q->iobase + QUADSPI_MCR);
- }
- static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
-@@ -586,20 +620,20 @@ static int fsl_qspi_nor_write(struct fsl
-               q->chip_base_addr, to, count);
-       /* clear the TX FIFO. */
--      tmp = readl(q->iobase + QUADSPI_MCR);
--      writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR);
-+      tmp = qspi_readl(q, q->iobase + QUADSPI_MCR);
-+      qspi_writel(q, tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR);
-       /* fill the TX data to the FIFO */
-       for (j = 0, i = ((count + 3) / 4); j < i; j++) {
-               tmp = fsl_qspi_endian_xchg(q, *txbuf);
--              writel(tmp, q->iobase + QUADSPI_TBDR);
-+              qspi_writel(q, tmp, q->iobase + QUADSPI_TBDR);
-               txbuf++;
-       }
-       /* fill the TXFIFO upto 16 bytes for i.MX7d */
-       if (needs_fill_txfifo(q))
-               for (; i < 4; i++)
--                      writel(tmp, q->iobase + QUADSPI_TBDR);
-+                      qspi_writel(q, tmp, q->iobase + QUADSPI_TBDR);
-       /* Trigger it */
-       ret = fsl_qspi_runcmd(q, opcode, to, count);
-@@ -615,10 +649,10 @@ static void fsl_qspi_set_map_addr(struct
-       int nor_size = q->nor_size;
-       void __iomem *base = q->iobase;
--      writel(nor_size + q->memmap_phy, base + QUADSPI_SFA1AD);
--      writel(nor_size * 2 + q->memmap_phy, base + QUADSPI_SFA2AD);
--      writel(nor_size * 3 + q->memmap_phy, base + QUADSPI_SFB1AD);
--      writel(nor_size * 4 + q->memmap_phy, base + QUADSPI_SFB2AD);
-+      qspi_writel(q, nor_size + q->memmap_phy, base + QUADSPI_SFA1AD);
-+      qspi_writel(q, nor_size * 2 + q->memmap_phy, base + QUADSPI_SFA2AD);
-+      qspi_writel(q, nor_size * 3 + q->memmap_phy, base + QUADSPI_SFB1AD);
-+      qspi_writel(q, nor_size * 4 + q->memmap_phy, base + QUADSPI_SFB2AD);
- }
- /*
-@@ -640,24 +674,26 @@ static void fsl_qspi_init_abh_read(struc
-       int seqid;
-       /* AHB configuration for access buffer 0/1/2 .*/
--      writel(QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF0CR);
--      writel(QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF1CR);
--      writel(QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF2CR);
-+      qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF0CR);
-+      qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF1CR);
-+      qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF2CR);
-       /*
-        * Set ADATSZ with the maximum AHB buffer size to improve the
-        * read performance.
-        */
--      writel(QUADSPI_BUF3CR_ALLMST_MASK | ((q->devtype_data->ahb_buf_size / 8)
--                      << QUADSPI_BUF3CR_ADATSZ_SHIFT), base + QUADSPI_BUF3CR);
-+      qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
-+                      ((q->devtype_data->ahb_buf_size / 8)
-+                      << QUADSPI_BUF3CR_ADATSZ_SHIFT),
-+                      base + QUADSPI_BUF3CR);
-       /* We only use the buffer3 */
--      writel(0, base + QUADSPI_BUF0IND);
--      writel(0, base + QUADSPI_BUF1IND);
--      writel(0, base + QUADSPI_BUF2IND);
-+      qspi_writel(q, 0, base + QUADSPI_BUF0IND);
-+      qspi_writel(q, 0, base + QUADSPI_BUF1IND);
-+      qspi_writel(q, 0, base + QUADSPI_BUF2IND);
-       /* Set the default lut sequence for AHB Read. */
-       seqid = fsl_qspi_get_seqid(q, q->nor[0].read_opcode);
--      writel(seqid << QUADSPI_BFGENCR_SEQID_SHIFT,
-+      qspi_writel(q, seqid << QUADSPI_BFGENCR_SEQID_SHIFT,
-               q->iobase + QUADSPI_BFGENCR);
- }
-@@ -713,7 +749,7 @@ static int fsl_qspi_nor_setup(struct fsl
-               return ret;
-       /* Reset the module */
--      writel(QUADSPI_MCR_SWRSTSD_MASK | QUADSPI_MCR_SWRSTHD_MASK,
-+      qspi_writel(q, QUADSPI_MCR_SWRSTSD_MASK | QUADSPI_MCR_SWRSTHD_MASK,
-               base + QUADSPI_MCR);
-       udelay(1);
-@@ -721,24 +757,24 @@ static int fsl_qspi_nor_setup(struct fsl
-       fsl_qspi_init_lut(q);
-       /* Disable the module */
--      writel(QUADSPI_MCR_MDIS_MASK | QUADSPI_MCR_RESERVED_MASK,
-+      qspi_writel(q, QUADSPI_MCR_MDIS_MASK | QUADSPI_MCR_RESERVED_MASK,
-                       base + QUADSPI_MCR);
--      reg = readl(base + QUADSPI_SMPR);
--      writel(reg & ~(QUADSPI_SMPR_FSDLY_MASK
-+      reg = qspi_readl(q, base + QUADSPI_SMPR);
-+      qspi_writel(q, reg & ~(QUADSPI_SMPR_FSDLY_MASK
-                       | QUADSPI_SMPR_FSPHS_MASK
-                       | QUADSPI_SMPR_HSENA_MASK
-                       | QUADSPI_SMPR_DDRSMP_MASK), base + QUADSPI_SMPR);
-       /* Enable the module */
--      writel(QUADSPI_MCR_RESERVED_MASK | QUADSPI_MCR_END_CFG_MASK,
-+      qspi_writel(q, QUADSPI_MCR_RESERVED_MASK | QUADSPI_MCR_END_CFG_MASK,
-                       base + QUADSPI_MCR);
-       /* clear all interrupt status */
--      writel(0xffffffff, q->iobase + QUADSPI_FR);
-+      qspi_writel(q, 0xffffffff, q->iobase + QUADSPI_FR);
-       /* enable the interrupt */
--      writel(QUADSPI_RSER_TFIE, q->iobase + QUADSPI_RSER);
-+      qspi_writel(q, QUADSPI_RSER_TFIE, q->iobase + QUADSPI_RSER);
-       return 0;
- }
-@@ -954,6 +990,7 @@ static int fsl_qspi_probe(struct platfor
-       if (IS_ERR(q->iobase))
-               return PTR_ERR(q->iobase);
-+      q->big_endian = of_property_read_bool(np, "big-endian");
-       res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
-                                       "QuadSPI-memory");
-       if (!devm_request_mem_region(dev, res->start, resource_size(res),
-@@ -1101,8 +1138,8 @@ static int fsl_qspi_remove(struct platfo
-       }
-       /* disable the hardware */
--      writel(QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
--      writel(0x0, q->iobase + QUADSPI_RSER);
-+      qspi_writel(q, QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
-+      qspi_writel(q, 0x0, q->iobase + QUADSPI_RSER);
-       mutex_destroy(&q->lock);
diff --git a/target/linux/layerscape/patches-4.4/1088-mtd-spi-nor-fsl-quadspi-add-support-for-ls1021a.patch b/target/linux/layerscape/patches-4.4/1088-mtd-spi-nor-fsl-quadspi-add-support-for-ls1021a.patch
deleted file mode 100644 (file)
index a5782ff..0000000
+++ /dev/null
@@ -1,63 +0,0 @@
-From da44c1517526822e73642fc71b034de8fc7d2b43 Mon Sep 17 00:00:00 2001
-From: Yuan Yao <yao.yuan@freescale.com>
-Date: Tue, 17 Nov 2015 16:44:45 +0800
-Subject: [PATCH 088/113] mtd: spi-nor: fsl-quadspi: add support for ls1021a
-
-[context adjustment]
-
-LS1021a also support Freescale Quad SPI controller.
-Add fsl-quadspi support for ls1021a chip and make SPI_FSL_QUADSPI
-selectable for LS1021A SOC hardwares.
-
-Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
-Acked-by: Han xu <han.xu@freescale.com>
-Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/Kconfig       |    2 +-
- drivers/mtd/spi-nor/fsl-quadspi.c |   10 ++++++++++
- 2 files changed, 11 insertions(+), 1 deletion(-)
-
---- a/drivers/mtd/spi-nor/Kconfig
-+++ b/drivers/mtd/spi-nor/Kconfig
-@@ -23,7 +23,7 @@ config MTD_SPI_NOR_USE_4K_SECTORS
- config SPI_FSL_QUADSPI
-       tristate "Freescale Quad SPI controller"
--      depends on ARCH_MXC || COMPILE_TEST
-+      depends on ARCH_MXC || SOC_LS1021A || COMPILE_TEST
-       depends on HAS_IOMEM
-       help
-         This enables support for the Quad SPI controller in master mode.
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -213,6 +213,7 @@ enum fsl_qspi_devtype {
-       FSL_QUADSPI_IMX6SX,
-       FSL_QUADSPI_IMX7D,
-       FSL_QUADSPI_IMX6UL,
-+      FSL_QUADSPI_LS1021A,
- };
- struct fsl_qspi_devtype_data {
-@@ -258,6 +259,14 @@ static struct fsl_qspi_devtype_data imx6
-                      | QUADSPI_QUIRK_4X_INT_CLK,
- };
-+static struct fsl_qspi_devtype_data ls1021a_data = {
-+      .devtype = FSL_QUADSPI_LS1021A,
-+      .rxfifo = 128,
-+      .txfifo = 64,
-+      .ahb_buf_size = 1024,
-+      .driver_data = 0,
-+};
-+
- #define FSL_QSPI_MAX_CHIP     4
- struct fsl_qspi {
-       struct spi_nor nor[FSL_QSPI_MAX_CHIP];
-@@ -812,6 +821,7 @@ static const struct of_device_id fsl_qsp
-       { .compatible = "fsl,imx6sx-qspi", .data = (void *)&imx6sx_data, },
-       { .compatible = "fsl,imx7d-qspi", .data = (void *)&imx7d_data, },
-       { .compatible = "fsl,imx6ul-qspi", .data = (void *)&imx6ul_data, },
-+      { .compatible = "fsl,ls1021a-qspi", .data = (void *)&ls1021a_data, },
-       { /* sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, fsl_qspi_dt_ids);
diff --git a/target/linux/layerscape/patches-4.4/1089-mtd-spi-nor-fsl-quadspi-add-support-for-layerscape.patch b/target/linux/layerscape/patches-4.4/1089-mtd-spi-nor-fsl-quadspi-add-support-for-layerscape.patch
deleted file mode 100644 (file)
index bd959df..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-From 9c6153130081ef2c109e2a243a598f2bc0dc6413 Mon Sep 17 00:00:00 2001
-From: Yuan Yao <yao.yuan@freescale.com>
-Date: Tue, 17 Nov 2015 17:06:47 +0800
-Subject: [PATCH 089/113] mtd: spi-nor: fsl-quadspi: add support for
- layerscape
-
-[context adjustment]
-
-LS1043a and LS2080A in the Layerscape family also support Freescale Quad
-SPI, make Quad SPI selectable for these hardwares.
-
-Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
-Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/Kconfig |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mtd/spi-nor/Kconfig
-+++ b/drivers/mtd/spi-nor/Kconfig
-@@ -23,7 +23,7 @@ config MTD_SPI_NOR_USE_4K_SECTORS
- config SPI_FSL_QUADSPI
-       tristate "Freescale Quad SPI controller"
--      depends on ARCH_MXC || SOC_LS1021A || COMPILE_TEST
-+      depends on ARCH_MXC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
-       depends on HAS_IOMEM
-       help
-         This enables support for the Quad SPI controller in master mode.
diff --git a/target/linux/layerscape/patches-4.4/1090-mtd-spi-nor-Add-SPI-NOR-layer-PM-support.patch b/target/linux/layerscape/patches-4.4/1090-mtd-spi-nor-Add-SPI-NOR-layer-PM-support.patch
deleted file mode 100644 (file)
index de3d2d5..0000000
+++ /dev/null
@@ -1,138 +0,0 @@
-From 2c5a3db21926e9ebfd7a32e3c36a3256ed84903c Mon Sep 17 00:00:00 2001
-From: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
-Date: Thu, 19 Nov 2015 20:25:24 +0800
-Subject: [PATCH 090/113] mtd: spi-nor: Add SPI NOR layer PM support
-
-[context adjustment]
-
-Add the Power Management API in SPI NOR framework.
-The Power Management system will turn off power supply to SPI flash
-when system suspending, and then the SPI flash will be in the reset
-state after system resuming. As a result, the status&configurations
-of SPI flash driver will mismatch with its current hardware state.
-So reinitialize SPI flash to make sure it is resumed to the correct
-state.
-And the SPI NOR layer just do common configuration depending on the
-records in structure spi_nor.
-
-Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
-Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   74 ++++++++++++++++++++++++++++++++++-------
- include/linux/mtd/spi-nor.h   |    9 +++++
- 2 files changed, 71 insertions(+), 12 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1148,6 +1148,26 @@ static int spi_nor_check(struct spi_nor
-       return 0;
- }
-+/*
-+ * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
-+ * with the software protection bits set
-+ */
-+static int spi_nor_unprotect_on_powerup(struct spi_nor *nor)
-+{
-+      const struct flash_info *info = NULL;
-+      int ret = 0;
-+
-+      info = spi_nor_read_id(nor);
-+      if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
-+          JEDEC_MFR(info) == SNOR_MFR_INTEL ||
-+          JEDEC_MFR(info) == SNOR_MFR_SST) {
-+              write_enable(nor);
-+              ret = write_sr(nor, 0);
-+      }
-+
-+      return ret;
-+}
-+
- int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
- {
-       const struct flash_info *info = NULL;
-@@ -1195,19 +1215,9 @@ int spi_nor_scan(struct spi_nor *nor, co
-       mutex_init(&nor->lock);
--      /*
--       * Atmel, SST, Intel/Numonyx, and others serial NOR tend to power up
--       * with the software protection bits set
--       */
--
--      if (JEDEC_MFR(info) == SNOR_MFR_ATMEL ||
--          JEDEC_MFR(info) == SNOR_MFR_INTEL ||
--          JEDEC_MFR(info) == SNOR_MFR_MACRONIX ||
--          JEDEC_MFR(info) == SNOR_MFR_SST ||
--          info->flags & SPI_NOR_HAS_LOCK) {
--              write_enable(nor);
--              write_sr(nor, 0);
--      }
-+      ret = spi_nor_unprotect_on_powerup(nor);
-+      if (ret)
-+              return ret;
-       if (!mtd->name)
-               mtd->name = dev_name(dev);
-@@ -1374,6 +1384,45 @@ int spi_nor_scan(struct spi_nor *nor, co
- }
- EXPORT_SYMBOL_GPL(spi_nor_scan);
-+static int spi_nor_hw_reinit(struct spi_nor *nor)
-+{
-+      const struct flash_info *info = NULL;
-+      struct device *dev = nor->dev;
-+      int ret;
-+
-+      info = spi_nor_read_id(nor);
-+
-+      ret = spi_nor_unprotect_on_powerup(nor);
-+      if (ret)
-+              return ret;
-+
-+      if (nor->flash_read == SPI_NOR_QUAD) {
-+              ret = set_quad_mode(nor, info);
-+              if (ret) {
-+                      dev_err(dev, "quad mode not supported\n");
-+                      return ret;
-+              }
-+      }
-+
-+      if (nor->addr_width == 4 &&
-+                      JEDEC_MFR(info) != SNOR_MFR_SPANSION)
-+              set_4byte(nor, info, 1);
-+
-+      return 0;
-+}
-+
-+int spi_nor_suspend(struct spi_nor *nor)
-+{
-+      return 0;
-+}
-+EXPORT_SYMBOL_GPL(spi_nor_suspend);
-+
-+int spi_nor_resume(struct spi_nor *nor)
-+{
-+      return spi_nor_hw_reinit(nor);
-+}
-+EXPORT_SYMBOL_GPL(spi_nor_resume);
-+
- static const struct flash_info *spi_nor_match_id(const char *name)
- {
-       const struct flash_info *id = spi_nor_ids;
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -210,4 +210,13 @@ static inline struct device_node *spi_no
-  */
- int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode);
-+/**
-+ * spi_nor_suspend/resume() - the SPI NOR layer PM API
-+ * @nor:      the spi_nor structure
-+ *
-+ * Return: 0 for success, others for failure.
-+ */
-+int spi_nor_suspend(struct spi_nor *nor);
-+int spi_nor_resume(struct spi_nor *nor);
-+
- #endif
diff --git a/target/linux/layerscape/patches-4.4/1091-mtd-spi-nor-change-return-value-of-read-write.patch b/target/linux/layerscape/patches-4.4/1091-mtd-spi-nor-change-return-value-of-read-write.patch
deleted file mode 100644 (file)
index faa806e..0000000
+++ /dev/null
@@ -1,82 +0,0 @@
-From 0a8079b232e9188ba267e37e20f192bed6c2b29b Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Wed, 2 Dec 2015 10:38:19 +0000
-Subject: [PATCH 091/113] mtd: spi-nor: change return value of read/write
-
-Change the return value of spi-nor device read and write methods to
-allow returning amount of data transferred and errors as
-read(2)/write(2) does.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
----
- drivers/mtd/devices/m25p80.c      |    5 +++--
- drivers/mtd/spi-nor/fsl-quadspi.c |    5 +++--
- include/linux/mtd/spi-nor.h       |    4 ++--
- 3 files changed, 8 insertions(+), 6 deletions(-)
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -73,7 +73,7 @@ static int m25p80_write_reg(struct spi_n
-       return spi_write(spi, flash->command, len + 1);
- }
--static void m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
-+static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
-                       size_t *retlen, const u_char *buf)
- {
-       struct m25p *flash = nor->priv;
-@@ -101,6 +101,7 @@ static void m25p80_write(struct spi_nor
-       spi_sync(spi, &m);
-       *retlen += m.actual_length - cmd_sz;
-+      return 0;
- }
- static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
-@@ -119,7 +120,7 @@ static inline unsigned int m25p80_rx_nbi
-  * Read an address range from the nor chip.  The address range
-  * may be any size provided it is within the physical boundaries.
-  */
--static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
-+static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
-                       size_t *retlen, u_char *buf)
- {
-       struct m25p *flash = nor->priv;
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -868,7 +868,7 @@ static int fsl_qspi_write_reg(struct spi
-       return ret;
- }
--static void fsl_qspi_write(struct spi_nor *nor, loff_t to,
-+static ssize_t fsl_qspi_write(struct spi_nor *nor, loff_t to,
-               size_t len, size_t *retlen, const u_char *buf)
- {
-       struct fsl_qspi *q = nor->priv;
-@@ -878,9 +878,10 @@ static void fsl_qspi_write(struct spi_no
-       /* invalid the data in the AHB buffer. */
-       fsl_qspi_invalid(q);
-+      return 0;
- }
--static int fsl_qspi_read(struct spi_nor *nor, loff_t from,
-+static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
-               size_t len, size_t *retlen, u_char *buf)
- {
-       struct fsl_qspi *q = nor->priv;
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -170,9 +170,9 @@ struct spi_nor {
-       int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
-       int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
--      int (*read)(struct spi_nor *nor, loff_t from,
-+      ssize_t (*read)(struct spi_nor *nor, loff_t from,
-                       size_t len, size_t *retlen, u_char *read_buf);
--      void (*write)(struct spi_nor *nor, loff_t to,
-+      ssize_t (*write)(struct spi_nor *nor, loff_t to,
-                       size_t len, size_t *retlen, const u_char *write_buf);
-       int (*erase)(struct spi_nor *nor, loff_t offs);
diff --git a/target/linux/layerscape/patches-4.4/1092-mtd-fsl-quadspi-return-amount-of-data-read-written-o.patch b/target/linux/layerscape/patches-4.4/1092-mtd-fsl-quadspi-return-amount-of-data-read-written-o.patch
deleted file mode 100644 (file)
index 4438036..0000000
+++ /dev/null
@@ -1,73 +0,0 @@
-From 99768b3062501b05810fb62545279da3a4371ca0 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Wed, 2 Dec 2015 10:38:19 +0000
-Subject: [PATCH 092/113] mtd: fsl-quadspi: return amount of data read/written
- or error
-
-Return amount of data read/written or error as read(2)/write(2) does.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   18 +++++++++++-------
- 1 file changed, 11 insertions(+), 7 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -618,7 +618,7 @@ static inline void fsl_qspi_invalid(stru
-       qspi_writel(q, reg, q->iobase + QUADSPI_MCR);
- }
--static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
-+static ssize_t fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
-                               u8 opcode, unsigned int to, u32 *txbuf,
-                               unsigned count, size_t *retlen)
- {
-@@ -647,8 +647,11 @@ static int fsl_qspi_nor_write(struct fsl
-       /* Trigger it */
-       ret = fsl_qspi_runcmd(q, opcode, to, count);
--      if (ret == 0 && retlen)
--              *retlen += count;
-+      if (ret == 0) {
-+              if (retlen)
-+                      *retlen += count;
-+              return count;
-+      }
-       return ret;
- }
-@@ -860,6 +863,8 @@ static int fsl_qspi_write_reg(struct spi
-       } else if (len > 0) {
-               ret = fsl_qspi_nor_write(q, nor, opcode, 0,
-                                       (u32 *)buf, len, NULL);
-+              if (ret > 0)
-+                      return 0;
-       } else {
-               dev_err(q->dev, "invalid cmd %d\n", opcode);
-               ret = -EINVAL;
-@@ -873,12 +878,12 @@ static ssize_t fsl_qspi_write(struct spi
- {
-       struct fsl_qspi *q = nor->priv;
--      fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
-+      ssize_t ret = fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
-                               (u32 *)buf, len, retlen);
-       /* invalid the data in the AHB buffer. */
-       fsl_qspi_invalid(q);
--      return 0;
-+      return ret;
- }
- static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
-@@ -924,8 +929,7 @@ static ssize_t fsl_qspi_read(struct spi_
-       memcpy(buf, q->ahb_addr + q->chip_base_addr + from - q->memmap_offs,
-               len);
--      *retlen += len;
--      return 0;
-+      return len;
- }
- static int fsl_qspi_erase(struct spi_nor *nor, loff_t offs)
diff --git a/target/linux/layerscape/patches-4.4/1093-mtd-spi-nor-check-return-value-from-read-write.patch b/target/linux/layerscape/patches-4.4/1093-mtd-spi-nor-check-return-value-from-read-write.patch
deleted file mode 100644 (file)
index 85a2315..0000000
+++ /dev/null
@@ -1,127 +0,0 @@
-From 8527843351169d999995d331bbdad75560ccafb2 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Wed, 2 Dec 2015 10:38:20 +0000
-Subject: [PATCH 093/113] mtd: spi-nor: check return value from read/write
-
-SPI NOR hardware drivers now return useful value from their read/write
-functions so check them.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   50 +++++++++++++++++++++++++++++------------
- 1 file changed, 36 insertions(+), 14 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -924,7 +924,10 @@ static int spi_nor_read(struct mtd_info
-       ret = nor->read(nor, from, len, retlen, buf);
-       spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
--      return ret;
-+      if (ret < 0)
-+              return ret;
-+
-+      return 0;
- }
- static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
-@@ -950,10 +953,14 @@ static int sst_write(struct mtd_info *mt
-               nor->program_opcode = SPINOR_OP_BP;
-               /* write one byte. */
--              nor->write(nor, to, 1, retlen, buf);
-+              ret = nor->write(nor, to, 1, retlen, buf);
-+              if (ret < 0)
-+                      goto sst_write_err;
-+              WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-+                   (int)ret);
-               ret = spi_nor_wait_till_ready(nor);
-               if (ret)
--                      goto time_out;
-+                      goto sst_write_err;
-       }
-       to += actual;
-@@ -962,10 +969,14 @@ static int sst_write(struct mtd_info *mt
-               nor->program_opcode = SPINOR_OP_AAI_WP;
-               /* write two bytes. */
--              nor->write(nor, to, 2, retlen, buf + actual);
-+              ret = nor->write(nor, to, 2, retlen, buf + actual);
-+              if (ret < 0)
-+                      goto sst_write_err;
-+              WARN(ret != 2, "While writing 2 bytes written %i bytes\n",
-+                   (int)ret);
-               ret = spi_nor_wait_till_ready(nor);
-               if (ret)
--                      goto time_out;
-+                      goto sst_write_err;
-               to += 2;
-               nor->sst_write_second = true;
-       }
-@@ -974,21 +985,24 @@ static int sst_write(struct mtd_info *mt
-       write_disable(nor);
-       ret = spi_nor_wait_till_ready(nor);
-       if (ret)
--              goto time_out;
-+              goto sst_write_err;
-       /* Write out trailing byte if it exists. */
-       if (actual != len) {
-               write_enable(nor);
-               nor->program_opcode = SPINOR_OP_BP;
--              nor->write(nor, to, 1, retlen, buf + actual);
--
-+              ret = nor->write(nor, to, 1, retlen, buf + actual);
-+              if (ret < 0)
-+                      goto sst_write_err;
-+              WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-+                   (int)ret);
-               ret = spi_nor_wait_till_ready(nor);
-               if (ret)
--                      goto time_out;
-+                      goto sst_write_err;
-               write_disable(nor);
-       }
--time_out:
-+sst_write_err:
-       spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
-       return ret;
- }
-@@ -1017,14 +1031,18 @@ static int spi_nor_write(struct mtd_info
-       /* do all the bytes fit onto one page? */
-       if (page_offset + len <= nor->page_size) {
--              nor->write(nor, to, len, retlen, buf);
-+              ret = nor->write(nor, to, len, retlen, buf);
-+              if (ret < 0)
-+                      goto write_err;
-       } else {
-               /* the size of data remaining on the first page */
-               page_size = nor->page_size - page_offset;
--              nor->write(nor, to, page_size, retlen, buf);
-+              ret = nor->write(nor, to, page_size, retlen, buf);
-+              if (ret < 0)
-+                      goto write_err;
-               /* write everything in nor->page_size chunks */
--              for (i = page_size; i < len; i += page_size) {
-+              for (i = ret; i < len; ) {
-                       page_size = len - i;
-                       if (page_size > nor->page_size)
-                               page_size = nor->page_size;
-@@ -1035,7 +1053,11 @@ static int spi_nor_write(struct mtd_info
-                       write_enable(nor);
--                      nor->write(nor, to + i, page_size, retlen, buf + i);
-+                      ret = nor->write(nor, to + i, page_size, retlen,
-+                                       buf + i);
-+                      if (ret < 0)
-+                              goto write_err;
-+                      i += ret;
-               }
-       }
diff --git a/target/linux/layerscape/patches-4.4/1094-mtd-spi-nor-stop-passing-around-retlen.patch b/target/linux/layerscape/patches-4.4/1094-mtd-spi-nor-stop-passing-around-retlen.patch
deleted file mode 100644 (file)
index f72bc2c..0000000
+++ /dev/null
@@ -1,215 +0,0 @@
-From a99477d72b500b48cb3614aad0ce096fe4e3f437 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Wed, 2 Dec 2015 10:38:20 +0000
-Subject: [PATCH 094/113] mtd: spi-nor: stop passing around retlen
-
-[context adjustment]
-not apply changes of drivers/mtd/devices/m25p80.c
-#################
-@@ -74,7 +74,7 @@ static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
- }
-
- static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
--                      size_t *retlen, const u_char *buf)
-+                          const u_char *buf)
- {
-       struct m25p *flash = nor->priv;
-       struct spi_device *spi = flash->spi;
-@@ -106,7 +106,6 @@ static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
-       ret = m.actual_length - cmd_sz;
-       if (ret < 0)
-               return -EIO;
--      *retlen += ret;
-       return ret;
- }
-
-@@ -127,7 +126,7 @@ static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
-  * may be any size provided it is within the physical boundaries.
-  */
- static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
--                      size_t *retlen, u_char *buf)
-+                         u_char *buf)
- {
-       struct m25p *flash = nor->priv;
-       struct spi_device *spi = flash->spi;
-@@ -161,7 +160,6 @@ static ssize_t m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
-       ret = m.actual_length - m25p_cmdsz(nor) - dummy;
-       if (ret < 0)
-               return -EIO;
--      *retlen += ret;
-       return ret;
- }
-
-#################
-
-Do not pass retlen to hardware driver read/write functions. Update it in
-spi-nor generic driver instead.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
-Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   16 ++++++----------
- drivers/mtd/spi-nor/spi-nor.c     |   21 +++++++++++++--------
- include/linux/mtd/spi-nor.h       |    4 ++--
- 3 files changed, 21 insertions(+), 20 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -620,7 +620,7 @@ static inline void fsl_qspi_invalid(stru
- static ssize_t fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,
-                               u8 opcode, unsigned int to, u32 *txbuf,
--                              unsigned count, size_t *retlen)
-+                              unsigned count)
- {
-       int ret, i, j;
-       u32 tmp;
-@@ -647,11 +647,8 @@ static ssize_t fsl_qspi_nor_write(struct
-       /* Trigger it */
-       ret = fsl_qspi_runcmd(q, opcode, to, count);
--      if (ret == 0) {
--              if (retlen)
--                      *retlen += count;
-+      if (ret == 0)
-               return count;
--      }
-       return ret;
- }
-@@ -862,7 +859,7 @@ static int fsl_qspi_write_reg(struct spi
-       } else if (len > 0) {
-               ret = fsl_qspi_nor_write(q, nor, opcode, 0,
--                                      (u32 *)buf, len, NULL);
-+                                      (u32 *)buf, len);
-               if (ret > 0)
-                       return 0;
-       } else {
-@@ -874,12 +871,11 @@ static int fsl_qspi_write_reg(struct spi
- }
- static ssize_t fsl_qspi_write(struct spi_nor *nor, loff_t to,
--              size_t len, size_t *retlen, const u_char *buf)
-+                            size_t len, const u_char *buf)
- {
-       struct fsl_qspi *q = nor->priv;
--
-       ssize_t ret = fsl_qspi_nor_write(q, nor, nor->program_opcode, to,
--                              (u32 *)buf, len, retlen);
-+                                       (u32 *)buf, len);
-       /* invalid the data in the AHB buffer. */
-       fsl_qspi_invalid(q);
-@@ -887,7 +883,7 @@ static ssize_t fsl_qspi_write(struct spi
- }
- static ssize_t fsl_qspi_read(struct spi_nor *nor, loff_t from,
--              size_t len, size_t *retlen, u_char *buf)
-+                           size_t len, u_char *buf)
- {
-       struct fsl_qspi *q = nor->priv;
-       u8 cmd = nor->read_opcode;
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -921,12 +921,13 @@ static int spi_nor_read(struct mtd_info
-       if (ret)
-               return ret;
--      ret = nor->read(nor, from, len, retlen, buf);
-+      ret = nor->read(nor, from, len, buf);
-       spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
-       if (ret < 0)
-               return ret;
-+      *retlen += ret;
-       return 0;
- }
-@@ -953,7 +954,7 @@ static int sst_write(struct mtd_info *mt
-               nor->program_opcode = SPINOR_OP_BP;
-               /* write one byte. */
--              ret = nor->write(nor, to, 1, retlen, buf);
-+              ret = nor->write(nor, to, 1, buf);
-               if (ret < 0)
-                       goto sst_write_err;
-               WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-@@ -969,7 +970,7 @@ static int sst_write(struct mtd_info *mt
-               nor->program_opcode = SPINOR_OP_AAI_WP;
-               /* write two bytes. */
--              ret = nor->write(nor, to, 2, retlen, buf + actual);
-+              ret = nor->write(nor, to, 2, buf + actual);
-               if (ret < 0)
-                       goto sst_write_err;
-               WARN(ret != 2, "While writing 2 bytes written %i bytes\n",
-@@ -992,7 +993,7 @@ static int sst_write(struct mtd_info *mt
-               write_enable(nor);
-               nor->program_opcode = SPINOR_OP_BP;
--              ret = nor->write(nor, to, 1, retlen, buf + actual);
-+              ret = nor->write(nor, to, 1, buf + actual);
-               if (ret < 0)
-                       goto sst_write_err;
-               WARN(ret != 1, "While writing 1 byte written %i bytes\n",
-@@ -1001,8 +1002,10 @@ static int sst_write(struct mtd_info *mt
-               if (ret)
-                       goto sst_write_err;
-               write_disable(nor);
-+              actual += 1;
-       }
- sst_write_err:
-+      *retlen += actual;
-       spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
-       return ret;
- }
-@@ -1031,15 +1034,17 @@ static int spi_nor_write(struct mtd_info
-       /* do all the bytes fit onto one page? */
-       if (page_offset + len <= nor->page_size) {
--              ret = nor->write(nor, to, len, retlen, buf);
-+              ret = nor->write(nor, to, len, buf);
-               if (ret < 0)
-                       goto write_err;
-+              *retlen += ret;
-       } else {
-               /* the size of data remaining on the first page */
-               page_size = nor->page_size - page_offset;
--              ret = nor->write(nor, to, page_size, retlen, buf);
-+              ret = nor->write(nor, to, page_size, buf);
-               if (ret < 0)
-                       goto write_err;
-+              *retlen += ret;
-               /* write everything in nor->page_size chunks */
-               for (i = ret; i < len; ) {
-@@ -1053,10 +1058,10 @@ static int spi_nor_write(struct mtd_info
-                       write_enable(nor);
--                      ret = nor->write(nor, to + i, page_size, retlen,
--                                       buf + i);
-+                      ret = nor->write(nor, to + i, page_size, buf + i);
-                       if (ret < 0)
-                               goto write_err;
-+                      *retlen += ret;
-                       i += ret;
-               }
-       }
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -171,9 +171,9 @@ struct spi_nor {
-       int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
-       ssize_t (*read)(struct spi_nor *nor, loff_t from,
--                      size_t len, size_t *retlen, u_char *read_buf);
-+                      size_t len, u_char *read_buf);
-       ssize_t (*write)(struct spi_nor *nor, loff_t to,
--                      size_t len, size_t *retlen, const u_char *write_buf);
-+                      size_t len, const u_char *write_buf);
-       int (*erase)(struct spi_nor *nor, loff_t offs);
-       int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
diff --git a/target/linux/layerscape/patches-4.4/1095-mtd-spi-nor-simplify-write-loop.patch b/target/linux/layerscape/patches-4.4/1095-mtd-spi-nor-simplify-write-loop.patch
deleted file mode 100644 (file)
index f3179cd..0000000
+++ /dev/null
@@ -1,100 +0,0 @@
-From 93b40e12f7e580a41c4aee5597579cc539fd8544 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Wed, 2 Dec 2015 10:38:20 +0000
-Subject: [PATCH 095/113] mtd: spi-nor: simplify write loop
-
-The spi-nor write loop assumes that what is passed to the hardware
-driver write() is what gets written.
-
-When write() writes less than page size at once data is dropped on the
-floor. Check the amount of data writen and exit if it does not match
-requested amount.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   58 ++++++++++++++++++-----------------------
- 1 file changed, 25 insertions(+), 33 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -1019,8 +1019,8 @@ static int spi_nor_write(struct mtd_info
-       size_t *retlen, const u_char *buf)
- {
-       struct spi_nor *nor = mtd_to_spi_nor(mtd);
--      u32 page_offset, page_size, i;
--      int ret;
-+      size_t page_offset, page_remain, i;
-+      ssize_t ret;
-       dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
-@@ -1028,45 +1028,37 @@ static int spi_nor_write(struct mtd_info
-       if (ret)
-               return ret;
--      write_enable(nor);
-+      for (i = 0; i < len; ) {
-+              ssize_t written;
--      page_offset = to & (nor->page_size - 1);
--
--      /* do all the bytes fit onto one page? */
--      if (page_offset + len <= nor->page_size) {
--              ret = nor->write(nor, to, len, buf);
--              if (ret < 0)
--                      goto write_err;
--              *retlen += ret;
--      } else {
-+              page_offset = to & (nor->page_size - 1);
-+              WARN_ONCE(page_offset,
-+                        "Writing at offset %zu into a NOR page. Writing partial pages may decrease reliability and increase wear of NOR flash.",
-+                        page_offset);
-               /* the size of data remaining on the first page */
--              page_size = nor->page_size - page_offset;
--              ret = nor->write(nor, to, page_size, buf);
-+              page_remain = min_t(size_t,
-+                                  nor->page_size - page_offset, len - i);
-+
-+              write_enable(nor);
-+              ret = nor->write(nor, to + i, page_remain, buf + i);
-               if (ret < 0)
-                       goto write_err;
--              *retlen += ret;
-+              written = ret;
--              /* write everything in nor->page_size chunks */
--              for (i = ret; i < len; ) {
--                      page_size = len - i;
--                      if (page_size > nor->page_size)
--                              page_size = nor->page_size;
--
--                      ret = spi_nor_wait_till_ready(nor);
--                      if (ret)
--                              goto write_err;
--
--                      write_enable(nor);
--
--                      ret = nor->write(nor, to + i, page_size, buf + i);
--                      if (ret < 0)
--                              goto write_err;
--                      *retlen += ret;
--                      i += ret;
-+              ret = spi_nor_wait_till_ready(nor);
-+              if (ret)
-+                      goto write_err;
-+              *retlen += written;
-+              i += written;
-+              if (written != page_remain) {
-+                      dev_err(nor->dev,
-+                              "While writing %zu bytes written %zd bytes\n",
-+                              page_remain, written);
-+                      ret = -EIO;
-+                      goto write_err;
-               }
-       }
--      ret = spi_nor_wait_till_ready(nor);
- write_err:
-       spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE);
-       return ret;
diff --git a/target/linux/layerscape/patches-4.4/1096-mtd-spi-nor-add-read-loop.patch b/target/linux/layerscape/patches-4.4/1096-mtd-spi-nor-add-read-loop.patch
deleted file mode 100644 (file)
index 59d9f3e..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-From b5929f91416d64afacf46c649f38cc8f0eea50d2 Mon Sep 17 00:00:00 2001
-From: Michal Suchanek <hramrach@gmail.com>
-Date: Wed, 2 Dec 2015 10:38:20 +0000
-Subject: [PATCH 096/113] mtd: spi-nor: add read loop
-
-mtdblock and ubi do not handle the situation when read returns less data
-than requested. Loop in spi-nor until buffer is filled or an error is
-returned.
-
-Signed-off-by: Michal Suchanek <hramrach@gmail.com>
-Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   20 ++++++++++++++------
- 1 file changed, 14 insertions(+), 6 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -921,14 +921,22 @@ static int spi_nor_read(struct mtd_info
-       if (ret)
-               return ret;
--      ret = nor->read(nor, from, len, buf);
-+      while (len) {
-+              ret = nor->read(nor, from, len, buf);
-+              if (ret <= 0)
-+                      goto read_err;
--      spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
--      if (ret < 0)
--              return ret;
-+              WARN_ON(ret > len);
-+              *retlen += ret;
-+              buf += ret;
-+              from += ret;
-+              len -= ret;
-+      }
-+      ret = 0;
--      *retlen += ret;
--      return 0;
-+read_err:
-+      spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ);
-+      return ret;
- }
- static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
diff --git a/target/linux/layerscape/patches-4.4/1097-mtd-fsl-quadspi-use-the-property-fields-of-SPI-NOR.patch b/target/linux/layerscape/patches-4.4/1097-mtd-fsl-quadspi-use-the-property-fields-of-SPI-NOR.patch
deleted file mode 100644 (file)
index d07264d..0000000
+++ /dev/null
@@ -1,87 +0,0 @@
-From 5c315652c1b43a6a3abe48c2842cde822ac0ff3c Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <B56489@freescale.com>
-Date: Wed, 20 Jan 2016 18:40:31 +0800
-Subject: [PATCH 097/113] mtd:fsl-quadspi:use the property fields of SPI-NOR
-
-We can get the read/write/erase opcode from the spi nor framework
-directly. This patch uses the information stored in the SPI-NOR to
-remove the hardcode in the fsl_qspi_init_lut().
-
-Signed-off-by: Yunhui Cui <B56489@freescale.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   40 +++++++++++--------------------------
- 1 file changed, 12 insertions(+), 28 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -373,9 +373,13 @@ static void fsl_qspi_init_lut(struct fsl
-       void __iomem *base = q->iobase;
-       int rxfifo = q->devtype_data->rxfifo;
-       u32 lut_base;
--      u8 cmd, addrlen, dummy;
-       int i;
-+      struct spi_nor *nor = &q->nor[0];
-+      u8 addrlen = (nor->addr_width == 3) ? ADDR24BIT : ADDR32BIT;
-+      u8 read_op = nor->read_opcode;
-+      u8 read_dm = nor->read_dummy;
-+
-       fsl_qspi_unlock_lut(q);
-       /* Clear all the LUT table */
-@@ -385,20 +389,10 @@ static void fsl_qspi_init_lut(struct fsl
-       /* Quad Read */
-       lut_base = SEQID_QUAD_READ * 4;
--      if (q->nor_size <= SZ_16M) {
--              cmd = SPINOR_OP_READ_1_1_4;
--              addrlen = ADDR24BIT;
--              dummy = 8;
--      } else {
--              /* use the 4-byte address */
--              cmd = SPINOR_OP_READ_1_1_4;
--              addrlen = ADDR32BIT;
--              dummy = 8;
--      }
--
--      qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-+      qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen),
-                       base + QUADSPI_LUT(lut_base));
--      qspi_writel(q, LUT0(DUMMY, PAD1, dummy) | LUT1(FSL_READ, PAD4, rxfifo),
-+      qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
-+                  LUT1(FSL_READ, PAD4, rxfifo),
-                       base + QUADSPI_LUT(lut_base + 1));
-       /* Write enable */
-@@ -409,16 +403,8 @@ static void fsl_qspi_init_lut(struct fsl
-       /* Page Program */
-       lut_base = SEQID_PP * 4;
--      if (q->nor_size <= SZ_16M) {
--              cmd = SPINOR_OP_PP;
--              addrlen = ADDR24BIT;
--      } else {
--              /* use the 4-byte address */
--              cmd = SPINOR_OP_PP;
--              addrlen = ADDR32BIT;
--      }
--
--      qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-+      qspi_writel(q, LUT0(CMD, PAD1, nor->program_opcode) |
-+                  LUT1(ADDR, PAD1, addrlen),
-                       base + QUADSPI_LUT(lut_base));
-       qspi_writel(q, LUT0(FSL_WRITE, PAD1, 0),
-                       base + QUADSPI_LUT(lut_base + 1));
-@@ -432,10 +418,8 @@ static void fsl_qspi_init_lut(struct fsl
-       /* Erase a sector */
-       lut_base = SEQID_SE * 4;
--      cmd = q->nor[0].erase_opcode;
--      addrlen = q->nor_size <= SZ_16M ? ADDR24BIT : ADDR32BIT;
--
--      qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen),
-+      qspi_writel(q, LUT0(CMD, PAD1, nor->erase_opcode) |
-+                  LUT1(ADDR, PAD1, addrlen),
-                       base + QUADSPI_LUT(lut_base));
-       /* Erase the whole chip */
diff --git a/target/linux/layerscape/patches-4.4/1098-mtd-fsl-quadspi-Rename-SEQID_QUAD_READ-to-SEQID_READ.patch b/target/linux/layerscape/patches-4.4/1098-mtd-fsl-quadspi-Rename-SEQID_QUAD_READ-to-SEQID_READ.patch
deleted file mode 100644 (file)
index f27ea21..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-From c8f9be7df954fce18e96074af3f07aa5f75399e0 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <B56489@freescale.com>
-Date: Wed, 20 Jan 2016 15:52:25 +0800
-Subject: [PATCH 098/113] mtd: fsl-quadspi: Rename SEQID_QUAD_READ to
- SEQID_READ
-
-There are some read modes for flash, such as NORMAL, FAST,
-QUAD, DDR QUAD. These modes will use the identical lut table base
-So rename SEQID_QUAD_READ to SEQID_READ.
-
-Signed-off-by: Yunhui Cui <B56489@freescale.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |    8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -193,7 +193,7 @@
- #define QUADSPI_LUT_NUM               64
- /* SEQID -- we can have 16 seqids at most. */
--#define SEQID_QUAD_READ               0
-+#define SEQID_READ            0
- #define SEQID_WREN            1
- #define SEQID_WRDI            2
- #define SEQID_RDSR            3
-@@ -386,8 +386,8 @@ static void fsl_qspi_init_lut(struct fsl
-       for (i = 0; i < QUADSPI_LUT_NUM; i++)
-               qspi_writel(q, 0, base + QUADSPI_LUT_BASE + i * 4);
--      /* Quad Read */
--      lut_base = SEQID_QUAD_READ * 4;
-+      /* Read */
-+      lut_base = SEQID_READ * 4;
-       qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen),
-                       base + QUADSPI_LUT(lut_base));
-@@ -468,7 +468,7 @@ static int fsl_qspi_get_seqid(struct fsl
- {
-       switch (cmd) {
-       case SPINOR_OP_READ_1_1_4:
--              return SEQID_QUAD_READ;
-+              return SEQID_READ;
-       case SPINOR_OP_WREN:
-               return SEQID_WREN;
-       case SPINOR_OP_WRDI:
diff --git a/target/linux/layerscape/patches-4.4/1099-mtd-spi-nor-fsl-quadspi-Add-fast-read-mode-support.patch b/target/linux/layerscape/patches-4.4/1099-mtd-spi-nor-fsl-quadspi-Add-fast-read-mode-support.patch
deleted file mode 100644 (file)
index ac99ba9..0000000
+++ /dev/null
@@ -1,72 +0,0 @@
-From c501cdf57682265b72a8180c06e4a01dc2978375 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <B56489@freescale.com>
-Date: Mon, 1 Feb 2016 18:26:23 +0800
-Subject: [PATCH 099/113] mtd:spi-nor:fsl-quadspi:Add fast-read mode support
-
-The qspi driver add generic fast-read mode for different
-flash venders. There are some different board flash work on
-different mode, such fast-read, quad-mode.
-So we have to modify the third entrace parameter of spi_nor_scan().
-
-Signed-off-by: Yunhui Cui <B56489@freescale.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   27 +++++++++++++++++++++------
- 1 file changed, 21 insertions(+), 6 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl
-       /* Read */
-       lut_base = SEQID_READ * 4;
--      qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen),
--                      base + QUADSPI_LUT(lut_base));
--      qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
--                  LUT1(FSL_READ, PAD4, rxfifo),
--                      base + QUADSPI_LUT(lut_base + 1));
-+      if (nor->flash_read == SPI_NOR_FAST) {
-+              qspi_writel(q, LUT0(CMD, PAD1, read_op) |
-+                          LUT1(ADDR, PAD1, addrlen),
-+                              base + QUADSPI_LUT(lut_base));
-+              qspi_writel(q,  LUT0(DUMMY, PAD1, read_dm) |
-+                          LUT1(FSL_READ, PAD1, rxfifo),
-+                              base + QUADSPI_LUT(lut_base + 1));
-+      } else if (nor->flash_read == SPI_NOR_QUAD) {
-+              qspi_writel(q, LUT0(CMD, PAD1, read_op) |
-+                          LUT1(ADDR, PAD1, addrlen),
-+                              base + QUADSPI_LUT(lut_base));
-+              qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
-+                          LUT1(FSL_READ, PAD4, rxfifo),
-+                              base + QUADSPI_LUT(lut_base + 1));
-+      }
-       /* Write enable */
-       lut_base = SEQID_WREN * 4;
-@@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl
- {
-       switch (cmd) {
-       case SPINOR_OP_READ_1_1_4:
-+      case SPINOR_OP_READ_FAST:
-               return SEQID_READ;
-       case SPINOR_OP_WREN:
-               return SEQID_WREN;
-@@ -964,6 +975,7 @@ static int fsl_qspi_probe(struct platfor
-       struct spi_nor *nor;
-       struct mtd_info *mtd;
-       int ret, i = 0;
-+      enum read_mode mode = SPI_NOR_QUAD;
-       q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL);
-       if (!q)
-@@ -1065,7 +1077,10 @@ static int fsl_qspi_probe(struct platfor
-               /* set the chip address for READID */
-               fsl_qspi_set_base_addr(q, nor);
--              ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD);
-+              ret = of_property_read_bool(np, "m25p,fast-read");
-+              mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD;
-+
-+              ret = spi_nor_scan(nor, NULL, mode);
-               if (ret)
-                       goto mutex_failed;
diff --git a/target/linux/layerscape/patches-4.4/1100-mtd-spi_nor-Disable-Micron-flash-HW-protection.patch b/target/linux/layerscape/patches-4.4/1100-mtd-spi_nor-Disable-Micron-flash-HW-protection.patch
deleted file mode 100644 (file)
index 47fef5c..0000000
+++ /dev/null
@@ -1,41 +0,0 @@
-From e892dea7229d56b75c46a76b9039f9e179584a91 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <B56489@freescale.com>
-Date: Mon, 1 Feb 2016 18:48:49 +0800
-Subject: [PATCH 100/113] mtd:spi_nor: Disable Micron flash HW protection
-
-For Micron family ,The status register write enable/disable bit,
-provides hardware data protection for the device.
-When the enable/disable bit is set to 1, the status register
-nonvolatile bits become read-only and the WRITE STATUS REGISTER
-operation will not execute.
-
-Signed-off-by: Yunhui Cui <B56489@freescale.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -39,6 +39,7 @@
- #define SPI_NOR_MAX_ID_LEN    6
- #define SPI_NOR_MAX_ADDR_WIDTH        4
-+#define SPI_NOR_MICRON_WRITE_ENABLE   0x7f
- struct flash_info {
-       char            *name;
-@@ -1246,6 +1247,14 @@ int spi_nor_scan(struct spi_nor *nor, co
-       if (ret)
-               return ret;
-+      if (JEDEC_MFR(info) == SNOR_MFR_MICRON) {
-+              ret = read_sr(nor);
-+              ret &= SPI_NOR_MICRON_WRITE_ENABLE;
-+
-+              write_enable(nor);
-+              write_sr(nor, ret);
-+      }
-+
-       if (!mtd->name)
-               mtd->name = dev_name(dev);
-       mtd->priv = nor;
diff --git a/target/linux/layerscape/patches-4.4/1101-mtd-spi-nor-fsl-quadspi-extend-support-for-some-spec.patch b/target/linux/layerscape/patches-4.4/1101-mtd-spi-nor-fsl-quadspi-extend-support-for-some-spec.patch
deleted file mode 100644 (file)
index 471ce42..0000000
+++ /dev/null
@@ -1,122 +0,0 @@
-From acfc6e9b34b3b3ca0d8bbe366dd08b0fac21c740 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Tue, 2 Feb 2016 12:21:12 +0800
-Subject: [PATCH 101/113] mtd: spi-nor: fsl-quadspi: extend support for some
- special requerment.
-
-Add extra info in LUT table to support some special requerments.
-Spansion S25FS-S family flash need some special operations.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   44 +++++++++++++++++++++++++++++++++++--
- include/linux/mtd/spi-nor.h       |    4 ++++
- 2 files changed, 46 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -205,6 +205,9 @@
- #define SEQID_RDCR            9
- #define SEQID_EN4B            10
- #define SEQID_BRWR            11
-+#define SEQID_RDAR            12
-+#define SEQID_WRAR            13
-+
- #define QUADSPI_MIN_IOMAP SZ_4M
-@@ -470,6 +473,28 @@ static void fsl_qspi_init_lut(struct fsl
-       qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_BRWR),
-                       base + QUADSPI_LUT(lut_base));
-+      /*
-+       * Read any device register.
-+       * Used for Spansion S25FS-S family flash only.
-+       */
-+      lut_base = SEQID_RDAR * 4;
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_SPANSION_RDAR) |
-+                      LUT1(ADDR, PAD1, ADDR24BIT),
-+                      base + QUADSPI_LUT(lut_base));
-+      qspi_writel(q, LUT0(DUMMY, PAD1, 8) | LUT1(FSL_READ, PAD1, 1),
-+                      base + QUADSPI_LUT(lut_base + 1));
-+
-+      /*
-+       * Write any device register.
-+       * Used for Spansion S25FS-S family flash only.
-+       */
-+      lut_base = SEQID_WRAR * 4;
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_SPANSION_WRAR) |
-+                      LUT1(ADDR, PAD1, ADDR24BIT),
-+                      base + QUADSPI_LUT(lut_base));
-+      qspi_writel(q, LUT0(FSL_WRITE, PAD1, 1),
-+                      base + QUADSPI_LUT(lut_base + 1));
-+
-       fsl_qspi_lock_lut(q);
- }
-@@ -477,9 +502,15 @@ static void fsl_qspi_init_lut(struct fsl
- static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd)
- {
-       switch (cmd) {
-+      case SPINOR_OP_READ4_1_1_4:
-       case SPINOR_OP_READ_1_1_4:
-       case SPINOR_OP_READ_FAST:
-+      case SPINOR_OP_READ4_FAST:
-               return SEQID_READ;
-+      case SPINOR_OP_SPANSION_RDAR:
-+              return SEQID_RDAR;
-+      case SPINOR_OP_SPANSION_WRAR:
-+              return SEQID_WRAR;
-       case SPINOR_OP_WREN:
-               return SEQID_WREN;
-       case SPINOR_OP_WRDI:
-@@ -491,6 +522,7 @@ static int fsl_qspi_get_seqid(struct fsl
-       case SPINOR_OP_CHIP_ERASE:
-               return SEQID_CHIP_ERASE;
-       case SPINOR_OP_PP:
-+      case SPINOR_OP_PP_4B:
-               return SEQID_PP;
-       case SPINOR_OP_RDID:
-               return SEQID_RDID;
-@@ -830,8 +862,12 @@ static int fsl_qspi_read_reg(struct spi_
- {
-       int ret;
-       struct fsl_qspi *q = nor->priv;
-+      u32 to = 0;
-+
-+      if (opcode == SPINOR_OP_SPANSION_RDAR)
-+              memcpy(&to, nor->cmd_buf, 4);
--      ret = fsl_qspi_runcmd(q, opcode, 0, len);
-+      ret = fsl_qspi_runcmd(q, opcode, to, len);
-       if (ret)
-               return ret;
-@@ -843,9 +879,13 @@ static int fsl_qspi_write_reg(struct spi
- {
-       struct fsl_qspi *q = nor->priv;
-       int ret;
-+      u32 to = 0;
-+
-+      if (opcode == SPINOR_OP_SPANSION_WRAR)
-+              memcpy(&to, nor->cmd_buf, 4);
-       if (!buf) {
--              ret = fsl_qspi_runcmd(q, opcode, 0, 1);
-+              ret = fsl_qspi_runcmd(q, opcode, to, 1);
-               if (ret)
-                       return ret;
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -74,6 +74,10 @@
- /* Used for Spansion flashes only. */
- #define SPINOR_OP_BRWR                0x17    /* Bank register write */
-+/* Used for Spansion S25FS-S family flash only. */
-+#define SPINOR_OP_SPANSION_RDAR       0x65    /* Read any device register */
-+#define SPINOR_OP_SPANSION_WRAR       0x71    /* Write any device register */
-+
- /* Used for Micron flashes only. */
- #define SPINOR_OP_RD_EVCR      0x65    /* Read EVCR register */
- #define SPINOR_OP_WD_EVCR      0x61    /* Write EVCR register */
diff --git a/target/linux/layerscape/patches-4.4/1102-mtd-spi-nor-fsl-quadspi-Support-qspi-for-ls2080a.patch b/target/linux/layerscape/patches-4.4/1102-mtd-spi-nor-fsl-quadspi-Support-qspi-for-ls2080a.patch
deleted file mode 100644 (file)
index da9dd72..0000000
+++ /dev/null
@@ -1,83 +0,0 @@
-From d2d88e3432d68b11b0add84bd15a3aadaf44f1c1 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <B56489@freescale.com>
-Date: Mon, 28 Dec 2015 18:25:56 +0800
-Subject: [PATCH 102/113] mtd: spi-nor: fsl-quadspi:Support qspi for ls2080a
-
-There is a hardware feature that qspi_amba_base is added
-internally by SOC design on ls2080a. So as to software, the driver
-need support to the feature.
-
-Signed-off-by: Yunhui Cui <B56489@freescale.com>
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   24 ++++++++++++++++++++++--
- 1 file changed, 22 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -41,6 +41,8 @@
- #define QUADSPI_QUIRK_TKT253890               (1 << 2)
- /* Controller cannot wake up from wait mode, TKT245618 */
- #define QUADSPI_QUIRK_TKT245618         (1 << 3)
-+/* QSPI_AMBA_BASE is internally added by SOC design */
-+#define QUADSPI_AMBA_BASE_INTERNAL    (0x10000)
- /* The registers */
- #define QUADSPI_MCR                   0x00
-@@ -217,6 +219,7 @@ enum fsl_qspi_devtype {
-       FSL_QUADSPI_IMX7D,
-       FSL_QUADSPI_IMX6UL,
-       FSL_QUADSPI_LS1021A,
-+      FSL_QUADSPI_LS2080A,
- };
- struct fsl_qspi_devtype_data {
-@@ -270,6 +273,14 @@ static struct fsl_qspi_devtype_data ls10
-       .driver_data = 0,
- };
-+static struct fsl_qspi_devtype_data ls2080a_data = {
-+      .devtype = FSL_QUADSPI_LS2080A,
-+      .rxfifo = 128,
-+      .txfifo = 64,
-+      .ahb_buf_size = 1024,
-+      .driver_data = QUADSPI_AMBA_BASE_INTERNAL,
-+};
-+
- #define FSL_QSPI_MAX_CHIP     4
- struct fsl_qspi {
-       struct spi_nor nor[FSL_QSPI_MAX_CHIP];
-@@ -312,6 +323,11 @@ static inline int needs_wakeup_wait_mode
-       return q->devtype_data->driver_data & QUADSPI_QUIRK_TKT245618;
- }
-+static inline int has_added_amba_base_internal(struct fsl_qspi *q)
-+{
-+      return q->devtype_data->driver_data & QUADSPI_AMBA_BASE_INTERNAL;
-+}
-+
- /*
-  * R/W functions for big- or little-endian registers:
-  * The qSPI controller's endian is independent of the CPU core's endian.
-@@ -558,8 +574,11 @@ fsl_qspi_runcmd(struct fsl_qspi *q, u8 c
-       /* save the reg */
-       reg = qspi_readl(q, base + QUADSPI_MCR);
--      qspi_writel(q, q->memmap_phy + q->chip_base_addr + addr,
--                      base + QUADSPI_SFAR);
-+      if (has_added_amba_base_internal(q))
-+              qspi_writel(q, q->chip_base_addr + addr, base + QUADSPI_SFAR);
-+      else
-+              qspi_writel(q, q->memmap_phy + q->chip_base_addr + addr,
-+                          base + QUADSPI_SFAR);
-       qspi_writel(q, QUADSPI_RBCT_WMRK_MASK | QUADSPI_RBCT_RXBRD_USEIPS,
-                       base + QUADSPI_RBCT);
-       qspi_writel(q, reg | QUADSPI_MCR_CLR_RXF_MASK, base + QUADSPI_MCR);
-@@ -849,6 +868,7 @@ static const struct of_device_id fsl_qsp
-       { .compatible = "fsl,imx7d-qspi", .data = (void *)&imx7d_data, },
-       { .compatible = "fsl,imx6ul-qspi", .data = (void *)&imx6ul_data, },
-       { .compatible = "fsl,ls1021a-qspi", .data = (void *)&ls1021a_data, },
-+      { .compatible = "fsl,ls2080a-qspi", .data = (void *)&ls2080a_data, },
-       { /* sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, fsl_qspi_dt_ids);
diff --git a/target/linux/layerscape/patches-4.4/1103-mtd-spi-nor-Support-R-W-for-S25FS-S-family-flash.patch b/target/linux/layerscape/patches-4.4/1103-mtd-spi-nor-Support-R-W-for-S25FS-S-family-flash.patch
deleted file mode 100644 (file)
index 7b954dd..0000000
+++ /dev/null
@@ -1,110 +0,0 @@
-From 0878404f549021e7fe0a49ae0454cf53fd452add Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Tue, 2 Feb 2016 12:00:27 +0800
-Subject: [PATCH 103/113] mtd: spi-nor: Support R/W for S25FS-S family flash
-
-With the physical sectors combination, S25FS-S family flash
-requires some special operations for read/write functions.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   60 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 60 insertions(+)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -40,6 +40,10 @@
- #define SPI_NOR_MAX_ID_LEN    6
- #define SPI_NOR_MAX_ADDR_WIDTH        4
- #define SPI_NOR_MICRON_WRITE_ENABLE   0x7f
-+/* Added for S25FS-S family flash */
-+#define SPINOR_CONFIG_REG3_OFFSET      0x800004
-+#define CR3V_4KB_ERASE_UNABLE  0x8
-+#define SPINOR_S25FS_FAMILY_ID 0x81
- struct flash_info {
-       char            *name;
-@@ -74,6 +78,8 @@ struct flash_info {
- };
- #define JEDEC_MFR(info)       ((info)->id[0])
-+#define EXT_ID(info)  ((info)->id[5])
-+
- static const struct flash_info *spi_nor_match_id(const char *name);
-@@ -786,6 +792,7 @@ static const struct flash_info spi_nor_i
-        */
-       { "s25sl032p",  INFO(0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-+      { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, 0)},
-       { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) },
-       { "s25fl256s1", INFO(0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25fl512s",  INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-@@ -910,6 +917,53 @@ static const struct flash_info *spi_nor_
-       return ERR_PTR(-ENODEV);
- }
-+/*
-+ * The S25FS-S family physical sectors may be configured as a
-+ * hybrid combination of eight 4-kB parameter sectors
-+ * at the top or bottom of the address space with all
-+ * but one of the remaining sectors being uniform size.
-+ * The Parameter Sector Erase commands (20h or 21h) must
-+ * be used to erase the 4-kB parameter sectors individually.
-+ * The Sector (uniform sector) Erase commands (D8h or DCh)
-+ * must be used to erase any of the remaining
-+ * sectors, including the portion of highest or lowest address
-+ * sector that is not overlaid by the parameter sectors.
-+ * The uniform sector erase command has no effect on parameter sectors.
-+ */
-+static int spansion_s25fs_disable_4kb_erase(struct spi_nor *nor)
-+{
-+      struct fsl_qspi *q;
-+      u32 cr3v_addr  = SPINOR_CONFIG_REG3_OFFSET;
-+      u8 cr3v = 0x0;
-+      int ret = 0x0;
-+
-+      q = nor->priv;
-+
-+      nor->cmd_buf[2] = cr3v_addr >> 16;
-+      nor->cmd_buf[1] = cr3v_addr >> 8;
-+      nor->cmd_buf[0] = cr3v_addr >> 0;
-+
-+      ret = nor->read_reg(nor, SPINOR_OP_SPANSION_RDAR, &cr3v, 1);
-+      if (ret)
-+              return ret;
-+      if (cr3v & CR3V_4KB_ERASE_UNABLE)
-+              return 0;
-+      ret = nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0);
-+      if (ret)
-+              return ret;
-+      cr3v = CR3V_4KB_ERASE_UNABLE;
-+      nor->program_opcode = SPINOR_OP_SPANSION_WRAR;
-+      nor->write(nor, cr3v_addr, 1, &cr3v);
-+
-+      ret = nor->read_reg(nor, SPINOR_OP_SPANSION_RDAR, &cr3v, 1);
-+      if (ret)
-+              return ret;
-+      if (!(cr3v & CR3V_4KB_ERASE_UNABLE))
-+              return -EPERM;
-+
-+      return 0;
-+}
-+
- static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
-                       size_t *retlen, u_char *buf)
- {
-@@ -1255,6 +1309,12 @@ int spi_nor_scan(struct spi_nor *nor, co
-               write_sr(nor, ret);
-       }
-+      if (EXT_ID(info) == SPINOR_S25FS_FAMILY_ID) {
-+              ret = spansion_s25fs_disable_4kb_erase(nor);
-+              if (ret)
-+                      return ret;
-+      }
-+
-       if (!mtd->name)
-               mtd->name = dev_name(dev);
-       mtd->priv = nor;
diff --git a/target/linux/layerscape/patches-4.4/1104-mtd-fsl-quadspi-Add-quad-mode-for-flash-n25q128.patch b/target/linux/layerscape/patches-4.4/1104-mtd-fsl-quadspi-Add-quad-mode-for-flash-n25q128.patch
deleted file mode 100644 (file)
index daf34e3..0000000
+++ /dev/null
@@ -1,112 +0,0 @@
-From 23cd071c47c064d56921975d196dc22177069dea Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Wed, 24 Feb 2016 15:14:01 +0800
-Subject: [PATCH 104/113] mtd: fsl-quadspi: Add quad mode for flash n25q128
-
-Add some lut_tables to support quad mode for flash n25q128
-on the board ls1021a-twr and solve flash Spansion and Micron
-command conflict.
-In switch {}, The value of command SPINOR_OP_RD_EVCR and
-SPINOR_OP_SPANSION_RDAR is the same. They have to share
-the same seq_id: SEQID_RDAR_OR_RD_EVCR.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   47 ++++++++++++++++++++++++++++---------
- 1 file changed, 36 insertions(+), 11 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -207,9 +207,9 @@
- #define SEQID_RDCR            9
- #define SEQID_EN4B            10
- #define SEQID_BRWR            11
--#define SEQID_RDAR            12
-+#define SEQID_RDAR_OR_RD_EVCR 12
- #define SEQID_WRAR            13
--
-+#define SEQID_WD_EVCR           14
- #define QUADSPI_MIN_IOMAP SZ_4M
-@@ -393,6 +393,7 @@ static void fsl_qspi_init_lut(struct fsl
-       int rxfifo = q->devtype_data->rxfifo;
-       u32 lut_base;
-       int i;
-+      const struct fsl_qspi_devtype_data *devtype_data = q->devtype_data;
-       struct spi_nor *nor = &q->nor[0];
-       u8 addrlen = (nor->addr_width == 3) ? ADDR24BIT : ADDR32BIT;
-@@ -489,16 +490,26 @@ static void fsl_qspi_init_lut(struct fsl
-       qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_BRWR),
-                       base + QUADSPI_LUT(lut_base));
-+
-       /*
--       * Read any device register.
--       * Used for Spansion S25FS-S family flash only.
-+       * Flash Micron and Spansion command confilict
-+       * use the same value 0x65. But it indicates different meaning.
-        */
--      lut_base = SEQID_RDAR * 4;
--      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_SPANSION_RDAR) |
--                      LUT1(ADDR, PAD1, ADDR24BIT),
--                      base + QUADSPI_LUT(lut_base));
--      qspi_writel(q, LUT0(DUMMY, PAD1, 8) | LUT1(FSL_READ, PAD1, 1),
--                      base + QUADSPI_LUT(lut_base + 1));
-+      lut_base = SEQID_RDAR_OR_RD_EVCR * 4;
-+      if (devtype_data->devtype == FSL_QUADSPI_LS2080A) {
-+              /*
-+              * Read any device register.
-+              * Used for Spansion S25FS-S family flash only.
-+              */
-+              qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_SPANSION_RDAR) |
-+                          LUT1(ADDR, PAD1, ADDR24BIT),
-+                          base + QUADSPI_LUT(lut_base));
-+              qspi_writel(q, LUT0(DUMMY, PAD1, 8) | LUT1(FSL_READ, PAD1, 1),
-+                          base + QUADSPI_LUT(lut_base + 1));
-+      } else {
-+              qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_RD_EVCR),
-+                          base + QUADSPI_LUT(lut_base));
-+      }
-       /*
-        * Write any device register.
-@@ -511,6 +522,11 @@ static void fsl_qspi_init_lut(struct fsl
-       qspi_writel(q, LUT0(FSL_WRITE, PAD1, 1),
-                       base + QUADSPI_LUT(lut_base + 1));
-+      /* Write EVCR register */
-+      lut_base = SEQID_WD_EVCR * 4;
-+      qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_WD_EVCR),
-+                  base + QUADSPI_LUT(lut_base));
-+
-       fsl_qspi_lock_lut(q);
- }
-@@ -523,8 +539,15 @@ static int fsl_qspi_get_seqid(struct fsl
-       case SPINOR_OP_READ_FAST:
-       case SPINOR_OP_READ4_FAST:
-               return SEQID_READ;
-+      /*
-+       * Spansion & Micron use the same command value 0x65
-+       * Spansion: SPINOR_OP_SPANSION_RDAR, read any register.
-+       * Micron: SPINOR_OP_RD_EVCR,
-+       * read enhanced volatile configuration register.
-+       * case SPINOR_OP_RD_EVCR:
-+       */
-       case SPINOR_OP_SPANSION_RDAR:
--              return SEQID_RDAR;
-+              return SEQID_RDAR_OR_RD_EVCR;
-       case SPINOR_OP_SPANSION_WRAR:
-               return SEQID_WRAR;
-       case SPINOR_OP_WREN:
-@@ -550,6 +573,8 @@ static int fsl_qspi_get_seqid(struct fsl
-               return SEQID_EN4B;
-       case SPINOR_OP_BRWR:
-               return SEQID_BRWR;
-+      case SPINOR_OP_WD_EVCR:
-+              return SEQID_WD_EVCR;
-       default:
-               if (cmd == q->nor[0].erase_opcode)
-                       return SEQID_SE;
diff --git a/target/linux/layerscape/patches-4.4/1105-mtd-spi-nor-add-DDR-quad-read-support.patch b/target/linux/layerscape/patches-4.4/1105-mtd-spi-nor-add-DDR-quad-read-support.patch
deleted file mode 100644 (file)
index df7e0d8..0000000
+++ /dev/null
@@ -1,181 +0,0 @@
-From 924f021c0344554a4b61746e5c4dcfc91d618ce2 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Thu, 18 Feb 2016 16:41:53 +0800
-Subject: [PATCH 105/113] mtd: spi-nor: add DDR quad read support
-
-This patch adds the DDR quad read support by the following:
-
-  [1] add SPI_NOR_DDR_QUAD read mode.
-
-  [2] add DDR Quad read opcodes:
-    SPINOR_OP_READ_1_4_4_D / SPINOR_OP_READ4_1_4_4_D
-
-  [3] add set_ddr_quad_mode() to initialize for the DDR quad read.
-        Currently it only works for Spansion NOR.
-
-  [4] set dummy with 6 for Spansion family
-Test this patch for Spansion s25fl128s NOR flash.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/spi-nor.c |   53 ++++++++++++++++++++++++++++++++++++-----
- include/linux/mtd/spi-nor.h   |    8 +++++--
- 2 files changed, 53 insertions(+), 8 deletions(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -73,7 +73,8 @@ struct flash_info {
- #define       SECT_4K_PMC             0x10    /* SPINOR_OP_BE_4K_PMC works uniformly */
- #define       SPI_NOR_DUAL_READ       0x20    /* Flash supports Dual Read */
- #define       SPI_NOR_QUAD_READ       0x40    /* Flash supports Quad Read */
--#define       USE_FSR                 0x80    /* use flag status register */
-+#define SPI_NOR_DDR_QUAD_READ 0x80    /* Flash supports DDR Quad Read */
-+#define       USE_FSR                 0x100   /* use flag status register */
- #define       SPI_NOR_HAS_LOCK        0x100   /* Flash supports lock/unlock via SR */
- };
-@@ -145,13 +146,17 @@ static int read_cr(struct spi_nor *nor)
-  * It can be used to support more commands with
-  * different dummy cycle requirements.
-  */
--static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor)
-+static inline int spi_nor_read_dummy_cycles(struct spi_nor *nor,
-+                      const struct flash_info *info)
- {
-       switch (nor->flash_read) {
-       case SPI_NOR_FAST:
-       case SPI_NOR_DUAL:
-       case SPI_NOR_QUAD:
-               return 8;
-+      case SPI_NOR_DDR_QUAD:
-+              if (JEDEC_MFR(info) == SNOR_MFR_SPANSION)
-+                      return 6;
-       case SPI_NOR_NORMAL:
-               return 0;
-       }
-@@ -799,7 +804,8 @@ static const struct flash_info spi_nor_i
-       { "s70fl01gs",  INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
-       { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },
-       { "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },
--      { "s25fl128s",  INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) },
-+      { "s25fl128s",  INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ
-+                      | SPI_NOR_DDR_QUAD_READ) },
-       { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25sl004a",  INFO(0x010212,      0,  64 * 1024,   8, 0) },
-@@ -1195,6 +1201,23 @@ static int spansion_quad_enable(struct s
-       return 0;
- }
-+static int set_ddr_quad_mode(struct spi_nor *nor, const struct flash_info *info)
-+{
-+      int status;
-+
-+      switch (JEDEC_MFR(info)) {
-+      case SNOR_MFR_SPANSION:
-+              status = spansion_quad_enable(nor);
-+              if (status) {
-+                      dev_err(nor->dev, "Spansion DDR quad-read not enabled\n");
-+                      return status;
-+              }
-+              return status;
-+      default:
-+              return -EINVAL;
-+      }
-+}
-+
- static int set_quad_mode(struct spi_nor *nor, const struct flash_info *info)
- {
-       int status;
-@@ -1385,8 +1408,15 @@ int spi_nor_scan(struct spi_nor *nor, co
-       if (info->flags & SPI_NOR_NO_FR)
-               nor->flash_read = SPI_NOR_NORMAL;
--      /* Quad/Dual-read mode takes precedence over fast/normal */
--      if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) {
-+      /* DDR Quad/Quad/Dual-read mode takes precedence over fast/normal */
-+      if (mode == SPI_NOR_DDR_QUAD && info->flags & SPI_NOR_DDR_QUAD_READ) {
-+              ret = set_ddr_quad_mode(nor, info);
-+              if (ret) {
-+                      dev_err(dev, "DDR quad mode not supported\n");
-+                      return ret;
-+              }
-+              nor->flash_read = SPI_NOR_DDR_QUAD;
-+      } else if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) {
-               ret = set_quad_mode(nor, info);
-               if (ret) {
-                       dev_err(dev, "quad mode not supported\n");
-@@ -1399,6 +1429,14 @@ int spi_nor_scan(struct spi_nor *nor, co
-       /* Default commands */
-       switch (nor->flash_read) {
-+      case SPI_NOR_DDR_QUAD:
-+              if (JEDEC_MFR(info) == SNOR_MFR_SPANSION) { /* Spansion */
-+                      nor->read_opcode = SPINOR_OP_READ_1_4_4_D;
-+              } else {
-+                      dev_err(dev, "DDR Quad Read is not supported.\n");
-+                      return -EINVAL;
-+              }
-+              break;
-       case SPI_NOR_QUAD:
-               nor->read_opcode = SPINOR_OP_READ_1_1_4;
-               break;
-@@ -1426,6 +1464,9 @@ int spi_nor_scan(struct spi_nor *nor, co
-               if (JEDEC_MFR(info) == SNOR_MFR_SPANSION) {
-                       /* Dedicated 4-byte command set */
-                       switch (nor->flash_read) {
-+                      case SPI_NOR_DDR_QUAD:
-+                              nor->read_opcode = SPINOR_OP_READ4_1_4_4_D;
-+                              break;
-                       case SPI_NOR_QUAD:
-                               nor->read_opcode = SPINOR_OP_READ4_1_1_4;
-                               break;
-@@ -1455,7 +1496,7 @@ int spi_nor_scan(struct spi_nor *nor, co
-               return -EINVAL;
-       }
--      nor->read_dummy = spi_nor_read_dummy_cycles(nor);
-+      nor->read_dummy = spi_nor_read_dummy_cycles(nor, info);
-       dev_info(dev, "%s (%lld Kbytes)\n", info->name,
-                       (long long)mtd->size >> 10);
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -30,10 +30,11 @@
- /*
-  * Note on opcode nomenclature: some opcodes have a format like
-- * SPINOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number
-+ * SPINOR_OP_FUNCTION{4,}_x_y_z{_D}. The numbers x, y,and z stand for the number
-  * of I/O lines used for the opcode, address, and data (respectively). The
-  * FUNCTION has an optional suffix of '4', to represent an opcode which
-- * requires a 4-byte (32-bit) address.
-+ * requires a 4-byte (32-bit) address. The suffix of 'D' stands for the
-+ * DDR mode.
-  */
- /* Flash opcodes. */
-@@ -44,6 +45,7 @@
- #define SPINOR_OP_READ_FAST   0x0b    /* Read data bytes (high frequency) */
- #define SPINOR_OP_READ_1_1_2  0x3b    /* Read data bytes (Dual SPI) */
- #define SPINOR_OP_READ_1_1_4  0x6b    /* Read data bytes (Quad SPI) */
-+#define SPINOR_OP_READ_1_4_4_D        0xed    /* Read data bytes (DDR Quad SPI) */
- #define SPINOR_OP_PP          0x02    /* Page program (up to 256 bytes) */
- #define SPINOR_OP_BE_4K               0x20    /* Erase 4KiB block */
- #define SPINOR_OP_BE_4K_PMC   0xd7    /* Erase 4KiB block on PMC chips */
-@@ -59,6 +61,7 @@
- #define SPINOR_OP_READ4_FAST  0x0c    /* Read data bytes (high frequency) */
- #define SPINOR_OP_READ4_1_1_2 0x3c    /* Read data bytes (Dual SPI) */
- #define SPINOR_OP_READ4_1_1_4 0x6c    /* Read data bytes (Quad SPI) */
-+#define SPINOR_OP_READ4_1_4_4_D       0xee    /* Read data bytes (DDR Quad SPI) */
- #define SPINOR_OP_PP_4B               0x12    /* Page program (up to 256 bytes) */
- #define SPINOR_OP_SE_4B               0xdc    /* Sector erase (usually 64KiB) */
-@@ -107,6 +110,7 @@ enum read_mode {
-       SPI_NOR_FAST,
-       SPI_NOR_DUAL,
-       SPI_NOR_QUAD,
-+      SPI_NOR_DDR_QUAD,
- };
- #define SPI_NOR_MAX_CMD_SIZE  8
diff --git a/target/linux/layerscape/patches-4.4/1106-mtd-fsl-quadspi-add-DDR-quad-read-for-Spansion.patch b/target/linux/layerscape/patches-4.4/1106-mtd-fsl-quadspi-add-DDR-quad-read-for-Spansion.patch
deleted file mode 100644 (file)
index 3a24260..0000000
+++ /dev/null
@@ -1,122 +0,0 @@
-From 16eb35ceea5b43e6f64c1a869721ea86c0da5260 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Thu, 25 Feb 2016 10:19:15 +0800
-Subject: [PATCH 106/113] mtd: fsl-quadspi: add DDR quad read for Spansion
-
-Add the DDR quad read support for the fsl-quadspi driver.
-And, add the Spansion s25fl128s NOR flash ddr quad mode
-support.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   57 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 57 insertions(+)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -296,6 +296,7 @@ struct fsl_qspi {
-       u32 nor_size;
-       u32 nor_num;
-       u32 clk_rate;
-+      u32 ddr_smp;
-       unsigned int chip_base_addr; /* We may support two chips. */
-       bool has_second_chip;
-       bool big_endian;
-@@ -423,6 +424,19 @@ static void fsl_qspi_init_lut(struct fsl
-               qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
-                           LUT1(FSL_READ, PAD4, rxfifo),
-                               base + QUADSPI_LUT(lut_base + 1));
-+      } else if (nor->flash_read == SPI_NOR_DDR_QUAD) {
-+              /* read mode : 1-4-4, such as Spansion s25fl128s. */
-+              qspi_writel(q, LUT0(CMD, PAD1, read_op)
-+                      | LUT1(ADDR_DDR, PAD4, addrlen),
-+                      base + QUADSPI_LUT(lut_base));
-+
-+              qspi_writel(q, LUT0(MODE_DDR, PAD4, 0xff)
-+                      | LUT1(DUMMY, PAD1, read_dm),
-+                      base + QUADSPI_LUT(lut_base + 1));
-+
-+              qspi_writel(q, LUT0(FSL_READ_DDR, PAD4, rxfifo)
-+                      | LUT1(JMP_ON_CS, PAD1, 0),
-+                      base + QUADSPI_LUT(lut_base + 2));
-       }
-       /* Write enable */
-@@ -534,6 +548,8 @@ static void fsl_qspi_init_lut(struct fsl
- static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd)
- {
-       switch (cmd) {
-+      case SPINOR_OP_READ_1_4_4_D:
-+      case SPINOR_OP_READ4_1_4_4_D:
-       case SPINOR_OP_READ4_1_1_4:
-       case SPINOR_OP_READ_1_1_4:
-       case SPINOR_OP_READ_FAST:
-@@ -736,6 +752,32 @@ static void fsl_qspi_set_map_addr(struct
- }
- /*
-+ * enable controller ddr quad mode to support different
-+ * vender flashes ddr quad mode.
-+ */
-+static void set_ddr_quad_mode(struct fsl_qspi *q)
-+{
-+      u32 reg, reg2;
-+
-+      reg = qspi_readl(q, q->iobase + QUADSPI_MCR);
-+
-+      /* Firstly, disable the module */
-+      qspi_writel(q, reg | QUADSPI_MCR_MDIS_MASK, q->iobase + QUADSPI_MCR);
-+
-+      /* Set the Sampling Register for DDR */
-+      reg2 = qspi_readl(q, q->iobase + QUADSPI_SMPR);
-+      reg2 &= ~QUADSPI_SMPR_DDRSMP_MASK;
-+      reg2 |= (((q->ddr_smp) << QUADSPI_SMPR_DDRSMP_SHIFT) &
-+                      QUADSPI_SMPR_DDRSMP_MASK);
-+      qspi_writel(q, reg2, q->iobase + QUADSPI_SMPR);
-+
-+      /* Enable the module again (enable the DDR too) */
-+      reg |= QUADSPI_MCR_DDR_EN_MASK;
-+      qspi_writel(q, reg, q->iobase + QUADSPI_MCR);
-+
-+}
-+
-+/*
-  * There are two different ways to read out the data from the flash:
-  *  the "IP Command Read" and the "AHB Command Read".
-  *
-@@ -775,6 +817,11 @@ static void fsl_qspi_init_abh_read(struc
-       seqid = fsl_qspi_get_seqid(q, q->nor[0].read_opcode);
-       qspi_writel(q, seqid << QUADSPI_BFGENCR_SEQID_SHIFT,
-               q->iobase + QUADSPI_BFGENCR);
-+
-+      /* enable the DDR quad read */
-+      if (q->nor->flash_read == SPI_NOR_DDR_QUAD)
-+              set_ddr_quad_mode(q);
-+
- }
- /* This function was used to prepare and enable QSPI clock */
-@@ -1108,6 +1155,12 @@ static int fsl_qspi_probe(struct platfor
-               goto clk_failed;
-       }
-+      /* find ddrsmp value */
-+      ret = of_property_read_u32(dev->of_node, "fsl,ddr-sampling-point",
-+                              &q->ddr_smp);
-+      if (ret)
-+              q->ddr_smp = 0;
-+
-       /* find the irq */
-       ret = platform_get_irq(pdev, 0);
-       if (ret < 0) {
-@@ -1164,6 +1217,10 @@ static int fsl_qspi_probe(struct platfor
-               ret = of_property_read_bool(np, "m25p,fast-read");
-               mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD;
-+              /* Can we enable the DDR Quad Read? */
-+              ret = of_property_read_bool(np, "ddr-quad-read");
-+              if (ret)
-+                      mode = SPI_NOR_DDR_QUAD;
-               ret = spi_nor_scan(nor, NULL, mode);
-               if (ret)
diff --git a/target/linux/layerscape/patches-4.4/1107-mtd-fsl-quadspi-disable-AHB-buffer-prefetch.patch b/target/linux/layerscape/patches-4.4/1107-mtd-fsl-quadspi-disable-AHB-buffer-prefetch.patch
deleted file mode 100644 (file)
index 19dff6c..0000000
+++ /dev/null
@@ -1,67 +0,0 @@
-From 50aac689d5be0a086f076cd4bc8b14ee0b9ab995 Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Tue, 8 Mar 2016 14:38:52 +0800
-Subject: [PATCH 107/113] mtd: fsl-quadspi: disable AHB buffer prefetch
-
-A-009282: QuadSPI: QuadSPI data pre-fetch can result in incorrect data
-Affects: QuadSPI
-Description: With AHB buffer prefetch enabled, the QuadSPI may return
-incorrect data on the AHB
-interface. The buffer pre-fetch is enabled if the fetch size as
-configured either in the LUT or in
-the BUFxCR register is greater than 8 bytes.
-Impact: Only 64 bit read allowed.
-Workaround: Keep the read data size to 64 bits (8 Bytes), which disables
-the prefetch on the AHB buffer,
-and prevents this issue from occurring.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   29 +++++++++++++++++++++++------
- 1 file changed, 23 insertions(+), 6 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -794,19 +794,36 @@ static void fsl_qspi_init_abh_read(struc
- {
-       void __iomem *base = q->iobase;
-       int seqid;
-+      const struct fsl_qspi_devtype_data *devtype_data = q->devtype_data;
-       /* AHB configuration for access buffer 0/1/2 .*/
-       qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF0CR);
-       qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF1CR);
-       qspi_writel(q, QUADSPI_BUFXCR_INVALID_MSTRID, base + QUADSPI_BUF2CR);
-+
-       /*
--       * Set ADATSZ with the maximum AHB buffer size to improve the
--       * read performance.
-+       * Errata: A-009282: QuadSPI data prefetch may result in incorrect data
-+       * Workaround: Keep the read data size to 64 bits (8 bytes).
-+       * This disables the prefetch on the AHB buffer and
-+       * prevents this issue from occurring.
-        */
--      qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
--                      ((q->devtype_data->ahb_buf_size / 8)
--                      << QUADSPI_BUF3CR_ADATSZ_SHIFT),
--                      base + QUADSPI_BUF3CR);
-+      if (devtype_data->devtype == FSL_QUADSPI_LS2080A ||
-+          devtype_data->devtype == FSL_QUADSPI_LS1021A) {
-+
-+              qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
-+                              (1 << QUADSPI_BUF3CR_ADATSZ_SHIFT),
-+                              base + QUADSPI_BUF3CR);
-+
-+      } else {
-+              /*
-+               * Set ADATSZ with the maximum AHB buffer size to improve the
-+               * read performance.
-+              */
-+              qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
-+                              ((q->devtype_data->ahb_buf_size / 8)
-+                              << QUADSPI_BUF3CR_ADATSZ_SHIFT),
-+                              base + QUADSPI_BUF3CR);
-+      }
-       /* We only use the buffer3 */
-       qspi_writel(q, 0, base + QUADSPI_BUF0IND);
diff --git a/target/linux/layerscape/patches-4.4/1108-mtd-fsl-quadspi-add-multi-flash-chip-R-W-on-ls2080a.patch b/target/linux/layerscape/patches-4.4/1108-mtd-fsl-quadspi-add-multi-flash-chip-R-W-on-ls2080a.patch
deleted file mode 100644 (file)
index 4a7a5cb..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From d3a8ee41170ff9e5298ff354c77ff99439dfe2bf Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Thu, 10 Mar 2016 11:33:40 +0800
-Subject: [PATCH 108/113] mtd: fsl-quadspi: add multi flash chip R/W on
- ls2080a
-
-There is a hardware feature that qspi_amba_base is added
-internally by SOC design on ls2080a. so memmap_phy need not
-be added in driver. If memmap_phy is added, the flash A1
-addr space is [0, memmap_phy] which far more than flash size.
-The AMBA memory will be divided into four parts and assign to
-every chipselect. Every channel will has two valid chipselects.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   14 ++++++++++----
- 1 file changed, 10 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -744,11 +744,17 @@ static void fsl_qspi_set_map_addr(struct
- {
-       int nor_size = q->nor_size;
-       void __iomem *base = q->iobase;
-+      u32 mem_base;
--      qspi_writel(q, nor_size + q->memmap_phy, base + QUADSPI_SFA1AD);
--      qspi_writel(q, nor_size * 2 + q->memmap_phy, base + QUADSPI_SFA2AD);
--      qspi_writel(q, nor_size * 3 + q->memmap_phy, base + QUADSPI_SFB1AD);
--      qspi_writel(q, nor_size * 4 + q->memmap_phy, base + QUADSPI_SFB2AD);
-+      if (has_added_amba_base_internal(q))
-+              mem_base = 0x0;
-+      else
-+              mem_base = q->memmap_phy;
-+
-+      qspi_writel(q, nor_size + mem_base, base + QUADSPI_SFA1AD);
-+      qspi_writel(q, nor_size * 2 + mem_base, base + QUADSPI_SFA2AD);
-+      qspi_writel(q, nor_size * 3 + mem_base, base + QUADSPI_SFB1AD);
-+      qspi_writel(q, nor_size * 4 + mem_base, base + QUADSPI_SFB2AD);
- }
- /*
diff --git a/target/linux/layerscape/patches-4.4/1109-drivers-mtd-spi-nor-Enable-QSPI-Flash-in-Kernel.patch b/target/linux/layerscape/patches-4.4/1109-drivers-mtd-spi-nor-Enable-QSPI-Flash-in-Kernel.patch
deleted file mode 100644 (file)
index 95321eb..0000000
+++ /dev/null
@@ -1,36 +0,0 @@
-From 70516f60de441829e7813c0b26567c8bda39c011 Mon Sep 17 00:00:00 2001
-From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
-Date: Sun, 24 Apr 2016 23:20:26 +0530
-Subject: [PATCH 109/113] drivers: mtd: spi-nor: Enable QSPI Flash in Kernel
-
-Enable read from QSPI flash, Write onto QSPI Flash and
-erase QSPI Flash in Fast mode in Kernel.
-
-Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
-Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -798,6 +798,7 @@ static const struct flash_info spi_nor_i
-       { "s25sl032p",  INFO(0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, 0)},
-+      { "s25fs512s",  INFO6(0x010220, 0x4d0081, 128 * 1024, 512, 0)},
-       { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) },
-       { "s25fl256s1", INFO(0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25fl512s",  INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-@@ -964,9 +965,11 @@ static int spansion_s25fs_disable_4kb_er
-       ret = nor->read_reg(nor, SPINOR_OP_SPANSION_RDAR, &cr3v, 1);
-       if (ret)
-               return ret;
-+/*
-       if (!(cr3v & CR3V_4KB_ERASE_UNABLE))
-               return -EPERM;
-+*/
-       return 0;
- }
diff --git a/target/linux/layerscape/patches-4.4/1110-mtd-spi-nor-fsl-quad-add-flash-S25FS-extra-support.patch b/target/linux/layerscape/patches-4.4/1110-mtd-spi-nor-fsl-quad-add-flash-S25FS-extra-support.patch
deleted file mode 100644 (file)
index c018a33..0000000
+++ /dev/null
@@ -1,157 +0,0 @@
-From 034dd6241b55ab2256eecb845e941fa9b45da38e Mon Sep 17 00:00:00 2001
-From: Yunhui Cui <yunhui.cui@nxp.com>
-Date: Thu, 28 Apr 2016 17:03:57 +0800
-Subject: [PATCH 110/113] mtd: spi-nor: fsl-quad: add flash S25FS extra
- support
-
-[context adjustment]
-not apply changes of arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-
-There are some boards have the same QSPI controller but have
-different vendor flash, So, the controller can use the same
-compatible and share the driver, just for a different flash to do
-the appropriate adaptation. Based on this, we need add the vendor
-field in spi-nor, Because we will use the field to distribute
-corresponding LUT for different flash operations.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
-Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
-Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
-Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   47 ++++++++++++++++++++++++++++++-------
- drivers/mtd/spi-nor/spi-nor.c     |    5 ++--
- include/linux/mtd/spi-nor.h       |    1 +
- 3 files changed, 42 insertions(+), 11 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -213,6 +213,9 @@
- #define QUADSPI_MIN_IOMAP SZ_4M
-+#define FLASH_VENDOR_SPANSION_FS      "s25fs"
-+#define SPANSION_S25FS_FAMILY (1 << 1)
-+
- enum fsl_qspi_devtype {
-       FSL_QUADSPI_VYBRID,
-       FSL_QUADSPI_IMX6SX,
-@@ -329,6 +332,18 @@ static inline int has_added_amba_base_in
-       return q->devtype_data->driver_data & QUADSPI_AMBA_BASE_INTERNAL;
- }
-+static u32 fsl_get_nor_vendor(struct spi_nor *nor)
-+{
-+      u32 vendor_id;
-+
-+      if (nor->vendor) {
-+              if (memcmp(nor->vendor, FLASH_VENDOR_SPANSION_FS,
-+                                      sizeof(FLASH_VENDOR_SPANSION_FS) - 1))
-+                      vendor_id = SPANSION_S25FS_FAMILY;
-+      }
-+      return vendor_id;
-+}
-+
- /*
-  * R/W functions for big- or little-endian registers:
-  * The qSPI controller's endian is independent of the CPU core's endian.
-@@ -394,13 +409,15 @@ static void fsl_qspi_init_lut(struct fsl
-       int rxfifo = q->devtype_data->rxfifo;
-       u32 lut_base;
-       int i;
--      const struct fsl_qspi_devtype_data *devtype_data = q->devtype_data;
-+      u32 vendor;
-       struct spi_nor *nor = &q->nor[0];
-       u8 addrlen = (nor->addr_width == 3) ? ADDR24BIT : ADDR32BIT;
-       u8 read_op = nor->read_opcode;
-       u8 read_dm = nor->read_dummy;
-+      vendor = fsl_get_nor_vendor(nor);
-+
-       fsl_qspi_unlock_lut(q);
-       /* Clear all the LUT table */
-@@ -418,12 +435,25 @@ static void fsl_qspi_init_lut(struct fsl
-                           LUT1(FSL_READ, PAD1, rxfifo),
-                               base + QUADSPI_LUT(lut_base + 1));
-       } else if (nor->flash_read == SPI_NOR_QUAD) {
--              qspi_writel(q, LUT0(CMD, PAD1, read_op) |
--                          LUT1(ADDR, PAD1, addrlen),
--                              base + QUADSPI_LUT(lut_base));
--              qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
--                          LUT1(FSL_READ, PAD4, rxfifo),
--                              base + QUADSPI_LUT(lut_base + 1));
-+              if (q->nor_size == 0x4000000) {
-+                      read_op = 0xEC;
-+              qspi_writel(q,
-+                      LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD4, addrlen),
-+                      base + QUADSPI_LUT(lut_base));
-+              qspi_writel(q,
-+                      LUT0(MODE, PAD4, 0xff) | LUT1(DUMMY, PAD4, read_dm),
-+                      base + QUADSPI_LUT(lut_base + 1));
-+              qspi_writel(q,
-+                      LUT0(FSL_READ, PAD4, rxfifo),
-+                      base + QUADSPI_LUT(lut_base + 2));
-+              } else {
-+                      qspi_writel(q, LUT0(CMD, PAD1, read_op) |
-+                                  LUT1(ADDR, PAD1, addrlen),
-+                                      base + QUADSPI_LUT(lut_base));
-+                      qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
-+                                  LUT1(FSL_READ, PAD4, rxfifo),
-+                                      base + QUADSPI_LUT(lut_base + 1));
-+              }
-       } else if (nor->flash_read == SPI_NOR_DDR_QUAD) {
-               /* read mode : 1-4-4, such as Spansion s25fl128s. */
-               qspi_writel(q, LUT0(CMD, PAD1, read_op)
-@@ -510,7 +540,8 @@ static void fsl_qspi_init_lut(struct fsl
-        * use the same value 0x65. But it indicates different meaning.
-        */
-       lut_base = SEQID_RDAR_OR_RD_EVCR * 4;
--      if (devtype_data->devtype == FSL_QUADSPI_LS2080A) {
-+
-+      if (vendor == SPANSION_S25FS_FAMILY) {
-               /*
-               * Read any device register.
-               * Used for Spansion S25FS-S family flash only.
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -798,7 +798,6 @@ static const struct flash_info spi_nor_i
-       { "s25sl032p",  INFO(0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, 0)},
--      { "s25fs512s",  INFO6(0x010220, 0x4d0081, 128 * 1024, 512, 0)},
-       { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) },
-       { "s25fl256s1", INFO(0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25fl512s",  INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-@@ -965,11 +964,9 @@ static int spansion_s25fs_disable_4kb_er
-       ret = nor->read_reg(nor, SPINOR_OP_SPANSION_RDAR, &cr3v, 1);
-       if (ret)
-               return ret;
--/*
-       if (!(cr3v & CR3V_4KB_ERASE_UNABLE))
-               return -EPERM;
--*/
-       return 0;
- }
-@@ -1343,6 +1340,8 @@ int spi_nor_scan(struct spi_nor *nor, co
-       if (!mtd->name)
-               mtd->name = dev_name(dev);
-+      if (info->name)
-+              nor->vendor = info->name;
-       mtd->priv = nor;
-       mtd->type = MTD_NORFLASH;
-       mtd->writesize = 1;
---- a/include/linux/mtd/spi-nor.h
-+++ b/include/linux/mtd/spi-nor.h
-@@ -172,6 +172,7 @@ struct spi_nor {
-       bool                    sst_write_second;
-       u32                     flags;
-       u8                      cmd_buf[SPI_NOR_MAX_CMD_SIZE];
-+      char                    *vendor;
-       int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
-       void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
diff --git a/target/linux/layerscape/patches-4.4/1111-mtd-spi-nor-disable-4kb-sector-erase-for-s25fl128.patch b/target/linux/layerscape/patches-4.4/1111-mtd-spi-nor-disable-4kb-sector-erase-for-s25fl128.patch
deleted file mode 100644 (file)
index f9cdb88..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-From 30d34abc80b0a602a1327bdfbddd42d250887049 Mon Sep 17 00:00:00 2001
-From: Yutang Jiang <yutang.jiang@nxp.com>
-Date: Fri, 9 Sep 2016 22:56:12 +0800
-Subject: [PATCH 111/113] mtd: spi-nor: disable 4kb sector erase for s25fl128
-
-As for s25fl128s flash, the sectors are organized either as a hybrid
-combination of 4-kB and 64-kB sectors, or as uniform 256-kbyte sectors.
-we should use the command 0xd8 to erase all bits, not the Parameter 4-kB
-Sector Erase (P4E) command 0x20.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
-Integrated-by: Yutang Jiang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/spi-nor.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -804,7 +804,7 @@ static const struct flash_info spi_nor_i
-       { "s70fl01gs",  INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
-       { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },
-       { "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },
--      { "s25fl128s",  INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ
-+      { "s25fl128s",  INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_QUAD_READ
-                       | SPI_NOR_DDR_QUAD_READ) },
-       { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-       { "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
diff --git a/target/linux/layerscape/patches-4.4/1112-driver-spi-fsl-quad-Hang-memcpy-Unhandled-fault-alig.patch b/target/linux/layerscape/patches-4.4/1112-driver-spi-fsl-quad-Hang-memcpy-Unhandled-fault-alig.patch
deleted file mode 100644 (file)
index c6311fc..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-From f1b7824a42505669476f203e126fc26dd1006af2 Mon Sep 17 00:00:00 2001
-From: Yutang Jiang <yutang.jiang@nxp.com>
-Date: Fri, 9 Sep 2016 22:57:55 +0800
-Subject: [PATCH 112/113] driver: spi: fsl-quad: Hang memcpy: Unhandled fault:
- alignment fault
-
-vmap/iomap based on whether the buffer is in memory region or reserved region.
-However, both map it as non-cacheable memory.
-For armv8 specifically, non-cacheable mapping requests use a memory type
-that has to be accessed aligned to the request size. memcpy() doesn't guarantee
-that. memcpy_toio() can guarantee 4-bytes alignment.
-
-Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
-Integrated-by: Yutang Jiang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -1103,7 +1103,7 @@ static ssize_t fsl_qspi_read(struct spi_
-               len);
-       /* Read out the data directly from the AHB buffer.*/
--      memcpy(buf, q->ahb_addr + q->chip_base_addr + from - q->memmap_offs,
-+      memcpy_toio(buf, q->ahb_addr + q->chip_base_addr + from - q->memmap_offs,
-               len);
-       return len;
diff --git a/target/linux/layerscape/patches-4.4/1113-mtd-spi-nor-fsl-quad-move-mtd_device_register-to-the.patch b/target/linux/layerscape/patches-4.4/1113-mtd-spi-nor-fsl-quad-move-mtd_device_register-to-the.patch
deleted file mode 100644 (file)
index f54f985..0000000
+++ /dev/null
@@ -1,49 +0,0 @@
-From 6f1195d231ab576809fe2f4cff44a6e48cff2457 Mon Sep 17 00:00:00 2001
-From: Yutang Jiang <yutang.jiang@nxp.com>
-Date: Fri, 2 Sep 2016 22:00:16 +0800
-Subject: [PATCH 113/113] mtd: spi-nor: fsl-quad: move mtd_device_register to
- the last of probe
-
-After call mtd_device_register, the mtd devices should be workable immediately.
-If before finish all of init work call the mtd_device_register, it will not
-respond work request timely.
-
-For example, openwrt/lede have a AUTO split special flash partitions mechanism
-while mtd driver register. So, before call mtd_device_register, must let all of
-init work ready.
-
-Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
----
- drivers/mtd/spi-nor/fsl-quadspi.c |   14 ++++++++++----
- 1 file changed, 10 insertions(+), 4 deletions(-)
-
---- a/drivers/mtd/spi-nor/fsl-quadspi.c
-+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
-@@ -1280,10 +1280,6 @@ static int fsl_qspi_probe(struct platfor
-               if (ret)
-                       goto mutex_failed;
--              ret = mtd_device_register(mtd, NULL, 0);
--              if (ret)
--                      goto mutex_failed;
--
-               /* Set the correct NOR size now. */
-               if (q->nor_size == 0) {
-                       q->nor_size = mtd->size;
-@@ -1313,6 +1309,16 @@ static int fsl_qspi_probe(struct platfor
-               goto last_init_failed;
-       fsl_qspi_clk_disable_unprep(q);
-+
-+      for (i = 0; i < q->nor_num; i++) {
-+              /* skip the holes */
-+              if (!q->has_second_chip)
-+                      i *= 2;
-+
-+              ret = mtd_device_register(&q->nor[i].mtd, NULL, 0);
-+              if (ret)
-+                      goto last_init_failed;
-+      }
-       return 0;
- last_init_failed:
diff --git a/target/linux/layerscape/patches-4.4/1239-mtd-extend-physmap_of-to-let-the-device-tree-specify.patch b/target/linux/layerscape/patches-4.4/1239-mtd-extend-physmap_of-to-let-the-device-tree-specify.patch
deleted file mode 100644 (file)
index 0fdbb7e..0000000
+++ /dev/null
@@ -1,85 +0,0 @@
-From 6b54054c4053215fe4add195c67daca9a466ba92 Mon Sep 17 00:00:00 2001
-From: "ying.zhang" <ying.zhang22455@nxp.com>
-Date: Fri, 23 Dec 2016 22:21:22 +0800
-Subject: [PATCH] mtd: extend physmap_of to let the device tree specify the
- parition probe
-
-This is to support custom partitioning schemes for embedded PPC. To use
-define your own mtd_part_parser and then add something like:
-       linux,part-probe = "my_probe", "cmdlinepart";
-        To the board's dts file.
-
-If linux,part-probe is not specified then this behaves the same as before.
-
-Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
-Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
----
- drivers/mtd/maps/physmap_of.c |   46 ++++++++++++++++++++++++++++++++++++++++-
- 1 file changed, 45 insertions(+), 1 deletion(-)
-
---- a/drivers/mtd/maps/physmap_of.c
-+++ b/drivers/mtd/maps/physmap_of.c
-@@ -112,9 +112,47 @@ static struct mtd_info *obsolete_probe(s
- static const char * const part_probe_types_def[] = {
-       "cmdlinepart", "RedBoot", "ofpart", "ofoldpart", NULL };
-+static const char * const *of_get_probes(struct device_node *dp)
-+{
-+      const char *cp;
-+      int cplen;
-+      unsigned int l;
-+      unsigned int count;
-+      const char **res;
-+
-+      cp = of_get_property(dp, "linux,part-probe", &cplen);
-+      if (cp == NULL)
-+              return part_probe_types_def;
-+
-+      count = 0;
-+      for (l = 0; l != cplen; l++)
-+              if (cp[l] == 0)
-+                      count++;
-+
-+      res = kzalloc((count + 1)*sizeof(*res), GFP_KERNEL);
-+      if (!res)
-+              return NULL;
-+      count = 0;
-+      while (cplen > 0) {
-+              res[count] = cp;
-+              l = strlen(cp) + 1;
-+              cp += l;
-+              cplen -= l;
-+              count++;
-+      }
-+      return res;
-+}
-+
-+static void of_free_probes(const char * const *probes)
-+{
-+      if (probes != part_probe_types_def)
-+              kfree(probes);
-+}
-+
- static const struct of_device_id of_flash_match[];
- static int of_flash_probe(struct platform_device *dev)
- {
-+      const char * const *part_probe_types;
-       const struct of_device_id *match;
-       struct device_node *dp = dev->dev.of_node;
-       struct resource res;
-@@ -273,8 +311,14 @@ static int of_flash_probe(struct platfor
-               goto err_out;
-       ppdata.of_node = dp;
--      mtd_device_parse_register(info->cmtd, part_probe_types_def, &ppdata,
-+      part_probe_types = of_get_probes(dp);
-+      if (!part_probe_types) {
-+              err = -ENOMEM;
-+              goto err_out;
-+      }
-+      mtd_device_parse_register(info->cmtd, part_probe_types, &ppdata,
-                       NULL, 0);
-+      of_free_probes(part_probe_types);
-       kfree(mtd_list);
diff --git a/target/linux/layerscape/patches-4.4/2006-armv8-aarch32-Add-the-default-config-ls_aarch32_defc.patch b/target/linux/layerscape/patches-4.4/2006-armv8-aarch32-Add-the-default-config-ls_aarch32_defc.patch
deleted file mode 100644 (file)
index 22ce5a9..0000000
+++ /dev/null
@@ -1,209 +0,0 @@
-From 4c4e5c275a0e37570d6267802e66a350b0b93dcd Mon Sep 17 00:00:00 2001
-From: Alison Wang <b18965@freescale.com>
-Date: Tue, 17 May 2016 17:30:19 +0800
-Subject: [PATCH 06/70] armv8: aarch32: Add the default config
- ls_aarch32_defconfig
-
-ls_aarch32_defconfig is used as the default config for running 32-bit
-Linux.
-
-Signed-off-by: Ebony Zhu <ebony.zhu@nxp.com>
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |  190 +++++++++++++++++++++++++++++++++
- 1 file changed, 190 insertions(+)
- create mode 100644 arch/arm/configs/ls_aarch32_defconfig
-
---- /dev/null
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -0,0 +1,190 @@
-+# CONFIG_LOCALVERSION_AUTO is not set
-+CONFIG_SYSVIPC=y
-+CONFIG_POSIX_MQUEUE=y
-+# CONFIG_CROSS_MEMORY_ATTACH is not set
-+CONFIG_IRQ_DOMAIN_DEBUG=y
-+CONFIG_NO_HZ_IDLE=y
-+CONFIG_HIGH_RES_TIMERS=y
-+CONFIG_LOG_BUF_SHIFT=16
-+CONFIG_BLK_DEV_INITRD=y
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+CONFIG_SYSCTL_SYSCALL=y
-+CONFIG_KALLSYMS_ALL=y
-+CONFIG_EMBEDDED=y
-+# CONFIG_VM_EVENT_COUNTERS is not set
-+# CONFIG_SLUB_DEBUG is not set
-+CONFIG_PROFILING=y
-+CONFIG_OPROFILE=y
-+CONFIG_KPROBES=y
-+CONFIG_JUMP_LABEL=y
-+CONFIG_MODULES=y
-+CONFIG_MODULE_FORCE_LOAD=y
-+CONFIG_MODULE_UNLOAD=y
-+# CONFIG_BLK_DEV_BSG is not set
-+CONFIG_BLK_CMDLINE_PARSER=y
-+CONFIG_ARCH_MXC=y
-+CONFIG_ARCH_LAYERSCAPE=y
-+CONFIG_ARM_LPAE=y
-+# CONFIG_CACHE_L2X0 is not set
-+CONFIG_PCI=y
-+CONFIG_PCI_MSI=y
-+CONFIG_PCI_HOST_GENERIC=y
-+CONFIG_PCI_LAYERSCAPE=y
-+CONFIG_SMP=y
-+CONFIG_VMSPLIT_2G=y
-+CONFIG_PREEMPT_VOLUNTARY=y
-+CONFIG_AEABI=y
-+CONFIG_HIGHMEM=y
-+CONFIG_CLEANCACHE=y
-+CONFIG_FRONTSWAP=y
-+CONFIG_CMDLINE="console=ttyS0,115200"
-+CONFIG_CPU_FREQ=y
-+CONFIG_CPU_IDLE=y
-+CONFIG_VFP=y
-+CONFIG_NEON=y
-+CONFIG_KERNEL_MODE_NEON=y
-+CONFIG_BINFMT_MISC=y
-+CONFIG_NET=y
-+CONFIG_PACKET=y
-+CONFIG_UNIX=y
-+CONFIG_UNIX_DIAG=y
-+CONFIG_XFRM_USER=y
-+CONFIG_NET_KEY=y
-+CONFIG_INET=y
-+CONFIG_IP_MULTICAST=y
-+CONFIG_IP_ADVANCED_ROUTER=y
-+CONFIG_IP_PNP=y
-+CONFIG_IP_PNP_DHCP=y
-+CONFIG_IP_MROUTE=y
-+CONFIG_INET_AH=y
-+CONFIG_INET_ESP=y
-+CONFIG_INET_IPCOMP=y
-+CONFIG_INET_UDP_DIAG=y
-+# CONFIG_IPV6 is not set
-+CONFIG_NETFILTER=y
-+CONFIG_CAN=y
-+# CONFIG_CAN_BCM is not set
-+# CONFIG_CAN_GW is not set
-+CONFIG_CAN_FLEXCAN=y
-+CONFIG_DEVTMPFS=y
-+CONFIG_DEVTMPFS_MOUNT=y
-+# CONFIG_FW_LOADER is not set
-+CONFIG_MTD=y
-+CONFIG_MTD_CMDLINE_PARTS=y
-+CONFIG_MTD_BLOCK=y
-+CONFIG_MTD_CFI=y
-+CONFIG_MTD_CFI_ADV_OPTIONS=y
-+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-+CONFIG_MTD_CFI_GEOMETRY=y
-+CONFIG_MTD_CFI_INTELEXT=y
-+CONFIG_MTD_CFI_AMDSTD=y
-+CONFIG_MTD_CFI_STAA=y
-+CONFIG_MTD_PHYSMAP_OF=y
-+CONFIG_MTD_DATAFLASH=y
-+CONFIG_MTD_SST25L=y
-+CONFIG_MTD_NAND=y
-+CONFIG_MTD_NAND_FSL_IFC=y
-+CONFIG_MTD_SPI_NOR=y
-+CONFIG_SPI_FSL_QUADSPI=y
-+CONFIG_BLK_DEV_LOOP=y
-+CONFIG_BLK_DEV_RAM=y
-+CONFIG_BLK_DEV_RAM_COUNT=8
-+CONFIG_BLK_DEV_RAM_SIZE=262144
-+CONFIG_NETDEVICES=y
-+# CONFIG_NET_VENDOR_FREESCALE is not set
-+CONFIG_E1000=y
-+CONFIG_E1000E=y
-+CONFIG_PHYLIB=y
-+CONFIG_AT803X_PHY=y
-+CONFIG_VITESSE_PHY=y
-+CONFIG_BROADCOM_PHY=y
-+CONFIG_REALTEK_PHY=y
-+CONFIG_NATIONAL_PHY=y
-+CONFIG_MICREL_PHY=y
-+CONFIG_MDIO_BUS_MUX_MMIOREG=y
-+CONFIG_INPUT_EVDEV=y
-+# CONFIG_MOUSE_PS2_TRACKPOINT is not set
-+CONFIG_SERIO_SERPORT=m
-+# CONFIG_CONSOLE_TRANSLATIONS is not set
-+CONFIG_SERIAL_8250=y
-+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
-+CONFIG_SERIAL_8250_CONSOLE=y
-+CONFIG_SERIAL_8250_EXTENDED=y
-+CONFIG_SERIAL_8250_SHARE_IRQ=y
-+CONFIG_SERIAL_OF_PLATFORM=y
-+CONFIG_SERIAL_FSL_LPUART=y
-+CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
-+CONFIG_HW_RANDOM=y
-+CONFIG_I2C=y
-+CONFIG_I2C_CHARDEV=y
-+CONFIG_I2C_MUX=y
-+CONFIG_I2C_MUX_PCA954x=y
-+CONFIG_I2C_IMX=y
-+CONFIG_SPI=y
-+CONFIG_SPI_BITBANG=y
-+CONFIG_SPI_FSL_DSPI=y
-+CONFIG_PTP_1588_CLOCK=y
-+CONFIG_GPIO_SYSFS=y
-+CONFIG_GPIO_MPC8XXX=y
-+CONFIG_SENSORS_LTC2945=y
-+CONFIG_SENSORS_LM90=y
-+CONFIG_SENSORS_INA2XX=y
-+CONFIG_WATCHDOG=y
-+CONFIG_IMX2_WDT=y
-+CONFIG_MFD_SYSCON=y
-+CONFIG_FB=y
-+CONFIG_USB=y
-+CONFIG_USB_XHCI_HCD=y
-+CONFIG_MMC=y
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_PLTFM=y
-+CONFIG_MMC_SDHCI_OF_ESDHC=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_DRV_DS3232=y
-+CONFIG_DMADEVICES=y
-+CONFIG_FSL_EDMA=y
-+CONFIG_CLK_QORIQ=y
-+# CONFIG_IOMMU_SUPPORT is not set
-+CONFIG_MEMORY=y
-+CONFIG_PWM=y
-+CONFIG_PWM_FSL_FTM=y
-+# CONFIG_RESET_CONTROLLER is not set
-+CONFIG_EXT2_FS=y
-+CONFIG_EXT2_FS_XATTR=y
-+CONFIG_EXT3_FS=y
-+CONFIG_EXT4_FS=y
-+CONFIG_FANOTIFY=y
-+CONFIG_ISO9660_FS=m
-+CONFIG_JOLIET=y
-+CONFIG_ZISOFS=y
-+CONFIG_UDF_FS=m
-+CONFIG_MSDOS_FS=y
-+CONFIG_VFAT_FS=y
-+CONFIG_NTFS_FS=m
-+CONFIG_TMPFS=y
-+CONFIG_TMPFS_POSIX_ACL=y
-+CONFIG_CONFIGFS_FS=y
-+CONFIG_JFFS2_FS=y
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V4=y
-+CONFIG_ROOT_NFS=y
-+CONFIG_NLS_DEFAULT="cp437"
-+CONFIG_NLS_CODEPAGE_437=y
-+CONFIG_NLS_ASCII=y
-+CONFIG_NLS_ISO8859_1=y
-+CONFIG_NLS_ISO8859_2=y
-+CONFIG_NLS_ISO8859_15=y
-+CONFIG_NLS_UTF8=y
-+CONFIG_DEBUG_FS=y
-+CONFIG_DEBUG_SECTION_MISMATCH=y
-+CONFIG_MAGIC_SYSRQ=y
-+# CONFIG_SCHED_DEBUG is not set
-+# CONFIG_FTRACE is not set
-+CONFIG_PID_IN_CONTEXTIDR=y
-+CONFIG_CRYPTO_LZO=y
-+# CONFIG_CRYPTO_ANSI_CPRNG is not set
-+# CONFIG_CRYPTO_HW is not set
-+CONFIG_CRC_CCITT=m
-+CONFIG_CRC_T10DIF=y
-+CONFIG_CRC7=m
-+CONFIG_LIBCRC32C=m
diff --git a/target/linux/layerscape/patches-4.4/2027-armv8-aarch32-update-defconfig-for-LayerScape-SoC.patch b/target/linux/layerscape/patches-4.4/2027-armv8-aarch32-update-defconfig-for-LayerScape-SoC.patch
deleted file mode 100644 (file)
index 97f5113..0000000
+++ /dev/null
@@ -1,101 +0,0 @@
-From 0cc4fd2e52f23f9b35dfdac80021da97ac6c2c52 Mon Sep 17 00:00:00 2001
-From: Pan Jiafei <Jiafei.Pan@nxp.com>
-Date: Tue, 24 May 2016 16:15:49 +0800
-Subject: [PATCH 27/70] armv8: aarch32: update defconfig for LayerScape SoC
-
-Enable QBMan, FMD, DPAA ethernet, kernel bridge, ATA,
-DMA_CMA, USB_STORAGE, PHY etc.
-
-Signed-off-by: Pan Jiafei <Jiafei.Pan@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |   20 +++++++++++++++++++-
- 1 file changed, 19 insertions(+), 1 deletion(-)
-
---- a/arch/arm/configs/ls_aarch32_defconfig
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -26,6 +26,7 @@ CONFIG_ARCH_MXC=y
- CONFIG_ARCH_LAYERSCAPE=y
- CONFIG_ARM_LPAE=y
- # CONFIG_CACHE_L2X0 is not set
-+CONFIG_HAS_FSL_QBMAN=y
- CONFIG_PCI=y
- CONFIG_PCI_MSI=y
- CONFIG_PCI_HOST_GENERIC=y
-@@ -36,6 +37,7 @@ CONFIG_PREEMPT_VOLUNTARY=y
- CONFIG_AEABI=y
- CONFIG_HIGHMEM=y
- CONFIG_CLEANCACHE=y
-+CONFIG_CMA=y
- CONFIG_FRONTSWAP=y
- CONFIG_CMDLINE="console=ttyS0,115200"
- CONFIG_CPU_FREQ=y
-@@ -62,6 +64,7 @@ CONFIG_INET_IPCOMP=y
- CONFIG_INET_UDP_DIAG=y
- # CONFIG_IPV6 is not set
- CONFIG_NETFILTER=y
-+CONFIG_BRIDGE=y
- CONFIG_CAN=y
- # CONFIG_CAN_BCM is not set
- # CONFIG_CAN_GW is not set
-@@ -69,6 +72,7 @@ CONFIG_CAN_FLEXCAN=y
- CONFIG_DEVTMPFS=y
- CONFIG_DEVTMPFS_MOUNT=y
- # CONFIG_FW_LOADER is not set
-+CONFIG_DMA_CMA=y
- CONFIG_MTD=y
- CONFIG_MTD_CMDLINE_PARTS=y
- CONFIG_MTD_BLOCK=y
-@@ -81,17 +85,26 @@ CONFIG_MTD_CFI_AMDSTD=y
- CONFIG_MTD_CFI_STAA=y
- CONFIG_MTD_PHYSMAP_OF=y
- CONFIG_MTD_DATAFLASH=y
-+CONFIG_MTD_M25P80=y
- CONFIG_MTD_SST25L=y
- CONFIG_MTD_NAND=y
- CONFIG_MTD_NAND_FSL_IFC=y
- CONFIG_MTD_SPI_NOR=y
-+CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
- CONFIG_SPI_FSL_QUADSPI=y
-+CONFIG_BLK_DEV_SD=y
-+CONFIG_ATA=y
- CONFIG_BLK_DEV_LOOP=y
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=8
- CONFIG_BLK_DEV_RAM_SIZE=262144
- CONFIG_NETDEVICES=y
--# CONFIG_NET_VENDOR_FREESCALE is not set
-+CONFIG_NET_VENDOR_FREESCALE is not set
-+CONFIG_FSL_BMAN=y
-+CONFIG_FSL_QMAN=y
-+CONFIG_FSL_SDK_FMAN=y
-+CONFIG_FMAN_ARM=y
-+CONFIG_FSL_SDK_DPAA_ETH=y
- CONFIG_E1000=y
- CONFIG_E1000E=y
- CONFIG_PHYLIB=y
-@@ -101,6 +114,8 @@ CONFIG_BROADCOM_PHY=y
- CONFIG_REALTEK_PHY=y
- CONFIG_NATIONAL_PHY=y
- CONFIG_MICREL_PHY=y
-+CONFIG_FIXED_PHY=y
-+CONFIG_FSL_XGMAC_MDIO=y
- CONFIG_MDIO_BUS_MUX_MMIOREG=y
- CONFIG_INPUT_EVDEV=y
- # CONFIG_MOUSE_PS2_TRACKPOINT is not set
-@@ -135,6 +150,8 @@ CONFIG_MFD_SYSCON=y
- CONFIG_FB=y
- CONFIG_USB=y
- CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_DWC3=y
-+CONFIG_USB_STORAGE=y
- CONFIG_MMC=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_PLTFM=y
-@@ -143,6 +160,7 @@ CONFIG_RTC_CLASS=y
- CONFIG_RTC_DRV_DS3232=y
- CONFIG_DMADEVICES=y
- CONFIG_FSL_EDMA=y
-+CONFIG_STAGING=y
- CONFIG_CLK_QORIQ=y
- # CONFIG_IOMMU_SUPPORT is not set
- CONFIG_MEMORY=y
diff --git a/target/linux/layerscape/patches-4.4/2119-armv8-aarch32-defconfig-Enable-CAAM-support.patch b/target/linux/layerscape/patches-4.4/2119-armv8-aarch32-defconfig-Enable-CAAM-support.patch
deleted file mode 100644 (file)
index 567195d..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 035fe1e511e053c6650f37626deb5da76dcc1d92 Mon Sep 17 00:00:00 2001
-From: Ying Zhang <ying.zhang22455@nxp.com>
-Date: Thu, 29 Sep 2016 11:29:48 +0800
-Subject: [PATCH 119/124] armv8: aarch32: defconfig: Enable CAAM support
-
-This patch is to enable the driver module for Freescale's Cryptographics
-Accelerator and Assurance Module (CAAM) and related options.
-
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |    9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
---- a/arch/arm/configs/ls_aarch32_defconfig
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -200,8 +200,13 @@ CONFIG_MAGIC_SYSRQ=y
- # CONFIG_FTRACE is not set
- CONFIG_PID_IN_CONTEXTIDR=y
- CONFIG_CRYPTO_LZO=y
--# CONFIG_CRYPTO_ANSI_CPRNG is not set
--# CONFIG_CRYPTO_HW is not set
-+CONFIG_CRYPTO_ANSI_CPRNG=y
-+CONFIG_CRYPTO_DEV_FSL_CAAM=y
-+CONFIG_ARM_CRYPTO=y
-+CONFIG_CRYPTO_SHA1_ARM_NEON=y
-+CONFIG_CRYPTO_SHA256_ARM=y
-+CONFIG_CRYPTO_SHA512_ARM_NEON=y
-+CONFIG_CRYPTO_AES_ARM_BS=y
- CONFIG_CRC_CCITT=m
- CONFIG_CRC_T10DIF=y
- CONFIG_CRC7=m
diff --git a/target/linux/layerscape/patches-4.4/2120-armv8-aarch32-defconfig-Enable-firmware-loading.patch b/target/linux/layerscape/patches-4.4/2120-armv8-aarch32-defconfig-Enable-firmware-loading.patch
deleted file mode 100644 (file)
index 26a981c..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-From 027ca2530ce94dd7d9954e57631aa34987db392e Mon Sep 17 00:00:00 2001
-From: Ying Zhang <ying.zhang22455@nxp.com>
-Date: Thu, 29 Sep 2016 11:38:36 +0800
-Subject: [PATCH 120/124] armv8: aarch32: defconfig: Enable firmware loading
-
-As some modules require userspace firmware loading support, such as
-PPFE, add this feature in the defconfig for AArch32 on ARMv8.
-
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/configs/ls_aarch32_defconfig
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -71,7 +71,6 @@ CONFIG_CAN=y
- CONFIG_CAN_FLEXCAN=y
- CONFIG_DEVTMPFS=y
- CONFIG_DEVTMPFS_MOUNT=y
--# CONFIG_FW_LOADER is not set
- CONFIG_DMA_CMA=y
- CONFIG_MTD=y
- CONFIG_MTD_CMDLINE_PARTS=y
diff --git a/target/linux/layerscape/patches-4.4/2121-armv8-aarch32-defconfig-Enable-support-for-AHCI-SATA.patch b/target/linux/layerscape/patches-4.4/2121-armv8-aarch32-defconfig-Enable-support-for-AHCI-SATA.patch
deleted file mode 100644 (file)
index a3a67c3..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-From ff37b165bdb100450c7996c9fac0fad2e6ffe31d Mon Sep 17 00:00:00 2001
-From: Ying Zhang <ying.zhang22455@nxp.com>
-Date: Thu, 29 Sep 2016 11:40:37 +0800
-Subject: [PATCH 121/124] armv8: aarch32: defconfig: Enable support for AHCI
- SATA
-
-This patch is to enable support for the Freescale QorIQ AHCI SoC's
-onboard AHCI SATA.
-
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |    5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/configs/ls_aarch32_defconfig
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -92,7 +92,12 @@ CONFIG_MTD_SPI_NOR=y
- CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
- CONFIG_SPI_FSL_QUADSPI=y
- CONFIG_BLK_DEV_SD=y
-+CONFIG_CHR_DEV_SG=y
- CONFIG_ATA=y
-+CONFIG_SATA_AHCI=y
-+CONFIG_SATA_AHCI_PLATFORM=y
-+CONFIG_AHCI_QORIQ=y
-+CONFIG_SATA_SIL24=y
- CONFIG_BLK_DEV_LOOP=y
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=8
diff --git a/target/linux/layerscape/patches-4.4/2122-armv8-aarch32-defconfig-Enable-USB-and-related-confi.patch b/target/linux/layerscape/patches-4.4/2122-armv8-aarch32-defconfig-Enable-USB-and-related-confi.patch
deleted file mode 100644 (file)
index 83d372b..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 913db32774fe5c818112232823edfda1a706552f Mon Sep 17 00:00:00 2001
-From: Ying Zhang <ying.zhang22455@nxp.com>
-Date: Thu, 29 Sep 2016 11:42:40 +0800
-Subject: [PATCH 122/124] armv8: aarch32: defconfig: Enable USB and related
- configuration options
-
-This patch is to enable USB and related configuration options for
-AArch32 on ARMv8.
-
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |    6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/arm/configs/ls_aarch32_defconfig
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -154,8 +154,14 @@ CONFIG_MFD_SYSCON=y
- CONFIG_FB=y
- CONFIG_USB=y
- CONFIG_USB_XHCI_HCD=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_HCD_PLATFORM=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_OHCI_HCD_PLATFORM=y
-+CONFIG_USB_STORAGE=y
- CONFIG_USB_DWC3=y
- CONFIG_USB_STORAGE=y
-+CONFIG_USB_ULPI=y
- CONFIG_MMC=y
- CONFIG_MMC_SDHCI=y
- CONFIG_MMC_SDHCI_PLTFM=y
diff --git a/target/linux/layerscape/patches-4.4/2123-armv8-aarch32-defconfig-Enable-KVM-related-configura.patch b/target/linux/layerscape/patches-4.4/2123-armv8-aarch32-defconfig-Enable-KVM-related-configura.patch
deleted file mode 100644 (file)
index 4556ad9..0000000
+++ /dev/null
@@ -1,59 +0,0 @@
-From dbf356cd062d6313f90323a77d4cf7c820dae40f Mon Sep 17 00:00:00 2001
-From: Ying Zhang <ying.zhang22455@nxp.com>
-Date: Thu, 29 Sep 2016 13:51:32 +0800
-Subject: [PATCH 123/124] armv8: aarch32: defconfig: Enable KVM-related
- configuration options
-
-This patch is to enable KVM-related configuration options for host and
-guest.
-
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |   10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/arch/arm/configs/ls_aarch32_defconfig
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -102,7 +102,11 @@ CONFIG_BLK_DEV_LOOP=y
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=8
- CONFIG_BLK_DEV_RAM_SIZE=262144
-+CONFIG_VIRTIO_BLK=y
- CONFIG_NETDEVICES=y
-+CONFIG_TUN=y
-+CONFIG_VIRTIO_NET=y
-+CONFIG_VHOST_NET=y
- CONFIG_NET_VENDOR_FREESCALE is not set
- CONFIG_FSL_BMAN=y
- CONFIG_FSL_QMAN=y
-@@ -130,6 +134,8 @@ CONFIG_SERIAL_8250=y
- CONFIG_SERIAL_8250_CONSOLE=y
- CONFIG_SERIAL_8250_EXTENDED=y
- CONFIG_SERIAL_8250_SHARE_IRQ=y
-+CONFIG_SERIAL_AMBA_PL011=y
-+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
- CONFIG_SERIAL_OF_PLATFORM=y
- CONFIG_SERIAL_FSL_LPUART=y
- CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
-@@ -170,6 +176,7 @@ CONFIG_RTC_CLASS=y
- CONFIG_RTC_DRV_DS3232=y
- CONFIG_DMADEVICES=y
- CONFIG_FSL_EDMA=y
-+CONFIG_VIRTIO_PCI=y
- CONFIG_STAGING=y
- CONFIG_CLK_QORIQ=y
- # CONFIG_IOMMU_SUPPORT is not set
-@@ -191,6 +198,7 @@ CONFIG_VFAT_FS=y
- CONFIG_NTFS_FS=m
- CONFIG_TMPFS=y
- CONFIG_TMPFS_POSIX_ACL=y
-+CONFIG_HUGETLBFS=y
- CONFIG_CONFIGFS_FS=y
- CONFIG_JFFS2_FS=y
- CONFIG_NFS_FS=y
-@@ -221,3 +229,5 @@ CONFIG_CRC_CCITT=m
- CONFIG_CRC_T10DIF=y
- CONFIG_CRC7=m
- CONFIG_LIBCRC32C=m
-+CONFIG_VIRTUALIZATION=y
-+CONFIG_KVM=y
diff --git a/target/linux/layerscape/patches-4.4/2124-armv8-aarch32-defconfig-Enable-FTM-alarm-support.patch b/target/linux/layerscape/patches-4.4/2124-armv8-aarch32-defconfig-Enable-FTM-alarm-support.patch
deleted file mode 100644 (file)
index ae05a88..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-From 6df7fdf7e0c76df7acc2d1a3a287bf094a94c4ff Mon Sep 17 00:00:00 2001
-From: Ying Zhang <ying.zhang22455@nxp.com>
-Date: Thu, 29 Sep 2016 13:55:44 +0800
-Subject: [PATCH 124/124] armv8: aarch32: defconfig: Enable FTM alarm support
-
-This patch is to enable FTM alarm support.
-
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
----
- arch/arm/configs/ls_aarch32_defconfig |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm/configs/ls_aarch32_defconfig
-+++ b/arch/arm/configs/ls_aarch32_defconfig
-@@ -181,6 +181,8 @@ CONFIG_STAGING=y
- CONFIG_CLK_QORIQ=y
- # CONFIG_IOMMU_SUPPORT is not set
- CONFIG_MEMORY=y
-+CONFIG_LS_SOC_DRIVERS=y
-+CONFIG_FTM_ALARM=y
- CONFIG_PWM=y
- CONFIG_PWM_FSL_FTM=y
- # CONFIG_RESET_CONTROLLER is not set
diff --git a/target/linux/layerscape/patches-4.4/3001-arm64-ls1043a-add-DTS-for-Freescale-LS1043A-SoC.patch b/target/linux/layerscape/patches-4.4/3001-arm64-ls1043a-add-DTS-for-Freescale-LS1043A-SoC.patch
deleted file mode 100644 (file)
index 39a3328..0000000
+++ /dev/null
@@ -1,552 +0,0 @@
-From 3ce895cbe3469bfcaa84674ec4f1b2d60e8b370b Mon Sep 17 00:00:00 2001
-From: Mingkai Hu <Mingkai.Hu@freescale.com>
-Date: Mon, 21 Jul 2014 14:48:42 +0800
-Subject: [PATCH 01/70] arm64/ls1043a: add DTS for Freescale LS1043A SoC
-
-LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
-similar to LS1021a which complies to Chassis 2.1 spec.
-
-Following levels of DTSI/DTS files have been created for the
-LS1043A SoC family:
-
-- fsl-ls1043a.dtsi:
-  DTS-Include file for FSL LS1043A SoC.
-
-Signed-off-by: Li Yang <leoli@freescale.com>
-Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
-Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
-Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
-Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
----
- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |  525 ++++++++++++++++++++++++
- 1 file changed, 525 insertions(+)
- create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
-
---- /dev/null
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
-@@ -0,0 +1,525 @@
-+/*
-+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
-+ *
-+ * Copyright 2014-2015, Freescale Semiconductor
-+ *
-+ * Mingkai Hu <Mingkai.hu@freescale.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPLv2 or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This library is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This library is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/ {
-+      compatible = "fsl,ls1043a";
-+      interrupt-parent = <&gic>;
-+      #address-cells = <2>;
-+      #size-cells = <2>;
-+
-+      cpus {
-+              #address-cells = <2>;
-+              #size-cells = <0>;
-+
-+              /*
-+               * We expect the enable-method for cpu's to be "psci", but this
-+               * is dependent on the SoC FW, which will fill this in.
-+               *
-+               * Currently supported enable-method is psci v0.2
-+               */
-+              cpu0: cpu@0 {
-+                      device_type = "cpu";
-+                      compatible = "arm,cortex-a53";
-+                      reg = <0x0 0x0>;
-+                      clocks = <&clockgen 1 0>;
-+              };
-+
-+              cpu1: cpu@1 {
-+                      device_type = "cpu";
-+                      compatible = "arm,cortex-a53";
-+                      reg = <0x0 0x1>;
-+                      clocks = <&clockgen 1 0>;
-+              };
-+
-+              cpu2: cpu@2 {
-+                      device_type = "cpu";
-+                      compatible = "arm,cortex-a53";
-+                      reg = <0x0 0x2>;
-+                      clocks = <&clockgen 1 0>;
-+              };
-+
-+              cpu3: cpu@3 {
-+                      device_type = "cpu";
-+                      compatible = "arm,cortex-a53";
-+                      reg = <0x0 0x3>;
-+                      clocks = <&clockgen 1 0>;
-+              };
-+      };
-+
-+      memory@80000000 {
-+              device_type = "memory";
-+              reg = <0x0 0x80000000 0 0x80000000>;
-+                    /* DRAM space 1, size: 2GiB DRAM */
-+      };
-+
-+      sysclk: sysclk {
-+              compatible = "fixed-clock";
-+              #clock-cells = <0>;
-+              clock-frequency = <100000000>;
-+              clock-output-names = "sysclk";
-+      };
-+
-+      timer {
-+              compatible = "arm,armv8-timer";
-+              interrupts = <1 13 0x1>, /* Physical Secure PPI */
-+                           <1 14 0x1>, /* Physical Non-Secure PPI */
-+                           <1 11 0x1>, /* Virtual PPI */
-+                           <1 10 0x1>; /* Hypervisor PPI */
-+      };
-+
-+      pmu {
-+              compatible = "arm,armv8-pmuv3";
-+              interrupts = <0 106 0x4>,
-+                           <0 107 0x4>,
-+                           <0 95 0x4>,
-+                           <0 97 0x4>;
-+              interrupt-affinity = <&cpu0>,
-+                                   <&cpu1>,
-+                                   <&cpu2>,
-+                                   <&cpu3>;
-+      };
-+
-+      gic: interrupt-controller@1400000 {
-+              compatible = "arm,gic-400";
-+              #interrupt-cells = <3>;
-+              interrupt-controller;
-+              reg = <0x0 0x1401000 0 0x1000>, /* GICD */
-+                    <0x0 0x1402000 0 0x2000>, /* GICC */
-+                    <0x0 0x1404000 0 0x2000>, /* GICH */
-+                    <0x0 0x1406000 0 0x2000>; /* GICV */
-+              interrupts = <1 9 0xf08>;
-+      };
-+
-+      soc {
-+              compatible = "simple-bus";
-+              #address-cells = <2>;
-+              #size-cells = <2>;
-+              ranges;
-+
-+              clockgen: clocking@1ee1000 {
-+                      compatible = "fsl,ls1043a-clockgen";
-+                      reg = <0x0 0x1ee1000 0x0 0x1000>;
-+                      #clock-cells = <2>;
-+                      clocks = <&sysclk>;
-+              };
-+
-+              scfg: scfg@1570000 {
-+                      compatible = "fsl,ls1043a-scfg", "syscon";
-+                      reg = <0x0 0x1570000 0x0 0x10000>;
-+                      big-endian;
-+              };
-+
-+              dcfg: dcfg@1ee0000 {
-+                      compatible = "fsl,ls1043a-dcfg", "syscon";
-+                      reg = <0x0 0x1ee0000 0x0 0x10000>;
-+              };
-+
-+              ifc: ifc@1530000 {
-+                      compatible = "fsl,ifc", "simple-bus";
-+                      reg = <0x0 0x1530000 0x0 0x10000>;
-+                      interrupts = <0 43 0x4>;
-+              };
-+
-+              esdhc: esdhc@1560000 {
-+                      compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
-+                      reg = <0x0 0x1560000 0x0 0x10000>;
-+                      interrupts = <0 62 0x4>;
-+                      clock-frequency = <0>;
-+                      voltage-ranges = <1800 1800 3300 3300>;
-+                      sdhci,auto-cmd12;
-+                      big-endian;
-+                      bus-width = <4>;
-+              };
-+
-+              dspi0: dspi@2100000 {
-+                      compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+                      reg = <0x0 0x2100000 0x0 0x10000>;
-+                      interrupts = <0 64 0x4>;
-+                      clock-names = "dspi";
-+                      clocks = <&clockgen 4 0>;
-+                      spi-num-chipselects = <5>;
-+                      big-endian;
-+                      status = "disabled";
-+              };
-+
-+              dspi1: dspi@2110000 {
-+                      compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+                      reg = <0x0 0x2110000 0x0 0x10000>;
-+                      interrupts = <0 65 0x4>;
-+                      clock-names = "dspi";
-+                      clocks = <&clockgen 4 0>;
-+                      spi-num-chipselects = <5>;
-+                      big-endian;
-+                      status = "disabled";
-+              };
-+
-+              i2c0: i2c@2180000 {
-+                      compatible = "fsl,vf610-i2c";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+                      reg = <0x0 0x2180000 0x0 0x10000>;
-+                      interrupts = <0 56 0x4>;
-+                      clock-names = "i2c";
-+                      clocks = <&clockgen 4 0>;
-+                      dmas = <&edma0 1 39>,
-+                             <&edma0 1 38>;
-+                      dma-names = "tx", "rx";
-+                      status = "disabled";
-+              };
-+
-+              i2c1: i2c@2190000 {
-+                      compatible = "fsl,vf610-i2c";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+                      reg = <0x0 0x2190000 0x0 0x10000>;
-+                      interrupts = <0 57 0x4>;
-+                      clock-names = "i2c";
-+                      clocks = <&clockgen 4 0>;
-+                      status = "disabled";
-+              };
-+
-+              i2c2: i2c@21a0000 {
-+                      compatible = "fsl,vf610-i2c";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+                      reg = <0x0 0x21a0000 0x0 0x10000>;
-+                      interrupts = <0 58 0x4>;
-+                      clock-names = "i2c";
-+                      clocks = <&clockgen 4 0>;
-+                      status = "disabled";
-+              };
-+
-+              i2c3: i2c@21b0000 {
-+                      compatible = "fsl,vf610-i2c";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+                      reg = <0x0 0x21b0000 0x0 0x10000>;
-+                      interrupts = <0 59 0x4>;
-+                      clock-names = "i2c";
-+                      clocks = <&clockgen 4 0>;
-+                      status = "disabled";
-+              };
-+
-+              duart0: serial@21c0500 {
-+                      compatible = "fsl,ns16550", "ns16550a";
-+                      reg = <0x00 0x21c0500 0x0 0x100>;
-+                      interrupts = <0 54 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+              };
-+
-+              duart1: serial@21c0600 {
-+                      compatible = "fsl,ns16550", "ns16550a";
-+                      reg = <0x00 0x21c0600 0x0 0x100>;
-+                      interrupts = <0 54 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+              };
-+
-+              duart2: serial@21d0500 {
-+                      compatible = "fsl,ns16550", "ns16550a";
-+                      reg = <0x0 0x21d0500 0x0 0x100>;
-+                      interrupts = <0 55 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+              };
-+
-+              duart3: serial@21d0600 {
-+                      compatible = "fsl,ns16550", "ns16550a";
-+                      reg = <0x0 0x21d0600 0x0 0x100>;
-+                      interrupts = <0 55 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+              };
-+
-+              gpio1: gpio@2300000 {
-+                      compatible = "fsl,ls1043a-gpio";
-+                      reg = <0x0 0x2300000 0x0 0x10000>;
-+                      interrupts = <0 66 0x4>;
-+                      gpio-controller;
-+                      #gpio-cells = <2>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <2>;
-+              };
-+
-+              gpio2: gpio@2310000 {
-+                      compatible = "fsl,ls1043a-gpio";
-+                      reg = <0x0 0x2310000 0x0 0x10000>;
-+                      interrupts = <0 67 0x4>;
-+                      gpio-controller;
-+                      #gpio-cells = <2>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <2>;
-+              };
-+
-+              gpio3: gpio@2320000 {
-+                      compatible = "fsl,ls1043a-gpio";
-+                      reg = <0x0 0x2320000 0x0 0x10000>;
-+                      interrupts = <0 68 0x4>;
-+                      gpio-controller;
-+                      #gpio-cells = <2>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <2>;
-+              };
-+
-+              gpio4: gpio@2330000 {
-+                      compatible = "fsl,ls1043a-gpio";
-+                      reg = <0x0 0x2330000 0x0 0x10000>;
-+                      interrupts = <0 134 0x4>;
-+                      gpio-controller;
-+                      #gpio-cells = <2>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <2>;
-+              };
-+
-+              lpuart0: serial@2950000 {
-+                      compatible = "fsl,ls1021a-lpuart";
-+                      reg = <0x0 0x2950000 0x0 0x1000>;
-+                      interrupts = <0 48 0x4>;
-+                      clocks = <&clockgen 0 0>;
-+                      clock-names = "ipg";
-+                      status = "disabled";
-+              };
-+
-+              lpuart1: serial@2960000 {
-+                      compatible = "fsl,ls1021a-lpuart";
-+                      reg = <0x0 0x2960000 0x0 0x1000>;
-+                      interrupts = <0 49 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+                      clock-names = "ipg";
-+                      status = "disabled";
-+              };
-+
-+              lpuart2: serial@2970000 {
-+                      compatible = "fsl,ls1021a-lpuart";
-+                      reg = <0x0 0x2970000 0x0 0x1000>;
-+                      interrupts = <0 50 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+                      clock-names = "ipg";
-+                      status = "disabled";
-+              };
-+
-+              lpuart3: serial@2980000 {
-+                      compatible = "fsl,ls1021a-lpuart";
-+                      reg = <0x0 0x2980000 0x0 0x1000>;
-+                      interrupts = <0 51 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+                      clock-names = "ipg";
-+                      status = "disabled";
-+              };
-+
-+              lpuart4: serial@2990000 {
-+                      compatible = "fsl,ls1021a-lpuart";
-+                      reg = <0x0 0x2990000 0x0 0x1000>;
-+                      interrupts = <0 52 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+                      clock-names = "ipg";
-+                      status = "disabled";
-+              };
-+
-+              lpuart5: serial@29a0000 {
-+                      compatible = "fsl,ls1021a-lpuart";
-+                      reg = <0x0 0x29a0000 0x0 0x1000>;
-+                      interrupts = <0 53 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+                      clock-names = "ipg";
-+                      status = "disabled";
-+              };
-+
-+              wdog0: wdog@2ad0000 {
-+                      compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
-+                      reg = <0x0 0x2ad0000 0x0 0x10000>;
-+                      interrupts = <0 83 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+                      clock-names = "wdog";
-+                      big-endian;
-+              };
-+
-+              edma0: edma@2c00000 {
-+                      #dma-cells = <2>;
-+                      compatible = "fsl,vf610-edma";
-+                      reg = <0x0 0x2c00000 0x0 0x10000>,
-+                            <0x0 0x2c10000 0x0 0x10000>,
-+                            <0x0 0x2c20000 0x0 0x10000>;
-+                      interrupts = <0 103 0x4>,
-+                                   <0 103 0x4>;
-+                      interrupt-names = "edma-tx", "edma-err";
-+                      dma-channels = <32>;
-+                      big-endian;
-+                      clock-names = "dmamux0", "dmamux1";
-+                      clocks = <&clockgen 4 0>,
-+                               <&clockgen 4 0>;
-+              };
-+
-+              usb0: usb3@2f00000 {
-+                      compatible = "snps,dwc3";
-+                      reg = <0x0 0x2f00000 0x0 0x10000>;
-+                      interrupts = <0 60 0x4>;
-+                      dr_mode = "host";
-+              };
-+
-+              usb1: usb3@3000000 {
-+                      compatible = "snps,dwc3";
-+                      reg = <0x0 0x3000000 0x0 0x10000>;
-+                      interrupts = <0 61 0x4>;
-+                      dr_mode = "host";
-+              };
-+
-+              usb2: usb3@3100000 {
-+                      compatible = "snps,dwc3";
-+                      reg = <0x0 0x3100000 0x0 0x10000>;
-+                      interrupts = <0 63 0x4>;
-+                      dr_mode = "host";
-+              };
-+
-+              sata: sata@3200000 {
-+                      compatible = "fsl,ls1043a-ahci";
-+                      reg = <0x0 0x3200000 0x0 0x10000>;
-+                      interrupts = <0 69 0x4>;
-+                      clocks = <&clockgen 4 0>;
-+              };
-+
-+              msi1: msi-controller1@1571000 {
-+                      compatible = "fsl,1s1043a-msi";
-+                      reg = <0x0 0x1571000 0x0 0x4>,
-+                            <0x0 0x1571004 0x0 0x4>;
-+                      reg-names = "msiir", "msir";
-+                      msi-controller;
-+                      interrupts = <0 116 0x4>;
-+              };
-+
-+              msi2: msi-controller2@1572000 {
-+                      compatible = "fsl,1s1043a-msi";
-+                      reg = <0x0 0x1572000 0x0 0x4>,
-+                            <0x0 0x1572004 0x0 0x4>;
-+                      reg-names = "msiir", "msir";
-+                      msi-controller;
-+                      interrupts = <0 126 0x4>;
-+              };
-+
-+              msi3: msi-controller3@1573000 {
-+                      compatible = "fsl,1s1043a-msi";
-+                      reg = <0x0 0x1573000 0x0 0x4>,
-+                            <0x0 0x1573004 0x0 0x4>;
-+                      reg-names = "msiir", "msir";
-+                      msi-controller;
-+                      interrupts = <0 160 0x4>;
-+              };
-+
-+              pcie@3400000 {
-+                      compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
-+                      reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
-+                             0x40 0x00000000 0x0 0x00002000>; /* configuration space */
-+                      reg-names = "regs", "config";
-+                      interrupts = <0 118 0x4>, /* controller interrupt */
-+                                   <0 117 0x4>; /* PME interrupt */
-+                      interrupt-names = "intr", "pme";
-+                      #address-cells = <3>;
-+                      #size-cells = <2>;
-+                      device_type = "pci";
-+                      num-lanes = <4>;
-+                      bus-range = <0x0 0xff>;
-+                      ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
-+                                0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+                      msi-parent = <&msi1>;
-+                      #interrupt-cells = <1>;
-+                      interrupt-map-mask = <0 0 0 7>;
-+                      interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
-+                                      <0000 0 0 2 &gic 0 111 0x4>,
-+                                      <0000 0 0 3 &gic 0 112 0x4>,
-+                                      <0000 0 0 4 &gic 0 113 0x4>;
-+              };
-+
-+              pcie@3500000 {
-+                      compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
-+                      reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
-+                             0x48 0x00000000 0x0 0x00002000>; /* configuration space */
-+                      reg-names = "regs", "config";
-+                      interrupts = <0 128 0x4>,
-+                                   <0 127 0x4>;
-+                      interrupt-names = "intr", "pme";
-+                      #address-cells = <3>;
-+                      #size-cells = <2>;
-+                      device_type = "pci";
-+                      num-lanes = <2>;
-+                      bus-range = <0x0 0xff>;
-+                      ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
-+                                0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+                      msi-parent = <&msi2>;
-+                      #interrupt-cells = <1>;
-+                      interrupt-map-mask = <0 0 0 7>;
-+                      interrupt-map = <0000 0 0 1 &gic 0 120  0x4>,
-+                                      <0000 0 0 2 &gic 0 121 0x4>,
-+                                      <0000 0 0 3 &gic 0 122 0x4>,
-+                                      <0000 0 0 4 &gic 0 123 0x4>;
-+              };
-+
-+              pcie@3600000 {
-+                      compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
-+                      reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
-+                             0x50 0x00000000 0x0 0x00002000>; /* configuration space */
-+                      reg-names = "regs", "config";
-+                      interrupts = <0 162 0x4>,
-+                                   <0 161 0x4>;
-+                      interrupt-names = "intr", "pme";
-+                      #address-cells = <3>;
-+                      #size-cells = <2>;
-+                      device_type = "pci";
-+                      num-lanes = <2>;
-+                      bus-range = <0x0 0xff>;
-+                      ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */
-+                                0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+                      msi-parent = <&msi3>;
-+                      #interrupt-cells = <1>;
-+                      interrupt-map-mask = <0 0 0 7>;
-+                      interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
-+                                      <0000 0 0 2 &gic 0 155 0x4>,
-+                                      <0000 0 0 3 &gic 0 156 0x4>,
-+                                      <0000 0 0 4 &gic 0 157 0x4>;
-+              };
-+      };
-+
-+};
diff --git a/target/linux/layerscape/patches-4.4/3002-dts-ls1043a-add-LS1043ARDB-board-support.patch b/target/linux/layerscape/patches-4.4/3002-dts-ls1043a-add-LS1043ARDB-board-support.patch
deleted file mode 100644 (file)
index f36509d..0000000
+++ /dev/null
@@ -1,150 +0,0 @@
-From 57d949256241fb79b669bbca0426c2d74a3dfc6e Mon Sep 17 00:00:00 2001
-From: Shaohui Xie <Shaohui.Xie@freescale.com>
-Date: Fri, 8 Jul 2016 10:27:39 +0800
-Subject: [PATCH 02/70] dts/ls1043a: add LS1043ARDB board support
-
-commit 9a6fce16a82d3412c9350b9f08eacebaa81c0a3d
-[context adjustment]
-
-Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
-Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
-Signed-off-by: Wenbin Song <Wenbin.Song@freescale.com>
-Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
-Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
-Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
----
- arch/arm64/boot/dts/freescale/Makefile            |    1 +
- arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts |  117 +++++++++++++++++++++
- 2 files changed, 118 insertions(+)
- create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
-
---- a/arch/arm64/boot/dts/freescale/Makefile
-+++ b/arch/arm64/boot/dts/freescale/Makefile
-@@ -1,6 +1,7 @@
- dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
- dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
- dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
-+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
-  
- always                := $(dtb-y)
- subdir-y      := $(dts-dirs)
---- /dev/null
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
-@@ -0,0 +1,117 @@
-+/*
-+ * Device Tree Include file for Freescale Layerscape-1043A family SoC.
-+ *
-+ * Copyright 2014-2015, Freescale Semiconductor
-+ *
-+ * Mingkai Hu <Mingkai.hu@freescale.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPLv2 or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This library is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This library is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+#include "fsl-ls1043a.dtsi"
-+
-+/ {
-+      model = "LS1043A RDB Board";
-+      compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
-+};
-+
-+&i2c0 {
-+      status = "okay";
-+      ina220@40 {
-+              compatible = "ti,ina220";
-+              reg = <0x40>;
-+              shunt-resistor = <1000>;
-+      };
-+      adt7461a@4c {
-+              compatible = "adi,adt7461";
-+              reg = <0x4c>;
-+      };
-+      eeprom@56 {
-+              compatible = "at24,24c512";
-+              reg = <0x52>;
-+      };
-+      eeprom@57 {
-+              compatible = "at24,24c512";
-+              reg = <0x53>;
-+      };
-+      rtc@68 {
-+              compatible = "pericom,pt7c4338";
-+              reg = <0x68>;
-+      };
-+};
-+
-+&ifc {
-+      status = "okay";
-+      #address-cells = <2>;
-+      #size-cells = <1>;
-+      /* NOR, NAND Flashes and FPGA on board */
-+      ranges = <0x0 0x0 0x0 0x60000000 0x08000000
-+                0x1 0x0 0x0 0x7e800000 0x00010000
-+                0x2 0x0 0x0 0x7fb00000 0x00000100>;
-+
-+              nor@0,0 {
-+                      compatible = "cfi-flash";
-+                      #address-cells = <1>;
-+                      #size-cells = <1>;
-+                      reg = <0x0 0x0 0x8000000>;
-+                      bank-width = <2>;
-+                      device-width = <1>;
-+              };
-+
-+              nand@1,0 {
-+                      compatible = "fsl,ifc-nand";
-+                      #address-cells = <1>;
-+                      #size-cells = <1>;
-+                      reg = <0x1 0x0 0x10000>;
-+              };
-+
-+              cpld: board-control@2,0 {
-+                      compatible = "fsl,ls1043ardb-cpld";
-+                      reg = <0x2 0x0 0x0000100>;
-+              };
-+};
-+
-+&duart0 {
-+      status = "okay";
-+};
-+
-+&duart1 {
-+      status = "okay";
-+};
diff --git a/target/linux/layerscape/patches-4.4/3003-arm64-dts-Update-address-cells-and-reg-properties-of.patch b/target/linux/layerscape/patches-4.4/3003-arm64-dts-Update-address-cells-and-reg-properties-of.patch
deleted file mode 100644 (file)
index 20cf852..0000000
+++ /dev/null
@@ -1,141 +0,0 @@
-From 3970a709eb4c25e298e11cfe0ea7412bb2139197 Mon Sep 17 00:00:00 2001
-From: Alison Wang <alison.wang@nxp.com>
-Date: Fri, 8 Jul 2016 10:50:46 +0800
-Subject: [PATCH 03/70] arm64: dts: Update address-cells and reg properties of
- cpu nodes
-
-commit 67161e229a59faf81732892b45a9ab3bae62ea18
-[context adjustment]
-
-MPIDR_EL1[63:32] value is equal to 0 for the CPUs of the LS1043A and
-LS2080A SoCs. The ARM CPU binding allows #address-cells to be set to 1,
-since MPIDR_EL1[63:32] bits are not used for CPUs identification. Update
-the #address-cells and reg properties accordingly.
-
-Signed-off-by: Alison Wang <alison.wang@nxp.com>
-Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
----
- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |   10 +++++-----
- arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi |   18 +++++++++---------
- 2 files changed, 14 insertions(+), 14 deletions(-)
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
-@@ -51,7 +51,7 @@
-       #size-cells = <2>;
-       cpus {
--              #address-cells = <2>;
-+              #address-cells = <1>;
-               #size-cells = <0>;
-               /*
-@@ -63,28 +63,28 @@
-               cpu0: cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a53";
--                      reg = <0x0 0x0>;
-+                      reg = <0x0>;
-                       clocks = <&clockgen 1 0>;
-               };
-               cpu1: cpu@1 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a53";
--                      reg = <0x0 0x1>;
-+                      reg = <0x1>;
-                       clocks = <&clockgen 1 0>;
-               };
-               cpu2: cpu@2 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a53";
--                      reg = <0x0 0x2>;
-+                      reg = <0x2>;
-                       clocks = <&clockgen 1 0>;
-               };
-               cpu3: cpu@3 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a53";
--                      reg = <0x0 0x3>;
-+                      reg = <0x3>;
-                       clocks = <&clockgen 1 0>;
-               };
-       };
---- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
-@@ -51,7 +51,7 @@
-       #size-cells = <2>;
-       cpus {
--              #address-cells = <2>;
-+              #address-cells = <1>;
-               #size-cells = <0>;
-               /*
-@@ -65,56 +65,56 @@
-               cpu@0 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a57";
--                      reg = <0x0 0x0>;
-+                      reg = <0x0>;
-                       clocks = <&clockgen 1 0>;
-               };
-               cpu@1 {
-                       device_type = "cpu";
-                       compatible = "arm,cortex-a57";