# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SHMEM is not set
CONFIG_SLHC=m
# CONFIG_SMB_FS is not set
+};
+
+static struct eth_plat_info cambria_npec_data = {
-+ .phy = 2,
++ .phy = 1,
+ .rxq = 4,
+ .txreadyq = 21,
+};
+
+static struct eth_plat_info cambria_npea_data = {
-+ .phy = 1,
++ .phy = 2,
+ .rxq = 2,
+ .txreadyq = 19,
+};
--- /dev/null
+--- a/arch/arm/mach-ixp4xx/cambria-setup.c
++++ b/arch/arm/mach-ixp4xx/cambria-setup.c
+@@ -36,6 +36,7 @@
+ #include <asm/mach-types.h>
+ #include <asm/mach/arch.h>
+ #include <asm/mach/flash.h>
++#include <linux/irq.h>
+
+ struct cambria_board_info {
+ unsigned char *model;
+@@ -105,6 +106,43 @@
+ .resource = &cambria_uart_resource,
+ };
+
++static struct resource cambria_optional_uart_resources[] = {
++ {
++ .start = 0x52000000,
++ .end = 0x52000fff,
++ .flags = IORESOURCE_MEM
++ },
++ {
++ .start = 0x53000000,
++ .end = 0x53000fff,
++ .flags = IORESOURCE_MEM
++ }
++};
++
++static struct plat_serial8250_port cambria_optional_uart_data[] = {
++ {
++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++ .iotype = UPIO_MEM,
++ .regshift = 0,
++ .uartclk = 1843200,
++ },
++ {
++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++ .iotype = UPIO_MEM,
++ .regshift = 0,
++ .uartclk = 1843200,
++ },
++ { },
++};
++
++static struct platform_device cambria_optional_uart = {
++ .name = "serial8250",
++ .id = PLAT8250_DEV_PLATFORM1,
++ .dev.platform_data = cambria_optional_uart_data,
++ .num_resources = 2,
++ .resource = cambria_optional_uart_resources,
++};
++
+ static struct resource cambria_pata_resources[] = {
+ {
+ .flags = IORESOURCE_MEM
+@@ -287,6 +325,19 @@
+ #ifdef CONFIG_SENSORS_EEPROM
+ static void __init cambria_gw2350_setup(void)
+ {
++ *IXP4XX_EXP_CS2 = 0xbfff0003;
++ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_BOTHEDGE);
++ cambria_optional_uart_data[0].mapbase = IXP4XX_EXP_BUS_BASE(2);
++ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(2), 0x0fff);
++ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
++
++ *IXP4XX_EXP_CS3 = 0xbfff0003;
++ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_BOTHEDGE);
++ cambria_optional_uart_data[1].mapbase = IXP4XX_EXP_BUS_BASE(3);
++ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(3), 0x0fff);
++ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
++
++ platform_device_register(&cambria_optional_uart);
+ platform_device_register(&cambria_npec_device);
+ platform_device_register(&cambria_npea_device);
+
+@@ -298,6 +349,22 @@
+
+ static void __init cambria_gw2358_setup(void)
+ {
++ *IXP4XX_EXP_CS3 = 0xbfff0003;
++ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_BOTHEDGE);
++ cambria_optional_uart_data[0].mapbase = 0x53FC0000;
++ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff);
++ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
++
++ *IXP4XX_EXP_CS3 = 0xbfff0003;
++ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_BOTHEDGE);
++ cambria_optional_uart_data[1].mapbase = 0x53F80000;
++ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
++ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
++
++ platform_device_register(&cambria_optional_uart);
++
++ cambria_npec_data.phy = 2;
++ cambria_npea_data.phy = 1;
+ platform_device_register(&cambria_npec_device);
+ platform_device_register(&cambria_npea_device);
+
--- /dev/null
+--- a/arch/arm/mach-ixp4xx/cambria-setup.c
++++ b/arch/arm/mach-ixp4xx/cambria-setup.c
+@@ -214,6 +214,21 @@
+ .dev.platform_data = &cambria_gpio_leds_data,
+ };
+
++static struct resource cambria_gpio_resources[] = {
++ {
++ .name = "gpio",
++ .flags = 0,
++ },
++};
++
++static struct platform_device cambria_gpio = {
++ .name = "GPIODEV",
++ .id = -1,
++ .num_resources = ARRAY_SIZE(cambria_gpio_resources),
++ .resource = cambria_gpio_resources,
++};
++
++
+
+ static struct latch_led cambria_latch_leds[] = {
+ {
+@@ -337,6 +352,11 @@
+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(3), 0x0fff);
+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
+
++ cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\
++ (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12);
++ cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
++
++ platform_device_register(&cambria_gpio);
+ platform_device_register(&cambria_optional_uart);
+ platform_device_register(&cambria_npec_device);
+ platform_device_register(&cambria_npea_device);
+@@ -361,6 +381,10 @@
+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
+
++ cambria_gpio_resources[0].start = (1 << 14);
++ cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
++
++ platform_device_register(&cambria_gpio);
+ platform_device_register(&cambria_optional_uart);
+
+ cambria_npec_data.phy = 2;
--- /dev/null
+--- a/drivers/ata/pata_ixp4xx_cf.c
++++ b/drivers/ata/pata_ixp4xx_cf.c
+@@ -24,17 +24,58 @@
+ #include <scsi/scsi_host.h>
+
+ #define DRV_NAME "pata_ixp4xx_cf"
+-#define DRV_VERSION "0.2"
++#define DRV_VERSION "0.3"
+
+ static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error)
+ {
+ struct ata_device *dev;
++ struct ixp4xx_pata_data *data = link->ap->host->dev->platform_data;
++ unsigned int pio_mask;
+
+ ata_link_for_each_dev(dev, link) {
++ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
++ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
++ if (pio_mask & (1 << 1)){
++ pio_mask = 4;
++ }else{
++ pio_mask = 3;
++ }
++ }else{
++ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
++ }
++ switch (pio_mask){
++ case 0:
++ ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
++ dev->pio_mode = XFER_PIO_0;
++ dev->xfer_mode = XFER_PIO_0;
++ *data->cs0_cfg = 0x8a473c03;
++ break;
++ case 1:
++ ata_dev_printk(dev, KERN_INFO, "configured for PIO1\n");
++ dev->pio_mode = XFER_PIO_1;
++ dev->xfer_mode = XFER_PIO_1;
++ *data->cs0_cfg = 0x86433c03;
++ break;
++ case 2:
++ ata_dev_printk(dev, KERN_INFO, "configured for PIO2\n");
++ dev->pio_mode = XFER_PIO_2;
++ dev->xfer_mode = XFER_PIO_2;
++ *data->cs0_cfg = 0x82413c03;
++ break;
++ case 3:
++ ata_dev_printk(dev, KERN_INFO, "configured for PIO3\n");
++ dev->pio_mode = XFER_PIO_3;
++ dev->xfer_mode = XFER_PIO_3;
++ *data->cs0_cfg = 0x80823c03;
++ break;
++ case 4:
++ ata_dev_printk(dev, KERN_INFO, "configured for PIO4\n");
++ dev->pio_mode = XFER_PIO_4;
++ dev->xfer_mode = XFER_PIO_4;
++ *data->cs0_cfg = 0x80403c03;
++ break;
++ }
+ if (ata_dev_enabled(dev)) {
+- ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
+- dev->pio_mode = XFER_PIO_0;
+- dev->xfer_mode = XFER_PIO_0;
+ dev->xfer_shift = ATA_SHIFT_PIO;
+ dev->flags |= ATA_DFLAG_PIO;
+ }
+@@ -48,6 +89,7 @@
+ unsigned int i;
+ unsigned int words = buflen >> 1;
+ u16 *buf16 = (u16 *) buf;
++ unsigned int pio_mask;
+ struct ata_port *ap = dev->link->ap;
+ void __iomem *mmio = ap->ioaddr.data_addr;
+ struct ixp4xx_pata_data *data = ap->host->dev->platform_data;
+@@ -55,8 +97,34 @@
+ /* set the expansion bus in 16bit mode and restore
+ * 8 bit mode after the transaction.
+ */
+- *data->cs0_cfg &= ~(0x01);
+- udelay(100);
++ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
++ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
++ if (pio_mask & (1 << 1)){
++ pio_mask = 4;
++ }else{
++ pio_mask = 3;
++ }
++ }else{
++ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
++ }
++ switch (pio_mask){
++ case 0:
++ *data->cs0_cfg = 0xa9643c42;
++ break;
++ case 1:
++ *data->cs0_cfg = 0x85033c42;
++ break;
++ case 2:
++ *data->cs0_cfg = 0x80b23c42;
++ break;
++ case 3:
++ *data->cs0_cfg = 0x80823c42;
++ break;
++ case 4:
++ *data->cs0_cfg = 0x80403c42;
++ break;
++ }
++ udelay(5);
+
+ /* Transfer multiple of 2 bytes */
+ if (rw == READ)
+@@ -81,8 +149,24 @@
+ words++;
+ }
+
+- udelay(100);
+- *data->cs0_cfg |= 0x01;
++ udelay(5);
++ switch (pio_mask){
++ case 0:
++ *data->cs0_cfg = 0x8a473c03;
++ break;
++ case 1:
++ *data->cs0_cfg = 0x86433c03;
++ break;
++ case 2:
++ *data->cs0_cfg = 0x82413c03;
++ break;
++ case 3:
++ *data->cs0_cfg = 0x80823c03;
++ break;
++ case 4:
++ *data->cs0_cfg = 0x80403c03;
++ break;
++ }
+
+ return words << 1;
+ }
projects / openwrt / openwrt.git / commitdiff