sunxi: remove linux 4.9 support
authorFelix Fietkau <nbd@nbd.name>
Sat, 29 Sep 2018 15:03:27 +0000 (17:03 +0200)
committerFelix Fietkau <nbd@nbd.name>
Sat, 29 Sep 2018 16:09:45 +0000 (18:09 +0200)
Signed-off-by: Felix Fietkau <nbd@nbd.name>
62 files changed:
target/linux/sunxi/config-4.9 [deleted file]
target/linux/sunxi/patches-4.9/0002-clk-sunxi-ng-Rename-the-internal-structures.patch [deleted file]
target/linux/sunxi/patches-4.9/0003-clk-sunxi-ng-Remove-the-use-of-rational-computations.patch [deleted file]
target/linux/sunxi/patches-4.9/0004-clk-sunxi-ng-Finish-to-convert-to-structures-for-arg.patch [deleted file]
target/linux/sunxi/patches-4.9/0005-clk-sunxi-ng-Add-minimums-for-all-the-relevant-struc.patch [deleted file]
target/linux/sunxi/patches-4.9/0006-clk-sunxi-ng-Implement-minimum-for-multipliers.patch [deleted file]
target/linux/sunxi/patches-4.9/0007-clk-sunxi-ng-Add-A64-clocks.patch [deleted file]
target/linux/sunxi/patches-4.9/0010-arm64-dts-add-Allwinner-A64-SoC-.dtsi.patch [deleted file]
target/linux/sunxi/patches-4.9/0011-arm64-dts-add-Pine64-support.patch [deleted file]
target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch [deleted file]
target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch [deleted file]
target/linux/sunxi/patches-4.9/0014-arm64-dts-allwinner-sort-the-nodes-in-sun50i-a64-pin.patch [deleted file]
target/linux/sunxi/patches-4.9/0015-arm64-dts-allwinner-enable-EHCI1-OHCI1-and-USB-PHY-n.patch [deleted file]
target/linux/sunxi/patches-4.9/0016-arm64-dts-add-MUSB-node-to-Allwinner-A64-dtsi.patch [deleted file]
target/linux/sunxi/patches-4.9/0017-arm64-dts-enable-the-MUSB-controller-of-Pine64-in-ho.patch [deleted file]
target/linux/sunxi/patches-4.9/0018-arm64-dts-allwinner-Remove-no-longer-used-pinctrl-su.patch [deleted file]
target/linux/sunxi/patches-4.9/0019-arm64-allwinner-a64-Add-MMC-nodes.patch [deleted file]
target/linux/sunxi/patches-4.9/0020-arm64-allwinner-a64-Add-MMC-pinctrl-nodes.patch [deleted file]
target/linux/sunxi/patches-4.9/0022-arm64-allwinner-pine64-add-MMC-support.patch [deleted file]
target/linux/sunxi/patches-4.9/0023-arm64-allwinner-a64-add-UART1-pin-nodes.patch [deleted file]
target/linux/sunxi/patches-4.9/0024-arm64-allwinner-a64-add-r_ccu-node.patch [deleted file]
target/linux/sunxi/patches-4.9/0025-arm64-allwinner-a64-add-R_PIO-pinctrl-node.patch [deleted file]
target/linux/sunxi/patches-4.9/0026-arm64-allwinner-a64-add-pmu0-regs-for-USB-PHY.patch [deleted file]
target/linux/sunxi/patches-4.9/0027-arm64-allwinner-a64-Add-PLL_PERIPH0-clock-to-the-R_C.patch [deleted file]
target/linux/sunxi/patches-4.9/0030-pinctrl-sunxi-Rework-the-pin-config-building-code.patch [deleted file]
target/linux/sunxi/patches-4.9/0031-pinctrl-sunxi-Use-macros-from-bindings-header-file-f.patch [deleted file]
target/linux/sunxi/patches-4.9/0032-pinctrl-sunxi-Handle-bias-disable.patch [deleted file]
target/linux/sunxi/patches-4.9/0033-pinctrl-sunxi-Support-generic-binding.patch [deleted file]
target/linux/sunxi/patches-4.9/0034-pinctrl-sunxi-Deal-with-configless-pins.patch [deleted file]
target/linux/sunxi/patches-4.9/0035-pinctrl-sunxi-make-bool-drivers-explicitly-non-modul.patch [deleted file]
target/linux/sunxi/patches-4.9/0036-pinctrl-sunxi-Free-configs-in-pinctrl_map-only-if-it.patch [deleted file]
target/linux/sunxi/patches-4.9/0037-pinctrl-sunxi-Fix-PIN_CONFIG_BIAS_PULL_-DOWN-UP-argu.patch [deleted file]
target/linux/sunxi/patches-4.9/0038-pinctrl-sunxi-Add-support-for-fetching-pinconf-setti.patch [deleted file]
target/linux/sunxi/patches-4.9/0039-pinctrl-sunxi-Make-sunxi_pconf_group_set-use-sunxi_p.patch [deleted file]
target/linux/sunxi/patches-4.9/0040-pinctrl-sunxi-Add-support-for-interrupt-debouncing.patch [deleted file]
target/linux/sunxi/patches-4.9/0041-pinctrl-sunxi-fix-theoretical-uninitialized-variable.patch [deleted file]
target/linux/sunxi/patches-4.9/0042-pinctrl-sunxi-Testing-the-wrong-variable.patch [deleted file]
target/linux/sunxi/patches-4.9/0043-pinctrl-sunxi-Don-t-enforce-bias-disable-for-now.patch [deleted file]
target/linux/sunxi/patches-4.9/0045-arm-dts-sun8i-add-common-dtsi-file-for-nanopi-SBCs.patch [deleted file]
target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch [deleted file]
target/linux/sunxi/patches-4.9/0051-stmmac-form-4-11.patch [deleted file]
target/linux/sunxi/patches-4.9/0052-stmmac-form-4-12.patch [deleted file]
target/linux/sunxi/patches-4.9/0053-stmmac-form-4-13.patch [deleted file]
target/linux/sunxi/patches-4.9/0054-crypto-sun4i-ss_support_the_Security_System_PRNG.patch [deleted file]
target/linux/sunxi/patches-4.9/0060-arm64-allwinner-sun50i-a64-Add-dt-node-for-the-sysco.patch [deleted file]
target/linux/sunxi/patches-4.9/0061-arm64-allwinner-sun50i-a64-add-dwmac-sun8i-Ethernet-.patch [deleted file]
target/linux/sunxi/patches-4.9/0062-arm64-allwinner-pine64-Enable-dwmac-sun8i.patch [deleted file]
target/linux/sunxi/patches-4.9/0063-arm64-allwinner-pine64-plus-Enable-dwmac-sun8i.patch [deleted file]
target/linux/sunxi/patches-4.9/0064-arm64-allwinner-sun50i-a64-Correct-emac-register-siz.patch [deleted file]
target/linux/sunxi/patches-4.9/0065-arm64-allwinner-a64-pine64-add-missing-ethernet0-ali.patch [deleted file]
target/linux/sunxi/patches-4.9/0070-arm-sun8i-sunxi-h3-h5-Add-dt-node-for-the-syscon-con.patch [deleted file]
target/linux/sunxi/patches-4.9/0071-arm-sun8i-sunxi-h3-h5-add-dwmac-sun8i-ethernet-drive.patch [deleted file]
target/linux/sunxi/patches-4.9/0072-arm-sun8i-orangepi-2-Enable-dwmac-sun8i.patch [deleted file]
target/linux/sunxi/patches-4.9/0073-ARM-sun8i-orangepi-plus-Enable-dwmac-sun8i.patch [deleted file]
target/linux/sunxi/patches-4.9/0074-ARM-dts-sunxi-h3-h5-Correct-emac-register-size.patch [deleted file]
target/linux/sunxi/patches-4.9/0080-ARM-dts-sunxi-nanopi-neo-Enable-dwmac-sun8i.patch [deleted file]
target/linux/sunxi/patches-4.9/0081-ARM-dts-sun8i-nanopi-neo-enable-UART-USB-and-I2C-pin.patch [deleted file]
target/linux/sunxi/patches-4.9/090-sunxi-mmc-from-4-13.patch [deleted file]
target/linux/sunxi/patches-4.9/115-musb-ignore-vbus-errors.patch [deleted file]
target/linux/sunxi/patches-4.9/131-reset-add-h3-resets.patch [deleted file]
target/linux/sunxi/patches-4.9/200-ARM-dts-sunxi-add-support-for-Orange-Pi-R1-board.patch [deleted file]
target/linux/sunxi/patches-4.9/205-arm-dts-sun8i-add-support-for-nanopi-m1-plus-board.patch [deleted file]

diff --git a/target/linux/sunxi/config-4.9 b/target/linux/sunxi/config-4.9
deleted file mode 100644 (file)
index 4a74fd1..0000000
+++ /dev/null
@@ -1,574 +0,0 @@
-# CONFIG_AHCI_SUNXI is not set
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_ARCH_AXXIA is not set
-CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
-CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_NR_GPIO=416
-CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-CONFIG_ARCH_SUNXI=y
-CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
-CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_ARM=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ARCH_TIMER=y
-CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
-CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
-CONFIG_ARM_CPU_SUSPEND=y
-CONFIG_ARM_ERRATA_643719=y
-CONFIG_ARM_GIC=y
-CONFIG_ARM_HAS_SG_CHAIN=y
-CONFIG_ARM_HEAVY_MB=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-CONFIG_ARM_LPAE=y
-CONFIG_ARM_PATCH_IDIV=y
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-CONFIG_ARM_PMU=y
-CONFIG_ARM_PSCI=y
-CONFIG_ARM_PSCI_FW=y
-CONFIG_ARM_THUMB=y
-# CONFIG_ARM_THUMBEE is not set
-CONFIG_ARM_UNWIND=y
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ATA=y
-CONFIG_ATAGS=y
-# CONFIG_ATA_SFF is not set
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_AXP20X_POWER=y
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-CONFIG_BACKLIGHT_PWM=y
-CONFIG_BINFMT_MISC=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BOUNCE=y
-# CONFIG_BPF_SYSCALL is not set
-CONFIG_CACHE_L2X0=y
-CONFIG_CAN=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLKSRC_PROBE=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_COMMON_CLK=y
-CONFIG_COMPACTION=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_CONNECTOR=y
-CONFIG_CONSOLE_TRANSLATIONS=y
-CONFIG_COREDUMP=y
-CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_CPUFREQ_DT_PLATDEV=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_ATTR_SET=y
-CONFIG_CPU_FREQ_GOV_COMMON=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_HAS_ASID=y
-# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_PM=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_THERMAL=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRYPTO_AEAD=y
-CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_CRC32=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_CRCT10DIF=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_DEV_SUN4I_SS=y
-CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_HW=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_MANAGER2=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_NULL2=y
-CONFIG_CRYPTO_RNG=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_BUGVERBOSE=y
-CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
-CONFIG_DEBUG_MEMORY_INIT=y
-# CONFIG_DEBUG_UART_8250 is not set
-# CONFIG_DEBUG_USER is not set
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_DMADEVICES=y
-CONFIG_DMA_ENGINE=y
-CONFIG_DMA_OF=y
-CONFIG_DMA_SUN4I=y
-CONFIG_DMA_SUN6I=y
-CONFIG_DMA_VIRTUAL_CHANNELS=y
-CONFIG_DNOTIFY=y
-CONFIG_DTC=y
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_DWMAC_DWC_QOS_ETH is not set
-CONFIG_DWMAC_GENERIC=y
-# CONFIG_DWMAC_SUN8I is not set
-CONFIG_DWMAC_SUNXI=y
-CONFIG_DYNAMIC_DEBUG=y
-CONFIG_EDAC_ATOMIC_SCRUB=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_ELF_CORE=y
-# CONFIG_EMBEDDED is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-CONFIG_EXT4_FS=y
-CONFIG_EXTCON=y
-# CONFIG_F2FS_CHECK_FS is not set
-CONFIG_F2FS_FS=y
-# CONFIG_F2FS_FS_SECURITY is not set
-CONFIG_F2FS_FS_XATTR=y
-CONFIG_F2FS_STAT_FS=y
-CONFIG_FAT_FS=y
-CONFIG_FB=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-CONFIG_FB_CMDLINE=y
-CONFIG_FB_FOREIGN_ENDIAN=y
-CONFIG_FB_LITTLE_ENDIAN=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_SIMPLE=y
-CONFIG_FB_TILEBLITTING=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-# CONFIG_FONTS is not set
-CONFIG_FONT_8x16=y
-CONFIG_FONT_8x8=y
-CONFIG_FONT_SUPPORT=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
-CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
-CONFIG_FRAME_WARN=2048
-CONFIG_FREEZER=y
-CONFIG_FS_MBCACHE=y
-CONFIG_FS_POSIX_ACL=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PHY=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GLOB=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_AXP209=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_AUDITSYSCALL=y
-CONFIG_HAVE_ARCH_BITREVERSE=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
-CONFIG_HAVE_ARM_ARCH_TIMER=y
-CONFIG_HAVE_ARM_SMCCC=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_GENERIC_RCU_GUP=y
-CONFIG_HAVE_HW_BREAKPOINT=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
-CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y
-CONFIG_HAVE_KVM_EVENTFD=y
-CONFIG_HAVE_KVM_IRQCHIP=y
-CONFIG_HAVE_KVM_IRQFD=y
-CONFIG_HAVE_KVM_IRQ_ROUTING=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_OPTPROBES=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_PERF_REGS=y
-CONFIG_HAVE_PERF_USER_STACK_DUMP=y
-CONFIG_HAVE_PROC_CPU=y
-CONFIG_HAVE_RCU_TABLE_FREE=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SMP=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_UID16=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HIGHMEM=y
-CONFIG_HIGHPTE=y
-CONFIG_HOTPLUG_CPU=y
-# CONFIG_HUGETLBFS is not set
-CONFIG_HWMON=y
-CONFIG_HW_CONSOLE=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_TIMERIOMEM=y
-CONFIG_HZ_FIXED=0
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_COMPAT=y
-CONFIG_I2C_HELPER_AUTO=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_I2C_SUN6I_P2WI=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INPUT=y
-CONFIG_INPUT_AXP20X_PEK=y
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_IOMMU_HELPER=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_JBD2=y
-CONFIG_KALLSYMS=y
-# CONFIG_KERNEL_MODE_NEON is not set
-CONFIG_KEYBOARD_SUN4I_LRADC=y
-CONFIG_KSM=y
-CONFIG_KVM=y
-CONFIG_KVM_ARM_HOST=y
-CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
-CONFIG_KVM_MMIO=y
-CONFIG_KVM_VFIO=y
-CONFIG_LCD_CLASS_DEVICE=y
-CONFIG_LCD_PLATFORM=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-CONFIG_LIBFDT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_CLUT224=y
-CONFIG_LOGO_LINUX_MONO=y
-CONFIG_LOGO_LINUX_VGA16=y
-CONFIG_MACH_SUN4I=y
-CONFIG_MACH_SUN5I=y
-CONFIG_MACH_SUN6I=y
-CONFIG_MACH_SUN7I=y
-CONFIG_MACH_SUN8I=y
-CONFIG_MACH_SUN9I=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MDIO_SUN4I=y
-CONFIG_MEDIA_SUPPORT=y
-# CONFIG_MFD_AC100 is not set
-CONFIG_MFD_AXP20X=y
-CONFIG_MFD_AXP20X_I2C=y
-CONFIG_MFD_AXP20X_RSB=y
-CONFIG_MFD_CORE=y
-CONFIG_MFD_SUN6I_PRCM=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGHT_HAVE_PCI=y
-CONFIG_MIGRATION=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_SUNXI=y
-CONFIG_MMU_NOTIFIER=y
-CONFIG_MODULES_TREE_LOOKUP=y
-CONFIG_MODULES_USE_ELF_REL=y
-# CONFIG_MTD is not set
-CONFIG_MULTI_IRQ_HANDLER=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEON=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NET_PTP_CLASSIFY=y
-CONFIG_NET_VENDOR_ALLWINNER=y
-CONFIG_NLS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NO_BOOTMEM=y
-CONFIG_NO_HZ=y
-CONFIG_NO_HZ_COMMON=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_NR_CPUS=8
-CONFIG_NVMEM=y
-CONFIG_NVMEM_SUNXI_SID=y
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_NET=y
-CONFIG_OF_RESERVED_MEM=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PADATA=y
-CONFIG_PAGE_OFFSET=0xC0000000
-# CONFIG_PARTITION_ADVANCED is not set
-# CONFIG_PCI_DOMAINS_GENERIC is not set
-# CONFIG_PCI_SYSCALL is not set
-CONFIG_PERF_EVENTS=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=3
-CONFIG_PHYLIB=y
-CONFIG_PHYS_ADDR_T_64BIT=y
-CONFIG_PHY_SUN4I_USB=y
-CONFIG_PHY_SUN9I_USB=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_GR8=y
-# CONFIG_PINCTRL_SINGLE is not set
-CONFIG_PINCTRL_SUN4I_A10=y
-CONFIG_PINCTRL_SUN5I_A10S=y
-CONFIG_PINCTRL_SUN5I_A13=y
-CONFIG_PINCTRL_SUN6I_A31=y
-CONFIG_PINCTRL_SUN6I_A31S=y
-CONFIG_PINCTRL_SUN6I_A31_R=y
-CONFIG_PINCTRL_SUN7I_A20=y
-CONFIG_PINCTRL_SUN8I_A23=y
-CONFIG_PINCTRL_SUN8I_A23_R=y
-CONFIG_PINCTRL_SUN8I_A33=y
-CONFIG_PINCTRL_SUN8I_A83T=y
-CONFIG_PINCTRL_SUN8I_H3=y
-CONFIG_PINCTRL_SUN8I_H3_R=y
-CONFIG_PINCTRL_SUN9I_A80=y
-CONFIG_PINCTRL_SUN9I_A80_R=y
-CONFIG_PINCTRL_SUNXI=y
-# CONFIG_PL310_ERRATA_588369 is not set
-# CONFIG_PL310_ERRATA_727915 is not set
-# CONFIG_PL310_ERRATA_753970 is not set
-# CONFIG_PL310_ERRATA_769419 is not set
-CONFIG_PM=y
-CONFIG_PM_CLK=y
-# CONFIG_PM_DEBUG is not set
-CONFIG_PM_OPP=y
-CONFIG_PM_SLEEP=y
-CONFIG_PM_SLEEP_SMP=y
-CONFIG_POWER_RESET=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_PPS=y
-CONFIG_PREEMPT=y
-CONFIG_PREEMPT_COUNT=y
-# CONFIG_PREEMPT_NONE is not set
-CONFIG_PREEMPT_NOTIFIERS=y
-CONFIG_PREEMPT_RCU=y
-CONFIG_PRINTK_TIME=y
-CONFIG_PROC_EVENTS=y
-CONFIG_PTP_1588_CLOCK=y
-CONFIG_PWM=y
-CONFIG_PWM_SUN4I=y
-CONFIG_PWM_SYSFS=y
-CONFIG_RATIONAL=y
-# CONFIG_RCU_BOOST is not set
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_IRQ=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_REGMAP_SPI=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_AXP20X=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_REGULATOR_GPIO=y
-CONFIG_RELAY=y
-CONFIG_RESET_CONTROLLER=y
-CONFIG_RESET_SUNXI=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SATA_PMP=y
-# CONFIG_SCHED_INFO is not set
-CONFIG_SCSI=y
-CONFIG_SDIO_UART=y
-CONFIG_SECURITYFS=y
-CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
-CONFIG_SERIAL_8250_DW=y
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SERIAL_8250_NR_UARTS=8
-CONFIG_SERIAL_8250_RUNTIME_UARTS=8
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_SERIO=y
-CONFIG_SERIO_SERPORT=y
-CONFIG_SG_POOL=y
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SND=y
-CONFIG_SND_COMPRESS_OFFLOAD=y
-CONFIG_SND_JACK=y
-CONFIG_SND_JACK_INPUT_DEV=y
-CONFIG_SND_PCM=y
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_I2C_AND_SPI=y
-# CONFIG_SND_SUN4I_I2S is not set
-# CONFIG_SND_SUN4I_SPDIF is not set
-CONFIG_SOUND=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_SUN4I=y
-CONFIG_SPI_SUN6I=y
-CONFIG_SRCU=y
-CONFIG_STMMAC_ETH=y
-CONFIG_STMMAC_PLATFORM=y
-CONFIG_STRICT_DEVMEM=y
-# CONFIG_SUN4I_EMAC is not set
-CONFIG_SUN4I_TIMER=y
-# CONFIG_SUN50I_A64_CCU is not set
-CONFIG_SUN5I_HSTIMER=y
-CONFIG_SUN6I_A31_CCU=y
-CONFIG_SUN8I_A23_CCU=y
-CONFIG_SUN8I_A33_CCU=y
-CONFIG_SUN8I_H3_CCU=y
-CONFIG_SUNXI_CCU=y
-CONFIG_SUNXI_CCU_DIV=y
-CONFIG_SUNXI_CCU_FRAC=y
-CONFIG_SUNXI_CCU_GATE=y
-CONFIG_SUNXI_CCU_MP=y
-CONFIG_SUNXI_CCU_MULT=y
-CONFIG_SUNXI_CCU_MUX=y
-CONFIG_SUNXI_CCU_NK=y
-CONFIG_SUNXI_CCU_NKM=y
-CONFIG_SUNXI_CCU_NKMP=y
-CONFIG_SUNXI_CCU_NM=y
-CONFIG_SUNXI_CCU_PHASE=y
-CONFIG_SUNXI_RSB=y
-CONFIG_SUNXI_SRAM=y
-CONFIG_SUNXI_WATCHDOG=y
-CONFIG_SUSPEND=y
-CONFIG_SUSPEND_FREEZER=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_B53=y
-# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set
-CONFIG_SWCONFIG_B53_PHY_DRIVER=y
-CONFIG_SWCONFIG_B53_PHY_FIXUP=y
-# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
-CONFIG_SWIOTLB=y
-CONFIG_SWPHY=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYSFS_SYSCALL=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_SYS_SUPPORTS_HUGETLBFS=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
-CONFIG_THERMAL_GOV_STEP_WISE=y
-CONFIG_THERMAL_HWMON=y
-CONFIG_THERMAL_OF=y
-# CONFIG_THUMB2_KERNEL is not set
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_TOUCHSCREEN_PROPERTIES=y
-CONFIG_TOUCHSCREEN_SUN4I=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_UNINLINE_SPIN_UNLOCK=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_DWC2_HOST=y
-# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_NET_DRIVERS=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_HCD_PLATFORM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USERIO=y
-CONFIG_USE_OF=y
-CONFIG_VDSO=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_VFAT_FS=y
-CONFIG_VFP=y
-CONFIG_VFPv3=y
-CONFIG_VHOST=y
-CONFIG_VHOST_NET=y
-CONFIG_VIRTUALIZATION=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_VT_CONSOLE_SLEEP=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_WATCHDOG_CORE=y
-# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
-CONFIG_XPS=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0
-CONFIG_ZBOOT_ROM_TEXT=0
diff --git a/target/linux/sunxi/patches-4.9/0002-clk-sunxi-ng-Rename-the-internal-structures.patch b/target/linux/sunxi/patches-4.9/0002-clk-sunxi-ng-Rename-the-internal-structures.patch
deleted file mode 100644 (file)
index f3e485d..0000000
+++ /dev/null
@@ -1,239 +0,0 @@
-From a501a14e38cc4d8e9c91bb508cdca7032d53f717 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Fri, 30 Sep 2016 10:05:32 +0200
-Subject: clk: sunxi-ng: Rename the internal structures
-
-Rename the structures meant to be embedded in other structures to make it
-consistent with the mux structure name
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- drivers/clk/sunxi-ng/ccu_div.h  |  6 +++---
- drivers/clk/sunxi-ng/ccu_frac.c | 12 ++++++------
- drivers/clk/sunxi-ng/ccu_frac.h | 14 +++++++-------
- drivers/clk/sunxi-ng/ccu_mp.h   |  4 ++--
- drivers/clk/sunxi-ng/ccu_mult.h |  4 ++--
- drivers/clk/sunxi-ng/ccu_nk.h   |  4 ++--
- drivers/clk/sunxi-ng/ccu_nkm.h  |  6 +++---
- drivers/clk/sunxi-ng/ccu_nkmp.h |  8 ++++----
- drivers/clk/sunxi-ng/ccu_nm.h   |  6 +++---
- 9 files changed, 32 insertions(+), 32 deletions(-)
-
---- a/drivers/clk/sunxi-ng/ccu_div.h
-+++ b/drivers/clk/sunxi-ng/ccu_div.h
-@@ -20,7 +20,7 @@
- #include "ccu_mux.h"
- /**
-- * struct _ccu_div - Internal divider description
-+ * struct ccu_div_internal - Internal divider description
-  * @shift: Bit offset of the divider in its register
-  * @width: Width of the divider field in its register
-  * @max: Maximum value allowed for that divider. This is the
-@@ -36,7 +36,7 @@
-  * It is basically a wrapper around the clk_divider functions
-  * arguments.
-  */
--struct _ccu_div {
-+struct ccu_div_internal {
-       u8                      shift;
-       u8                      width;
-@@ -78,7 +78,7 @@ struct _ccu_div {
- struct ccu_div {
-       u32                     enable;
--      struct _ccu_div         div;
-+      struct ccu_div_internal         div;
-       struct ccu_mux_internal mux;
-       struct ccu_common       common;
- };
---- a/drivers/clk/sunxi-ng/ccu_frac.c
-+++ b/drivers/clk/sunxi-ng/ccu_frac.c
-@@ -14,7 +14,7 @@
- #include "ccu_frac.h"
- bool ccu_frac_helper_is_enabled(struct ccu_common *common,
--                              struct _ccu_frac *cf)
-+                              struct ccu_frac_internal *cf)
- {
-       if (!(common->features & CCU_FEATURE_FRACTIONAL))
-               return false;
-@@ -23,7 +23,7 @@ bool ccu_frac_helper_is_enabled(struct c
- }
- void ccu_frac_helper_enable(struct ccu_common *common,
--                          struct _ccu_frac *cf)
-+                          struct ccu_frac_internal *cf)
- {
-       unsigned long flags;
-       u32 reg;
-@@ -38,7 +38,7 @@ void ccu_frac_helper_enable(struct ccu_c
- }
- void ccu_frac_helper_disable(struct ccu_common *common,
--                           struct _ccu_frac *cf)
-+                           struct ccu_frac_internal *cf)
- {
-       unsigned long flags;
-       u32 reg;
-@@ -53,7 +53,7 @@ void ccu_frac_helper_disable(struct ccu_
- }
- bool ccu_frac_helper_has_rate(struct ccu_common *common,
--                            struct _ccu_frac *cf,
-+                            struct ccu_frac_internal *cf,
-                             unsigned long rate)
- {
-       if (!(common->features & CCU_FEATURE_FRACTIONAL))
-@@ -63,7 +63,7 @@ bool ccu_frac_helper_has_rate(struct ccu
- }
- unsigned long ccu_frac_helper_read_rate(struct ccu_common *common,
--                                      struct _ccu_frac *cf)
-+                                      struct ccu_frac_internal *cf)
- {
-       u32 reg;
-@@ -84,7 +84,7 @@ unsigned long ccu_frac_helper_read_rate(
- }
- int ccu_frac_helper_set_rate(struct ccu_common *common,
--                           struct _ccu_frac *cf,
-+                           struct ccu_frac_internal *cf,
-                            unsigned long rate)
- {
-       unsigned long flags;
---- a/drivers/clk/sunxi-ng/ccu_frac.h
-+++ b/drivers/clk/sunxi-ng/ccu_frac.h
-@@ -18,7 +18,7 @@
- #include "ccu_common.h"
--struct _ccu_frac {
-+struct ccu_frac_internal {
-       u32             enable;
-       u32             select;
-@@ -33,21 +33,21 @@ struct _ccu_frac {
-       }
- bool ccu_frac_helper_is_enabled(struct ccu_common *common,
--                              struct _ccu_frac *cf);
-+                              struct ccu_frac_internal *cf);
- void ccu_frac_helper_enable(struct ccu_common *common,
--                          struct _ccu_frac *cf);
-+                          struct ccu_frac_internal *cf);
- void ccu_frac_helper_disable(struct ccu_common *common,
--                           struct _ccu_frac *cf);
-+                           struct ccu_frac_internal *cf);
- bool ccu_frac_helper_has_rate(struct ccu_common *common,
--                            struct _ccu_frac *cf,
-+                            struct ccu_frac_internal *cf,
-                             unsigned long rate);
- unsigned long ccu_frac_helper_read_rate(struct ccu_common *common,
--                                      struct _ccu_frac *cf);
-+                                      struct ccu_frac_internal *cf);
- int ccu_frac_helper_set_rate(struct ccu_common *common,
--                           struct _ccu_frac *cf,
-+                           struct ccu_frac_internal *cf,
-                            unsigned long rate);
- #endif /* _CCU_FRAC_H_ */
---- a/drivers/clk/sunxi-ng/ccu_mp.h
-+++ b/drivers/clk/sunxi-ng/ccu_mp.h
-@@ -29,8 +29,8 @@
- struct ccu_mp {
-       u32                     enable;
--      struct _ccu_div         m;
--      struct _ccu_div         p;
-+      struct ccu_div_internal         m;
-+      struct ccu_div_internal         p;
-       struct ccu_mux_internal mux;
-       struct ccu_common       common;
- };
---- a/drivers/clk/sunxi-ng/ccu_mult.h
-+++ b/drivers/clk/sunxi-ng/ccu_mult.h
-@@ -4,7 +4,7 @@
- #include "ccu_common.h"
- #include "ccu_mux.h"
--struct _ccu_mult {
-+struct ccu_mult_internal {
-       u8      shift;
-       u8      width;
- };
-@@ -18,7 +18,7 @@ struct _ccu_mult {
- struct ccu_mult {
-       u32                     enable;
--      struct _ccu_mult        mult;
-+      struct ccu_mult_internal        mult;
-       struct ccu_mux_internal mux;
-       struct ccu_common       common;
- };
---- a/drivers/clk/sunxi-ng/ccu_nk.h
-+++ b/drivers/clk/sunxi-ng/ccu_nk.h
-@@ -30,8 +30,8 @@ struct ccu_nk {
-       u32                     enable;
-       u32                     lock;
--      struct _ccu_mult        n;
--      struct _ccu_mult        k;
-+      struct ccu_mult_internal        n;
-+      struct ccu_mult_internal        k;
-       unsigned int            fixed_post_div;
---- a/drivers/clk/sunxi-ng/ccu_nkm.h
-+++ b/drivers/clk/sunxi-ng/ccu_nkm.h
-@@ -29,9 +29,9 @@ struct ccu_nkm {
-       u32                     enable;
-       u32                     lock;
--      struct _ccu_mult        n;
--      struct _ccu_mult        k;
--      struct _ccu_div         m;
-+      struct ccu_mult_internal        n;
-+      struct ccu_mult_internal        k;
-+      struct ccu_div_internal         m;
-       struct ccu_mux_internal mux;
-       struct ccu_common       common;
---- a/drivers/clk/sunxi-ng/ccu_nkmp.h
-+++ b/drivers/clk/sunxi-ng/ccu_nkmp.h
-@@ -29,10 +29,10 @@ struct ccu_nkmp {
-       u32                     enable;
-       u32                     lock;
--      struct _ccu_mult        n;
--      struct _ccu_mult        k;
--      struct _ccu_div         m;
--      struct _ccu_div         p;
-+      struct ccu_mult_internal        n;
-+      struct ccu_mult_internal        k;
-+      struct ccu_div_internal         m;
-+      struct ccu_div_internal         p;
-       struct ccu_common       common;
- };
---- a/drivers/clk/sunxi-ng/ccu_nm.h
-+++ b/drivers/clk/sunxi-ng/ccu_nm.h
-@@ -30,9 +30,9 @@ struct ccu_nm {
-       u32                     enable;
-       u32                     lock;
--      struct _ccu_mult        n;
--      struct _ccu_div         m;
--      struct _ccu_frac        frac;
-+      struct ccu_mult_internal        n;
-+      struct ccu_div_internal         m;
-+      struct ccu_frac_internal        frac;
-       struct ccu_common       common;
- };
diff --git a/target/linux/sunxi/patches-4.9/0003-clk-sunxi-ng-Remove-the-use-of-rational-computations.patch b/target/linux/sunxi/patches-4.9/0003-clk-sunxi-ng-Remove-the-use-of-rational-computations.patch
deleted file mode 100644 (file)
index 9146a2b..0000000
+++ /dev/null
@@ -1,239 +0,0 @@
-From ee28648cb2b4d4ab5c2eb8199ea86675fe19016b Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 29 Sep 2016 22:53:12 +0200
-Subject: clk: sunxi-ng: Remove the use of rational computations
-
-While the rational library works great, it doesn't really allow us to add
-more constraints, like the minimum.
-
-Remove that in order to be able to deal with the constraints we'll need.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- drivers/clk/sunxi-ng/Kconfig    |  3 ---
- drivers/clk/sunxi-ng/ccu_nkm.c  | 31 ++++++++++++-----------
- drivers/clk/sunxi-ng/ccu_nkmp.c | 37 ++++++++++++++--------------
- drivers/clk/sunxi-ng/ccu_nm.c   | 54 +++++++++++++++++++++++++++++++----------
- 4 files changed, 74 insertions(+), 51 deletions(-)
-
---- a/drivers/clk/sunxi-ng/Kconfig
-+++ b/drivers/clk/sunxi-ng/Kconfig
-@@ -36,17 +36,14 @@ config SUNXI_CCU_NK
- config SUNXI_CCU_NKM
-       bool
--      select RATIONAL
-       select SUNXI_CCU_GATE
- config SUNXI_CCU_NKMP
-       bool
--      select RATIONAL
-       select SUNXI_CCU_GATE
- config SUNXI_CCU_NM
-       bool
--      select RATIONAL
-       select SUNXI_CCU_FRAC
-       select SUNXI_CCU_GATE
---- a/drivers/clk/sunxi-ng/ccu_nkm.c
-+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
-@@ -9,7 +9,6 @@
-  */
- #include <linux/clk-provider.h>
--#include <linux/rational.h>
- #include "ccu_gate.h"
- #include "ccu_nkm.h"
-@@ -28,21 +27,21 @@ static void ccu_nkm_find_best(unsigned l
-       unsigned long _n, _k, _m;
-       for (_k = 1; _k <= nkm->max_k; _k++) {
--              unsigned long tmp_rate;
--
--              rational_best_approximation(rate / _k, parent,
--                                          nkm->max_n, nkm->max_m, &_n, &_m);
--
--              tmp_rate = parent * _n * _k / _m;
--
--              if (tmp_rate > rate)
--                      continue;
--
--              if ((rate - tmp_rate) < (rate - best_rate)) {
--                      best_rate = tmp_rate;
--                      best_n = _n;
--                      best_k = _k;
--                      best_m = _m;
-+              for (_n = 1; _n <= nkm->max_n; _n++) {
-+                      for (_m = 1; _n <= nkm->max_m; _m++) {
-+                              unsigned long tmp_rate;
-+
-+                              tmp_rate = parent * _n * _k / _m;
-+
-+                              if (tmp_rate > rate)
-+                                      continue;
-+                              if ((rate - tmp_rate) < (rate - best_rate)) {
-+                                      best_rate = tmp_rate;
-+                                      best_n = _n;
-+                                      best_k = _k;
-+                                      best_m = _m;
-+                              }
-+                      }
-               }
-       }
---- a/drivers/clk/sunxi-ng/ccu_nkmp.c
-+++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
-@@ -9,7 +9,6 @@
-  */
- #include <linux/clk-provider.h>
--#include <linux/rational.h>
- #include "ccu_gate.h"
- #include "ccu_nkmp.h"
-@@ -29,24 +28,24 @@ static void ccu_nkmp_find_best(unsigned
-       unsigned long _n, _k, _m, _p;
-       for (_k = 1; _k <= nkmp->max_k; _k++) {
--              for (_p = 1; _p <= nkmp->max_p; _p <<= 1) {
--                      unsigned long tmp_rate;
--
--                      rational_best_approximation(rate / _k, parent / _p,
--                                                  nkmp->max_n, nkmp->max_m,
--                                                  &_n, &_m);
--
--                      tmp_rate = parent * _n * _k / (_m * _p);
--
--                      if (tmp_rate > rate)
--                              continue;
--
--                      if ((rate - tmp_rate) < (rate - best_rate)) {
--                              best_rate = tmp_rate;
--                              best_n = _n;
--                              best_k = _k;
--                              best_m = _m;
--                              best_p = _p;
-+              for (_n = 1; _n <= nkmp->max_n; _n++) {
-+                      for (_m = 1; _n <= nkmp->max_m; _m++) {
-+                              for (_p = 1; _p <= nkmp->max_p; _p <<= 1) {
-+                                      unsigned long tmp_rate;
-+
-+                                      tmp_rate = parent * _n * _k / (_m * _p);
-+
-+                                      if (tmp_rate > rate)
-+                                              continue;
-+
-+                                      if ((rate - tmp_rate) < (rate - best_rate)) {
-+                                              best_rate = tmp_rate;
-+                                              best_n = _n;
-+                                              best_k = _k;
-+                                              best_m = _m;
-+                                              best_p = _p;
-+                                      }
-+                              }
-                       }
-               }
-       }
---- a/drivers/clk/sunxi-ng/ccu_nm.c
-+++ b/drivers/clk/sunxi-ng/ccu_nm.c
-@@ -9,12 +9,42 @@
-  */
- #include <linux/clk-provider.h>
--#include <linux/rational.h>
- #include "ccu_frac.h"
- #include "ccu_gate.h"
- #include "ccu_nm.h"
-+struct _ccu_nm {
-+      unsigned long   n, max_n;
-+      unsigned long   m, max_m;
-+};
-+
-+static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
-+                           struct _ccu_nm *nm)
-+{
-+      unsigned long best_rate = 0;
-+      unsigned long best_n = 0, best_m = 0;
-+      unsigned long _n, _m;
-+
-+      for (_n = 1; _n <= nm->max_n; _n++) {
-+              for (_m = 1; _n <= nm->max_m; _m++) {
-+                      unsigned long tmp_rate = parent * _n  / _m;
-+
-+                      if (tmp_rate > rate)
-+                              continue;
-+
-+                      if ((rate - tmp_rate) < (rate - best_rate)) {
-+                              best_rate = tmp_rate;
-+                              best_n = _n;
-+                              best_m = _m;
-+                      }
-+              }
-+      }
-+
-+      nm->n = best_n;
-+      nm->m = best_m;
-+}
-+
- static void ccu_nm_disable(struct clk_hw *hw)
- {
-       struct ccu_nm *nm = hw_to_ccu_nm(hw);
-@@ -61,24 +91,22 @@ static long ccu_nm_round_rate(struct clk
-                             unsigned long *parent_rate)
- {
-       struct ccu_nm *nm = hw_to_ccu_nm(hw);
--      unsigned long max_n, max_m;
--      unsigned long n, m;
-+      struct _ccu_nm _nm;
--      max_n = 1 << nm->n.width;
--      max_m = nm->m.max ?: 1 << nm->m.width;
-+      _nm.max_n = 1 << nm->n.width;
-+      _nm.max_m = nm->m.max ?: 1 << nm->m.width;
--      rational_best_approximation(rate, *parent_rate, max_n, max_m, &n, &m);
-+      ccu_nm_find_best(*parent_rate, rate, &_nm);
--      return *parent_rate * n / m;
-+      return *parent_rate * _nm.n / _nm.m;
- }
- static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
-                          unsigned long parent_rate)
- {
-       struct ccu_nm *nm = hw_to_ccu_nm(hw);
-+      struct _ccu_nm _nm;
-       unsigned long flags;
--      unsigned long max_n, max_m;
--      unsigned long n, m;
-       u32 reg;
-       if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate))
-@@ -86,10 +114,10 @@ static int ccu_nm_set_rate(struct clk_hw
-       else
-               ccu_frac_helper_disable(&nm->common, &nm->frac);
--      max_n = 1 << nm->n.width;
--      max_m = nm->m.max ?: 1 << nm->m.width;
-+      _nm.max_n = 1 << nm->n.width;
-+      _nm.max_m = nm->m.max ?: 1 << nm->m.width;
--      rational_best_approximation(rate, parent_rate, max_n, max_m, &n, &m);
-+      ccu_nm_find_best(parent_rate, rate, &_nm);
-       spin_lock_irqsave(nm->common.lock, flags);
-@@ -97,7 +125,7 @@ static int ccu_nm_set_rate(struct clk_hw
-       reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
-       reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
--      writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift),
-+      writel(reg | ((_nm.m - 1) << nm->m.shift) | ((_nm.n - 1) << nm->n.shift),
-              nm->common.base + nm->common.reg);
-       spin_unlock_irqrestore(nm->common.lock, flags);
diff --git a/target/linux/sunxi/patches-4.9/0004-clk-sunxi-ng-Finish-to-convert-to-structures-for-arg.patch b/target/linux/sunxi/patches-4.9/0004-clk-sunxi-ng-Finish-to-convert-to-structures-for-arg.patch
deleted file mode 100644 (file)
index 4b91892..0000000
+++ /dev/null
@@ -1,182 +0,0 @@
-From b8302c7267dedaeeb1bf38143f099defbf16dce8 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 29 Sep 2016 23:50:21 +0200
-Subject: clk: sunxi-ng: Finish to convert to structures for arguments
-
-Some clocks still use an explicit list of arguments, which make it a bit
-more tedious to add new parameters.
-
-Convert those over to a structure pointer argument to add as many
-arguments as possible without having to many noise in our patches, or a
-very long list of arguments.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- drivers/clk/sunxi-ng/ccu_mult.c | 28 ++++++++++++++++++++--------
- drivers/clk/sunxi-ng/ccu_nk.c   | 39 ++++++++++++++++++++++-----------------
- 2 files changed, 42 insertions(+), 25 deletions(-)
-
---- a/drivers/clk/sunxi-ng/ccu_mult.c
-+++ b/drivers/clk/sunxi-ng/ccu_mult.c
-@@ -13,10 +13,20 @@
- #include "ccu_gate.h"
- #include "ccu_mult.h"
-+struct _ccu_mult {
-+      unsigned long   mult, max;
-+};
-+
- static void ccu_mult_find_best(unsigned long parent, unsigned long rate,
--                             unsigned int max_n, unsigned int *n)
-+                             struct _ccu_mult *mult)
- {
--      *n = rate / parent;
-+      int _mult;
-+
-+      _mult = rate / parent;
-+      if (_mult > mult->max)
-+              _mult = mult->max;
-+
-+      mult->mult = _mult;
- }
- static unsigned long ccu_mult_round_rate(struct ccu_mux_internal *mux,
-@@ -25,11 +35,12 @@ static unsigned long ccu_mult_round_rate
-                                       void *data)
- {
-       struct ccu_mult *cm = data;
--      unsigned int n;
-+      struct _ccu_mult _cm;
--      ccu_mult_find_best(parent_rate, rate, 1 << cm->mult.width, &n);
-+      _cm.max = 1 << cm->mult.width;
-+      ccu_mult_find_best(parent_rate, rate, &_cm);
--      return parent_rate * n;
-+      return parent_rate * _cm.mult;
- }
- static void ccu_mult_disable(struct clk_hw *hw)
-@@ -83,21 +94,22 @@ static int ccu_mult_set_rate(struct clk_
-                          unsigned long parent_rate)
- {
-       struct ccu_mult *cm = hw_to_ccu_mult(hw);
-+      struct _ccu_mult _cm;
-       unsigned long flags;
--      unsigned int n;
-       u32 reg;
-       ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
-                                               &parent_rate);
--      ccu_mult_find_best(parent_rate, rate, 1 << cm->mult.width, &n);
-+      _cm.max = 1 << cm->mult.width;
-+      ccu_mult_find_best(parent_rate, rate, &_cm);
-       spin_lock_irqsave(cm->common.lock, flags);
-       reg = readl(cm->common.base + cm->common.reg);
-       reg &= ~GENMASK(cm->mult.width + cm->mult.shift - 1, cm->mult.shift);
--      writel(reg | ((n - 1) << cm->mult.shift),
-+      writel(reg | ((_cm.mult - 1) << cm->mult.shift),
-              cm->common.base + cm->common.reg);
-       spin_unlock_irqrestore(cm->common.lock, flags);
---- a/drivers/clk/sunxi-ng/ccu_nk.c
-+++ b/drivers/clk/sunxi-ng/ccu_nk.c
-@@ -9,21 +9,24 @@
-  */
- #include <linux/clk-provider.h>
--#include <linux/rational.h>
- #include "ccu_gate.h"
- #include "ccu_nk.h"
-+struct _ccu_nk {
-+      unsigned long   n, max_n;
-+      unsigned long   k, max_k;
-+};
-+
- static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
--                           unsigned int max_n, unsigned int max_k,
--                           unsigned int *n, unsigned int *k)
-+                           struct _ccu_nk *nk)
- {
-       unsigned long best_rate = 0;
-       unsigned int best_k = 0, best_n = 0;
-       unsigned int _k, _n;
--      for (_k = 1; _k <= max_k; _k++) {
--              for (_n = 1; _n <= max_n; _n++) {
-+      for (_k = 1; _k <= nk->max_k; _k++) {
-+              for (_n = 1; _n <= nk->max_n; _n++) {
-                       unsigned long tmp_rate = parent * _n * _k;
-                       if (tmp_rate > rate)
-@@ -37,8 +40,8 @@ static void ccu_nk_find_best(unsigned lo
-               }
-       }
--      *k = best_k;
--      *n = best_n;
-+      nk->k = best_k;
-+      nk->n = best_n;
- }
- static void ccu_nk_disable(struct clk_hw *hw)
-@@ -89,16 +92,17 @@ static long ccu_nk_round_rate(struct clk
-                             unsigned long *parent_rate)
- {
-       struct ccu_nk *nk = hw_to_ccu_nk(hw);
--      unsigned int n, k;
-+      struct _ccu_nk _nk;
-       if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
-               rate *= nk->fixed_post_div;
--      ccu_nk_find_best(*parent_rate, rate,
--                       1 << nk->n.width, 1 << nk->k.width,
--                       &n, &k);
-+      _nk.max_n = 1 << nk->n.width;
-+      _nk.max_k = 1 << nk->k.width;
-+
-+      ccu_nk_find_best(*parent_rate, rate, &_nk);
-+      rate = *parent_rate * _nk.n * _nk.k;
--      rate = *parent_rate * n * k;
-       if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
-               rate = rate / nk->fixed_post_div;
-@@ -110,15 +114,16 @@ static int ccu_nk_set_rate(struct clk_hw
- {
-       struct ccu_nk *nk = hw_to_ccu_nk(hw);
-       unsigned long flags;
--      unsigned int n, k;
-+      struct _ccu_nk _nk;
-       u32 reg;
-       if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
-               rate = rate * nk->fixed_post_div;
--      ccu_nk_find_best(parent_rate, rate,
--                       1 << nk->n.width, 1 << nk->k.width,
--                       &n, &k);
-+      _nk.max_n = 1 << nk->n.width;
-+      _nk.max_k = 1 << nk->k.width;
-+
-+      ccu_nk_find_best(parent_rate, rate, &_nk);
-       spin_lock_irqsave(nk->common.lock, flags);
-@@ -126,7 +131,7 @@ static int ccu_nk_set_rate(struct clk_hw
-       reg &= ~GENMASK(nk->n.width + nk->n.shift - 1, nk->n.shift);
-       reg &= ~GENMASK(nk->k.width + nk->k.shift - 1, nk->k.shift);
--      writel(reg | ((k - 1) << nk->k.shift) | ((n - 1) << nk->n.shift),
-+      writel(reg | ((_nk.k - 1) << nk->k.shift) | ((_nk.n - 1) << nk->n.shift),
-              nk->common.base + nk->common.reg);
-       spin_unlock_irqrestore(nk->common.lock, flags);
diff --git a/target/linux/sunxi/patches-4.9/0005-clk-sunxi-ng-Add-minimums-for-all-the-relevant-struc.patch b/target/linux/sunxi/patches-4.9/0005-clk-sunxi-ng-Add-minimums-for-all-the-relevant-struc.patch
deleted file mode 100644 (file)
index 0165ade..0000000
+++ /dev/null
@@ -1,256 +0,0 @@
-From 6e0d50daa97f4bf9706e343b4f71171e88921209 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 29 Sep 2016 22:57:26 +0200
-Subject: clk: sunxi-ng: Add minimums for all the relevant structures and
- clocks
-
-Modify the current clocks we have to be able to specify the minimum for
-each clocks we support, just like we support the max.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- drivers/clk/sunxi-ng/ccu_mult.c |  7 ++++++-
- drivers/clk/sunxi-ng/ccu_nk.c   | 12 ++++++++----
- drivers/clk/sunxi-ng/ccu_nkm.c  | 18 ++++++++++++------
- drivers/clk/sunxi-ng/ccu_nkmp.c | 24 ++++++++++++++++--------
- drivers/clk/sunxi-ng/ccu_nm.c   | 12 ++++++++----
- 5 files changed, 50 insertions(+), 23 deletions(-)
-
---- a/drivers/clk/sunxi-ng/ccu_mult.c
-+++ b/drivers/clk/sunxi-ng/ccu_mult.c
-@@ -14,7 +14,7 @@
- #include "ccu_mult.h"
- struct _ccu_mult {
--      unsigned long   mult, max;
-+      unsigned long   mult, min, max;
- };
- static void ccu_mult_find_best(unsigned long parent, unsigned long rate,
-@@ -23,6 +23,9 @@ static void ccu_mult_find_best(unsigned
-       int _mult;
-       _mult = rate / parent;
-+      if (_mult < mult->min)
-+              _mult = mult->min;
-+
-       if (_mult > mult->max)
-               _mult = mult->max;
-@@ -37,6 +40,7 @@ static unsigned long ccu_mult_round_rate
-       struct ccu_mult *cm = data;
-       struct _ccu_mult _cm;
-+      _cm.min = 1;
-       _cm.max = 1 << cm->mult.width;
-       ccu_mult_find_best(parent_rate, rate, &_cm);
-@@ -101,6 +105,7 @@ static int ccu_mult_set_rate(struct clk_
-       ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
-                                               &parent_rate);
-+      _cm.min = 1;
-       _cm.max = 1 << cm->mult.width;
-       ccu_mult_find_best(parent_rate, rate, &_cm);
---- a/drivers/clk/sunxi-ng/ccu_nk.c
-+++ b/drivers/clk/sunxi-ng/ccu_nk.c
-@@ -14,8 +14,8 @@
- #include "ccu_nk.h"
- struct _ccu_nk {
--      unsigned long   n, max_n;
--      unsigned long   k, max_k;
-+      unsigned long   n, min_n, max_n;
-+      unsigned long   k, min_k, max_k;
- };
- static void ccu_nk_find_best(unsigned long parent, unsigned long rate,
-@@ -25,8 +25,8 @@ static void ccu_nk_find_best(unsigned lo
-       unsigned int best_k = 0, best_n = 0;
-       unsigned int _k, _n;
--      for (_k = 1; _k <= nk->max_k; _k++) {
--              for (_n = 1; _n <= nk->max_n; _n++) {
-+      for (_k = nk->min_k; _k <= nk->max_k; _k++) {
-+              for (_n = nk->min_n; _n <= nk->max_n; _n++) {
-                       unsigned long tmp_rate = parent * _n * _k;
-                       if (tmp_rate > rate)
-@@ -97,7 +97,9 @@ static long ccu_nk_round_rate(struct clk
-       if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
-               rate *= nk->fixed_post_div;
-+      _nk.min_n = 1;
-       _nk.max_n = 1 << nk->n.width;
-+      _nk.min_k = 1;
-       _nk.max_k = 1 << nk->k.width;
-       ccu_nk_find_best(*parent_rate, rate, &_nk);
-@@ -120,7 +122,9 @@ static int ccu_nk_set_rate(struct clk_hw
-       if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
-               rate = rate * nk->fixed_post_div;
-+      _nk.min_n = 1;
-       _nk.max_n = 1 << nk->n.width;
-+      _nk.min_k = 1;
-       _nk.max_k = 1 << nk->k.width;
-       ccu_nk_find_best(parent_rate, rate, &_nk);
---- a/drivers/clk/sunxi-ng/ccu_nkm.c
-+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
-@@ -14,9 +14,9 @@
- #include "ccu_nkm.h"
- struct _ccu_nkm {
--      unsigned long   n, max_n;
--      unsigned long   k, max_k;
--      unsigned long   m, max_m;
-+      unsigned long   n, min_n, max_n;
-+      unsigned long   k, min_k, max_k;
-+      unsigned long   m, min_m, max_m;
- };
- static void ccu_nkm_find_best(unsigned long parent, unsigned long rate,
-@@ -26,9 +26,9 @@ static void ccu_nkm_find_best(unsigned l
-       unsigned long best_n = 0, best_k = 0, best_m = 0;
-       unsigned long _n, _k, _m;
--      for (_k = 1; _k <= nkm->max_k; _k++) {
--              for (_n = 1; _n <= nkm->max_n; _n++) {
--                      for (_m = 1; _n <= nkm->max_m; _m++) {
-+      for (_k = nkm->min_k; _k <= nkm->max_k; _k++) {
-+              for (_n = nkm->min_n; _n <= nkm->max_n; _n++) {
-+                      for (_m = nkm->min_m; _m <= nkm->max_m; _m++) {
-                               unsigned long tmp_rate;
-                               tmp_rate = parent * _n * _k / _m;
-@@ -100,8 +100,11 @@ static unsigned long ccu_nkm_round_rate(
-       struct ccu_nkm *nkm = data;
-       struct _ccu_nkm _nkm;
-+      _nkm.min_n = 1;
-       _nkm.max_n = 1 << nkm->n.width;
-+      _nkm.min_k = 1;
-       _nkm.max_k = 1 << nkm->k.width;
-+      _nkm.min_m = 1;
-       _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
-       ccu_nkm_find_best(parent_rate, rate, &_nkm);
-@@ -126,8 +129,11 @@ static int ccu_nkm_set_rate(struct clk_h
-       unsigned long flags;
-       u32 reg;
-+      _nkm.min_n = 1;
-       _nkm.max_n = 1 << nkm->n.width;
-+      _nkm.min_k = 1;
-       _nkm.max_k = 1 << nkm->k.width;
-+      _nkm.min_m = 1;
-       _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
-       ccu_nkm_find_best(parent_rate, rate, &_nkm);
---- a/drivers/clk/sunxi-ng/ccu_nkmp.c
-+++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
-@@ -14,10 +14,10 @@
- #include "ccu_nkmp.h"
- struct _ccu_nkmp {
--      unsigned long   n, max_n;
--      unsigned long   k, max_k;
--      unsigned long   m, max_m;
--      unsigned long   p, max_p;
-+      unsigned long   n, min_n, max_n;
-+      unsigned long   k, min_k, max_k;
-+      unsigned long   m, min_m, max_m;
-+      unsigned long   p, min_p, max_p;
- };
- static void ccu_nkmp_find_best(unsigned long parent, unsigned long rate,
-@@ -27,10 +27,10 @@ static void ccu_nkmp_find_best(unsigned
-       unsigned long best_n = 0, best_k = 0, best_m = 0, best_p = 0;
-       unsigned long _n, _k, _m, _p;
--      for (_k = 1; _k <= nkmp->max_k; _k++) {
--              for (_n = 1; _n <= nkmp->max_n; _n++) {
--                      for (_m = 1; _n <= nkmp->max_m; _m++) {
--                              for (_p = 1; _p <= nkmp->max_p; _p <<= 1) {
-+      for (_k = nkmp->min_k; _k <= nkmp->max_k; _k++) {
-+              for (_n = nkmp->min_n; _n <= nkmp->max_n; _n++) {
-+                      for (_m = nkmp->min_m; _m <= nkmp->max_m; _m++) {
-+                              for (_p = nkmp->min_p; _p <= nkmp->max_p; _p <<= 1) {
-                                       unsigned long tmp_rate;
-                                       tmp_rate = parent * _n * _k / (_m * _p);
-@@ -107,9 +107,13 @@ static long ccu_nkmp_round_rate(struct c
-       struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw);
-       struct _ccu_nkmp _nkmp;
-+      _nkmp.min_n = 1;
-       _nkmp.max_n = 1 << nkmp->n.width;
-+      _nkmp.min_k = 1;
-       _nkmp.max_k = 1 << nkmp->k.width;
-+      _nkmp.min_m = 1;
-       _nkmp.max_m = nkmp->m.max ?: 1 << nkmp->m.width;
-+      _nkmp.min_p = 1;
-       _nkmp.max_p = nkmp->p.max ?: 1 << ((1 << nkmp->p.width) - 1);
-       ccu_nkmp_find_best(*parent_rate, rate, &_nkmp);
-@@ -125,9 +129,13 @@ static int ccu_nkmp_set_rate(struct clk_
-       unsigned long flags;
-       u32 reg;
-+      _nkmp.min_n = 1;
-       _nkmp.max_n = 1 << nkmp->n.width;
-+      _nkmp.min_k = 1;
-       _nkmp.max_k = 1 << nkmp->k.width;
-+      _nkmp.min_m = 1;
-       _nkmp.max_m = nkmp->m.max ?: 1 << nkmp->m.width;
-+      _nkmp.min_p = 1;
-       _nkmp.max_p = nkmp->p.max ?: 1 << ((1 << nkmp->p.width) - 1);
-       ccu_nkmp_find_best(parent_rate, rate, &_nkmp);
---- a/drivers/clk/sunxi-ng/ccu_nm.c
-+++ b/drivers/clk/sunxi-ng/ccu_nm.c
-@@ -15,8 +15,8 @@
- #include "ccu_nm.h"
- struct _ccu_nm {
--      unsigned long   n, max_n;
--      unsigned long   m, max_m;
-+      unsigned long   n, min_n, max_n;
-+      unsigned long   m, min_m, max_m;
- };
- static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
-@@ -26,8 +26,8 @@ static void ccu_nm_find_best(unsigned lo
-       unsigned long best_n = 0, best_m = 0;
-       unsigned long _n, _m;
--      for (_n = 1; _n <= nm->max_n; _n++) {
--              for (_m = 1; _n <= nm->max_m; _m++) {
-+      for (_n = nm->min_n; _n <= nm->max_n; _n++) {
-+              for (_m = nm->min_m; _m <= nm->max_m; _m++) {
-                       unsigned long tmp_rate = parent * _n  / _m;
-                       if (tmp_rate > rate)
-@@ -93,7 +93,9 @@ static long ccu_nm_round_rate(struct clk
-       struct ccu_nm *nm = hw_to_ccu_nm(hw);
-       struct _ccu_nm _nm;
-+      _nm.min_n = 1;
-       _nm.max_n = 1 << nm->n.width;
-+      _nm.min_m = 1;
-       _nm.max_m = nm->m.max ?: 1 << nm->m.width;
-       ccu_nm_find_best(*parent_rate, rate, &_nm);
-@@ -114,7 +116,9 @@ static int ccu_nm_set_rate(struct clk_hw
-       else
-               ccu_frac_helper_disable(&nm->common, &nm->frac);
-+      _nm.min_n = 1;
-       _nm.max_n = 1 << nm->n.width;
-+      _nm.min_m = 1;
-       _nm.max_m = nm->m.max ?: 1 << nm->m.width;
-       ccu_nm_find_best(parent_rate, rate, &_nm);
diff --git a/target/linux/sunxi/patches-4.9/0006-clk-sunxi-ng-Implement-minimum-for-multipliers.patch b/target/linux/sunxi/patches-4.9/0006-clk-sunxi-ng-Implement-minimum-for-multipliers.patch
deleted file mode 100644 (file)
index 668d596..0000000
+++ /dev/null
@@ -1,132 +0,0 @@
-From 2beaa601c849e72683a2dd0fe6fd77763f19f051 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Fri, 30 Sep 2016 22:16:51 +0200
-Subject: clk: sunxi-ng: Implement minimum for multipliers
-
-Allow the CCU drivers to specify a multiplier for their clocks.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- drivers/clk/sunxi-ng/ccu_mult.c |  2 +-
- drivers/clk/sunxi-ng/ccu_mult.h | 13 +++++++++----
- drivers/clk/sunxi-ng/ccu_nk.c   |  8 ++++----
- drivers/clk/sunxi-ng/ccu_nkm.c  |  8 ++++----
- drivers/clk/sunxi-ng/ccu_nkmp.c |  4 ++--
- drivers/clk/sunxi-ng/ccu_nm.c   |  2 +-
- 6 files changed, 21 insertions(+), 16 deletions(-)
-
---- a/drivers/clk/sunxi-ng/ccu_mult.c
-+++ b/drivers/clk/sunxi-ng/ccu_mult.c
-@@ -105,7 +105,7 @@ static int ccu_mult_set_rate(struct clk_
-       ccu_mux_helper_adjust_parent_for_prediv(&cm->common, &cm->mux, -1,
-                                               &parent_rate);
--      _cm.min = 1;
-+      _cm.min = cm->mult.min;
-       _cm.max = 1 << cm->mult.width;
-       ccu_mult_find_best(parent_rate, rate, &_cm);
---- a/drivers/clk/sunxi-ng/ccu_mult.h
-+++ b/drivers/clk/sunxi-ng/ccu_mult.h
-@@ -7,14 +7,19 @@
- struct ccu_mult_internal {
-       u8      shift;
-       u8      width;
-+      u8      min;
- };
--#define _SUNXI_CCU_MULT(_shift, _width)               \
--      {                                       \
--              .shift  = _shift,               \
--              .width  = _width,               \
-+#define _SUNXI_CCU_MULT_MIN(_shift, _width, _min)     \
-+      {                                               \
-+              .shift  = _shift,                       \
-+              .width  = _width,                       \
-+              .min    = _min,                         \
-       }
-+#define _SUNXI_CCU_MULT(_shift, _width)               \
-+      _SUNXI_CCU_MULT_MIN(_shift, _width, 1)
-+
- struct ccu_mult {
-       u32                     enable;
---- a/drivers/clk/sunxi-ng/ccu_nk.c
-+++ b/drivers/clk/sunxi-ng/ccu_nk.c
-@@ -97,9 +97,9 @@ static long ccu_nk_round_rate(struct clk
-       if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
-               rate *= nk->fixed_post_div;
--      _nk.min_n = 1;
-+      _nk.min_n = nk->n.min;
-       _nk.max_n = 1 << nk->n.width;
--      _nk.min_k = 1;
-+      _nk.min_k = nk->k.min;
-       _nk.max_k = 1 << nk->k.width;
-       ccu_nk_find_best(*parent_rate, rate, &_nk);
-@@ -122,9 +122,9 @@ static int ccu_nk_set_rate(struct clk_hw
-       if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
-               rate = rate * nk->fixed_post_div;
--      _nk.min_n = 1;
-+      _nk.min_n = nk->n.min;
-       _nk.max_n = 1 << nk->n.width;
--      _nk.min_k = 1;
-+      _nk.min_k = nk->k.min;
-       _nk.max_k = 1 << nk->k.width;
-       ccu_nk_find_best(parent_rate, rate, &_nk);
---- a/drivers/clk/sunxi-ng/ccu_nkm.c
-+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
-@@ -100,9 +100,9 @@ static unsigned long ccu_nkm_round_rate(
-       struct ccu_nkm *nkm = data;
-       struct _ccu_nkm _nkm;
--      _nkm.min_n = 1;
-+      _nkm.min_n = nkm->n.min;
-       _nkm.max_n = 1 << nkm->n.width;
--      _nkm.min_k = 1;
-+      _nkm.min_k = nkm->k.min;
-       _nkm.max_k = 1 << nkm->k.width;
-       _nkm.min_m = 1;
-       _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
-@@ -129,9 +129,9 @@ static int ccu_nkm_set_rate(struct clk_h
-       unsigned long flags;
-       u32 reg;
--      _nkm.min_n = 1;
-+      _nkm.min_n = nkm->n.min;
-       _nkm.max_n = 1 << nkm->n.width;
--      _nkm.min_k = 1;
-+      _nkm.min_k = nkm->k.min;
-       _nkm.max_k = 1 << nkm->k.width;
-       _nkm.min_m = 1;
-       _nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
---- a/drivers/clk/sunxi-ng/ccu_nkmp.c
-+++ b/drivers/clk/sunxi-ng/ccu_nkmp.c
-@@ -107,9 +107,9 @@ static long ccu_nkmp_round_rate(struct c
-       struct ccu_nkmp *nkmp = hw_to_ccu_nkmp(hw);
-       struct _ccu_nkmp _nkmp;
--      _nkmp.min_n = 1;
-+      _nkmp.min_n = nkmp->n.min;
-       _nkmp.max_n = 1 << nkmp->n.width;
--      _nkmp.min_k = 1;
-+      _nkmp.min_k = nkmp->k.min;
-       _nkmp.max_k = 1 << nkmp->k.width;
-       _nkmp.min_m = 1;
-       _nkmp.max_m = nkmp->m.max ?: 1 << nkmp->m.width;
---- a/drivers/clk/sunxi-ng/ccu_nm.c
-+++ b/drivers/clk/sunxi-ng/ccu_nm.c
-@@ -93,7 +93,7 @@ static long ccu_nm_round_rate(struct clk
-       struct ccu_nm *nm = hw_to_ccu_nm(hw);
-       struct _ccu_nm _nm;
--      _nm.min_n = 1;
-+      _nm.min_n = nm->n.min;
-       _nm.max_n = 1 << nm->n.width;
-       _nm.min_m = 1;
-       _nm.max_m = nm->m.max ?: 1 << nm->m.width;
diff --git a/target/linux/sunxi/patches-4.9/0007-clk-sunxi-ng-Add-A64-clocks.patch b/target/linux/sunxi/patches-4.9/0007-clk-sunxi-ng-Add-A64-clocks.patch
deleted file mode 100644 (file)
index 1039a83..0000000
+++ /dev/null
@@ -1,1295 +0,0 @@
-From c6a0637460c29799f1e63a6a4a65bda22caf4a54 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Wed, 6 Jul 2016 08:31:34 +0200
-Subject: clk: sunxi-ng: Add A64 clocks
-
-Add the A64 CCU clocks set.
-
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- .../devicetree/bindings/clock/sunxi-ccu.txt        |   1 +
- drivers/clk/sunxi-ng/Kconfig                       |  11 +
- drivers/clk/sunxi-ng/Makefile                      |   1 +
- drivers/clk/sunxi-ng/ccu-sun50i-a64.c              | 915 +++++++++++++++++++++
- drivers/clk/sunxi-ng/ccu-sun50i-a64.h              |  72 ++
- include/dt-bindings/clock/sun50i-a64-ccu.h         | 134 +++
- include/dt-bindings/reset/sun50i-a64-ccu.h         |  98 +++
- 7 files changed, 1232 insertions(+)
- create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a64.c
- create mode 100644 drivers/clk/sunxi-ng/ccu-sun50i-a64.h
- create mode 100644 include/dt-bindings/clock/sun50i-a64-ccu.h
- create mode 100644 include/dt-bindings/reset/sun50i-a64-ccu.h
-
---- a/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
-+++ b/Documentation/devicetree/bindings/clock/sunxi-ccu.txt
-@@ -7,6 +7,7 @@ Required properties :
-               - "allwinner,sun8i-a23-ccu"
-               - "allwinner,sun8i-a33-ccu"
-               - "allwinner,sun8i-h3-ccu"
-+              - "allwinner,sun50i-a64-ccu"
- - reg: Must contain the registers base address and length
- - clocks: phandle to the oscillators feeding the CCU. Two are needed:
---- a/drivers/clk/sunxi-ng/Kconfig
-+++ b/drivers/clk/sunxi-ng/Kconfig
-@@ -54,6 +54,17 @@ config SUNXI_CCU_MP
- # SoC Drivers
-+config SUN50I_A64_CCU
-+      bool "Support for the Allwinner A64 CCU"
-+      select SUNXI_CCU_DIV
-+      select SUNXI_CCU_NK
-+      select SUNXI_CCU_NKM
-+      select SUNXI_CCU_NKMP
-+      select SUNXI_CCU_NM
-+      select SUNXI_CCU_MP
-+      select SUNXI_CCU_PHASE
-+      default ARM64 && ARCH_SUNXI
-+
- config SUN6I_A31_CCU
-       bool "Support for the Allwinner A31/A31s CCU"
-       select SUNXI_CCU_DIV
---- a/drivers/clk/sunxi-ng/Makefile
-+++ b/drivers/clk/sunxi-ng/Makefile
-@@ -18,6 +18,7 @@ obj-$(CONFIG_SUNXI_CCU_NM)   += ccu_nm.o
- obj-$(CONFIG_SUNXI_CCU_MP)    += ccu_mp.o
- # SoC support
-+obj-$(CONFIG_SUN50I_A64_CCU)  += ccu-sun50i-a64.o
- obj-$(CONFIG_SUN6I_A31_CCU)   += ccu-sun6i-a31.o
- obj-$(CONFIG_SUN8I_A23_CCU)   += ccu-sun8i-a23.o
- obj-$(CONFIG_SUN8I_A33_CCU)   += ccu-sun8i-a33.o
---- /dev/null
-+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
-@@ -0,0 +1,915 @@
-+/*
-+ * Copyright (c) 2016 Maxime Ripard. All rights reserved.
-+ *
-+ * This software is licensed under the terms of the GNU General Public
-+ * License version 2, as published by the Free Software Foundation, and
-+ * may be copied, distributed, and modified under those terms.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/clk-provider.h>
-+#include <linux/of_address.h>
-+#include <linux/platform_device.h>
-+
-+#include "ccu_common.h"
-+#include "ccu_reset.h"
-+
-+#include "ccu_div.h"
-+#include "ccu_gate.h"
-+#include "ccu_mp.h"
-+#include "ccu_mult.h"
-+#include "ccu_nk.h"
-+#include "ccu_nkm.h"
-+#include "ccu_nkmp.h"
-+#include "ccu_nm.h"
-+#include "ccu_phase.h"
-+
-+#include "ccu-sun50i-a64.h"
-+
-+static struct ccu_nkmp pll_cpux_clk = {
-+      .enable         = BIT(31),
-+      .lock           = BIT(28),
-+      .n              = _SUNXI_CCU_MULT(8, 5),
-+      .k              = _SUNXI_CCU_MULT(4, 2),
-+      .m              = _SUNXI_CCU_DIV(0, 2),
-+      .p              = _SUNXI_CCU_DIV_MAX(16, 2, 4),
-+      .common         = {
-+              .reg            = 0x000,
-+              .hw.init        = CLK_HW_INIT("pll-cpux",
-+                                            "osc24M",
-+                                            &ccu_nkmp_ops,
-+                                            CLK_SET_RATE_UNGATE),
-+      },
-+};
-+
-+/*
-+ * The Audio PLL is supposed to have 4 outputs: 3 fixed factors from
-+ * the base (2x, 4x and 8x), and one variable divider (the one true
-+ * pll audio).
-+ *
-+ * We don't have any need for the variable divider for now, so we just
-+ * hardcode it to match with the clock names
-+ */
-+#define SUN50I_A64_PLL_AUDIO_REG      0x008
-+
-+static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",
-+                                 "osc24M", 0x008,
-+                                 8, 7,        /* N */
-+                                 0, 5,        /* M */
-+                                 BIT(31),     /* gate */
-+                                 BIT(28),     /* lock */
-+                                 CLK_SET_RATE_UNGATE);
-+
-+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video0_clk, "pll-video0",
-+                                      "osc24M", 0x010,
-+                                      8, 7,           /* N */
-+                                      0, 4,           /* M */
-+                                      BIT(24),        /* frac enable */
-+                                      BIT(25),        /* frac select */
-+                                      270000000,      /* frac rate 0 */
-+                                      297000000,      /* frac rate 1 */
-+                                      BIT(31),        /* gate */
-+                                      BIT(28),        /* lock */
-+                                      CLK_SET_RATE_UNGATE);
-+
-+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",
-+                                      "osc24M", 0x018,
-+                                      8, 7,           /* N */
-+                                      0, 4,           /* M */
-+                                      BIT(24),        /* frac enable */
-+                                      BIT(25),        /* frac select */
-+                                      270000000,      /* frac rate 0 */
-+                                      297000000,      /* frac rate 1 */
-+                                      BIT(31),        /* gate */
-+                                      BIT(28),        /* lock */
-+                                      CLK_SET_RATE_UNGATE);
-+
-+static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",
-+                                  "osc24M", 0x020,
-+                                  8, 5,       /* N */
-+                                  4, 2,       /* K */
-+                                  0, 2,       /* M */
-+                                  BIT(31),    /* gate */
-+                                  BIT(28),    /* lock */
-+                                  CLK_SET_RATE_UNGATE);
-+
-+static struct ccu_nk pll_periph0_clk = {
-+      .enable         = BIT(31),
-+      .lock           = BIT(28),
-+      .n              = _SUNXI_CCU_MULT(8, 5),
-+      .k              = _SUNXI_CCU_MULT_MIN(4, 2, 2),
-+      .fixed_post_div = 2,
-+      .common         = {
-+              .reg            = 0x028,
-+              .features       = CCU_FEATURE_FIXED_POSTDIV,
-+              .hw.init        = CLK_HW_INIT("pll-periph0", "osc24M",
-+                                            &ccu_nk_ops, CLK_SET_RATE_UNGATE),
-+      },
-+};
-+
-+static struct ccu_nk pll_periph1_clk = {
-+      .enable         = BIT(31),
-+      .lock           = BIT(28),
-+      .n              = _SUNXI_CCU_MULT(8, 5),
-+      .k              = _SUNXI_CCU_MULT_MIN(4, 2, 2),
-+      .fixed_post_div = 2,
-+      .common         = {
-+              .reg            = 0x02c,
-+              .features       = CCU_FEATURE_FIXED_POSTDIV,
-+              .hw.init        = CLK_HW_INIT("pll-periph1", "osc24M",
-+                                            &ccu_nk_ops, CLK_SET_RATE_UNGATE),
-+      },
-+};
-+
-+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video1_clk, "pll-video1",
-+                                      "osc24M", 0x030,
-+                                      8, 7,           /* N */
-+                                      0, 4,           /* M */
-+                                      BIT(24),        /* frac enable */
-+                                      BIT(25),        /* frac select */
-+                                      270000000,      /* frac rate 0 */
-+                                      297000000,      /* frac rate 1 */
-+                                      BIT(31),        /* gate */
-+                                      BIT(28),        /* lock */
-+                                      CLK_SET_RATE_UNGATE);
-+
-+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_gpu_clk, "pll-gpu",
-+                                      "osc24M", 0x038,
-+                                      8, 7,           /* N */
-+                                      0, 4,           /* M */
-+                                      BIT(24),        /* frac enable */
-+                                      BIT(25),        /* frac select */
-+                                      270000000,      /* frac rate 0 */
-+                                      297000000,      /* frac rate 1 */
-+                                      BIT(31),        /* gate */
-+                                      BIT(28),        /* lock */
-+                                      CLK_SET_RATE_UNGATE);
-+
-+/*
-+ * The output function can be changed to something more complex that
-+ * we do not handle yet.
-+ *
-+ * Hardcode the mode so that we don't fall in that case.
-+ */
-+#define SUN50I_A64_PLL_MIPI_REG               0x040
-+
-+struct ccu_nkm pll_mipi_clk = {
-+      .enable         = BIT(31),
-+      .lock           = BIT(28),
-+      .n              = _SUNXI_CCU_MULT(8, 4),
-+      .k              = _SUNXI_CCU_MULT_MIN(4, 2, 2),
-+      .m              = _SUNXI_CCU_DIV(0, 4),
-+      .common         = {
-+              .reg            = 0x040,
-+              .hw.init        = CLK_HW_INIT("pll-mipi", "pll-video0",
-+                                            &ccu_nkm_ops, CLK_SET_RATE_UNGATE),
-+      },
-+};
-+
-+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_hsic_clk, "pll-hsic",
-+                                      "osc24M", 0x044,
-+                                      8, 7,           /* N */
-+                                      0, 4,           /* M */
-+                                      BIT(24),        /* frac enable */
-+                                      BIT(25),        /* frac select */
-+                                      270000000,      /* frac rate 0 */
-+                                      297000000,      /* frac rate 1 */
-+                                      BIT(31),        /* gate */
-+                                      BIT(28),        /* lock */
-+                                      CLK_SET_RATE_UNGATE);
-+
-+static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_de_clk, "pll-de",
-+                                      "osc24M", 0x048,
-+                                      8, 7,           /* N */
-+                                      0, 4,           /* M */
-+                                      BIT(24),        /* frac enable */
-+                                      BIT(25),        /* frac select */
-+                                      270000000,      /* frac rate 0 */
-+                                      297000000,      /* frac rate 1 */
-+                                      BIT(31),        /* gate */
-+                                      BIT(28),        /* lock */
-+                                      CLK_SET_RATE_UNGATE);
-+
-+static SUNXI_CCU_NM_WITH_GATE_LOCK(pll_ddr1_clk, "pll-ddr1",
-+                                 "osc24M", 0x04c,
-+                                 8, 7,        /* N */
-+                                 0, 2,        /* M */
-+                                 BIT(31),     /* gate */
-+                                 BIT(28),     /* lock */
-+                                 CLK_SET_RATE_UNGATE);
-+
-+static const char * const cpux_parents[] = { "osc32k", "osc24M",
-+                                           "pll-cpux" , "pll-cpux" };
-+static SUNXI_CCU_MUX(cpux_clk, "cpux", cpux_parents,
-+                   0x050, 16, 2, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL);
-+
-+static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0);
-+
-+static const char * const ahb1_parents[] = { "osc32k", "osc24M",
-+                                           "axi" , "pll-periph0" };
-+static struct ccu_div ahb1_clk = {
-+      .div            = _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
-+
-+      .mux            = {
-+              .shift  = 12,
-+              .width  = 2,
-+
-+              .variable_prediv        = {
-+                      .index  = 3,
-+                      .shift  = 6,
-+                      .width  = 2,
-+              },
-+      },
-+
-+      .common         = {
-+              .reg            = 0x054,
-+              .features       = CCU_FEATURE_VARIABLE_PREDIV,
-+              .hw.init        = CLK_HW_INIT_PARENTS("ahb1",
-+                                                    ahb1_parents,
-+                                                    &ccu_div_ops,
-+                                                    0),
-+      },
-+};
-+
-+static struct clk_div_table apb1_div_table[] = {
-+      { .val = 0, .div = 2 },
-+      { .val = 1, .div = 2 },
-+      { .val = 2, .div = 4 },
-+      { .val = 3, .div = 8 },
-+      { /* Sentinel */ },
-+};
-+static SUNXI_CCU_DIV_TABLE(apb1_clk, "apb1", "ahb1",
-+                         0x054, 8, 2, apb1_div_table, 0);
-+
-+static const char * const apb2_parents[] = { "osc32k", "osc24M",
-+                                           "pll-periph0-2x" ,
-+                                           "pll-periph0-2x" };
-+static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", apb2_parents, 0x058,
-+                           0, 5,      /* M */
-+                           16, 2,     /* P */
-+                           24, 2,     /* mux */
-+                           0);
-+
-+static const char * const ahb2_parents[] = { "ahb1" , "pll-periph0" };
-+static const struct ccu_mux_fixed_prediv ahb2_fixed_predivs[] = {
-+      { .index = 1, .div = 2 },
-+};
-+static struct ccu_mux ahb2_clk = {
-+      .mux            = {
-+              .shift  = 0,
-+              .width  = 1,
-+              .fixed_predivs  = ahb2_fixed_predivs,
-+              .n_predivs      = ARRAY_SIZE(ahb2_fixed_predivs),
-+      },
-+
-+      .common         = {
-+              .reg            = 0x05c,
-+              .features       = CCU_FEATURE_FIXED_PREDIV,
-+              .hw.init        = CLK_HW_INIT_PARENTS("ahb2",
-+                                                    ahb2_parents,
-+                                                    &ccu_mux_ops,
-+                                                    0),
-+      },
-+};
-+
-+static SUNXI_CCU_GATE(bus_mipi_dsi_clk,       "bus-mipi-dsi", "ahb1",
-+                    0x060, BIT(1), 0);
-+static SUNXI_CCU_GATE(bus_ce_clk,     "bus-ce",       "ahb1",
-+                    0x060, BIT(5), 0);
-+static SUNXI_CCU_GATE(bus_dma_clk,    "bus-dma",      "ahb1",
-+                    0x060, BIT(6), 0);
-+static SUNXI_CCU_GATE(bus_mmc0_clk,   "bus-mmc0",     "ahb1",
-+                    0x060, BIT(8), 0);
-+static SUNXI_CCU_GATE(bus_mmc1_clk,   "bus-mmc1",     "ahb1",
-+                    0x060, BIT(9), 0);
-+static SUNXI_CCU_GATE(bus_mmc2_clk,   "bus-mmc2",     "ahb1",
-+                    0x060, BIT(10), 0);
-+static SUNXI_CCU_GATE(bus_nand_clk,   "bus-nand",     "ahb1",
-+                    0x060, BIT(13), 0);
-+static SUNXI_CCU_GATE(bus_dram_clk,   "bus-dram",     "ahb1",
-+                    0x060, BIT(14), 0);
-+static SUNXI_CCU_GATE(bus_emac_clk,   "bus-emac",     "ahb2",
-+                    0x060, BIT(17), 0);
-+static SUNXI_CCU_GATE(bus_ts_clk,     "bus-ts",       "ahb1",
-+                    0x060, BIT(18), 0);
-+static SUNXI_CCU_GATE(bus_hstimer_clk,        "bus-hstimer",  "ahb1",
-+                    0x060, BIT(19), 0);
-+static SUNXI_CCU_GATE(bus_spi0_clk,   "bus-spi0",     "ahb1",
-+                    0x060, BIT(20), 0);
-+static SUNXI_CCU_GATE(bus_spi1_clk,   "bus-spi1",     "ahb1",
-+                    0x060, BIT(21), 0);
-+static SUNXI_CCU_GATE(bus_otg_clk,    "bus-otg",      "ahb1",
-+                    0x060, BIT(23), 0);
-+static SUNXI_CCU_GATE(bus_ehci0_clk,  "bus-ehci0",    "ahb1",
-+                    0x060, BIT(24), 0);
-+static SUNXI_CCU_GATE(bus_ehci1_clk,  "bus-ehci1",    "ahb2",
-+                    0x060, BIT(25), 0);
-+static SUNXI_CCU_GATE(bus_ohci0_clk,  "bus-ohci0",    "ahb1",
-+                    0x060, BIT(28), 0);
-+static SUNXI_CCU_GATE(bus_ohci1_clk,  "bus-ohci1",    "ahb2",
-+                    0x060, BIT(29), 0);
-+
-+static SUNXI_CCU_GATE(bus_ve_clk,     "bus-ve",       "ahb1",
-+                    0x064, BIT(0), 0);
-+static SUNXI_CCU_GATE(bus_tcon0_clk,  "bus-tcon0",    "ahb1",
-+                    0x064, BIT(3), 0);
-+static SUNXI_CCU_GATE(bus_tcon1_clk,  "bus-tcon1",    "ahb1",
-+                    0x064, BIT(4), 0);
-+static SUNXI_CCU_GATE(bus_deinterlace_clk,    "bus-deinterlace",      "ahb1",
-+                    0x064, BIT(5), 0);
-+static SUNXI_CCU_GATE(bus_csi_clk,    "bus-csi",      "ahb1",
-+                    0x064, BIT(8), 0);
-+static SUNXI_CCU_GATE(bus_hdmi_clk,   "bus-hdmi",     "ahb1",
-+                    0x064, BIT(11), 0);
-+static SUNXI_CCU_GATE(bus_de_clk,     "bus-de",       "ahb1",
-+                    0x064, BIT(12), 0);
-+static SUNXI_CCU_GATE(bus_gpu_clk,    "bus-gpu",      "ahb1",
-+                    0x064, BIT(20), 0);
-+static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox",   "ahb1",
-+                    0x064, BIT(21), 0);
-+static SUNXI_CCU_GATE(bus_spinlock_clk,       "bus-spinlock", "ahb1",
-+                    0x064, BIT(22), 0);
-+
-+static SUNXI_CCU_GATE(bus_codec_clk,  "bus-codec",    "apb1",
-+                    0x068, BIT(0), 0);
-+static SUNXI_CCU_GATE(bus_spdif_clk,  "bus-spdif",    "apb1",
-+                    0x068, BIT(1), 0);
-+static SUNXI_CCU_GATE(bus_pio_clk,    "bus-pio",      "apb1",
-+                    0x068, BIT(5), 0);
-+static SUNXI_CCU_GATE(bus_ths_clk,    "bus-ths",      "apb1",
-+                    0x068, BIT(8), 0);
-+static SUNXI_CCU_GATE(bus_i2s0_clk,   "bus-i2s0",     "apb1",
-+                    0x068, BIT(12), 0);
-+static SUNXI_CCU_GATE(bus_i2s1_clk,   "bus-i2s1",     "apb1",
-+                    0x068, BIT(13), 0);
-+static SUNXI_CCU_GATE(bus_i2s2_clk,   "bus-i2s2",     "apb1",
-+                    0x068, BIT(14), 0);
-+
-+static SUNXI_CCU_GATE(bus_i2c0_clk,   "bus-i2c0",     "apb2",
-+                    0x06c, BIT(0), 0);
-+static SUNXI_CCU_GATE(bus_i2c1_clk,   "bus-i2c1",     "apb2",
-+                    0x06c, BIT(1), 0);
-+static SUNXI_CCU_GATE(bus_i2c2_clk,   "bus-i2c2",     "apb2",
-+                    0x06c, BIT(2), 0);
-+static SUNXI_CCU_GATE(bus_scr_clk,    "bus-scr",      "apb2",
-+                    0x06c, BIT(5), 0);
-+static SUNXI_CCU_GATE(bus_uart0_clk,  "bus-uart0",    "apb2",
-+                    0x06c, BIT(16), 0);
-+static SUNXI_CCU_GATE(bus_uart1_clk,  "bus-uart1",    "apb2",
-+                    0x06c, BIT(17), 0);
-+static SUNXI_CCU_GATE(bus_uart2_clk,  "bus-uart2",    "apb2",
-+                    0x06c, BIT(18), 0);
-+static SUNXI_CCU_GATE(bus_uart3_clk,  "bus-uart3",    "apb2",
-+                    0x06c, BIT(19), 0);
-+static SUNXI_CCU_GATE(bus_uart4_clk,  "bus-uart4",    "apb2",
-+                    0x06c, BIT(20), 0);
-+
-+static SUNXI_CCU_GATE(bus_dbg_clk,    "bus-dbg",      "ahb1",
-+                    0x070, BIT(7), 0);
-+
-+static struct clk_div_table ths_div_table[] = {
-+      { .val = 0, .div = 1 },
-+      { .val = 1, .div = 2 },
-+      { .val = 2, .div = 4 },
-+      { .val = 3, .div = 6 },
-+};
-+static const char * const ths_parents[] = { "osc24M" };
-+static struct ccu_div ths_clk = {
-+      .enable = BIT(31),
-+      .div    = _SUNXI_CCU_DIV_TABLE(0, 2, ths_div_table),
-+      .mux    = _SUNXI_CCU_MUX(24, 2),
-+      .common = {
-+              .reg            = 0x074,
-+              .hw.init        = CLK_HW_INIT_PARENTS("ths",
-+                                                    ths_parents,
-+                                                    &ccu_div_ops,
-+                                                    0),
-+      },
-+};
-+
-+static const char * const mod0_default_parents[] = { "osc24M", "pll-periph0",
-+                                                   "pll-periph1" };
-+static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 2,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static const char * const mmc_default_parents[] = { "osc24M", "pll-periph0-2x",
-+                                                  "pll-periph1-2x" };
-+static SUNXI_CCU_MP_WITH_MUX_GATE(mmc0_clk, "mmc0", mmc_default_parents, 0x088,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 2,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static SUNXI_CCU_MP_WITH_MUX_GATE(mmc1_clk, "mmc1", mmc_default_parents, 0x08c,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 2,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static SUNXI_CCU_MP_WITH_MUX_GATE(mmc2_clk, "mmc2", mmc_default_parents, 0x090,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 2,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static const char * const ts_parents[] = { "osc24M", "pll-periph0", };
-+static SUNXI_CCU_MP_WITH_MUX_GATE(ts_clk, "ts", ts_parents, 0x098,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 4,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static SUNXI_CCU_MP_WITH_MUX_GATE(ce_clk, "ce", mmc_default_parents, 0x09c,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 2,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static SUNXI_CCU_MP_WITH_MUX_GATE(spi0_clk, "spi0", mod0_default_parents, 0x0a0,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 2,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", mod0_default_parents, 0x0a4,
-+                                0, 4,         /* M */
-+                                16, 2,        /* P */
-+                                24, 2,        /* mux */
-+                                BIT(31),      /* gate */
-+                                0);
-+
-+static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x",
-+                                          "pll-audio-2x", "pll-audio" };
-+static SUNXI_CCU_MUX_WITH_GATE(i2s0_clk, "i2s0", i2s_parents,
-+                             0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_MUX_WITH_GATE(i2s1_clk, "i2s1", i2s_parents,
-+                             0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_MUX_WITH_GATE(i2s2_clk, "i2s2", i2s_parents,
-+                             0x0b8, 16, 2, BIT(31), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_M_WITH_GATE(spdif_clk, "spdif", "pll-audio",
-+                           0x0c0, 0, 4, BIT(31), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_GATE(usb_phy0_clk,   "usb-phy0",     "osc24M",
-+                    0x0cc, BIT(8), 0);
-+static SUNXI_CCU_GATE(usb_phy1_clk,   "usb-phy1",     "osc24M",
-+                    0x0cc, BIT(9), 0);
-+static SUNXI_CCU_GATE(usb_hsic_clk,   "usb-hsic",     "pll-hsic",
-+                    0x0cc, BIT(10), 0);
-+static SUNXI_CCU_GATE(usb_hsic_12m_clk,       "usb-hsic-12M", "osc12M",
-+                    0x0cc, BIT(11), 0);
-+static SUNXI_CCU_GATE(usb_ohci0_clk,  "usb-ohci0",    "osc12M",
-+                    0x0cc, BIT(16), 0);
-+static SUNXI_CCU_GATE(usb_ohci1_clk,  "usb-ohci1",    "usb-ohci0",
-+                    0x0cc, BIT(17), 0);
-+
-+static const char * const dram_parents[] = { "pll-ddr0", "pll-ddr1" };
-+static SUNXI_CCU_M_WITH_MUX(dram_clk, "dram", dram_parents,
-+                          0x0f4, 0, 4, 20, 2, CLK_IS_CRITICAL);
-+
-+static SUNXI_CCU_GATE(dram_ve_clk,    "dram-ve",      "dram",
-+                    0x100, BIT(0), 0);
-+static SUNXI_CCU_GATE(dram_csi_clk,   "dram-csi",     "dram",
-+                    0x100, BIT(1), 0);
-+static SUNXI_CCU_GATE(dram_deinterlace_clk,   "dram-deinterlace",     "dram",
-+                    0x100, BIT(2), 0);
-+static SUNXI_CCU_GATE(dram_ts_clk,    "dram-ts",      "dram",
-+                    0x100, BIT(3), 0);
-+
-+static const char * const de_parents[] = { "pll-periph0-2x", "pll-de" };
-+static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents,
-+                               0x104, 0, 4, 24, 3, BIT(31), 0);
-+
-+static const char * const tcon0_parents[] = { "pll-mipi", "pll-video0-2x" };
-+static const u8 tcon0_table[] = { 0, 2, };
-+static SUNXI_CCU_MUX_TABLE_WITH_GATE(tcon0_clk, "tcon0", tcon0_parents,
-+                                   tcon0_table, 0x118, 24, 3, BIT(31),
-+                                   CLK_SET_RATE_PARENT);
-+
-+static const char * const tcon1_parents[] = { "pll-video0", "pll-video1" };
-+static const u8 tcon1_table[] = { 0, 2, };
-+struct ccu_div tcon1_clk = {
-+      .enable         = BIT(31),
-+      .div            = _SUNXI_CCU_DIV(0, 4),
-+      .mux            = _SUNXI_CCU_MUX_TABLE(24, 2, tcon1_table),
-+      .common         = {
-+              .reg            = 0x11c,
-+              .hw.init        = CLK_HW_INIT_PARENTS("tcon1",
-+                                                    tcon1_parents,
-+                                                    &ccu_div_ops,
-+                                                    CLK_SET_RATE_PARENT),
-+      },
-+};
-+
-+static const char * const deinterlace_parents[] = { "pll-periph0", "pll-periph1" };
-+static SUNXI_CCU_M_WITH_MUX_GATE(deinterlace_clk, "deinterlace", deinterlace_parents,
-+                               0x124, 0, 4, 24, 3, BIT(31), 0);
-+
-+static SUNXI_CCU_GATE(csi_misc_clk,   "csi-misc",     "osc24M",
-+                    0x130, BIT(31), 0);
-+
-+static const char * const csi_sclk_parents[] = { "pll-periph0", "pll-periph1" };
-+static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parents,
-+                               0x134, 16, 4, 24, 3, BIT(31), 0);
-+
-+static const char * const csi_mclk_parents[] = { "osc24M", "pll-video1", "pll-periph1" };
-+static SUNXI_CCU_M_WITH_MUX_GATE(csi_mclk_clk, "csi-mclk", csi_mclk_parents,
-+                               0x134, 0, 5, 8, 3, BIT(15), 0);
-+
-+static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",
-+                           0x13c, 16, 3, BIT(31), 0);
-+
-+static SUNXI_CCU_GATE(ac_dig_clk,     "ac-dig",       "pll-audio",
-+                    0x140, BIT(31), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_GATE(ac_dig_4x_clk,  "ac-dig-4x",    "pll-audio-4x",
-+                    0x140, BIT(30), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_GATE(avs_clk,                "avs",          "osc24M",
-+                    0x144, BIT(31), 0);
-+
-+static const char * const hdmi_parents[] = { "pll-video0", "pll-video1" };
-+static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents,
-+                               0x150, 0, 4, 24, 2, BIT(31), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_GATE(hdmi_ddc_clk,   "hdmi-ddc",     "osc24M",
-+                    0x154, BIT(31), 0);
-+
-+static const char * const mbus_parents[] = { "osc24M", "pll-periph0-2x",
-+                                               "pll-ddr0", "pll-ddr1" };
-+static SUNXI_CCU_M_WITH_MUX_GATE(mbus_clk, "mbus", mbus_parents,
-+                               0x15c, 0, 3, 24, 2, BIT(31), CLK_IS_CRITICAL);
-+
-+static const char * const dsi_dphy_parents[] = { "pll-video0", "pll-periph0" };
-+static const u8 dsi_dphy_table[] = { 0, 2, };
-+static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(dsi_dphy_clk, "dsi-dphy",
-+                                     dsi_dphy_parents, dsi_dphy_table,
-+                                     0x168, 0, 4, 8, 2, BIT(31), CLK_SET_RATE_PARENT);
-+
-+static SUNXI_CCU_M_WITH_GATE(gpu_clk, "gpu", "pll-gpu",
-+                           0x1a0, 0, 3, BIT(31), CLK_SET_RATE_PARENT);
-+
-+/* Fixed Factor clocks */
-+static CLK_FIXED_FACTOR(osc12M_clk, "osc12M", "osc24M", 1, 2, 0);
-+
-+/* We hardcode the divider to 4 for now */
-+static CLK_FIXED_FACTOR(pll_audio_clk, "pll-audio",
-+                      "pll-audio-base", 4, 1, CLK_SET_RATE_PARENT);
-+static CLK_FIXED_FACTOR(pll_audio_2x_clk, "pll-audio-2x",
-+                      "pll-audio-base", 2, 1, CLK_SET_RATE_PARENT);
-+static CLK_FIXED_FACTOR(pll_audio_4x_clk, "pll-audio-4x",
-+                      "pll-audio-base", 1, 1, CLK_SET_RATE_PARENT);
-+static CLK_FIXED_FACTOR(pll_audio_8x_clk, "pll-audio-8x",
-+                      "pll-audio-base", 1, 2, CLK_SET_RATE_PARENT);
-+static CLK_FIXED_FACTOR(pll_periph0_2x_clk, "pll-periph0-2x",
-+                      "pll-periph0", 1, 2, 0);
-+static CLK_FIXED_FACTOR(pll_periph1_2x_clk, "pll-periph1-2x",
-+                      "pll-periph1", 1, 2, 0);
-+static CLK_FIXED_FACTOR(pll_video0_2x_clk, "pll-video0-2x",
-+                      "pll-video0", 1, 2, CLK_SET_RATE_PARENT);
-+
-+static struct ccu_common *sun50i_a64_ccu_clks[] = {
-+      &pll_cpux_clk.common,
-+      &pll_audio_base_clk.common,
-+      &pll_video0_clk.common,
-+      &pll_ve_clk.common,
-+      &pll_ddr0_clk.common,
-+      &pll_periph0_clk.common,
-+      &pll_periph1_clk.common,
-+      &pll_video1_clk.common,
-+      &pll_gpu_clk.common,
-+      &pll_mipi_clk.common,
-+      &pll_hsic_clk.common,
-+      &pll_de_clk.common,
-+      &pll_ddr1_clk.common,
-+      &cpux_clk.common,
-+      &axi_clk.common,
-+      &ahb1_clk.common,
-+      &apb1_clk.common,
-+      &apb2_clk.common,
-+      &ahb2_clk.common,
-+      &bus_mipi_dsi_clk.common,
-+      &bus_ce_clk.common,
-+      &bus_dma_clk.common,
-+      &bus_mmc0_clk.common,
-+      &bus_mmc1_clk.common,
-+      &bus_mmc2_clk.common,
-+      &bus_nand_clk.common,
-+      &bus_dram_clk.common,
-+      &bus_emac_clk.common,
-+      &bus_ts_clk.common,
-+      &bus_hstimer_clk.common,
-+      &bus_spi0_clk.common,
-+      &bus_spi1_clk.common,
-+      &bus_otg_clk.common,
-+      &bus_ehci0_clk.common,
-+      &bus_ehci1_clk.common,
-+      &bus_ohci0_clk.common,
-+      &bus_ohci1_clk.common,
-+      &bus_ve_clk.common,
-+      &bus_tcon0_clk.common,
-+      &bus_tcon1_clk.common,
-+      &bus_deinterlace_clk.common,
-+      &bus_csi_clk.common,
-+      &bus_hdmi_clk.common,
-+      &bus_de_clk.common,
-+      &bus_gpu_clk.common,
-+      &bus_msgbox_clk.common,
-+      &bus_spinlock_clk.common,
-+      &bus_codec_clk.common,
-+      &bus_spdif_clk.common,
-+      &bus_pio_clk.common,
-+      &bus_ths_clk.common,
-+      &bus_i2s0_clk.common,
-+      &bus_i2s1_clk.common,
-+      &bus_i2s2_clk.common,
-+      &bus_i2c0_clk.common,
-+      &bus_i2c1_clk.common,
-+      &bus_i2c2_clk.common,
-+      &bus_scr_clk.common,
-+      &bus_uart0_clk.common,
-+      &bus_uart1_clk.common,
-+      &bus_uart2_clk.common,
-+      &bus_uart3_clk.common,
-+      &bus_uart4_clk.common,
-+      &bus_dbg_clk.common,
-+      &ths_clk.common,
-+      &nand_clk.common,
-+      &mmc0_clk.common,
-+      &mmc1_clk.common,
-+      &mmc2_clk.common,
-+      &ts_clk.common,
-+      &ce_clk.common,
-+      &spi0_clk.common,
-+      &spi1_clk.common,
-+      &i2s0_clk.common,
-+      &i2s1_clk.common,
-+      &i2s2_clk.common,
-+      &spdif_clk.common,
-+      &usb_phy0_clk.common,
-+      &usb_phy1_clk.common,
-+      &usb_hsic_clk.common,
-+      &usb_hsic_12m_clk.common,
-+      &usb_ohci0_clk.common,
-+      &usb_ohci1_clk.common,
-+      &dram_clk.common,
-+      &dram_ve_clk.common,
-+      &dram_csi_clk.common,
-+      &dram_deinterlace_clk.common,
-+      &dram_ts_clk.common,
-+      &de_clk.common,
-+      &tcon0_clk.common,
-+      &tcon1_clk.common,
-+      &deinterlace_clk.common,
-+      &csi_misc_clk.common,
-+      &csi_sclk_clk.common,
-+      &csi_mclk_clk.common,
-+      &ve_clk.common,
-+      &ac_dig_clk.common,
-+      &ac_dig_4x_clk.common,
-+      &avs_clk.common,
-+      &hdmi_clk.common,
-+      &hdmi_ddc_clk.common,
-+      &mbus_clk.common,
-+      &dsi_dphy_clk.common,
-+      &gpu_clk.common,
-+};
-+
-+static struct clk_hw_onecell_data sun50i_a64_hw_clks = {
-+      .hws    = {
-+              [CLK_OSC_12M]           = &osc12M_clk.hw,
-+              [CLK_PLL_CPUX]          = &pll_cpux_clk.common.hw,
-+              [CLK_PLL_AUDIO_BASE]    = &pll_audio_base_clk.common.hw,
-+              [CLK_PLL_AUDIO]         = &pll_audio_clk.hw,
-+              [CLK_PLL_AUDIO_2X]      = &pll_audio_2x_clk.hw,
-+              [CLK_PLL_AUDIO_4X]      = &pll_audio_4x_clk.hw,
-+              [CLK_PLL_AUDIO_8X]      = &pll_audio_8x_clk.hw,
-+              [CLK_PLL_VIDEO0]        = &pll_video0_clk.common.hw,
-+              [CLK_PLL_VIDEO0_2X]     = &pll_video0_2x_clk.hw,
-+              [CLK_PLL_VE]            = &pll_ve_clk.common.hw,
-+              [CLK_PLL_DDR0]          = &pll_ddr0_clk.common.hw,
-+              [CLK_PLL_PERIPH0]       = &pll_periph0_clk.common.hw,
-+              [CLK_PLL_PERIPH0_2X]    = &pll_periph0_2x_clk.hw,
-+              [CLK_PLL_PERIPH1]       = &pll_periph1_clk.common.hw,
-+              [CLK_PLL_PERIPH1_2X]    = &pll_periph1_2x_clk.hw,
-+              [CLK_PLL_VIDEO1]        = &pll_video1_clk.common.hw,
-+              [CLK_PLL_GPU]           = &pll_gpu_clk.common.hw,
-+              [CLK_PLL_MIPI]          = &pll_mipi_clk.common.hw,
-+              [CLK_PLL_HSIC]          = &pll_hsic_clk.common.hw,
-+              [CLK_PLL_DE]            = &pll_de_clk.common.hw,
-+              [CLK_PLL_DDR1]          = &pll_ddr1_clk.common.hw,
-+              [CLK_CPUX]              = &cpux_clk.common.hw,
-+              [CLK_AXI]               = &axi_clk.common.hw,
-+              [CLK_AHB1]              = &ahb1_clk.common.hw,
-+              [CLK_APB1]              = &apb1_clk.common.hw,
-+              [CLK_APB2]              = &apb2_clk.common.hw,
-+              [CLK_AHB2]              = &ahb2_clk.common.hw,
-+              [CLK_BUS_MIPI_DSI]      = &bus_mipi_dsi_clk.common.hw,
-+              [CLK_BUS_CE]            = &bus_ce_clk.common.hw,
-+              [CLK_BUS_DMA]           = &bus_dma_clk.common.hw,
-+              [CLK_BUS_MMC0]          = &bus_mmc0_clk.common.hw,
-+              [CLK_BUS_MMC1]          = &bus_mmc1_clk.common.hw,
-+              [CLK_BUS_MMC2]          = &bus_mmc2_clk.common.hw,
-+              [CLK_BUS_NAND]          = &bus_nand_clk.common.hw,
-+              [CLK_BUS_DRAM]          = &bus_dram_clk.common.hw,
-+              [CLK_BUS_EMAC]          = &bus_emac_clk.common.hw,
-+              [CLK_BUS_TS]            = &bus_ts_clk.common.hw,
-+              [CLK_BUS_HSTIMER]       = &bus_hstimer_clk.common.hw,
-+              [CLK_BUS_SPI0]          = &bus_spi0_clk.common.hw,
-+              [CLK_BUS_SPI1]          = &bus_spi1_clk.common.hw,
-+              [CLK_BUS_OTG]           = &bus_otg_clk.common.hw,
-+              [CLK_BUS_EHCI0]         = &bus_ehci0_clk.common.hw,
-+              [CLK_BUS_EHCI1]         = &bus_ehci1_clk.common.hw,
-+              [CLK_BUS_OHCI0]         = &bus_ohci0_clk.common.hw,
-+              [CLK_BUS_OHCI1]         = &bus_ohci1_clk.common.hw,
-+              [CLK_BUS_VE]            = &bus_ve_clk.common.hw,
-+              [CLK_BUS_TCON0]         = &bus_tcon0_clk.common.hw,
-+              [CLK_BUS_TCON1]         = &bus_tcon1_clk.common.hw,
-+              [CLK_BUS_DEINTERLACE]   = &bus_deinterlace_clk.common.hw,
-+              [CLK_BUS_CSI]           = &bus_csi_clk.common.hw,
-+              [CLK_BUS_HDMI]          = &bus_hdmi_clk.common.hw,
-+              [CLK_BUS_DE]            = &bus_de_clk.common.hw,
-+              [CLK_BUS_GPU]           = &bus_gpu_clk.common.hw,
-+              [CLK_BUS_MSGBOX]        = &bus_msgbox_clk.common.hw,
-+              [CLK_BUS_SPINLOCK]      = &bus_spinlock_clk.common.hw,
-+              [CLK_BUS_CODEC]         = &bus_codec_clk.common.hw,
-+              [CLK_BUS_SPDIF]         = &bus_spdif_clk.common.hw,
-+              [CLK_BUS_PIO]           = &bus_pio_clk.common.hw,
-+              [CLK_BUS_THS]           = &bus_ths_clk.common.hw,
-+              [CLK_BUS_I2S0]          = &bus_i2s0_clk.common.hw,
-+              [CLK_BUS_I2S1]          = &bus_i2s1_clk.common.hw,
-+              [CLK_BUS_I2S2]          = &bus_i2s2_clk.common.hw,
-+              [CLK_BUS_I2C0]          = &bus_i2c0_clk.common.hw,
-+              [CLK_BUS_I2C1]          = &bus_i2c1_clk.common.hw,
-+              [CLK_BUS_I2C2]          = &bus_i2c2_clk.common.hw,
-+              [CLK_BUS_UART0]         = &bus_uart0_clk.common.hw,
-+              [CLK_BUS_UART1]         = &bus_uart1_clk.common.hw,
-+              [CLK_BUS_UART2]         = &bus_uart2_clk.common.hw,
-+              [CLK_BUS_UART3]         = &bus_uart3_clk.common.hw,
-+              [CLK_BUS_UART4]         = &bus_uart4_clk.common.hw,
-+              [CLK_BUS_SCR]           = &bus_scr_clk.common.hw,
-+              [CLK_BUS_DBG]           = &bus_dbg_clk.common.hw,
-+              [CLK_THS]               = &ths_clk.common.hw,
-+              [CLK_NAND]              = &nand_clk.common.hw,
-+              [CLK_MMC0]              = &mmc0_clk.common.hw,
-+              [CLK_MMC1]              = &mmc1_clk.common.hw,
-+              [CLK_MMC2]              = &mmc2_clk.common.hw,
-+              [CLK_TS]                = &ts_clk.common.hw,
-+              [CLK_CE]                = &ce_clk.common.hw,
-+              [CLK_SPI0]              = &spi0_clk.common.hw,
-+              [CLK_SPI1]              = &spi1_clk.common.hw,
-+              [CLK_I2S0]              = &i2s0_clk.common.hw,
-+              [CLK_I2S1]              = &i2s1_clk.common.hw,
-+              [CLK_I2S2]              = &i2s2_clk.common.hw,
-+              [CLK_SPDIF]             = &spdif_clk.common.hw,
-+              [CLK_USB_PHY0]          = &usb_phy0_clk.common.hw,
-+              [CLK_USB_PHY1]          = &usb_phy1_clk.common.hw,
-+              [CLK_USB_HSIC]          = &usb_hsic_clk.common.hw,
-+              [CLK_USB_HSIC_12M]      = &usb_hsic_12m_clk.common.hw,
-+              [CLK_USB_OHCI0]         = &usb_ohci0_clk.common.hw,
-+              [CLK_USB_OHCI1]         = &usb_ohci1_clk.common.hw,
-+              [CLK_DRAM]              = &dram_clk.common.hw,
-+              [CLK_DRAM_VE]           = &dram_ve_clk.common.hw,
-+              [CLK_DRAM_CSI]          = &dram_csi_clk.common.hw,
-+              [CLK_DRAM_DEINTERLACE]  = &dram_deinterlace_clk.common.hw,
-+              [CLK_DRAM_TS]           = &dram_ts_clk.common.hw,
-+              [CLK_DE]                = &de_clk.common.hw,
-+              [CLK_TCON0]             = &tcon0_clk.common.hw,
-+              [CLK_TCON1]             = &tcon1_clk.common.hw,
-+              [CLK_DEINTERLACE]       = &deinterlace_clk.common.hw,
-+              [CLK_CSI_MISC]          = &csi_misc_clk.common.hw,
-+              [CLK_CSI_SCLK]          = &csi_sclk_clk.common.hw,
-+              [CLK_CSI_MCLK]          = &csi_mclk_clk.common.hw,
-+              [CLK_VE]                = &ve_clk.common.hw,
-+              [CLK_AC_DIG]            = &ac_dig_clk.common.hw,
-+              [CLK_AC_DIG_4X]         = &ac_dig_4x_clk.common.hw,
-+              [CLK_AVS]               = &avs_clk.common.hw,
-+              [CLK_HDMI]              = &hdmi_clk.common.hw,
-+              [CLK_HDMI_DDC]          = &hdmi_ddc_clk.common.hw,
-+              [CLK_MBUS]              = &mbus_clk.common.hw,
-+              [CLK_DSI_DPHY]          = &dsi_dphy_clk.common.hw,
-+              [CLK_GPU]               = &gpu_clk.common.hw,
-+      },
-+      .num    = CLK_NUMBER,
-+};
-+
-+static struct ccu_reset_map sun50i_a64_ccu_resets[] = {
-+      [RST_USB_PHY0]          =  { 0x0cc, BIT(0) },
-+      [RST_USB_PHY1]          =  { 0x0cc, BIT(1) },
-+      [RST_USB_HSIC]          =  { 0x0cc, BIT(2) },
-+
-+      [RST_DRAM]              =  { 0x0f4, BIT(31) },
-+      [RST_MBUS]              =  { 0x0fc, BIT(31) },
-+
-+      [RST_BUS_MIPI_DSI]      =  { 0x2c0, BIT(1) },
-+      [RST_BUS_CE]            =  { 0x2c0, BIT(5) },
-+      [RST_BUS_DMA]           =  { 0x2c0, BIT(6) },
-+      [RST_BUS_MMC0]          =  { 0x2c0, BIT(8) },
-+      [RST_BUS_MMC1]          =  { 0x2c0, BIT(9) },
-+      [RST_BUS_MMC2]          =  { 0x2c0, BIT(10) },
-+      [RST_BUS_NAND]          =  { 0x2c0, BIT(13) },
-+      [RST_BUS_DRAM]          =  { 0x2c0, BIT(14) },
-+      [RST_BUS_EMAC]          =  { 0x2c0, BIT(17) },
-+      [RST_BUS_TS]            =  { 0x2c0, BIT(18) },
-+      [RST_BUS_HSTIMER]       =  { 0x2c0, BIT(19) },
-+      [RST_BUS_SPI0]          =  { 0x2c0, BIT(20) },
-+      [RST_BUS_SPI1]          =  { 0x2c0, BIT(21) },
-+      [RST_BUS_OTG]           =  { 0x2c0, BIT(23) },
-+      [RST_BUS_EHCI0]         =  { 0x2c0, BIT(24) },
-+      [RST_BUS_EHCI1]         =  { 0x2c0, BIT(25) },
-+      [RST_BUS_OHCI0]         =  { 0x2c0, BIT(28) },
-+      [RST_BUS_OHCI1]         =  { 0x2c0, BIT(29) },
-+
-+      [RST_BUS_VE]            =  { 0x2c4, BIT(0) },
-+      [RST_BUS_TCON0]         =  { 0x2c4, BIT(3) },
-+      [RST_BUS_TCON1]         =  { 0x2c4, BIT(4) },
-+      [RST_BUS_DEINTERLACE]   =  { 0x2c4, BIT(5) },
-+      [RST_BUS_CSI]           =  { 0x2c4, BIT(8) },
-+      [RST_BUS_HDMI0]         =  { 0x2c4, BIT(10) },
-+      [RST_BUS_HDMI1]         =  { 0x2c4, BIT(11) },
-+      [RST_BUS_DE]            =  { 0x2c4, BIT(12) },
-+      [RST_BUS_GPU]           =  { 0x2c4, BIT(20) },
-+      [RST_BUS_MSGBOX]        =  { 0x2c4, BIT(21) },
-+      [RST_BUS_SPINLOCK]      =  { 0x2c4, BIT(22) },
-+      [RST_BUS_DBG]           =  { 0x2c4, BIT(31) },
-+
-+      [RST_BUS_LVDS]          =  { 0x2c8, BIT(0) },
-+
-+      [RST_BUS_CODEC]         =  { 0x2d0, BIT(0) },
-+      [RST_BUS_SPDIF]         =  { 0x2d0, BIT(1) },
-+      [RST_BUS_THS]           =  { 0x2d0, BIT(8) },
-+      [RST_BUS_I2S0]          =  { 0x2d0, BIT(12) },
-+      [RST_BUS_I2S1]          =  { 0x2d0, BIT(13) },
-+      [RST_BUS_I2S2]          =  { 0x2d0, BIT(14) },
-+
-+      [RST_BUS_I2C0]          =  { 0x2d8, BIT(0) },
-+      [RST_BUS_I2C1]          =  { 0x2d8, BIT(1) },
-+      [RST_BUS_I2C2]          =  { 0x2d8, BIT(2) },
-+      [RST_BUS_SCR]           =  { 0x2d8, BIT(5) },
-+      [RST_BUS_UART0]         =  { 0x2d8, BIT(16) },
-+      [RST_BUS_UART1]         =  { 0x2d8, BIT(17) },
-+      [RST_BUS_UART2]         =  { 0x2d8, BIT(18) },
-+      [RST_BUS_UART3]         =  { 0x2d8, BIT(19) },
-+      [RST_BUS_UART4]         =  { 0x2d8, BIT(20) },
-+};
-+
-+static const struct sunxi_ccu_desc sun50i_a64_ccu_desc = {
-+      .ccu_clks       = sun50i_a64_ccu_clks,
-+      .num_ccu_clks   = ARRAY_SIZE(sun50i_a64_ccu_clks),
-+
-+      .hw_clks        = &sun50i_a64_hw_clks,
-+
-+      .resets         = sun50i_a64_ccu_resets,
-+      .num_resets     = ARRAY_SIZE(sun50i_a64_ccu_resets),
-+};
-+
-+static int sun50i_a64_ccu_probe(struct platform_device *pdev)
-+{
-+      struct resource *res;
-+      void __iomem *reg;
-+      u32 val;
-+
-+      res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+      reg = devm_ioremap_resource(&pdev->dev, res);
-+      if (IS_ERR(reg))
-+              return PTR_ERR(reg);
-+
-+      /* Force the PLL-Audio-1x divider to 4 */
-+      val = readl(reg + SUN50I_A64_PLL_AUDIO_REG);
-+      val &= ~GENMASK(19, 16);
-+      writel(val | (3 << 16), reg + SUN50I_A64_PLL_AUDIO_REG);
-+
-+      writel(0x515, reg + SUN50I_A64_PLL_MIPI_REG);
-+
-+      return sunxi_ccu_probe(pdev->dev.of_node, reg, &sun50i_a64_ccu_desc);
-+}
-+
-+static const struct of_device_id sun50i_a64_ccu_ids[] = {
-+      { .compatible = "allwinner,sun50i-a64-ccu" },
-+      { }
-+};
-+
-+static struct platform_driver sun50i_a64_ccu_driver = {
-+      .probe  = sun50i_a64_ccu_probe,
-+      .driver = {
-+              .name   = "sun50i-a64-ccu",
-+              .of_match_table = sun50i_a64_ccu_ids,
-+      },
-+};
-+builtin_platform_driver(sun50i_a64_ccu_driver);
---- /dev/null
-+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.h
-@@ -0,0 +1,72 @@
-+/*
-+ * Copyright 2016 Maxime Ripard
-+ *
-+ * Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#ifndef _CCU_SUN50I_A64_H_
-+#define _CCU_SUN50I_A64_H_
-+
-+#include <dt-bindings/clock/sun50i-a64-ccu.h>
-+#include <dt-bindings/reset/sun50i-a64-ccu.h>
-+
-+#define CLK_OSC_12M                   0
-+#define CLK_PLL_CPUX                  1
-+#define CLK_PLL_AUDIO_BASE            2
-+#define CLK_PLL_AUDIO                 3
-+#define CLK_PLL_AUDIO_2X              4
-+#define CLK_PLL_AUDIO_4X              5
-+#define CLK_PLL_AUDIO_8X              6
-+#define CLK_PLL_VIDEO0                        7
-+#define CLK_PLL_VIDEO0_2X             8
-+#define CLK_PLL_VE                    9
-+#define CLK_PLL_DDR0                  10
-+#define CLK_PLL_PERIPH0                       11
-+#define CLK_PLL_PERIPH0_2X            12
-+#define CLK_PLL_PERIPH1                       13
-+#define CLK_PLL_PERIPH1_2X            14
-+#define CLK_PLL_VIDEO1                        15
-+#define CLK_PLL_GPU                   16
-+#define CLK_PLL_MIPI                  17
-+#define CLK_PLL_HSIC                  18
-+#define CLK_PLL_DE                    19
-+#define CLK_PLL_DDR1                  20
-+#define CLK_CPUX                      21
-+#define CLK_AXI                               22
-+#define CLK_APB                               23
-+#define CLK_AHB1                      24
-+#define CLK_APB1                      25
-+#define CLK_APB2                      26
-+#define CLK_AHB2                      27
-+
-+/* All the bus gates are exported */
-+
-+/* The first bunch of module clocks are exported */
-+
-+#define CLK_USB_OHCI0_12M             90
-+
-+#define CLK_USB_OHCI1_12M             92
-+
-+#define CLK_DRAM                      94
-+
-+/* All the DRAM gates are exported */
-+
-+/* Some more module clocks are exported */
-+
-+#define CLK_MBUS                      112
-+
-+/* And the DSI and GPU module clock is exported */
-+
-+#define CLK_NUMBER                    (CLK_GPU + 1)
-+
-+#endif /* _CCU_SUN50I_A64_H_ */
---- /dev/null
-+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
-@@ -0,0 +1,134 @@
-+/*
-+ * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This file is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
-+#define _DT_BINDINGS_CLK_SUN50I_A64_H_
-+
-+#define CLK_BUS_MIPI_DSI      28
-+#define CLK_BUS_CE            29
-+#define CLK_BUS_DMA           30
-+#define CLK_BUS_MMC0          31
-+#define CLK_BUS_MMC1          32
-+#define CLK_BUS_MMC2          33
-+#define CLK_BUS_NAND          34
-+#define CLK_BUS_DRAM          35
-+#define CLK_BUS_EMAC          36
-+#define CLK_BUS_TS            37
-+#define CLK_BUS_HSTIMER               38
-+#define CLK_BUS_SPI0          39
-+#define CLK_BUS_SPI1          40
-+#define CLK_BUS_OTG           41
-+#define CLK_BUS_EHCI0         42
-+#define CLK_BUS_EHCI1         43
-+#define CLK_BUS_OHCI0         44
-+#define CLK_BUS_OHCI1         45
-+#define CLK_BUS_VE            46
-+#define CLK_BUS_TCON0         47
-+#define CLK_BUS_TCON1         48
-+#define CLK_BUS_DEINTERLACE   49
-+#define CLK_BUS_CSI           50
-+#define CLK_BUS_HDMI          51
-+#define CLK_BUS_DE            52
-+#define CLK_BUS_GPU           53
-+#define CLK_BUS_MSGBOX                54
-+#define CLK_BUS_SPINLOCK      55
-+#define CLK_BUS_CODEC         56
-+#define CLK_BUS_SPDIF         57
-+#define CLK_BUS_PIO           58
-+#define CLK_BUS_THS           59
-+#define CLK_BUS_I2S0          60
-+#define CLK_BUS_I2S1          61
-+#define CLK_BUS_I2S2          62
-+#define CLK_BUS_I2C0          63
-+#define CLK_BUS_I2C1          64
-+#define CLK_BUS_I2C2          65
-+#define CLK_BUS_SCR           66
-+#define CLK_BUS_UART0         67
-+#define CLK_BUS_UART1         68
-+#define CLK_BUS_UART2         69
-+#define CLK_BUS_UART3         70
-+#define CLK_BUS_UART4         71
-+#define CLK_BUS_DBG           72
-+#define CLK_THS                       73
-+#define CLK_NAND              74
-+#define CLK_MMC0              75
-+#define CLK_MMC1              76
-+#define CLK_MMC2              77
-+#define CLK_TS                        78
-+#define CLK_CE                        79
-+#define CLK_SPI0              80
-+#define CLK_SPI1              81
-+#define CLK_I2S0              82
-+#define CLK_I2S1              83
-+#define CLK_I2S2              84
-+#define CLK_SPDIF             85
-+#define CLK_USB_PHY0          86
-+#define CLK_USB_PHY1          87
-+#define CLK_USB_HSIC          88
-+#define CLK_USB_HSIC_12M      89
-+
-+#define CLK_USB_OHCI0         91
-+
-+#define CLK_USB_OHCI1         93
-+
-+#define CLK_DRAM_VE           95
-+#define CLK_DRAM_CSI          96
-+#define CLK_DRAM_DEINTERLACE  97
-+#define CLK_DRAM_TS           98
-+#define CLK_DE                        99
-+#define CLK_TCON0             100
-+#define CLK_TCON1             101
-+#define CLK_DEINTERLACE               102
-+#define CLK_CSI_MISC          103
-+#define CLK_CSI_SCLK          104
-+#define CLK_CSI_MCLK          105
-+#define CLK_VE                        106
-+#define CLK_AC_DIG            107
-+#define CLK_AC_DIG_4X         108
-+#define CLK_AVS                       109
-+#define CLK_HDMI              110
-+#define CLK_HDMI_DDC          111
-+
-+#define CLK_DSI_DPHY          113
-+#define CLK_GPU                       114
-+
-+#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */
---- /dev/null
-+++ b/include/dt-bindings/reset/sun50i-a64-ccu.h
-@@ -0,0 +1,98 @@
-+/*
-+ * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This file is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#ifndef _DT_BINDINGS_RST_SUN50I_A64_H_
-+#define _DT_BINDINGS_RST_SUN50I_A64_H_
-+
-+#define RST_USB_PHY0          0
-+#define RST_USB_PHY1          1
-+#define RST_USB_HSIC          2
-+#define RST_DRAM              3
-+#define RST_MBUS              4
-+#define RST_BUS_MIPI_DSI      5
-+#define RST_BUS_CE            6
-+#define RST_BUS_DMA           7
-+#define RST_BUS_MMC0          8
-+#define RST_BUS_MMC1          9
-+#define RST_BUS_MMC2          10
-+#define RST_BUS_NAND          11
-+#define RST_BUS_DRAM          12
-+#define RST_BUS_EMAC          13
-+#define RST_BUS_TS            14
-+#define RST_BUS_HSTIMER               15
-+#define RST_BUS_SPI0          16
-+#define RST_BUS_SPI1          17
-+#define RST_BUS_OTG           18
-+#define RST_BUS_EHCI0         19
-+#define RST_BUS_EHCI1         20
-+#define RST_BUS_OHCI0         21
-+#define RST_BUS_OHCI1         22
-+#define RST_BUS_VE            23
-+#define RST_BUS_TCON0         24
-+#define RST_BUS_TCON1         25
-+#define RST_BUS_DEINTERLACE   26
-+#define RST_BUS_CSI           27
-+#define RST_BUS_HDMI0         28
-+#define RST_BUS_HDMI1         29
-+#define RST_BUS_DE            30
-+#define RST_BUS_GPU           31
-+#define RST_BUS_MSGBOX                32
-+#define RST_BUS_SPINLOCK      33
-+#define RST_BUS_DBG           34
-+#define RST_BUS_LVDS          35
-+#define RST_BUS_CODEC         36
-+#define RST_BUS_SPDIF         37
-+#define RST_BUS_THS           38
-+#define RST_BUS_I2S0          39
-+#define RST_BUS_I2S1          40
-+#define RST_BUS_I2S2          41
-+#define RST_BUS_I2C0          42
-+#define RST_BUS_I2C1          43
-+#define RST_BUS_I2C2          44
-+#define RST_BUS_SCR           45
-+#define RST_BUS_UART0         46
-+#define RST_BUS_UART1         47
-+#define RST_BUS_UART2         48
-+#define RST_BUS_UART3         49
-+#define RST_BUS_UART4         50
-+
-+#endif /* _DT_BINDINGS_RST_SUN50I_A64_H_ */
diff --git a/target/linux/sunxi/patches-4.9/0010-arm64-dts-add-Allwinner-A64-SoC-.dtsi.patch b/target/linux/sunxi/patches-4.9/0010-arm64-dts-add-Allwinner-A64-SoC-.dtsi.patch
deleted file mode 100644 (file)
index eaaba96..0000000
+++ /dev/null
@@ -1,311 +0,0 @@
-From 6bc37fac30cf01c39feb17834090089304bd1d31 Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Mon, 18 Jan 2016 10:24:31 +0000
-Subject: arm64: dts: add Allwinner A64 SoC .dtsi
-
-The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
-and the typical tablet / TV box peripherals.
-The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
-the peripherals and the memory map.
-Although the cores are proper 64-bit ones, the whole SoC is actually
-limited to 4GB (including all the supported DRAM), so we use 32-bit
-address and size cells. This has the nice feature of us being able to
-reuse the DT for 32-bit kernels as well.
-This .dtsi lists the hardware that we support so far.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
-[Maxime: Convert to CCU binding, drop the MMC support for now]
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- Documentation/devicetree/bindings/arm/sunxi.txt |   1 +
- MAINTAINERS                                     |   1 +
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi   | 263 ++++++++++++++++++++++++
- 3 files changed, 265 insertions(+)
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-
---- a/Documentation/devicetree/bindings/arm/sunxi.txt
-+++ b/Documentation/devicetree/bindings/arm/sunxi.txt
-@@ -14,4 +14,5 @@ using one of the following compatible st
-   allwinner,sun8i-a83t
-   allwinner,sun8i-h3
-   allwinner,sun9i-a80
-+  allwinner,sun50i-a64
-   nextthing,gr8
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -1026,6 +1026,7 @@ L:       linux-arm-kernel@lists.infradead.org
- S:    Maintained
- N:    sun[x456789]i
- F:    arch/arm/boot/dts/ntc-gr8*
-+F:    arch/arm64/boot/dts/allwinner/
- ARM/Allwinner SoC Clock Support
- M:    Emilio L√≥pez <emilio@elopez.com.ar>
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -0,0 +1,263 @@
-+/*
-+ * Copyright (C) 2016 ARM Ltd.
-+ * based on the Allwinner H3 dtsi:
-+ *    Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This file is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#include <dt-bindings/clock/sun50i-a64-ccu.h>
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/pinctrl/sun4i-a10.h>
-+#include <dt-bindings/reset/sun50i-a64-ccu.h>
-+
-+/ {
-+      interrupt-parent = <&gic>;
-+      #address-cells = <1>;
-+      #size-cells = <1>;
-+
-+      cpus {
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+
-+              cpu0: cpu@0 {
-+                      compatible = "arm,cortex-a53", "arm,armv8";
-+                      device_type = "cpu";
-+                      reg = <0>;
-+                      enable-method = "psci";
-+              };
-+
-+              cpu1: cpu@1 {
-+                      compatible = "arm,cortex-a53", "arm,armv8";
-+                      device_type = "cpu";
-+                      reg = <1>;
-+                      enable-method = "psci";
-+              };
-+
-+              cpu2: cpu@2 {
-+                      compatible = "arm,cortex-a53", "arm,armv8";
-+                      device_type = "cpu";
-+                      reg = <2>;
-+                      enable-method = "psci";
-+              };
-+
-+              cpu3: cpu@3 {
-+                      compatible = "arm,cortex-a53", "arm,armv8";
-+                      device_type = "cpu";
-+                      reg = <3>;
-+                      enable-method = "psci";
-+              };
-+      };
-+
-+      osc24M: osc24M_clk {
-+              #clock-cells = <0>;
-+              compatible = "fixed-clock";
-+              clock-frequency = <24000000>;
-+              clock-output-names = "osc24M";
-+      };
-+
-+      osc32k: osc32k_clk {
-+              #clock-cells = <0>;
-+              compatible = "fixed-clock";
-+              clock-frequency = <32768>;
-+              clock-output-names = "osc32k";
-+      };
-+
-+      psci {
-+              compatible = "arm,psci-0.2";
-+              method = "smc";
-+      };
-+
-+      timer {
-+              compatible = "arm,armv8-timer";
-+              interrupts = <GIC_PPI 13
-+                      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+                           <GIC_PPI 14
-+                      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+                           <GIC_PPI 11
-+                      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
-+                           <GIC_PPI 10
-+                      (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+      };
-+
-+      soc {
-+              compatible = "simple-bus";
-+              #address-cells = <1>;
-+              #size-cells = <1>;
-+              ranges;
-+
-+              ccu: clock@01c20000 {
-+                      compatible = "allwinner,sun50i-a64-ccu";
-+                      reg = <0x01c20000 0x400>;
-+                      clocks = <&osc24M>, <&osc32k>;
-+                      clock-names = "hosc", "losc";
-+                      #clock-cells = <1>;
-+                      #reset-cells = <1>;
-+              };
-+
-+              pio: pinctrl@1c20800 {
-+                      compatible = "allwinner,sun50i-a64-pinctrl";
-+                      reg = <0x01c20800 0x400>;
-+                      interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-+                                   <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
-+                                   <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&ccu CLK_BUS_PIO>;
-+                      gpio-controller;
-+                      #gpio-cells = <3>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <3>;
-+
-+                      i2c1_pins: i2c1_pins {
-+                              pins = "PH2", "PH3";
-+                              function = "i2c1";
-+                      };
-+
-+                      uart0_pins_a: uart0@0 {
-+                              pins = "PB8", "PB9";
-+                              function = "uart0";
-+                      };
-+              };
-+
-+              uart0: serial@1c28000 {
-+                      compatible = "snps,dw-apb-uart";
-+                      reg = <0x01c28000 0x400>;
-+                      interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
-+                      reg-shift = <2>;
-+                      reg-io-width = <4>;
-+                      clocks = <&ccu CLK_BUS_UART0>;
-+                      resets = <&ccu RST_BUS_UART0>;
-+                      status = "disabled";
-+              };
-+
-+              uart1: serial@1c28400 {
-+                      compatible = "snps,dw-apb-uart";
-+                      reg = <0x01c28400 0x400>;
-+                      interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-+                      reg-shift = <2>;
-+                      reg-io-width = <4>;
-+                      clocks = <&ccu CLK_BUS_UART1>;
-+                      resets = <&ccu RST_BUS_UART1>;
-+                      status = "disabled";
-+              };
-+
-+              uart2: serial@1c28800 {
-+                      compatible = "snps,dw-apb-uart";
-+                      reg = <0x01c28800 0x400>;
-+                      interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-+                      reg-shift = <2>;
-+                      reg-io-width = <4>;
-+                      clocks = <&ccu CLK_BUS_UART2>;
-+                      resets = <&ccu RST_BUS_UART2>;
-+                      status = "disabled";
-+              };
-+
-+              uart3: serial@1c28c00 {
-+                      compatible = "snps,dw-apb-uart";
-+                      reg = <0x01c28c00 0x400>;
-+                      interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-+                      reg-shift = <2>;
-+                      reg-io-width = <4>;
-+                      clocks = <&ccu CLK_BUS_UART3>;
-+                      resets = <&ccu RST_BUS_UART3>;
-+                      status = "disabled";
-+              };
-+
-+              uart4: serial@1c29000 {
-+                      compatible = "snps,dw-apb-uart";
-+                      reg = <0x01c29000 0x400>;
-+                      interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-+                      reg-shift = <2>;
-+                      reg-io-width = <4>;
-+                      clocks = <&ccu CLK_BUS_UART4>;
-+                      resets = <&ccu RST_BUS_UART4>;
-+                      status = "disabled";
-+              };
-+
-+              i2c0: i2c@1c2ac00 {
-+                      compatible = "allwinner,sun6i-a31-i2c";
-+                      reg = <0x01c2ac00 0x400>;
-+                      interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&ccu CLK_BUS_I2C0>;
-+                      resets = <&ccu RST_BUS_I2C0>;
-+                      status = "disabled";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+              };
-+
-+              i2c1: i2c@1c2b000 {
-+                      compatible = "allwinner,sun6i-a31-i2c";
-+                      reg = <0x01c2b000 0x400>;
-+                      interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&ccu CLK_BUS_I2C1>;
-+                      resets = <&ccu RST_BUS_I2C1>;
-+                      status = "disabled";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+              };
-+
-+              i2c2: i2c@1c2b400 {
-+                      compatible = "allwinner,sun6i-a31-i2c";
-+                      reg = <0x01c2b400 0x400>;
-+                      interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&ccu CLK_BUS_I2C2>;
-+                      resets = <&ccu RST_BUS_I2C2>;
-+                      status = "disabled";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+              };
-+
-+              gic: interrupt-controller@1c81000 {
-+                      compatible = "arm,gic-400";
-+                      reg = <0x01c81000 0x1000>,
-+                            <0x01c82000 0x2000>,
-+                            <0x01c84000 0x2000>,
-+                            <0x01c86000 0x2000>;
-+                      interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <3>;
-+              };
-+
-+              rtc: rtc@1f00000 {
-+                      compatible = "allwinner,sun6i-a31-rtc";
-+                      reg = <0x01f00000 0x54>;
-+                      interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-+                                   <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-+              };
-+      };
-+};
diff --git a/target/linux/sunxi/patches-4.9/0011-arm64-dts-add-Pine64-support.patch b/target/linux/sunxi/patches-4.9/0011-arm64-dts-add-Pine64-support.patch
deleted file mode 100644 (file)
index 9960588..0000000
+++ /dev/null
@@ -1,176 +0,0 @@
-From 4e3886081848b7ea16452a92c4324acaab644d49 Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Tue, 19 Jan 2016 10:36:39 +0000
-Subject: arm64: dts: add Pine64 support
-
-The Pine64 is a cost-efficient development board based on the
-Allwinner A64 SoC.
-There are three models: the basic version with Fast Ethernet and
-512 MB of DRAM (Pine64) and two Pine64+ versions, which both
-feature Gigabit Ethernet and additional connectors for touchscreens
-and a camera. Or as my son put it: "Those are smaller and these are
-missing." ;-)
-The two Pine64+ models just differ in the amount of DRAM
-(1GB vs. 2GB). Since U-Boot will figure out the right size for us and
-patches the DT accordingly we just need to provide one DT for the
-Pine64+.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-[Maxime: Removed the common DTSI and include directly the pine64 DTS]
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/Makefile                       |  1 +
- arch/arm64/boot/dts/allwinner/Makefile             |  5 ++
- .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  | 50 +++++++++++++++
- .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 74 ++++++++++++++++++++++
- 4 files changed, 130 insertions(+)
- create mode 100644 arch/arm64/boot/dts/allwinner/Makefile
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-
---- a/arch/arm64/boot/dts/Makefile
-+++ b/arch/arm64/boot/dts/Makefile
-@@ -1,4 +1,5 @@
- dts-dirs += al
-+dts-dirs += allwinner
- dts-dirs += altera
- dts-dirs += amd
- dts-dirs += amlogic
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/Makefile
-@@ -0,0 +1,5 @@
-+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
-+
-+always                := $(dtb-y)
-+subdir-y      := $(dts-dirs)
-+clean-files   := *.dtb
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-@@ -0,0 +1,50 @@
-+/*
-+ * Copyright (c) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This library is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This library is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#include "sun50i-a64-pine64.dts"
-+
-+/ {
-+      model = "Pine64+";
-+      compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
-+
-+      /* TODO: Camera, Ethernet PHY, touchscreen, etc. */
-+};
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -0,0 +1,74 @@
-+/*
-+ * Copyright (c) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This library is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This library is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+
-+#include "sun50i-a64.dtsi"
-+
-+/ {
-+      model = "Pine64";
-+      compatible = "pine64,pine64", "allwinner,sun50i-a64";
-+
-+      aliases {
-+              serial0 = &uart0;
-+      };
-+
-+      chosen {
-+              stdout-path = "serial0:115200n8";
-+      };
-+};
-+
-+&uart0 {
-+      pinctrl-names = "default";
-+      pinctrl-0 = <&uart0_pins_a>;
-+      status = "okay";
-+};
-+
-+&i2c1 {
-+      pinctrl-names = "default";
-+      pinctrl-0 = <&i2c1_pins>;
-+      status = "okay";
-+};
-+
-+&i2c1_pins {
-+      bias-pull-up;
-+};
diff --git a/target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch b/target/linux/sunxi/patches-4.9/0012-arm64-dts-fix-build-errors-from-missing-dependencies.patch
deleted file mode 100644 (file)
index 1719b68..0000000
+++ /dev/null
@@ -1,134 +0,0 @@
-From f98121f3ef3d36f4d040b11ab38f15387f6eefa2 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Wed, 30 Nov 2016 15:08:55 +0100
-Subject: arm64: dts: fix build errors from missing dependencies
-
-Two branches were incorrectly sent without having the necessary
-header file changes. Rather than back those out now, I'm replacing
-the symbolic names for the clks and resets with the numeric
-values to get 'make allmodconfig dtbs' back to work.
-
-After the header file changes are merged, we can revert this
-patch.
-
-Fixes: 6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi")
-Fixes: 50784e6 ("dts: arm64: db820c: add pmic pins specific dts file")
-Acked-by: Andre Przywara <andre.przywara@arm.com>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      | 36 ++++++++++------------
- .../boot/dts/qcom/apq8096-db820c-pmic-pins.dtsi    |  2 +-
- 2 files changed, 18 insertions(+), 20 deletions(-)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -42,10 +42,8 @@
-  *     OTHER DEALINGS IN THE SOFTWARE.
-  */
--#include <dt-bindings/clock/sun50i-a64-ccu.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/pinctrl/sun4i-a10.h>
--#include <dt-bindings/reset/sun50i-a64-ccu.h>
- / {
-       interrupt-parent = <&gic>;
-@@ -137,7 +135,7 @@
-                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
--                      clocks = <&ccu CLK_BUS_PIO>;
-+                      clocks = <&ccu 58>;
-                       gpio-controller;
-                       #gpio-cells = <3>;
-                       interrupt-controller;
-@@ -160,8 +158,8 @@
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
--                      clocks = <&ccu CLK_BUS_UART0>;
--                      resets = <&ccu RST_BUS_UART0>;
-+                      clocks = <&ccu 67>;
-+                      resets = <&ccu 46>;
-                       status = "disabled";
-               };
-@@ -171,8 +169,8 @@
-                       interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
--                      clocks = <&ccu CLK_BUS_UART1>;
--                      resets = <&ccu RST_BUS_UART1>;
-+                      clocks = <&ccu 68>;
-+                      resets = <&ccu 47>;
-                       status = "disabled";
-               };
-@@ -182,8 +180,8 @@
-                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
--                      clocks = <&ccu CLK_BUS_UART2>;
--                      resets = <&ccu RST_BUS_UART2>;
-+                      clocks = <&ccu 69>;
-+                      resets = <&ccu 48>;
-                       status = "disabled";
-               };
-@@ -193,8 +191,8 @@
-                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
--                      clocks = <&ccu CLK_BUS_UART3>;
--                      resets = <&ccu RST_BUS_UART3>;
-+                      clocks = <&ccu 70>;
-+                      resets = <&ccu 49>;
-                       status = "disabled";
-               };
-@@ -204,8 +202,8 @@
-                       interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
--                      clocks = <&ccu CLK_BUS_UART4>;
--                      resets = <&ccu RST_BUS_UART4>;
-+                      clocks = <&ccu 71>;
-+                      resets = <&ccu 50>;
-                       status = "disabled";
-               };
-@@ -213,8 +211,8 @@
-                       compatible = "allwinner,sun6i-a31-i2c";
-                       reg = <0x01c2ac00 0x400>;
-                       interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
--                      clocks = <&ccu CLK_BUS_I2C0>;
--                      resets = <&ccu RST_BUS_I2C0>;
-+                      clocks = <&ccu 63>;
-+                      resets = <&ccu 42>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-@@ -224,8 +222,8 @@
-                       compatible = "allwinner,sun6i-a31-i2c";
-                       reg = <0x01c2b000 0x400>;
-                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
--                      clocks = <&ccu CLK_BUS_I2C1>;
--                      resets = <&ccu RST_BUS_I2C1>;
-+                      clocks = <&ccu 64>;
-+                      resets = <&ccu 43>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-@@ -235,8 +233,8 @@
-                       compatible = "allwinner,sun6i-a31-i2c";
-                       reg = <0x01c2b400 0x400>;
-                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
--                      clocks = <&ccu CLK_BUS_I2C2>;
--                      resets = <&ccu RST_BUS_I2C2>;
-+                      clocks = <&ccu 65>;
-+                      resets = <&ccu 44>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
diff --git a/target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch b/target/linux/sunxi/patches-4.9/0013-arm64-dts-allwinner-add-USB1-related-nodes-of-Allwin.patch
deleted file mode 100644 (file)
index f96570c..0000000
+++ /dev/null
@@ -1,84 +0,0 @@
-From a004ee350177ece3c059831ea49293d62aea7ca6 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.xyz>
-Date: Tue, 22 Nov 2016 23:58:29 +0800
-Subject: arm64: dts: allwinner: add USB1-related nodes of Allwinner A64
-
-Allwinner A64 have two HCI USB controllers, a OTG controller and a USB
-PHY device which have two ports. One of the port is wired to both a HCI
-USB controller and the OTG controller, which is currently not supported.
-The another one is only wired to a HCI controller, and the device node of
-OHCI/EHCI controller of the port can be added now.
-
-Also the A64 USB PHY device node is also added for the HCI controllers to
-work.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 46 +++++++++++++++++++++++++++
- 1 file changed, 46 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -42,8 +42,10 @@
-  *     OTHER DEALINGS IN THE SOFTWARE.
-  */
-+#include <dt-bindings/clock/sun50i-a64-ccu.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/pinctrl/sun4i-a10.h>
-+#include <dt-bindings/reset/sun50i-a64-ccu.h>
- / {
-       interrupt-parent = <&gic>;
-@@ -120,6 +122,50 @@
-               #size-cells = <1>;
-               ranges;
-+              usbphy: phy@01c19400 {
-+                      compatible = "allwinner,sun50i-a64-usb-phy";
-+                      reg = <0x01c19400 0x14>,
-+                            <0x01c1b800 0x4>;
-+                      reg-names = "phy_ctrl",
-+                                  "pmu1";
-+                      clocks = <&ccu CLK_USB_PHY0>,
-+                               <&ccu CLK_USB_PHY1>;
-+                      clock-names = "usb0_phy",
-+                                    "usb1_phy";
-+                      resets = <&ccu RST_USB_PHY0>,
-+                               <&ccu RST_USB_PHY1>;
-+                      reset-names = "usb0_reset",
-+                                    "usb1_reset";
-+                      status = "disabled";
-+                      #phy-cells = <1>;
-+              };
-+
-+              ehci1: usb@01c1b000 {
-+                      compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
-+                      reg = <0x01c1b000 0x100>;
-+                      interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&ccu CLK_BUS_OHCI1>,
-+                               <&ccu CLK_BUS_EHCI1>,
-+                               <&ccu CLK_USB_OHCI1>;
-+                      resets = <&ccu RST_BUS_OHCI1>,
-+                               <&ccu RST_BUS_EHCI1>;
-+                      phys = <&usbphy 1>;
-+                      phy-names = "usb";
-+                      status = "disabled";
-+              };
-+
-+              ohci1: usb@01c1b400 {
-+                      compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
-+                      reg = <0x01c1b400 0x100>;
-+                      interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&ccu CLK_BUS_OHCI1>,
-+                               <&ccu CLK_USB_OHCI1>;
-+                      resets = <&ccu RST_BUS_OHCI1>;
-+                      phys = <&usbphy 1>;
-+                      phy-names = "usb";
-+                      status = "disabled";
-+              };
-+
-               ccu: clock@01c20000 {
-                       compatible = "allwinner,sun50i-a64-ccu";
-                       reg = <0x01c20000 0x400>;
diff --git a/target/linux/sunxi/patches-4.9/0014-arm64-dts-allwinner-sort-the-nodes-in-sun50i-a64-pin.patch b/target/linux/sunxi/patches-4.9/0014-arm64-dts-allwinner-sort-the-nodes-in-sun50i-a64-pin.patch
deleted file mode 100644 (file)
index 4c7d6da..0000000
+++ /dev/null
@@ -1,40 +0,0 @@
-From ac93c09cdbaf1229c21f67a5db1c3c6df7d503e5 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.xyz>
-Date: Tue, 22 Nov 2016 23:58:30 +0800
-Subject: arm64: dts: allwinner: sort the nodes in sun50i-a64-pine64.dts
-
-In this dts file, uart0 node is put before i2c1.
-
-Move the uart0 node to the end to satisfy alphebetical order.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -57,12 +57,6 @@
-       };
- };
--&uart0 {
--      pinctrl-names = "default";
--      pinctrl-0 = <&uart0_pins_a>;
--      status = "okay";
--};
--
- &i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c1_pins>;
-@@ -72,3 +66,9 @@
- &i2c1_pins {
-       bias-pull-up;
- };
-+
-+&uart0 {
-+      pinctrl-names = "default";
-+      pinctrl-0 = <&uart0_pins_a>;
-+      status = "okay";
-+};
diff --git a/target/linux/sunxi/patches-4.9/0015-arm64-dts-allwinner-enable-EHCI1-OHCI1-and-USB-PHY-n.patch b/target/linux/sunxi/patches-4.9/0015-arm64-dts-allwinner-enable-EHCI1-OHCI1-and-USB-PHY-n.patch
deleted file mode 100644 (file)
index 451ec59..0000000
+++ /dev/null
@@ -1,47 +0,0 @@
-From d49f9dbc8f0c4521fa56477d051a3bd1158f2595 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.xyz>
-Date: Tue, 22 Nov 2016 23:58:31 +0800
-Subject: arm64: dts: allwinner: enable EHCI1, OHCI1 and USB PHY nodes in
- Pine64
-
-Pine64 have two USB Type-A ports, which are wired to the two ports of
-A64 USB PHY, and the lower port is the EHCI/OHCI1 port.
-
-Enable the necessary nodes to enable the lower USB port to work.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -57,6 +57,10 @@
-       };
- };
-+&ehci1 {
-+      status = "okay";
-+};
-+
- &i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c1_pins>;
-@@ -67,8 +71,16 @@
-       bias-pull-up;
- };
-+&ohci1 {
-+      status = "okay";
-+};
-+
- &uart0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
-       status = "okay";
- };
-+
-+&usbphy {
-+      status = "okay";
-+};
diff --git a/target/linux/sunxi/patches-4.9/0016-arm64-dts-add-MUSB-node-to-Allwinner-A64-dtsi.patch b/target/linux/sunxi/patches-4.9/0016-arm64-dts-add-MUSB-node-to-Allwinner-A64-dtsi.patch
deleted file mode 100644 (file)
index 804d005..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From 972a3ecdf27f3ebdd1ce0dccd1b548ef3c04b8ed Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.xyz>
-Date: Wed, 23 Nov 2016 00:59:01 +0800
-Subject: arm64: dts: add MUSB node to Allwinner A64 dtsi
-
-Allwinner A64 SoC has a MUSB controller like the one in A33, so add
-a node for it, just use the compatible of A33 MUSB.
-
-Host mode is tested to work properly on Pine64 and will be added into
-the device tree of Pine64 in next patch.
-
-Peripheral mode is also tested on Pine64, by changing dr_mode property
-of usb_otg node and use a non-standard USB Type-A to Type-A cable.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -122,6 +122,19 @@
-               #size-cells = <1>;
-               ranges;
-+              usb_otg: usb@01c19000 {
-+                      compatible = "allwinner,sun8i-a33-musb";
-+                      reg = <0x01c19000 0x0400>;
-+                      clocks = <&ccu CLK_BUS_OTG>;
-+                      resets = <&ccu RST_BUS_OTG>;
-+                      interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-+                      interrupt-names = "mc";
-+                      phys = <&usbphy 0>;
-+                      phy-names = "usb";
-+                      extcon = <&usbphy 0>;
-+                      status = "disabled";
-+              };
-+
-               usbphy: phy@01c19400 {
-                       compatible = "allwinner,sun50i-a64-usb-phy";
-                       reg = <0x01c19400 0x14>,
diff --git a/target/linux/sunxi/patches-4.9/0017-arm64-dts-enable-the-MUSB-controller-of-Pine64-in-ho.patch b/target/linux/sunxi/patches-4.9/0017-arm64-dts-enable-the-MUSB-controller-of-Pine64-in-ho.patch
deleted file mode 100644 (file)
index 3992ab6..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-From f57e8384c5d2417fd8707c577d8e622fc1570b6c Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.xyz>
-Date: Wed, 23 Nov 2016 00:59:02 +0800
-Subject: arm64: dts: enable the MUSB controller of Pine64 in host-only mode
-
-A64 has a MUSB controller wired to the USB PHY 0, which is connected
-to the upper USB Type-A port of Pine64.
-
-As the port is a Type-A female port, enable it in host-only mode in the
-device tree, which makes devices with USB Type-A male port can work on
-this port (which is originally designed by Pine64 team).
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -81,6 +81,11 @@
-       status = "okay";
- };
-+&usb_otg {
-+      dr_mode = "host";
-+      status = "okay";
-+};
-+
- &usbphy {
-       status = "okay";
- };
diff --git a/target/linux/sunxi/patches-4.9/0018-arm64-dts-allwinner-Remove-no-longer-used-pinctrl-su.patch b/target/linux/sunxi/patches-4.9/0018-arm64-dts-allwinner-Remove-no-longer-used-pinctrl-su.patch
deleted file mode 100644 (file)
index d2d54e9..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 4f9758302ccaf753cd4ba6a5eb740392a4d24773 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Tue, 24 Jan 2017 10:32:29 +0800
-Subject: arm64: dts: allwinner: Remove no longer used pinctrl/sun4i-a10.h
- header
-
-All dts files for the sunxi platform have been switched to the generic
-pinconf bindings. As a result, the sunxi specific pinctrl macros are
-no longer used.
-
-Remove the #include entry with the following command:
-
-    sed -i -e '/pinctrl\/sun4i-a10.h/D' \
-       arch/arm64/boot/dts/allwinner/*.dts?
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -44,7 +44,6 @@
- #include <dt-bindings/clock/sun50i-a64-ccu.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
--#include <dt-bindings/pinctrl/sun4i-a10.h>
- #include <dt-bindings/reset/sun50i-a64-ccu.h>
- / {
diff --git a/target/linux/sunxi/patches-4.9/0019-arm64-allwinner-a64-Add-MMC-nodes.patch b/target/linux/sunxi/patches-4.9/0019-arm64-allwinner-a64-Add-MMC-nodes.patch
deleted file mode 100644 (file)
index 1f91e9b..0000000
+++ /dev/null
@@ -1,69 +0,0 @@
-From f3dff3478a8a7b09f9a92023955a151584658893 Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Thu, 6 Oct 2016 02:25:22 +0100
-Subject: arm64: allwinner: a64: Add MMC nodes
-
-The A64 has 3 MMC controllers, one of them being especially targeted to
-eMMC. Among other things, it has a data strobe signal and a 8 bits data
-width.
-
-The two other are more usual controllers that will have a 4 bits width at
-most and no data strobe signal, which limits it to more usual SD or MMC
-peripherals.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 39 +++++++++++++++++++++++++++
- 1 file changed, 39 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -121,6 +121,45 @@
-               #size-cells = <1>;
-               ranges;
-+              mmc0: mmc@1c0f000 {
-+                      compatible = "allwinner,sun50i-a64-mmc";
-+                      reg = <0x01c0f000 0x1000>;
-+                      clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
-+                      clock-names = "ahb", "mmc";
-+                      resets = <&ccu RST_BUS_MMC0>;
-+                      reset-names = "ahb";
-+                      interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
-+                      status = "disabled";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+              };
-+
-+              mmc1: mmc@1c10000 {
-+                      compatible = "allwinner,sun50i-a64-mmc";
-+                      reg = <0x01c10000 0x1000>;
-+                      clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
-+                      clock-names = "ahb", "mmc";
-+                      resets = <&ccu RST_BUS_MMC1>;
-+                      reset-names = "ahb";
-+                      interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
-+                      status = "disabled";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+              };
-+
-+              mmc2: mmc@1c11000 {
-+                      compatible = "allwinner,sun50i-a64-emmc";
-+                      reg = <0x01c11000 0x1000>;
-+                      clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
-+                      clock-names = "ahb", "mmc";
-+                      resets = <&ccu RST_BUS_MMC2>;
-+                      reset-names = "ahb";
-+                      interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-+                      status = "disabled";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+              };
-+
-               usb_otg: usb@01c19000 {
-                       compatible = "allwinner,sun8i-a33-musb";
-                       reg = <0x01c19000 0x0400>;
diff --git a/target/linux/sunxi/patches-4.9/0020-arm64-allwinner-a64-Add-MMC-pinctrl-nodes.patch b/target/linux/sunxi/patches-4.9/0020-arm64-allwinner-a64-Add-MMC-pinctrl-nodes.patch
deleted file mode 100644 (file)
index f5af0f8..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-From a3e8f4926248b3c12933aacec4432e9b6de004bb Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Mon, 9 Jan 2017 16:39:15 +0100
-Subject: arm64: allwinner: a64: Add MMC pinctrl nodes
-
-The A64 only has a single set of pins for each MMC controller. Since we
-already have boards that require all of them, let's add them to the DTSI.
-
-Reviewed-by: Andre Przywara <andre.przywara@arm.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -243,6 +243,31 @@
-                               function = "i2c1";
-                       };
-+                      mmc0_pins: mmc0-pins {
-+                              pins = "PF0", "PF1", "PF2", "PF3",
-+                                     "PF4", "PF5";
-+                              function = "mmc0";
-+                              drive-strength = <30>;
-+                              bias-pull-up;
-+                      };
-+
-+                      mmc1_pins: mmc1-pins {
-+                              pins = "PG0", "PG1", "PG2", "PG3",
-+                                     "PG4", "PG5";
-+                              function = "mmc1";
-+                              drive-strength = <30>;
-+                              bias-pull-up;
-+                      };
-+
-+                      mmc2_pins: mmc2-pins {
-+                              pins = "PC1", "PC5", "PC6", "PC8", "PC9",
-+                                     "PC10","PC11", "PC12", "PC13",
-+                                     "PC14", "PC15", "PC16";
-+                              function = "mmc2";
-+                              drive-strength = <30>;
-+                              bias-pull-up;
-+                      };
-+
-                       uart0_pins_a: uart0@0 {
-                               pins = "PB8", "PB9";
-                               function = "uart0";
diff --git a/target/linux/sunxi/patches-4.9/0022-arm64-allwinner-pine64-add-MMC-support.patch b/target/linux/sunxi/patches-4.9/0022-arm64-allwinner-pine64-add-MMC-support.patch
deleted file mode 100644 (file)
index c60e510..0000000
+++ /dev/null
@@ -1,62 +0,0 @@
-From ebe3ae29c6314217edf40d9ee23c36d610ff0fb8 Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Tue, 10 Jan 2017 01:22:31 +0000
-Subject: arm64: allwinner: pine64: add MMC support
-
-All Pine64 boards connect an micro-SD card slot to the first MMC
-controller.
-Enable the respective DT node and specify the (always-on) regulator
-and card-detect pin.
-As a micro-SD slot does not feature a write-protect switch, we disable
-this feature.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -44,6 +44,8 @@
- #include "sun50i-a64.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+
- / {
-       model = "Pine64";
-       compatible = "pine64,pine64", "allwinner,sun50i-a64";
-@@ -55,6 +57,13 @@
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-+
-+      reg_vcc3v3: vcc3v3 {
-+              compatible = "regulator-fixed";
-+              regulator-name = "vcc3v3";
-+              regulator-min-microvolt = <3300000>;
-+              regulator-max-microvolt = <3300000>;
-+      };
- };
- &ehci1 {
-@@ -71,6 +80,17 @@
-       bias-pull-up;
- };
-+&mmc0 {
-+      pinctrl-names = "default";
-+      pinctrl-0 = <&mmc0_pins>;
-+      vmmc-supply = <&reg_vcc3v3>;
-+      cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
-+      cd-inverted;
-+      disable-wp;
-+      bus-width = <4>;
-+      status = "okay";
-+};
-+
- &ohci1 {
-       status = "okay";
- };
diff --git a/target/linux/sunxi/patches-4.9/0023-arm64-allwinner-a64-add-UART1-pin-nodes.patch b/target/linux/sunxi/patches-4.9/0023-arm64-allwinner-a64-add-UART1-pin-nodes.patch
deleted file mode 100644 (file)
index 998d514..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-From e7ba733d32cc9487b62b07219ad911c77764a681 Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Tue, 10 Jan 2017 01:22:32 +0000
-Subject: arm64: allwinner: a64: add UART1 pin nodes
-
-On many boards UART1 connects to a Bluetooth chip, so add the pinctrl
-nodes for the only pins providing access to that UART. That includes
-those pins for hardware flow control (RTS/CTS).
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -272,6 +272,16 @@
-                               pins = "PB8", "PB9";
-                               function = "uart0";
-                       };
-+
-+                      uart1_pins: uart1_pins {
-+                              pins = "PG6", "PG7";
-+                              function = "uart1";
-+                      };
-+
-+                      uart1_rts_cts_pins: uart1_rts_cts_pins {
-+                              pins = "PG8", "PG9";
-+                              function = "uart1";
-+                      };
-               };
-               uart0: serial@1c28000 {
diff --git a/target/linux/sunxi/patches-4.9/0024-arm64-allwinner-a64-add-r_ccu-node.patch b/target/linux/sunxi/patches-4.9/0024-arm64-allwinner-a64-add-r_ccu-node.patch
deleted file mode 100644 (file)
index 19a3589..0000000
+++ /dev/null
@@ -1,52 +0,0 @@
-From 791a9e001d3ba3b552888b0bf3c592a50b71f57e Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.xyz>
-Date: Tue, 4 Apr 2017 17:50:58 +0800
-Subject: arm64: allwinner: a64: add r_ccu node
-
-A64 SoC have a CCU (r_ccu) in PRCM block.
-
-Add the device node for it.
-
-The mux 3 of R_CCU is an internal oscillator, which is 16MHz according
-to the user manual, and has only 30% accuracy based on our experience
-on older SoCs. The real mesaured value of it on two Pine64 boards is
-around 11MHz, which is around 70% of 16MHz.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -98,6 +98,14 @@
-               clock-output-names = "osc32k";
-       };
-+      iosc: internal-osc-clk {
-+              #clock-cells = <0>;
-+              compatible = "fixed-clock";
-+              clock-frequency = <16000000>;
-+              clock-accuracy = <300000000>;
-+              clock-output-names = "iosc";
-+      };
-+
-       psci {
-               compatible = "arm,psci-0.2";
-               method = "smc";
-@@ -389,5 +397,14 @@
-                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-               };
-+
-+              r_ccu: clock@1f01400 {
-+                      compatible = "allwinner,sun50i-a64-r-ccu";
-+                      reg = <0x01f01400 0x100>;
-+                      clocks = <&osc24M>, <&osc32k>, <&iosc>;
-+                      clock-names = "hosc", "losc", "iosc";
-+                      #clock-cells = <1>;
-+                      #reset-cells = <1>;
-+              };
-       };
- };
diff --git a/target/linux/sunxi/patches-4.9/0025-arm64-allwinner-a64-add-R_PIO-pinctrl-node.patch b/target/linux/sunxi/patches-4.9/0025-arm64-allwinner-a64-add-R_PIO-pinctrl-node.patch
deleted file mode 100644 (file)
index ff541ce..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-From ec4279053a6434f685246e022be95d2a62f8c608 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.xyz>
-Date: Tue, 4 Apr 2017 17:51:00 +0800
-Subject: arm64: allwinner: a64: add R_PIO pinctrl node
-
-Allwinner A64 have a dedicated pin controller to manage the PL pin bank.
-As the driver and the required clock support are added, add the device
-node for it.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -406,5 +406,17 @@
-                       #clock-cells = <1>;
-                       #reset-cells = <1>;
-               };
-+
-+              r_pio: pinctrl@01f02c00 {
-+                      compatible = "allwinner,sun50i-a64-r-pinctrl";
-+                      reg = <0x01f02c00 0x400>;
-+                      interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-+                      clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>;
-+                      clock-names = "apb", "hosc", "losc";
-+                      gpio-controller;
-+                      #gpio-cells = <3>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <3>;
-+              };
-       };
- };
diff --git a/target/linux/sunxi/patches-4.9/0026-arm64-allwinner-a64-add-pmu0-regs-for-USB-PHY.patch b/target/linux/sunxi/patches-4.9/0026-arm64-allwinner-a64-add-pmu0-regs-for-USB-PHY.patch
deleted file mode 100644 (file)
index 0d78037..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-From 0d98479738b950e30bb4f782d60099d44076ad67 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy@aosc.io>
-Date: Wed, 5 Apr 2017 22:30:34 +0800
-Subject: arm64: allwinner: a64: add pmu0 regs for USB PHY
-
-The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI
-controller pair that can be connected to the PHY0.
-
-Add the MMIO region for PHY node.
-
-Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -184,8 +184,10 @@
-               usbphy: phy@01c19400 {
-                       compatible = "allwinner,sun50i-a64-usb-phy";
-                       reg = <0x01c19400 0x14>,
-+                            <0x01c1a800 0x4>,
-                             <0x01c1b800 0x4>;
-                       reg-names = "phy_ctrl",
-+                                  "pmu0",
-                                   "pmu1";
-                       clocks = <&ccu CLK_USB_PHY0>,
-                                <&ccu CLK_USB_PHY1>;
diff --git a/target/linux/sunxi/patches-4.9/0027-arm64-allwinner-a64-Add-PLL_PERIPH0-clock-to-the-R_C.patch b/target/linux/sunxi/patches-4.9/0027-arm64-allwinner-a64-Add-PLL_PERIPH0-clock-to-the-R_C.patch
deleted file mode 100644 (file)
index 319dba6..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-From f74994a94063bc85ac1d6ad677ed06b5279c101f Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Wed, 31 May 2017 15:58:24 +0800
-Subject: arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU
-
-The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
-its parents.
-
-This adds the reference in the device tree describing this relationship.
-This patch uses a raw number for the clock index to ease merging by
-avoiding cross tree dependencies.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -403,8 +403,9 @@
-               r_ccu: clock@1f01400 {
-                       compatible = "allwinner,sun50i-a64-r-ccu";
-                       reg = <0x01f01400 0x100>;
--                      clocks = <&osc24M>, <&osc32k>, <&iosc>;
--                      clock-names = "hosc", "losc", "iosc";
-+                      clocks = <&osc24M>, <&osc32k>, <&iosc>,
-+                               <&ccu 11>;
-+                      clock-names = "hosc", "losc", "iosc", "pll-periph";
-                       #clock-cells = <1>;
-                       #reset-cells = <1>;
-               };
diff --git a/target/linux/sunxi/patches-4.9/0030-pinctrl-sunxi-Rework-the-pin-config-building-code.patch b/target/linux/sunxi/patches-4.9/0030-pinctrl-sunxi-Rework-the-pin-config-building-code.patch
deleted file mode 100644 (file)
index 4985817..0000000
+++ /dev/null
@@ -1,251 +0,0 @@
-From f233dbca6227703eaae2f67d6d9c79819773f16b Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 11 Oct 2016 17:45:59 +0200
-Subject: pinctrl: sunxi: Rework the pin config building code
-
-In order to support more easily the generic pinctrl properties, rework the
-pinctrl maps configuration and split it into several sub-functions.
-
-One of the side-effects from that rework is that we only parse the pin
-configuration once, since it's going to be common to every pin, instead of
-having to parsing once for each pin.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 178 +++++++++++++++++++++++++---------
- 1 file changed, 130 insertions(+), 48 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -145,6 +145,110 @@ static int sunxi_pctrl_get_group_pins(st
-       return 0;
- }
-+static bool sunxi_pctrl_has_bias_prop(struct device_node *node)
-+{
-+      return of_find_property(node, "allwinner,pull", NULL);
-+}
-+
-+static bool sunxi_pctrl_has_drive_prop(struct device_node *node)
-+{
-+      return of_find_property(node, "allwinner,drive", NULL);
-+}
-+
-+static int sunxi_pctrl_parse_bias_prop(struct device_node *node)
-+{
-+      u32 val;
-+
-+      if (of_property_read_u32(node, "allwinner,pull", &val))
-+              return -EINVAL;
-+
-+      switch (val) {
-+      case 1:
-+              return PIN_CONFIG_BIAS_PULL_UP;
-+      case 2:
-+              return PIN_CONFIG_BIAS_PULL_DOWN;
-+      }
-+
-+      return -EINVAL;
-+}
-+
-+static int sunxi_pctrl_parse_drive_prop(struct device_node *node)
-+{
-+      u32 val;
-+
-+      if (of_property_read_u32(node, "allwinner,drive", &val))
-+              return -EINVAL;
-+
-+      return (val + 1) * 10;
-+}
-+
-+static const char *sunxi_pctrl_parse_function_prop(struct device_node *node)
-+{
-+      const char *function;
-+      int ret;
-+
-+      ret = of_property_read_string(node, "allwinner,function", &function);
-+      if (!ret)
-+              return function;
-+
-+      return NULL;
-+}
-+
-+static const char *sunxi_pctrl_find_pins_prop(struct device_node *node,
-+                                            int *npins)
-+{
-+      int count;
-+
-+      count = of_property_count_strings(node, "allwinner,pins");
-+      if (count > 0) {
-+              *npins = count;
-+              return "allwinner,pins";
-+      }
-+
-+      return NULL;
-+}
-+
-+static unsigned long *sunxi_pctrl_build_pin_config(struct device_node *node,
-+                                                 unsigned int *len)
-+{
-+      unsigned long *pinconfig;
-+      unsigned int configlen = 0, idx = 0;
-+
-+      if (sunxi_pctrl_has_drive_prop(node))
-+              configlen++;
-+      if (sunxi_pctrl_has_bias_prop(node))
-+              configlen++;
-+
-+      pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
-+      if (!pinconfig)
-+              return NULL;
-+
-+      if (sunxi_pctrl_has_drive_prop(node)) {
-+              int drive = sunxi_pctrl_parse_drive_prop(node);
-+              if (drive < 0)
-+                      goto err_free;
-+
-+              pinconfig[idx++] = pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
-+                                                        drive);
-+      }
-+
-+      if (sunxi_pctrl_has_bias_prop(node)) {
-+              int pull = sunxi_pctrl_parse_bias_prop(node);
-+              if (pull < 0)
-+                      goto err_free;
-+
-+              pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
-+      }
-+
-+
-+      *len = configlen;
-+      return pinconfig;
-+
-+err_free:
-+      kfree(pinconfig);
-+      return NULL;
-+}
-+
- static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
-                                     struct device_node *node,
-                                     struct pinctrl_map **map,
-@@ -153,38 +257,45 @@ static int sunxi_pctrl_dt_node_to_map(st
-       struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-       unsigned long *pinconfig;
-       struct property *prop;
--      const char *function;
-+      const char *function, *pin_prop;
-       const char *group;
--      int ret, nmaps, i = 0;
--      u32 val;
-+      int ret, npins, nmaps, configlen = 0, i = 0;
-       *map = NULL;
-       *num_maps = 0;
--      ret = of_property_read_string(node, "allwinner,function", &function);
--      if (ret) {
--              dev_err(pctl->dev,
--                      "missing allwinner,function property in node %s\n",
-+      function = sunxi_pctrl_parse_function_prop(node);
-+      if (!function) {
-+              dev_err(pctl->dev, "missing function property in node %s\n",
-                       node->name);
-               return -EINVAL;
-       }
--      nmaps = of_property_count_strings(node, "allwinner,pins") * 2;
--      if (nmaps < 0) {
--              dev_err(pctl->dev,
--                      "missing allwinner,pins property in node %s\n",
-+      pin_prop = sunxi_pctrl_find_pins_prop(node, &npins);
-+      if (!pin_prop) {
-+              dev_err(pctl->dev, "missing pins property in node %s\n",
-                       node->name);
-               return -EINVAL;
-       }
-+      /*
-+       * We have two maps for each pin: one for the function, one
-+       * for the configuration (bias, strength, etc)
-+       */
-+      nmaps = npins * 2;
-       *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
-       if (!*map)
-               return -ENOMEM;
--      of_property_for_each_string(node, "allwinner,pins", prop, group) {
-+      pinconfig = sunxi_pctrl_build_pin_config(node, &configlen);
-+      if (!pinconfig) {
-+              ret = -EINVAL;
-+              goto err_free_map;
-+      }
-+
-+      of_property_for_each_string(node, pin_prop, prop, group) {
-               struct sunxi_pinctrl_group *grp =
-                       sunxi_pinctrl_find_group_by_name(pctl, group);
--              int j = 0, configlen = 0;
-               if (!grp) {
-                       dev_err(pctl->dev, "unknown pin %s", group);
-@@ -207,34 +318,6 @@ static int sunxi_pctrl_dt_node_to_map(st
-               (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
-               (*map)[i].data.configs.group_or_pin = group;
--
--              if (of_find_property(node, "allwinner,drive", NULL))
--                      configlen++;
--              if (of_find_property(node, "allwinner,pull", NULL))
--                      configlen++;
--
--              pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
--              if (!pinconfig) {
--                      kfree(*map);
--                      return -ENOMEM;
--              }
--
--              if (!of_property_read_u32(node, "allwinner,drive", &val)) {
--                      u16 strength = (val + 1) * 10;
--                      pinconfig[j++] =
--                              pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
--                                                       strength);
--              }
--
--              if (!of_property_read_u32(node, "allwinner,pull", &val)) {
--                      enum pin_config_param pull = PIN_CONFIG_END;
--                      if (val == 1)
--                              pull = PIN_CONFIG_BIAS_PULL_UP;
--                      else if (val == 2)
--                              pull = PIN_CONFIG_BIAS_PULL_DOWN;
--                      pinconfig[j++] = pinconf_to_config_packed(pull, 0);
--              }
--
-               (*map)[i].data.configs.configs = pinconfig;
-               (*map)[i].data.configs.num_configs = configlen;
-@@ -244,19 +327,18 @@ static int sunxi_pctrl_dt_node_to_map(st
-       *num_maps = nmaps;
-       return 0;
-+
-+err_free_map:
-+      kfree(map);
-+      return ret;
- }
- static void sunxi_pctrl_dt_free_map(struct pinctrl_dev *pctldev,
-                                   struct pinctrl_map *map,
-                                   unsigned num_maps)
- {
--      int i;
--
--      for (i = 0; i < num_maps; i++) {
--              if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
--                      kfree(map[i].data.configs.configs);
--      }
--
-+      /* All the maps have the same pin config, free only the first one */
-+      kfree(map[0].data.configs.configs);
-       kfree(map);
- }
diff --git a/target/linux/sunxi/patches-4.9/0031-pinctrl-sunxi-Use-macros-from-bindings-header-file-f.patch b/target/linux/sunxi/patches-4.9/0031-pinctrl-sunxi-Use-macros-from-bindings-header-file-f.patch
deleted file mode 100644 (file)
index 39be965..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-From 42676fa4aa87eda4fc762df495d4bde2ddc4bfce Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 11 Oct 2016 17:46:00 +0200
-Subject: pinctrl: sunxi: Use macros from bindings header file for DT parsing
-
-Since we have some bindings header for our hardcoded flags, let's use them
-when we can.
-
-Acked-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -28,6 +28,8 @@
- #include <linux/platform_device.h>
- #include <linux/slab.h>
-+#include <dt-bindings/pinctrl/sun4i-a10.h>
-+
- #include "../core.h"
- #include "pinctrl-sunxi.h"
-@@ -163,9 +165,9 @@ static int sunxi_pctrl_parse_bias_prop(s
-               return -EINVAL;
-       switch (val) {
--      case 1:
-+      case SUN4I_PINCTRL_PULL_UP:
-               return PIN_CONFIG_BIAS_PULL_UP;
--      case 2:
-+      case SUN4I_PINCTRL_PULL_DOWN:
-               return PIN_CONFIG_BIAS_PULL_DOWN;
-       }
diff --git a/target/linux/sunxi/patches-4.9/0032-pinctrl-sunxi-Handle-bias-disable.patch b/target/linux/sunxi/patches-4.9/0032-pinctrl-sunxi-Handle-bias-disable.patch
deleted file mode 100644 (file)
index 61d6102..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From 07fe64ba213f36ca8f6ffd8c4d5893f022744fdb Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 11 Oct 2016 17:46:01 +0200
-Subject: pinctrl: sunxi: Handle bias disable
-
-So far, putting NO_PULL in allwinner,pull was ignored, behaving like if
-that property was not there at all.
-
-Obviously, this is not the right thing to do, and in that case, we really
-need to just disable the bias.
-
-Acked-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -165,6 +165,8 @@ static int sunxi_pctrl_parse_bias_prop(s
-               return -EINVAL;
-       switch (val) {
-+      case SUN4I_PINCTRL_NO_PULL:
-+              return PIN_CONFIG_BIAS_DISABLE;
-       case SUN4I_PINCTRL_PULL_UP:
-               return PIN_CONFIG_BIAS_PULL_UP;
-       case SUN4I_PINCTRL_PULL_DOWN:
-@@ -401,6 +403,12 @@ static int sunxi_pconf_group_set(struct
-                               | dlevel << sunxi_dlevel_offset(pin),
-                               pctl->membase + sunxi_dlevel_reg(pin));
-                       break;
-+              case PIN_CONFIG_BIAS_DISABLE:
-+                      val = readl(pctl->membase + sunxi_pull_reg(pin));
-+                      mask = PULL_PINS_MASK << sunxi_pull_offset(pin);
-+                      writel((val & ~mask),
-+                             pctl->membase + sunxi_pull_reg(pin));
-+                      break;
-               case PIN_CONFIG_BIAS_PULL_UP:
-                       val = readl(pctl->membase + sunxi_pull_reg(pin));
-                       mask = PULL_PINS_MASK << sunxi_pull_offset(pin);
diff --git a/target/linux/sunxi/patches-4.9/0033-pinctrl-sunxi-Support-generic-binding.patch b/target/linux/sunxi/patches-4.9/0033-pinctrl-sunxi-Support-generic-binding.patch
deleted file mode 100644 (file)
index 35c6876..0000000
+++ /dev/null
@@ -1,106 +0,0 @@
-From cefbf1a1b29531a970bc2908a50a75d6474fcc38 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 20 Oct 2016 15:49:03 +0200
-Subject: pinctrl: sunxi: Support generic binding
-
-Our bindings are mostly irrelevant now that we have generic pinctrl
-bindings that cover exactly the same uses cases.
-
-Add support for the new ones, and obviously keep our old binding support in
-order to keep the ABI stable.
-
-Acked-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 48 +++++++++++++++++++++++++++++++++--
- 1 file changed, 46 insertions(+), 2 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -149,18 +149,33 @@ static int sunxi_pctrl_get_group_pins(st
- static bool sunxi_pctrl_has_bias_prop(struct device_node *node)
- {
--      return of_find_property(node, "allwinner,pull", NULL);
-+      return of_find_property(node, "bias-pull-up", NULL) ||
-+              of_find_property(node, "bias-pull-down", NULL) ||
-+              of_find_property(node, "bias-disable", NULL) ||
-+              of_find_property(node, "allwinner,pull", NULL);
- }
- static bool sunxi_pctrl_has_drive_prop(struct device_node *node)
- {
--      return of_find_property(node, "allwinner,drive", NULL);
-+      return of_find_property(node, "drive-strength", NULL) ||
-+              of_find_property(node, "allwinner,drive", NULL);
- }
- static int sunxi_pctrl_parse_bias_prop(struct device_node *node)
- {
-       u32 val;
-+      /* Try the new style binding */
-+      if (of_find_property(node, "bias-pull-up", NULL))
-+              return PIN_CONFIG_BIAS_PULL_UP;
-+
-+      if (of_find_property(node, "bias-pull-down", NULL))
-+              return PIN_CONFIG_BIAS_PULL_DOWN;
-+
-+      if (of_find_property(node, "bias-disable", NULL))
-+              return PIN_CONFIG_BIAS_DISABLE;
-+
-+      /* And fall back to the old binding */
-       if (of_property_read_u32(node, "allwinner,pull", &val))
-               return -EINVAL;
-@@ -180,6 +195,21 @@ static int sunxi_pctrl_parse_drive_prop(
- {
-       u32 val;
-+      /* Try the new style binding */
-+      if (!of_property_read_u32(node, "drive-strength", &val)) {
-+              /* We can't go below 10mA ... */
-+              if (val < 10)
-+                      return -EINVAL;
-+
-+              /* ... and only up to 40 mA ... */
-+              if (val > 40)
-+                      val = 40;
-+
-+              /* by steps of 10 mA */
-+              return rounddown(val, 10);
-+      }
-+
-+      /* And then fall back to the old binding */
-       if (of_property_read_u32(node, "allwinner,drive", &val))
-               return -EINVAL;
-@@ -191,6 +221,12 @@ static const char *sunxi_pctrl_parse_fun
-       const char *function;
-       int ret;
-+      /* Try the generic binding */
-+      ret = of_property_read_string(node, "function", &function);
-+      if (!ret)
-+              return function;
-+
-+      /* And fall back to our legacy one */
-       ret = of_property_read_string(node, "allwinner,function", &function);
-       if (!ret)
-               return function;
-@@ -203,6 +239,14 @@ static const char *sunxi_pctrl_find_pins
- {
-       int count;
-+      /* Try the generic binding */
-+      count = of_property_count_strings(node, "pins");
-+      if (count > 0) {
-+              *npins = count;
-+              return "pins";
-+      }
-+
-+      /* And fall back to our legacy one */
-       count = of_property_count_strings(node, "allwinner,pins");
-       if (count > 0) {
-               *npins = count;
diff --git a/target/linux/sunxi/patches-4.9/0034-pinctrl-sunxi-Deal-with-configless-pins.patch b/target/linux/sunxi/patches-4.9/0034-pinctrl-sunxi-Deal-with-configless-pins.patch
deleted file mode 100644 (file)
index 119ab2b..0000000
+++ /dev/null
@@ -1,128 +0,0 @@
-From e11dee2e98f8abc99ad5336796576a827853ccfa Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 20 Oct 2016 15:49:02 +0200
-Subject: pinctrl: sunxi: Deal with configless pins
-
-Even though the our binding had the assumption that the allwinner,pull and
-allwinner,drive properties were optional, the code never took that into
-account.
-
-Fix that.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 51 +++++++++++++++++++++++++----------
- 1 file changed, 37 insertions(+), 14 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -261,20 +261,29 @@ static unsigned long *sunxi_pctrl_build_
- {
-       unsigned long *pinconfig;
-       unsigned int configlen = 0, idx = 0;
-+      int ret;
-       if (sunxi_pctrl_has_drive_prop(node))
-               configlen++;
-       if (sunxi_pctrl_has_bias_prop(node))
-               configlen++;
-+      /*
-+       * If we don't have any configuration, bail out
-+       */
-+      if (!configlen)
-+              return NULL;
-+
-       pinconfig = kzalloc(configlen * sizeof(*pinconfig), GFP_KERNEL);
-       if (!pinconfig)
--              return NULL;
-+              return ERR_PTR(-ENOMEM);
-       if (sunxi_pctrl_has_drive_prop(node)) {
-               int drive = sunxi_pctrl_parse_drive_prop(node);
--              if (drive < 0)
-+              if (drive < 0) {
-+                      ret = drive;
-                       goto err_free;
-+              }
-               pinconfig[idx++] = pinconf_to_config_packed(PIN_CONFIG_DRIVE_STRENGTH,
-                                                         drive);
-@@ -282,8 +291,10 @@ static unsigned long *sunxi_pctrl_build_
-       if (sunxi_pctrl_has_bias_prop(node)) {
-               int pull = sunxi_pctrl_parse_bias_prop(node);
--              if (pull < 0)
-+              if (pull < 0) {
-+                      ret = pull;
-                       goto err_free;
-+              }
-               pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
-       }
-@@ -294,7 +305,7 @@ static unsigned long *sunxi_pctrl_build_
- err_free:
-       kfree(pinconfig);
--      return NULL;
-+      return ERR_PTR(ret);
- }
- static int sunxi_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
-@@ -328,7 +339,10 @@ static int sunxi_pctrl_dt_node_to_map(st
-       /*
-        * We have two maps for each pin: one for the function, one
--       * for the configuration (bias, strength, etc)
-+       * for the configuration (bias, strength, etc).
-+       *
-+       * We might be slightly overshooting, since we might not have
-+       * any configuration.
-        */
-       nmaps = npins * 2;
-       *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
-@@ -336,8 +350,8 @@ static int sunxi_pctrl_dt_node_to_map(st
-               return -ENOMEM;
-       pinconfig = sunxi_pctrl_build_pin_config(node, &configlen);
--      if (!pinconfig) {
--              ret = -EINVAL;
-+      if (IS_ERR(pinconfig)) {
-+              ret = PTR_ERR(pinconfig);
-               goto err_free_map;
-       }
-@@ -364,15 +378,24 @@ static int sunxi_pctrl_dt_node_to_map(st
-               i++;
--              (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
--              (*map)[i].data.configs.group_or_pin = group;
--              (*map)[i].data.configs.configs = pinconfig;
--              (*map)[i].data.configs.num_configs = configlen;
--
--              i++;
-+              if (pinconfig) {
-+                      (*map)[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
-+                      (*map)[i].data.configs.group_or_pin = group;
-+                      (*map)[i].data.configs.configs = pinconfig;
-+                      (*map)[i].data.configs.num_configs = configlen;
-+                      i++;
-+              }
-       }
--      *num_maps = nmaps;
-+      *num_maps = i;
-+
-+      /*
-+       * We know have the number of maps we need, we can resize our
-+       * map array
-+       */
-+      *map = krealloc(*map, i * sizeof(struct pinctrl_map), GFP_KERNEL);
-+      if (!map)
-+              return -ENOMEM;
-       return 0;
diff --git a/target/linux/sunxi/patches-4.9/0035-pinctrl-sunxi-make-bool-drivers-explicitly-non-modul.patch b/target/linux/sunxi/patches-4.9/0035-pinctrl-sunxi-make-bool-drivers-explicitly-non-modul.patch
deleted file mode 100644 (file)
index 8ab535c..0000000
+++ /dev/null
@@ -1,437 +0,0 @@
-From 0c8c6ba00cbf2c0a6164aa41d43d017d65caf321 Mon Sep 17 00:00:00 2001
-From: Paul Gortmaker <paul.gortmaker@windriver.com>
-Date: Sat, 29 Oct 2016 20:00:30 -0400
-Subject: pinctrl: sunxi: make bool drivers explicitly non-modular
-
-None of the Kconfigs for any of these drivers are tristate,
-meaning that they currently are not being built as a module by anyone.
-
-Lets remove the modular code that is essentially orphaned, so that
-when reading the drivers there is no doubt they are builtin-only.  All
-drivers get essentially the same change, so they are handled in batch.
-
-Changes are (1) use builtin_platform_driver, (2) use init.h header
-(3) delete module_exit related code, (4) delete MODULE_DEVICE_TABLE,
-and (5) delete MODULE_LICENCE/MODULE_AUTHOR and associated tags.
-
-Since module_platform_driver() uses the same init level priority as
-builtin_platform_driver() the init ordering remains unchanged with
-this commit.
-
-Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
-
-We do delete the MODULE_LICENSE etc. tags since all that information
-is already contained at the top of each file in the comments.
-
-Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
-Cc: Chen-Yu Tsai <wens@csie.org>
-Cc: Hans de Goede <hdegoede@redhat.com>
-Cc: Linus Walleij <linus.walleij@linaro.org>
-Cc: Patrice Chotard <patrice.chotard@st.com>
-Cc: Hongzhou Yang <hongzhou.yang@mediatek.com>
-Cc: Fabian Frederick <fabf@skynet.be>
-Cc: Maxime Coquelin <maxime.coquelin@st.com>
-Cc: Vishnu Patekar <vishnupatekar0510@gmail.com>
-Cc: Mylene Josserand <mylene.josserand@free-electrons.com>
-Cc: linux-gpio@vger.kernel.org
-Cc: linux-arm-kernel@lists.infradead.org
-Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-gr8.c         |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c   |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c  |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c   |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 10 ++--------
- drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c   |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c  |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c   |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 11 ++---------
- drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c   | 10 ++--------
- drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c   |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c  |  9 ++-------
- drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c   |  9 ++-------
- 13 files changed, 26 insertions(+), 95 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-gr8.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-gr8.c
-@@ -12,7 +12,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -525,7 +525,6 @@ static const struct of_device_id sun5i_g
-       { .compatible = "nextthing,gr8-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun5i_gr8_pinctrl_match);
- static struct platform_driver sun5i_gr8_pinctrl_driver = {
-       .probe  = sun5i_gr8_pinctrl_probe,
-@@ -534,8 +533,4 @@ static struct platform_driver sun5i_gr8_
-               .of_match_table = sun5i_gr8_pinctrl_match,
-       },
- };
--module_platform_driver(sun5i_gr8_pinctrl_driver);
--
--MODULE_AUTHOR("Mylene Josserand <mylene.josserand@free-electrons.com");
--MODULE_DESCRIPTION("NextThing GR8 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun5i_gr8_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
-@@ -10,7 +10,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -1036,7 +1036,6 @@ static const struct of_device_id sun4i_a
-       { .compatible = "allwinner,sun4i-a10-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun4i_a10_pinctrl_match);
- static struct platform_driver sun4i_a10_pinctrl_driver = {
-       .probe  = sun4i_a10_pinctrl_probe,
-@@ -1045,8 +1044,4 @@ static struct platform_driver sun4i_a10_
-               .of_match_table = sun4i_a10_pinctrl_match,
-       },
- };
--module_platform_driver(sun4i_a10_pinctrl_driver);
--
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A10 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun4i_a10_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a10s.c
-@@ -10,7 +10,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -674,7 +674,6 @@ static const struct of_device_id sun5i_a
-       { .compatible = "allwinner,sun5i-a10s-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun5i_a10s_pinctrl_match);
- static struct platform_driver sun5i_a10s_pinctrl_driver = {
-       .probe  = sun5i_a10s_pinctrl_probe,
-@@ -683,8 +682,4 @@ static struct platform_driver sun5i_a10s
-               .of_match_table = sun5i_a10s_pinctrl_match,
-       },
- };
--module_platform_driver(sun5i_a10s_pinctrl_driver);
--
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A10s pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun5i_a10s_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c
-@@ -10,7 +10,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -392,7 +392,6 @@ static const struct of_device_id sun5i_a
-       { .compatible = "allwinner,sun5i-a13-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun5i_a13_pinctrl_match);
- static struct platform_driver sun5i_a13_pinctrl_driver = {
-       .probe  = sun5i_a13_pinctrl_probe,
-@@ -401,8 +400,4 @@ static struct platform_driver sun5i_a13_
-               .of_match_table = sun5i_a13_pinctrl_match,
-       },
- };
--module_platform_driver(sun5i_a13_pinctrl_driver);
--
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A13 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun5i_a13_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
-@@ -12,7 +12,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -136,7 +136,6 @@ static const struct of_device_id sun6i_a
-       { .compatible = "allwinner,sun6i-a31-r-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun6i_a31_r_pinctrl_match);
- static struct platform_driver sun6i_a31_r_pinctrl_driver = {
-       .probe  = sun6i_a31_r_pinctrl_probe,
-@@ -145,9 +144,4 @@ static struct platform_driver sun6i_a31_
-               .of_match_table = sun6i_a31_r_pinctrl_match,
-       },
- };
--module_platform_driver(sun6i_a31_r_pinctrl_driver);
--
--MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com");
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A31 R_PIO pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun6i_a31_r_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
-@@ -10,7 +10,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -934,7 +934,6 @@ static const struct of_device_id sun6i_a
-       { .compatible = "allwinner,sun6i-a31-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun6i_a31_pinctrl_match);
- static struct platform_driver sun6i_a31_pinctrl_driver = {
-       .probe  = sun6i_a31_pinctrl_probe,
-@@ -943,8 +942,4 @@ static struct platform_driver sun6i_a31_
-               .of_match_table = sun6i_a31_pinctrl_match,
-       },
- };
--module_platform_driver(sun6i_a31_pinctrl_driver);
--
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A31 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun6i_a31_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c
-@@ -11,7 +11,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -798,7 +798,6 @@ static const struct of_device_id sun6i_a
-       { .compatible = "allwinner,sun6i-a31s-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun6i_a31s_pinctrl_match);
- static struct platform_driver sun6i_a31s_pinctrl_driver = {
-       .probe  = sun6i_a31s_pinctrl_probe,
-@@ -807,8 +806,4 @@ static struct platform_driver sun6i_a31s
-               .of_match_table = sun6i_a31s_pinctrl_match,
-       },
- };
--module_platform_driver(sun6i_a31s_pinctrl_driver);
--
--MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
--MODULE_DESCRIPTION("Allwinner A31s pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun6i_a31s_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c
-@@ -10,7 +10,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -1045,7 +1045,6 @@ static const struct of_device_id sun7i_a
-       { .compatible = "allwinner,sun7i-a20-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun7i_a20_pinctrl_match);
- static struct platform_driver sun7i_a20_pinctrl_driver = {
-       .probe  = sun7i_a20_pinctrl_probe,
-@@ -1054,8 +1053,4 @@ static struct platform_driver sun7i_a20_
-               .of_match_table = sun7i_a20_pinctrl_match,
-       },
- };
--module_platform_driver(sun7i_a20_pinctrl_driver);
--
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A20 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun7i_a20_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c
-@@ -15,7 +15,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -123,7 +123,6 @@ static const struct of_device_id sun8i_a
-       { .compatible = "allwinner,sun8i-a23-r-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun8i_a23_r_pinctrl_match);
- static struct platform_driver sun8i_a23_r_pinctrl_driver = {
-       .probe  = sun8i_a23_r_pinctrl_probe,
-@@ -132,10 +131,4 @@ static struct platform_driver sun8i_a23_
-               .of_match_table = sun8i_a23_r_pinctrl_match,
-       },
- };
--module_platform_driver(sun8i_a23_r_pinctrl_driver);
--
--MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
--MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com");
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A23 R_PIO pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun8i_a23_r_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
-@@ -14,7 +14,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -575,7 +575,6 @@ static const struct of_device_id sun8i_a
-       { .compatible = "allwinner,sun8i-a23-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun8i_a23_pinctrl_match);
- static struct platform_driver sun8i_a23_pinctrl_driver = {
-       .probe  = sun8i_a23_pinctrl_probe,
-@@ -584,9 +583,4 @@ static struct platform_driver sun8i_a23_
-               .of_match_table = sun8i_a23_pinctrl_match,
-       },
- };
--module_platform_driver(sun8i_a23_pinctrl_driver);
--
--MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
--MODULE_DESCRIPTION("Allwinner A23 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun8i_a23_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a33.c
-@@ -12,7 +12,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -498,7 +498,6 @@ static const struct of_device_id sun8i_a
-       { .compatible = "allwinner,sun8i-a33-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun8i_a33_pinctrl_match);
- static struct platform_driver sun8i_a33_pinctrl_driver = {
-       .probe  = sun8i_a33_pinctrl_probe,
-@@ -507,8 +506,4 @@ static struct platform_driver sun8i_a33_
-               .of_match_table = sun8i_a33_pinctrl_match,
-       },
- };
--module_platform_driver(sun8i_a33_pinctrl_driver);
--
--MODULE_AUTHOR("Vishnu Patekar <vishnupatekar0510@gmail.com>");
--MODULE_DESCRIPTION("Allwinner a33 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun8i_a33_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a83t.c
-@@ -12,7 +12,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -587,7 +587,6 @@ static const struct of_device_id sun8i_a
-       { .compatible = "allwinner,sun8i-a83t-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun8i_a83t_pinctrl_match);
- static struct platform_driver sun8i_a83t_pinctrl_driver = {
-       .probe  = sun8i_a83t_pinctrl_probe,
-@@ -596,8 +595,4 @@ static struct platform_driver sun8i_a83t
-               .of_match_table = sun8i_a83t_pinctrl_match,
-       },
- };
--module_platform_driver(sun8i_a83t_pinctrl_driver);
--
--MODULE_AUTHOR("Vishnu Patekar <vishnupatekar0510@gmail.com>");
--MODULE_DESCRIPTION("Allwinner a83t pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun8i_a83t_pinctrl_driver);
---- a/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c
-@@ -10,7 +10,7 @@
-  * warranty of any kind, whether express or implied.
-  */
--#include <linux/module.h>
-+#include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-@@ -733,7 +733,6 @@ static const struct of_device_id sun9i_a
-       { .compatible = "allwinner,sun9i-a80-pinctrl", },
-       {}
- };
--MODULE_DEVICE_TABLE(of, sun9i_a80_pinctrl_match);
- static struct platform_driver sun9i_a80_pinctrl_driver = {
-       .probe  = sun9i_a80_pinctrl_probe,
-@@ -742,8 +741,4 @@ static struct platform_driver sun9i_a80_
-               .of_match_table = sun9i_a80_pinctrl_match,
-       },
- };
--module_platform_driver(sun9i_a80_pinctrl_driver);
--
--MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
--MODULE_DESCRIPTION("Allwinner A80 pinctrl driver");
--MODULE_LICENSE("GPL");
-+builtin_platform_driver(sun9i_a80_pinctrl_driver);
diff --git a/target/linux/sunxi/patches-4.9/0036-pinctrl-sunxi-Free-configs-in-pinctrl_map-only-if-it.patch b/target/linux/sunxi/patches-4.9/0036-pinctrl-sunxi-Free-configs-in-pinctrl_map-only-if-it.patch
deleted file mode 100644 (file)
index 02c5f56..0000000
+++ /dev/null
@@ -1,51 +0,0 @@
-From 88f01a1bd0e0dbd01b65907023dbe53cf524ea2a Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 11 Nov 2016 10:35:10 +0800
-Subject: pinctrl: sunxi: Free configs in pinctrl_map only if it is a config
- map
-
-In the recently refactored sunxi pinctrl library, we are only allocating
-one set of pin configs for each pinmux setting node. When the pinctrl_map
-structure is freed, the pin configs should also be freed. However the
-code assumed the first map would contain the configs, which actually
-never happens, as the mux function map gets added first.
-
-The proper way to do this is to look through all the maps and free the
-first one whose type is actually PIN_MAP_TYPE_CONFIGS_GROUP.
-
-Also slightly expand the comment explaining this.
-
-Fixes: f233dbca6227 ("pinctrl: sunxi: Rework the pin config building code")
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 17 +++++++++++++++--
- 1 file changed, 15 insertions(+), 2 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -408,8 +408,21 @@ static void sunxi_pctrl_dt_free_map(stru
-                                   struct pinctrl_map *map,
-                                   unsigned num_maps)
- {
--      /* All the maps have the same pin config, free only the first one */
--      kfree(map[0].data.configs.configs);
-+      int i;
-+
-+      /* pin config is never in the first map */
-+      for (i = 1; i < num_maps; i++) {
-+              if (map[i].type != PIN_MAP_TYPE_CONFIGS_GROUP)
-+                      continue;
-+
-+              /*
-+               * All the maps share the same pin config,
-+               * free only the first one we find.
-+               */
-+              kfree(map[i].data.configs.configs);
-+              break;
-+      }
-+
-       kfree(map);
- }
diff --git a/target/linux/sunxi/patches-4.9/0037-pinctrl-sunxi-Fix-PIN_CONFIG_BIAS_PULL_-DOWN-UP-argu.patch b/target/linux/sunxi/patches-4.9/0037-pinctrl-sunxi-Fix-PIN_CONFIG_BIAS_PULL_-DOWN-UP-argu.patch
deleted file mode 100644 (file)
index 4921240..0000000
+++ /dev/null
@@ -1,40 +0,0 @@
-From 223dba00b4072efc590c7d648f230db1b44186b9 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 11 Nov 2016 17:50:34 +0800
-Subject: pinctrl: sunxi: Fix PIN_CONFIG_BIAS_PULL_{DOWN,UP} argument
-
-According to pinconf-generic.h, the argument for
-PIN_CONFIG_BIAS_PULL_{DOWN,UP} is non-zero if the bias is enabled
-with a pull up/down resistor, zero if it is directly connected
-to VDD or ground.
-
-Since Allwinner hardware uses a weak pull resistor internally,
-the argument should be 1.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -291,12 +291,16 @@ static unsigned long *sunxi_pctrl_build_
-       if (sunxi_pctrl_has_bias_prop(node)) {
-               int pull = sunxi_pctrl_parse_bias_prop(node);
-+              int arg = 0;
-               if (pull < 0) {
-                       ret = pull;
-                       goto err_free;
-               }
--              pinconfig[idx++] = pinconf_to_config_packed(pull, 0);
-+              if (pull != PIN_CONFIG_BIAS_DISABLE)
-+                      arg = 1; /* hardware uses weak pull resistors */
-+
-+              pinconfig[idx++] = pinconf_to_config_packed(pull, arg);
-       }
diff --git a/target/linux/sunxi/patches-4.9/0038-pinctrl-sunxi-Add-support-for-fetching-pinconf-setti.patch b/target/linux/sunxi/patches-4.9/0038-pinctrl-sunxi-Add-support-for-fetching-pinconf-setti.patch
deleted file mode 100644 (file)
index d797219..0000000
+++ /dev/null
@@ -1,158 +0,0 @@
-From c5fda170e87a4bdaeb278f7e50f7a1f654e94eb5 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 11 Nov 2016 17:50:35 +0800
-Subject: pinctrl: sunxi: Add support for fetching pinconf settings from
- hardware
-
-The sunxi pinctrl driver only caches whatever pinconf setting was last
-set on a given pingroup. This is not particularly helpful, nor is it
-correct.
-
-Fix this by actually reading the hardware registers and returning
-the correct results or error codes. Also filter out unsupported
-pinconf settings. Since this driver has a peculiar setup of 1 pin
-per group, we can support both pin and pingroup pinconf setting
-read back with the same code. The sunxi_pconf_reg helper and code
-structure is inspired by pinctrl-msm.
-
-With this done we can also claim to support generic pinconf, by
-setting .is_generic = true in pinconf_ops.
-
-Also remove the cached config value. The behavior of this was never
-correct, as it only cached 1 setting instead of all of them. Since
-we can now read back settings directly from the hardware, it is no
-longer required.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 86 +++++++++++++++++++++++++++++++++--
- drivers/pinctrl/sunxi/pinctrl-sunxi.h |  1 -
- 2 files changed, 81 insertions(+), 6 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -438,15 +438,91 @@ static const struct pinctrl_ops sunxi_pc
-       .get_group_pins         = sunxi_pctrl_get_group_pins,
- };
-+static int sunxi_pconf_reg(unsigned pin, enum pin_config_param param,
-+                         u32 *offset, u32 *shift, u32 *mask)
-+{
-+      switch (param) {
-+      case PIN_CONFIG_DRIVE_STRENGTH:
-+              *offset = sunxi_dlevel_reg(pin);
-+              *shift = sunxi_dlevel_offset(pin);
-+              *mask = DLEVEL_PINS_MASK;
-+              break;
-+
-+      case PIN_CONFIG_BIAS_PULL_UP:
-+      case PIN_CONFIG_BIAS_PULL_DOWN:
-+      case PIN_CONFIG_BIAS_DISABLE:
-+              *offset = sunxi_pull_reg(pin);
-+              *shift = sunxi_pull_offset(pin);
-+              *mask = PULL_PINS_MASK;
-+              break;
-+
-+      default:
-+              return -ENOTSUPP;
-+      }
-+
-+      return 0;
-+}
-+
-+static int sunxi_pconf_get(struct pinctrl_dev *pctldev, unsigned pin,
-+                         unsigned long *config)
-+{
-+      struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+      enum pin_config_param param = pinconf_to_config_param(*config);
-+      u32 offset, shift, mask, val;
-+      u16 arg;
-+      int ret;
-+
-+      pin -= pctl->desc->pin_base;
-+
-+      ret = sunxi_pconf_reg(pin, param, &offset, &shift, &mask);
-+      if (ret < 0)
-+              return ret;
-+
-+      val = (readl(pctl->membase + offset) >> shift) & mask;
-+
-+      switch (pinconf_to_config_param(*config)) {
-+      case PIN_CONFIG_DRIVE_STRENGTH:
-+              arg = (val + 1) * 10;
-+              break;
-+
-+      case PIN_CONFIG_BIAS_PULL_UP:
-+              if (val != SUN4I_PINCTRL_PULL_UP)
-+                      return -EINVAL;
-+              arg = 1; /* hardware is weak pull-up */
-+              break;
-+
-+      case PIN_CONFIG_BIAS_PULL_DOWN:
-+              if (val != SUN4I_PINCTRL_PULL_DOWN)
-+                      return -EINVAL;
-+              arg = 1; /* hardware is weak pull-down */
-+              break;
-+
-+      case PIN_CONFIG_BIAS_DISABLE:
-+              if (val != SUN4I_PINCTRL_NO_PULL)
-+                      return -EINVAL;
-+              arg = 0;
-+              break;
-+
-+      default:
-+              /* sunxi_pconf_reg should catch anything unsupported */
-+              WARN_ON(1);
-+              return -ENOTSUPP;
-+      }
-+
-+      *config = pinconf_to_config_packed(param, arg);
-+
-+      return 0;
-+}
-+
- static int sunxi_pconf_group_get(struct pinctrl_dev *pctldev,
-                                unsigned group,
-                                unsigned long *config)
- {
-       struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+      struct sunxi_pinctrl_group *g = &pctl->groups[group];
--      *config = pctl->groups[group].config;
--
--      return 0;
-+      /* We only support 1 pin per group. Chain it to the pin callback */
-+      return sunxi_pconf_get(pctldev, g->pin, config);
- }
- static int sunxi_pconf_group_set(struct pinctrl_dev *pctldev,
-@@ -508,8 +584,6 @@ static int sunxi_pconf_group_set(struct
-               default:
-                       break;
-               }
--              /* cache the config value */
--              g->config = configs[i];
-       } /* for each config */
-       spin_unlock_irqrestore(&pctl->lock, flags);
-@@ -518,6 +592,8 @@ static int sunxi_pconf_group_set(struct
- }
- static const struct pinconf_ops sunxi_pconf_ops = {
-+      .is_generic             = true,
-+      .pin_config_get         = sunxi_pconf_get,
-       .pin_config_group_get   = sunxi_pconf_group_get,
-       .pin_config_group_set   = sunxi_pconf_group_set,
- };
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
-@@ -109,7 +109,6 @@ struct sunxi_pinctrl_function {
- struct sunxi_pinctrl_group {
-       const char      *name;
--      unsigned long   config;
-       unsigned        pin;
- };
diff --git a/target/linux/sunxi/patches-4.9/0039-pinctrl-sunxi-Make-sunxi_pconf_group_set-use-sunxi_p.patch b/target/linux/sunxi/patches-4.9/0039-pinctrl-sunxi-Make-sunxi_pconf_group_set-use-sunxi_p.patch
deleted file mode 100644 (file)
index 7555933..0000000
+++ /dev/null
@@ -1,122 +0,0 @@
-From 51814827190214986c452a166718bf12d32211c7 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 11 Nov 2016 17:50:36 +0800
-Subject: pinctrl: sunxi: Make sunxi_pconf_group_set use sunxi_pconf_reg helper
-
-The sunxi_pconf_reg helper introduced in the last patch gives us the
-chance to rework sunxi_pconf_group_set to have it match the structure
-of sunxi_pconf_(group_)get and make it easier to understand.
-
-For each config to set, it:
-
-    1. checks if the parameter is supported.
-    2. checks if the argument is within limits.
-    3. converts argument to the register value.
-    4. writes to the register with spinlock held.
-
-As a result the function now blocks unsupported config parameters,
-instead of silently ignoring them.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 64 +++++++++++++++++------------------
- 1 file changed, 32 insertions(+), 32 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -532,23 +532,27 @@ static int sunxi_pconf_group_set(struct
- {
-       struct sunxi_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-       struct sunxi_pinctrl_group *g = &pctl->groups[group];
--      unsigned long flags;
-       unsigned pin = g->pin - pctl->desc->pin_base;
--      u32 val, mask;
--      u16 strength;
--      u8 dlevel;
-       int i;
--      spin_lock_irqsave(&pctl->lock, flags);
--
-       for (i = 0; i < num_configs; i++) {
--              switch (pinconf_to_config_param(configs[i])) {
-+              enum pin_config_param param;
-+              unsigned long flags;
-+              u32 offset, shift, mask, reg;
-+              u16 arg, val;
-+              int ret;
-+
-+              param = pinconf_to_config_param(configs[i]);
-+              arg = pinconf_to_config_argument(configs[i]);
-+
-+              ret = sunxi_pconf_reg(pin, param, &offset, &shift, &mask);
-+              if (ret < 0)
-+                      return ret;
-+
-+              switch (param) {
-               case PIN_CONFIG_DRIVE_STRENGTH:
--                      strength = pinconf_to_config_argument(configs[i]);
--                      if (strength > 40) {
--                              spin_unlock_irqrestore(&pctl->lock, flags);
-+                      if (arg < 10 || arg > 40)
-                               return -EINVAL;
--                      }
-                       /*
-                        * We convert from mA to what the register expects:
-                        *   0: 10mA
-@@ -556,37 +560,33 @@ static int sunxi_pconf_group_set(struct
-                        *   2: 30mA
-                        *   3: 40mA
-                        */
--                      dlevel = strength / 10 - 1;
--                      val = readl(pctl->membase + sunxi_dlevel_reg(pin));
--                      mask = DLEVEL_PINS_MASK << sunxi_dlevel_offset(pin);
--                      writel((val & ~mask)
--                              | dlevel << sunxi_dlevel_offset(pin),
--                              pctl->membase + sunxi_dlevel_reg(pin));
-+                      val = arg / 10 - 1;
-                       break;
-               case PIN_CONFIG_BIAS_DISABLE:
--                      val = readl(pctl->membase + sunxi_pull_reg(pin));
--                      mask = PULL_PINS_MASK << sunxi_pull_offset(pin);
--                      writel((val & ~mask),
--                             pctl->membase + sunxi_pull_reg(pin));
-+                      val = 0;
-                       break;
-               case PIN_CONFIG_BIAS_PULL_UP:
--                      val = readl(pctl->membase + sunxi_pull_reg(pin));
--                      mask = PULL_PINS_MASK << sunxi_pull_offset(pin);
--                      writel((val & ~mask) | 1 << sunxi_pull_offset(pin),
--                              pctl->membase + sunxi_pull_reg(pin));
-+                      if (arg == 0)
-+                              return -EINVAL;
-+                      val = 1;
-                       break;
-               case PIN_CONFIG_BIAS_PULL_DOWN:
--                      val = readl(pctl->membase + sunxi_pull_reg(pin));
--                      mask = PULL_PINS_MASK << sunxi_pull_offset(pin);
--                      writel((val & ~mask) | 2 << sunxi_pull_offset(pin),
--                              pctl->membase + sunxi_pull_reg(pin));
-+                      if (arg == 0)
-+                              return -EINVAL;
-+                      val = 2;
-                       break;
-               default:
--                      break;
-+                      /* sunxi_pconf_reg should catch anything unsupported */
-+                      WARN_ON(1);
-+                      return -ENOTSUPP;
-               }
--      } /* for each config */
--      spin_unlock_irqrestore(&pctl->lock, flags);
-+              spin_lock_irqsave(&pctl->lock, flags);
-+              reg = readl(pctl->membase + offset);
-+              reg &= ~(mask << shift);
-+              writel(reg | val << shift, pctl->membase + offset);
-+              spin_unlock_irqrestore(&pctl->lock, flags);
-+      } /* for each config */
-       return 0;
- }
diff --git a/target/linux/sunxi/patches-4.9/0040-pinctrl-sunxi-Add-support-for-interrupt-debouncing.patch b/target/linux/sunxi/patches-4.9/0040-pinctrl-sunxi-Add-support-for-interrupt-debouncing.patch
deleted file mode 100644 (file)
index 01cbe31..0000000
+++ /dev/null
@@ -1,171 +0,0 @@
-From 7c926492d38a3feef4b4b29c91b7c03eb1b8b546 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Mon, 14 Nov 2016 21:53:03 +0100
-Subject: pinctrl: sunxi: Add support for interrupt debouncing
-
-The pin controller found in the Allwinner SoCs has support for interrupts
-debouncing.
-
-However, this is not done per-pin, preventing us from using the generic
-pinconf binding for that, but per irq bank, which, depending on the SoC,
-ranges from one to five.
-
-Introduce a device-wide property to deal with this using a microsecond
-resolution. We can re-use the per-pin input-debounce property for that, so
-let's do it!
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   | 14 ++++
- drivers/pinctrl/sunxi/pinctrl-sunxi.c              | 84 ++++++++++++++++++++++
- drivers/pinctrl/sunxi/pinctrl-sunxi.h              |  7 ++
- 3 files changed, 105 insertions(+)
-
---- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
-+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
-@@ -28,6 +28,20 @@ Required properties:
- - reg: Should contain the register physical address and length for the
-   pin controller.
-+- clocks: phandle to the clocks feeding the pin controller:
-+  - "apb": the gated APB parent clock
-+  - "hosc": the high frequency oscillator in the system
-+  - "losc": the low frequency oscillator in the system
-+
-+Note: For backward compatibility reasons, the hosc and losc clocks are only
-+required if you need to use the optional input-debounce property. Any new
-+device tree should set them.
-+
-+Optional properties:
-+  - input-debounce: Array of debouncing periods in microseconds. One period per
-+    irq bank found in the controller. 0 if no setup required.
-+
-+
- Please refer to pinctrl-bindings.txt in this directory for details of the
- common pinctrl bindings used by client devices.
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -1122,6 +1122,88 @@ static int sunxi_pinctrl_build_state(str
-       return 0;
- }
-+static int sunxi_pinctrl_get_debounce_div(struct clk *clk, int freq, int *diff)
-+{
-+      unsigned long clock = clk_get_rate(clk);
-+      unsigned int best_diff = ~0, best_div;
-+      int i;
-+
-+      for (i = 0; i < 8; i++) {
-+              int cur_diff = abs(freq - (clock >> i));
-+
-+              if (cur_diff < best_diff) {
-+                      best_diff = cur_diff;
-+                      best_div = i;
-+              }
-+      }
-+
-+      *diff = best_diff;
-+      return best_div;
-+}
-+
-+static int sunxi_pinctrl_setup_debounce(struct sunxi_pinctrl *pctl,
-+                                      struct device_node *node)
-+{
-+      unsigned int hosc_diff, losc_diff;
-+      unsigned int hosc_div, losc_div;
-+      struct clk *hosc, *losc;
-+      u8 div, src;
-+      int i, ret;
-+
-+      /* Deal with old DTs that didn't have the oscillators */
-+      if (of_count_phandle_with_args(node, "clocks", "#clock-cells") != 3)
-+              return 0;
-+
-+      /* If we don't have any setup, bail out */
-+      if (!of_find_property(node, "input-debounce", NULL))
-+              return 0;
-+
-+      losc = devm_clk_get(pctl->dev, "losc");
-+      if (IS_ERR(losc))
-+              return PTR_ERR(losc);
-+
-+      hosc = devm_clk_get(pctl->dev, "hosc");
-+      if (IS_ERR(hosc))
-+              return PTR_ERR(hosc);
-+
-+      for (i = 0; i < pctl->desc->irq_banks; i++) {
-+              unsigned long debounce_freq;
-+              u32 debounce;
-+
-+              ret = of_property_read_u32_index(node, "input-debounce",
-+                                               i, &debounce);
-+              if (ret)
-+                      return ret;
-+
-+              if (!debounce)
-+                      continue;
-+
-+              debounce_freq = DIV_ROUND_CLOSEST(USEC_PER_SEC, debounce);
-+              losc_div = sunxi_pinctrl_get_debounce_div(losc,
-+                                                        debounce_freq,
-+                                                        &losc_diff);
-+
-+              hosc_div = sunxi_pinctrl_get_debounce_div(hosc,
-+                                                        debounce_freq,
-+                                                        &hosc_diff);
-+
-+              if (hosc_diff < losc_diff) {
-+                      div = hosc_div;
-+                      src = 1;
-+              } else {
-+                      div = losc_div;
-+                      src = 0;
-+              }
-+
-+              writel(src | div << 4,
-+                     pctl->membase +
-+                     sunxi_irq_debounce_reg_from_bank(i,
-+                                                      pctl->desc->irq_bank_base));
-+      }
-+
-+      return 0;
-+}
-+
- int sunxi_pinctrl_init(struct platform_device *pdev,
-                      const struct sunxi_pinctrl_desc *desc)
- {
-@@ -1284,6 +1366,8 @@ int sunxi_pinctrl_init(struct platform_d
-                                                pctl);
-       }
-+      sunxi_pinctrl_setup_debounce(pctl, node);
-+
-       dev_info(&pdev->dev, "initialized sunXi PIO driver\n");
-       return 0;
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
-@@ -69,6 +69,8 @@
- #define IRQ_STATUS_IRQ_BITS           1
- #define IRQ_STATUS_IRQ_MASK           ((1 << IRQ_STATUS_IRQ_BITS) - 1)
-+#define IRQ_DEBOUNCE_REG      0x218
-+
- #define IRQ_MEM_SIZE          0x20
- #define IRQ_EDGE_RISING               0x00
-@@ -265,6 +267,11 @@ static inline u32 sunxi_irq_ctrl_offset(
-       return irq_num * IRQ_CTRL_IRQ_BITS;
- }
-+static inline u32 sunxi_irq_debounce_reg_from_bank(u8 bank, unsigned bank_base)
-+{
-+      return IRQ_DEBOUNCE_REG + (bank_base + bank) * IRQ_MEM_SIZE;
-+}
-+
- static inline u32 sunxi_irq_status_reg_from_bank(u8 bank, unsigned bank_base)
- {
-       return IRQ_STATUS_REG + (bank_base + bank) * IRQ_MEM_SIZE;
diff --git a/target/linux/sunxi/patches-4.9/0041-pinctrl-sunxi-fix-theoretical-uninitialized-variable.patch b/target/linux/sunxi/patches-4.9/0041-pinctrl-sunxi-fix-theoretical-uninitialized-variable.patch
deleted file mode 100644 (file)
index 69de015..0000000
+++ /dev/null
@@ -1,40 +0,0 @@
-From d8a22212737314cc02692cc90eda7d844fa20257 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Wed, 16 Nov 2016 15:18:18 +0100
-Subject: pinctrl: sunxi: fix theoretical uninitialized variable access
-
-gcc warns about a  way that it could use an uninitialized variable:
-
-drivers/pinctrl/sunxi/pinctrl-sunxi.c: In function 'sunxi_pinctrl_init':
-drivers/pinctrl/sunxi/pinctrl-sunxi.c:1191:8: error: 'best_div' may be used uninitialized in this function [-Werror=maybe-uninitialized]
-
-This cannot really happen except if 'freq' is UINT_MAX and 'clock' is
-zero, and both of these are forbidden. To shut up the warning anyway,
-this changes the logic to initialize the return code to the first
-divider value before looking at the others.
-
-Fixes: 7c926492d38a ("pinctrl: sunxi: Add support for interrupt debouncing")
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -1125,10 +1125,13 @@ static int sunxi_pinctrl_build_state(str
- static int sunxi_pinctrl_get_debounce_div(struct clk *clk, int freq, int *diff)
- {
-       unsigned long clock = clk_get_rate(clk);
--      unsigned int best_diff = ~0, best_div;
-+      unsigned int best_diff, best_div;
-       int i;
--      for (i = 0; i < 8; i++) {
-+      best_diff = abs(freq - clock);
-+      best_div = 0;
-+
-+      for (i = 1; i < 8; i++) {
-               int cur_diff = abs(freq - (clock >> i));
-               if (cur_diff < best_diff) {
diff --git a/target/linux/sunxi/patches-4.9/0042-pinctrl-sunxi-Testing-the-wrong-variable.patch b/target/linux/sunxi/patches-4.9/0042-pinctrl-sunxi-Testing-the-wrong-variable.patch
deleted file mode 100644 (file)
index 8ed4f27..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-From b3cde198b17f504643cc1eeffc4623f03326f436 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Fri, 18 Nov 2016 14:35:57 +0300
-Subject: pinctrl: sunxi: Testing the wrong variable
-
-Smatch complains that we dereference "map" before testing it for NULL
-which is true.  We should be testing "*map" instead.  Also on the error
-path, we should free *map and set it to NULL.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -398,13 +398,14 @@ static int sunxi_pctrl_dt_node_to_map(st
-        * map array
-        */
-       *map = krealloc(*map, i * sizeof(struct pinctrl_map), GFP_KERNEL);
--      if (!map)
-+      if (!*map)
-               return -ENOMEM;
-       return 0;
- err_free_map:
--      kfree(map);
-+      kfree(*map);
-+      *map = NULL;
-       return ret;
- }
diff --git a/target/linux/sunxi/patches-4.9/0043-pinctrl-sunxi-Don-t-enforce-bias-disable-for-now.patch b/target/linux/sunxi/patches-4.9/0043-pinctrl-sunxi-Don-t-enforce-bias-disable-for-now.patch
deleted file mode 100644 (file)
index d6e639a..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From 2154d94b40ea2a5de05245521371d0461bb0d669 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Mon, 23 Jan 2017 09:21:30 +0100
-Subject: pinctrl: sunxi: Don't enforce bias disable (for now)
-
-Commit 07fe64ba213f ("pinctrl: sunxi: Handle bias disable") actually
-enforced enforced the disabling of the pull up/down resistors instead of
-ignoring it like it was done before.
-
-This was part of a wider rework to switch to the generic pinconf bindings,
-and was meant to be merged together with DT patches that were switching to
-it, and removing what was considered default values by both the binding and
-the boards. This included no bias on a pin.
-
-However, those DT patches were delayed to 4.11, which would be fine only
-for a significant number boards having the bias setup wrong, which in turns
-break the MMC on those boards (and possibly other devices too).
-
-In order to avoid conflicts as much as possible, bring back the old
-behaviour for 4.10, and we'll revert that commit once all the DT bits will
-have landed.
-
-Tested-by: Priit Laes <plaes@plaes.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
-@@ -564,8 +564,7 @@ static int sunxi_pconf_group_set(struct
-                       val = arg / 10 - 1;
-                       break;
-               case PIN_CONFIG_BIAS_DISABLE:
--                      val = 0;
--                      break;
-+                      continue;
-               case PIN_CONFIG_BIAS_PULL_UP:
-                       if (arg == 0)
-                               return -EINVAL;
diff --git a/target/linux/sunxi/patches-4.9/0045-arm-dts-sun8i-add-common-dtsi-file-for-nanopi-SBCs.patch b/target/linux/sunxi/patches-4.9/0045-arm-dts-sun8i-add-common-dtsi-file-for-nanopi-SBCs.patch
deleted file mode 100644 (file)
index c304f79..0000000
+++ /dev/null
@@ -1,160 +0,0 @@
-From 49f01c9e14b3476cbdf9623c4812c43f6485830b Mon Sep 17 00:00:00 2001
-From: Milo Kim <woogyom.kim@gmail.com>
-Date: Fri, 28 Oct 2016 15:59:01 +0900
-Subject: ARM: dts: sun8i: Add common dtsi file for NanoPi SBCs
-
-(backported from kernel 4.13)
-
-This patch provides a common file for NanoPi M1 and Neo SBC.
-
-Those have common features below.
-  * UART0
-  * 2 LEDs
-  * USB host (EHCI3, OHCI3) and PHY
-  * MicroSD
-  * GPIO key switch
-
-Cc: James Pettigrew <james@innovum.com.au>
-Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-
---- /dev/null
-+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
-@@ -0,0 +1,137 @@
-+/*
-+ * Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
-+ * Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License, or (at your option) any later version.
-+ *
-+ *     This file is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use,
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+#include "sun8i-h3.dtsi"
-+#include "sunxi-common-regulators.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+
-+/ {
-+      aliases {
-+              serial0 = &uart0;
-+      };
-+
-+      chosen {
-+              stdout-path = "serial0:115200n8";
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+              pinctrl-names = "default";
-+              pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
-+
-+              status {
-+                      label = "nanopi:blue:status";
-+                      gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
-+                      linux,default-trigger = "heartbeat";
-+              };
-+
-+              pwr {
-+                      label = "nanopi:green:pwr";
-+                      gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
-+                      default-state = "on";
-+              };
-+      };
-+
-+      r_gpio_keys {
-+              compatible = "gpio-keys";
-+              input-name = "k1";
-+              pinctrl-names = "default";
-+              pinctrl-0 = <&sw_r_npi>;
-+
-+              k1@0 {
-+                      label = "k1";
-+                      linux,code = <KEY_POWER>;
-+                      gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
-+              };
-+      };
-+};
-+
-+&ehci3 {
-+      status = "okay";
-+};
-+
-+&mmc0 {
-+      bus-width = <4>;
-+      cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
-+      cd-inverted;
-+      pinctrl-names = "default";
-+      pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
-+      status = "okay";
-+      vmmc-supply = <&reg_vcc3v3>;
-+};
-+
-+&ohci3 {
-+      status = "okay";
-+};
-+
-+&pio {
-+      leds_npi: led_pins@0 {
-+              pins = "PA10";
-+              function = "gpio_out";
-+      };
-+};
-+
-+&r_pio {
-+      leds_r_npi: led_pins@0 {
-+              pins = "PL10";
-+              function = "gpio_out";
-+      };
-+
-+      sw_r_npi: key_pins@0 {
-+              pins = "PL3";
-+              function = "gpio_in";
-+      };
-+};
-+
-+&uart0 {
-+      pinctrl-names = "default";
-+      pinctrl-0 = <&uart0_pins_a>;
-+      status = "okay";
-+};
-+
-+&usbphy {
-+      status = "okay";
-+};
diff --git a/target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch b/target/linux/sunxi/patches-4.9/0050-stmmac-form-4-10.patch
deleted file mode 100644 (file)
index 22d62f0..0000000
+++ /dev/null
@@ -1,3497 +0,0 @@
---- a/Documentation/devicetree/bindings/net/stmmac.txt
-+++ b/Documentation/devicetree/bindings/net/stmmac.txt
-@@ -1,7 +1,7 @@
- * STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
- Required properties:
--- compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
-+- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac"
-       For backwards compatibility: "st,spear600-gmac" is also supported.
- - reg: Address and length of the register set for the device
- - interrupt-parent: Should be the phandle for the interrupt controller
-@@ -34,7 +34,13 @@ Optional properties:
-   platforms.
- - tx-fifo-depth: See ethernet.txt file in the same directory
- - rx-fifo-depth: See ethernet.txt file in the same directory
--- snps,pbl            Programmable Burst Length
-+- snps,pbl            Programmable Burst Length (tx and rx)
-+- snps,txpbl          Tx Programmable Burst Length. Only for GMAC and newer.
-+                      If set, DMA tx will use this value rather than snps,pbl.
-+- snps,rxpbl          Rx Programmable Burst Length. Only for GMAC and newer.
-+                      If set, DMA rx will use this value rather than snps,pbl.
-+- snps,no-pbl-x8      Don't multiply the pbl/txpbl/rxpbl values by 8.
-+                      For core rev < 3.50, don't multiply the values by 4.
- - snps,aal            Address-Aligned Beats
- - snps,fixed-burst    Program the DMA to use the fixed burst mode
- - snps,mixed-burst    Program the DMA to use the mixed burst mode
-@@ -50,6 +56,8 @@ Optional properties:
- - snps,ps-speed: port selection speed that can be passed to the core when
-                PCS is supported. For example, this is used in case of SGMII
-                and MAC2MAC connection.
-+- snps,tso: this enables the TSO feature otherwise it will be managed by
-+               MAC HW capability register. Only for GMAC4 and newer.
- - AXI BUS Mode parameters: below the list of all the parameters to program the
-                          AXI register inside the DMA module:
-       - snps,lpi_en: enable Low Power Interface
-@@ -62,8 +70,6 @@ Optional properties:
-       - snps,fb: fixed-burst
-       - snps,mb: mixed-burst
-       - snps,rb: rebuild INCRx Burst
--      - snps,tso: this enables the TSO feature otherwise it will be managed by
--          MAC HW capability register.
- - mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
- Examples:
---- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
-+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
-@@ -69,6 +69,17 @@ config DWMAC_MESON
-         the stmmac device driver. This driver is used for Meson6,
-         Meson8, Meson8b and GXBB SoCs.
-+config DWMAC_OXNAS
-+      tristate "Oxford Semiconductor OXNAS dwmac support"
-+      default ARCH_OXNAS
-+      depends on OF && COMMON_CLK && (ARCH_OXNAS || COMPILE_TEST)
-+      select MFD_SYSCON
-+      help
-+        Support for Ethernet controller on Oxford Semiconductor OXNAS SoCs.
-+
-+        This selects the Oxford Semiconductor OXNASSoC glue layer support for
-+        the stmmac device driver. This driver is used for OX820.
-+
- config DWMAC_ROCKCHIP
-       tristate "Rockchip dwmac support"
-       default ARCH_ROCKCHIP
---- a/drivers/net/ethernet/stmicro/stmmac/Makefile
-+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
-@@ -10,6 +10,7 @@ obj-$(CONFIG_STMMAC_PLATFORM)        += stmmac-
- obj-$(CONFIG_DWMAC_IPQ806X)   += dwmac-ipq806x.o
- obj-$(CONFIG_DWMAC_LPC18XX)   += dwmac-lpc18xx.o
- obj-$(CONFIG_DWMAC_MESON)     += dwmac-meson.o dwmac-meson8b.o
-+obj-$(CONFIG_DWMAC_OXNAS)     += dwmac-oxnas.o
- obj-$(CONFIG_DWMAC_ROCKCHIP)  += dwmac-rk.o
- obj-$(CONFIG_DWMAC_SOCFPGA)   += dwmac-altr-socfpga.o
- obj-$(CONFIG_DWMAC_STI)               += dwmac-sti.o
---- a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
-@@ -34,7 +34,7 @@ static int stmmac_jumbo_frm(void *p, str
-       unsigned int entry = priv->cur_tx;
-       struct dma_desc *desc = priv->dma_tx + entry;
-       unsigned int nopaged_len = skb_headlen(skb);
--      unsigned int bmax;
-+      unsigned int bmax, des2;
-       unsigned int i = 1, len;
-       if (priv->plat->enh_desc)
-@@ -44,11 +44,12 @@ static int stmmac_jumbo_frm(void *p, str
-       len = nopaged_len - bmax;
--      desc->des2 = dma_map_single(priv->device, skb->data,
--                                  bmax, DMA_TO_DEVICE);
--      if (dma_mapping_error(priv->device, desc->des2))
-+      des2 = dma_map_single(priv->device, skb->data,
-+                            bmax, DMA_TO_DEVICE);
-+      desc->des2 = cpu_to_le32(des2);
-+      if (dma_mapping_error(priv->device, des2))
-               return -1;
--      priv->tx_skbuff_dma[entry].buf = desc->des2;
-+      priv->tx_skbuff_dma[entry].buf = des2;
-       priv->tx_skbuff_dma[entry].len = bmax;
-       /* do not close the descriptor and do not set own bit */
-       priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, STMMAC_CHAIN_MODE,
-@@ -60,12 +61,13 @@ static int stmmac_jumbo_frm(void *p, str
-               desc = priv->dma_tx + entry;
-               if (len > bmax) {
--                      desc->des2 = dma_map_single(priv->device,
--                                                  (skb->data + bmax * i),
--                                                  bmax, DMA_TO_DEVICE);
--                      if (dma_mapping_error(priv->device, desc->des2))
-+                      des2 = dma_map_single(priv->device,
-+                                            (skb->data + bmax * i),
-+                                            bmax, DMA_TO_DEVICE);
-+                      desc->des2 = cpu_to_le32(des2);
-+                      if (dma_mapping_error(priv->device, des2))
-                               return -1;
--                      priv->tx_skbuff_dma[entry].buf = desc->des2;
-+                      priv->tx_skbuff_dma[entry].buf = des2;
-                       priv->tx_skbuff_dma[entry].len = bmax;
-                       priv->hw->desc->prepare_tx_desc(desc, 0, bmax, csum,
-                                                       STMMAC_CHAIN_MODE, 1,
-@@ -73,12 +75,13 @@ static int stmmac_jumbo_frm(void *p, str
-                       len -= bmax;
-                       i++;
-               } else {
--                      desc->des2 = dma_map_single(priv->device,
--                                                  (skb->data + bmax * i), len,
--                                                  DMA_TO_DEVICE);
--                      if (dma_mapping_error(priv->device, desc->des2))
-+                      des2 = dma_map_single(priv->device,
-+                                            (skb->data + bmax * i), len,
-+                                            DMA_TO_DEVICE);
-+                      desc->des2 = cpu_to_le32(des2);
-+                      if (dma_mapping_error(priv->device, des2))
-                               return -1;
--                      priv->tx_skbuff_dma[entry].buf = desc->des2;
-+                      priv->tx_skbuff_dma[entry].buf = des2;
-                       priv->tx_skbuff_dma[entry].len = len;
-                       /* last descriptor can be set now */
-                       priv->hw->desc->prepare_tx_desc(desc, 0, len, csum,
-@@ -119,19 +122,19 @@ static void stmmac_init_dma_chain(void *
-               struct dma_extended_desc *p = (struct dma_extended_desc *)des;
-               for (i = 0; i < (size - 1); i++) {
-                       dma_phy += sizeof(struct dma_extended_desc);
--                      p->basic.des3 = (unsigned int)dma_phy;
-+                      p->basic.des3 = cpu_to_le32((unsigned int)dma_phy);
-                       p++;
-               }
--              p->basic.des3 = (unsigned int)phy_addr;
-+              p->basic.des3 = cpu_to_le32((unsigned int)phy_addr);
-       } else {
-               struct dma_desc *p = (struct dma_desc *)des;
-               for (i = 0; i < (size - 1); i++) {
-                       dma_phy += sizeof(struct dma_desc);
--                      p->des3 = (unsigned int)dma_phy;
-+                      p->des3 = cpu_to_le32((unsigned int)dma_phy);
-                       p++;
-               }
--              p->des3 = (unsigned int)phy_addr;
-+              p->des3 = cpu_to_le32((unsigned int)phy_addr);
-       }
- }
-@@ -144,10 +147,10 @@ static void stmmac_refill_desc3(void *pr
-                * 1588-2002 time stamping is enabled, hence reinitialize it
-                * to keep explicit chaining in the descriptor.
-                */
--              p->des3 = (unsigned int)(priv->dma_rx_phy +
--                                       (((priv->dirty_rx) + 1) %
--                                        DMA_RX_SIZE) *
--                                       sizeof(struct dma_desc));
-+              p->des3 = cpu_to_le32((unsigned int)(priv->dma_rx_phy +
-+                                    (((priv->dirty_rx) + 1) %
-+                                     DMA_RX_SIZE) *
-+                                    sizeof(struct dma_desc)));
- }
- static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p)
-@@ -161,9 +164,9 @@ static void stmmac_clean_desc3(void *pri
-                * 1588-2002 time stamping is enabled, hence reinitialize it
-                * to keep explicit chaining in the descriptor.
-                */
--              p->des3 = (unsigned int)((priv->dma_tx_phy +
--                                        ((priv->dirty_tx + 1) % DMA_TX_SIZE))
--                                        * sizeof(struct dma_desc));
-+              p->des3 = cpu_to_le32((unsigned int)((priv->dma_tx_phy +
-+                                    ((priv->dirty_tx + 1) % DMA_TX_SIZE))
-+                                    * sizeof(struct dma_desc)));
- }
- const struct stmmac_mode_ops chain_mode_ops = {
---- a/drivers/net/ethernet/stmicro/stmmac/common.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
-@@ -44,6 +44,7 @@
- #define       DWMAC_CORE_4_00 0x40
- #define STMMAC_CHAN0  0       /* Always supported and default for all chips */
-+/* These need to be power of two, and >= 4 */
- #define DMA_TX_SIZE 512
- #define DMA_RX_SIZE 512
- #define STMMAC_GET_ENTRY(x, size)     ((x + 1) & (size - 1))
-@@ -411,8 +412,8 @@ extern const struct stmmac_desc_ops ndes
- struct stmmac_dma_ops {
-       /* DMA core initialization */
-       int (*reset)(void __iomem *ioaddr);
--      void (*init)(void __iomem *ioaddr, int pbl, int fb, int mb,
--                   int aal, u32 dma_tx, u32 dma_rx, int atds);
-+      void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg,
-+                   u32 dma_tx, u32 dma_rx, int atds);
-       /* Configure the AXI Bus Mode Register */
-       void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
-       /* Dump DMA registers */
-@@ -506,6 +507,12 @@ struct mac_link {
- struct mii_regs {
-       unsigned int addr;      /* MII Address */
-       unsigned int data;      /* MII Data */
-+      unsigned int addr_shift;        /* MII address shift */
-+      unsigned int reg_shift;         /* MII reg shift */
-+      unsigned int addr_mask;         /* MII address mask */
-+      unsigned int reg_mask;          /* MII reg mask */
-+      unsigned int clk_csr_shift;
-+      unsigned int clk_csr_mask;
- };
- /* Helpers to manage the descriptors for chain and ring modes */
---- a/drivers/net/ethernet/stmicro/stmmac/descs.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/descs.h
-@@ -87,7 +87,7 @@
- #define       TDES0_ERROR_SUMMARY             BIT(15)
- #define       TDES0_IP_HEADER_ERROR           BIT(16)
- #define       TDES0_TIME_STAMP_STATUS         BIT(17)
--#define       TDES0_OWN                       BIT(31)
-+#define       TDES0_OWN                       ((u32)BIT(31))  /* silence sparse */
- /* TDES1 */
- #define       TDES1_BUFFER1_SIZE_MASK         GENMASK(10, 0)
- #define       TDES1_BUFFER2_SIZE_MASK         GENMASK(21, 11)
-@@ -130,7 +130,7 @@
- #define       ETDES0_FIRST_SEGMENT            BIT(28)
- #define       ETDES0_LAST_SEGMENT             BIT(29)
- #define       ETDES0_INTERRUPT                BIT(30)
--#define       ETDES0_OWN                      BIT(31)
-+#define       ETDES0_OWN                      ((u32)BIT(31))  /* silence sparse */
- /* TDES1 */
- #define       ETDES1_BUFFER1_SIZE_MASK        GENMASK(12, 0)
- #define       ETDES1_BUFFER2_SIZE_MASK        GENMASK(28, 16)
-@@ -170,19 +170,19 @@
- /* Basic descriptor structure for normal and alternate descriptors */
- struct dma_desc {
--      unsigned int des0;
--      unsigned int des1;
--      unsigned int des2;
--      unsigned int des3;
-+      __le32 des0;
-+      __le32 des1;
-+      __le32 des2;
-+      __le32 des3;
- };
- /* Extended descriptor structure (e.g. >= databook 3.50a) */
- struct dma_extended_desc {
-       struct dma_desc basic;  /* Basic descriptors */
--      unsigned int des4;      /* Extended Status */
--      unsigned int des5;      /* Reserved */
--      unsigned int des6;      /* Tx/Rx Timestamp Low */
--      unsigned int des7;      /* Tx/Rx Timestamp High */
-+      __le32 des4;    /* Extended Status */
-+      __le32 des5;    /* Reserved */
-+      __le32 des6;    /* Tx/Rx Timestamp Low */
-+      __le32 des7;    /* Tx/Rx Timestamp High */
- };
- /* Transmit checksum insertion control */
---- a/drivers/net/ethernet/stmicro/stmmac/descs_com.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/descs_com.h
-@@ -35,47 +35,50 @@
- /* Enhanced descriptors */
- static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end)
- {
--      p->des1 |= ((BUF_SIZE_8KiB - 1) << ERDES1_BUFFER2_SIZE_SHIFT)
--                 & ERDES1_BUFFER2_SIZE_MASK;
-+      p->des1 |= cpu_to_le32(((BUF_SIZE_8KiB - 1)
-+                      << ERDES1_BUFFER2_SIZE_SHIFT)
-+                 & ERDES1_BUFFER2_SIZE_MASK);
-       if (end)
--              p->des1 |= ERDES1_END_RING;
-+              p->des1 |= cpu_to_le32(ERDES1_END_RING);
- }
- static inline void enh_desc_end_tx_desc_on_ring(struct dma_desc *p, int end)
- {
-       if (end)
--              p->des0 |= ETDES0_END_RING;
-+              p->des0 |= cpu_to_le32(ETDES0_END_RING);
-       else
--              p->des0 &= ~ETDES0_END_RING;
-+              p->des0 &= cpu_to_le32(~ETDES0_END_RING);
- }
- static inline void enh_set_tx_desc_len_on_ring(struct dma_desc *p, int len)
- {
-       if (unlikely(len > BUF_SIZE_4KiB)) {
--              p->des1 |= (((len - BUF_SIZE_4KiB) << ETDES1_BUFFER2_SIZE_SHIFT)
-+              p->des1 |= cpu_to_le32((((len - BUF_SIZE_4KiB)
-+                                      << ETDES1_BUFFER2_SIZE_SHIFT)
-                           & ETDES1_BUFFER2_SIZE_MASK) | (BUF_SIZE_4KiB
--                          & ETDES1_BUFFER1_SIZE_MASK);
-+                          & ETDES1_BUFFER1_SIZE_MASK));
-       } else
--              p->des1 |= (len & ETDES1_BUFFER1_SIZE_MASK);
-+              p->des1 |= cpu_to_le32((len & ETDES1_BUFFER1_SIZE_MASK));
- }
- /* Normal descriptors */
- static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end)
- {
--      p->des1 |= ((BUF_SIZE_2KiB - 1) << RDES1_BUFFER2_SIZE_SHIFT)
--                  & RDES1_BUFFER2_SIZE_MASK;
-+      p->des1 |= cpu_to_le32(((BUF_SIZE_2KiB - 1)
-+                              << RDES1_BUFFER2_SIZE_SHIFT)
-+                  & RDES1_BUFFER2_SIZE_MASK);
-       if (end)
--              p->des1 |= RDES1_END_RING;
-+              p->des1 |= cpu_to_le32(RDES1_END_RING);
- }
- static inline void ndesc_end_tx_desc_on_ring(struct dma_desc *p, int end)
- {
-       if (end)
--              p->des1 |= TDES1_END_RING;
-+              p->des1 |= cpu_to_le32(TDES1_END_RING);
-       else
--              p->des1 &= ~TDES1_END_RING;
-+              p->des1 &= cpu_to_le32(~TDES1_END_RING);
- }
- static inline void norm_set_tx_desc_len_on_ring(struct dma_desc *p, int len)
-@@ -83,10 +86,11 @@ static inline void norm_set_tx_desc_len_
-       if (unlikely(len > BUF_SIZE_2KiB)) {
-               unsigned int buffer1 = (BUF_SIZE_2KiB - 1)
-                                       & TDES1_BUFFER1_SIZE_MASK;
--              p->des1 |= ((((len - buffer1) << TDES1_BUFFER2_SIZE_SHIFT)
--                          & TDES1_BUFFER2_SIZE_MASK) | buffer1);
-+              p->des1 |= cpu_to_le32((((len - buffer1)
-+                                      << TDES1_BUFFER2_SIZE_SHIFT)
-+                              & TDES1_BUFFER2_SIZE_MASK) | buffer1);
-       } else
--              p->des1 |= (len & TDES1_BUFFER1_SIZE_MASK);
-+              p->des1 |= cpu_to_le32((len & TDES1_BUFFER1_SIZE_MASK));
- }
- /* Specific functions used for Chain mode */
-@@ -94,32 +98,32 @@ static inline void norm_set_tx_desc_len_
- /* Enhanced descriptors */
- static inline void ehn_desc_rx_set_on_chain(struct dma_desc *p)
- {
--      p->des1 |= ERDES1_SECOND_ADDRESS_CHAINED;
-+      p->des1 |= cpu_to_le32(ERDES1_SECOND_ADDRESS_CHAINED);
- }
- static inline void enh_desc_end_tx_desc_on_chain(struct dma_desc *p)
- {
--      p->des0 |= ETDES0_SECOND_ADDRESS_CHAINED;
-+      p->des0 |= cpu_to_le32(ETDES0_SECOND_ADDRESS_CHAINED);
- }
- static inline void enh_set_tx_desc_len_on_chain(struct dma_desc *p, int len)
- {
--      p->des1 |= (len & ETDES1_BUFFER1_SIZE_MASK);
-+      p->des1 |= cpu_to_le32(len & ETDES1_BUFFER1_SIZE_MASK);
- }
- /* Normal descriptors */
- static inline void ndesc_rx_set_on_chain(struct dma_desc *p, int end)
- {
--      p->des1 |= RDES1_SECOND_ADDRESS_CHAINED;
-+      p->des1 |= cpu_to_le32(RDES1_SECOND_ADDRESS_CHAINED);
- }
- static inline void ndesc_tx_set_on_chain(struct dma_desc *p)
- {
--      p->des1 |= TDES1_SECOND_ADDRESS_CHAINED;
-+      p->des1 |= cpu_to_le32(TDES1_SECOND_ADDRESS_CHAINED);
- }
- static inline void norm_set_tx_desc_len_on_chain(struct dma_desc *p, int len)
- {
--      p->des1 |= len & TDES1_BUFFER1_SIZE_MASK;
-+      p->des1 |= cpu_to_le32(len & TDES1_BUFFER1_SIZE_MASK);
- }
- #endif /* __DESC_COM_H__ */
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c
-@@ -71,9 +71,12 @@ err_remove_config_dt:
- static const struct of_device_id dwmac_generic_match[] = {
-       { .compatible = "st,spear600-gmac"},
-+      { .compatible = "snps,dwmac-3.50a"},
-       { .compatible = "snps,dwmac-3.610"},
-       { .compatible = "snps,dwmac-3.70a"},
-       { .compatible = "snps,dwmac-3.710"},
-+      { .compatible = "snps,dwmac-4.00"},
-+      { .compatible = "snps,dwmac-4.10a"},
-       { .compatible = "snps,dwmac"},
-       { }
- };
---- /dev/null
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c
-@@ -0,0 +1,194 @@
-+/*
-+ * Oxford Semiconductor OXNAS DWMAC glue layer
-+ *
-+ * Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
-+ * Copyright (C) 2014 Daniel Golle <daniel@makrotopia.org>
-+ * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com>
-+ * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/stmmac.h>
-+
-+#include "stmmac_platform.h"
-+
-+/* System Control regmap offsets */
-+#define OXNAS_DWMAC_CTRL_REGOFFSET    0x78
-+#define OXNAS_DWMAC_DELAY_REGOFFSET   0x100
-+
-+/* Control Register */
-+#define DWMAC_CKEN_RX_IN        14
-+#define DWMAC_CKEN_RXN_OUT      13
-+#define DWMAC_CKEN_RX_OUT       12
-+#define DWMAC_CKEN_TX_IN        10
-+#define DWMAC_CKEN_TXN_OUT      9
-+#define DWMAC_CKEN_TX_OUT       8
-+#define DWMAC_RX_SOURCE         7
-+#define DWMAC_TX_SOURCE         6
-+#define DWMAC_LOW_TX_SOURCE     4
-+#define DWMAC_AUTO_TX_SOURCE    3
-+#define DWMAC_RGMII             2
-+#define DWMAC_SIMPLE_MUX        1
-+#define DWMAC_CKEN_GTX          0
-+
-+/* Delay register */
-+#define DWMAC_TX_VARDELAY_SHIFT               0
-+#define DWMAC_TXN_VARDELAY_SHIFT      8
-+#define DWMAC_RX_VARDELAY_SHIFT               16
-+#define DWMAC_RXN_VARDELAY_SHIFT      24
-+#define DWMAC_TX_VARDELAY(d)          ((d) << DWMAC_TX_VARDELAY_SHIFT)
-+#define DWMAC_TXN_VARDELAY(d)         ((d) << DWMAC_TXN_VARDELAY_SHIFT)
-+#define DWMAC_RX_VARDELAY(d)          ((d) << DWMAC_RX_VARDELAY_SHIFT)
-+#define DWMAC_RXN_VARDELAY(d)         ((d) << DWMAC_RXN_VARDELAY_SHIFT)
-+
-+struct oxnas_dwmac {
-+      struct device   *dev;
-+      struct clk      *clk;
-+      struct regmap   *regmap;
-+};
-+
-+static int oxnas_dwmac_init(struct platform_device *pdev, void *priv)
-+{
-+      struct oxnas_dwmac *dwmac = priv;
-+      unsigned int value;
-+      int ret;
-+
-+      /* Reset HW here before changing the glue configuration */
-+      ret = device_reset(dwmac->dev);
-+      if (ret)
-+              return ret;
-+
-+      ret = clk_prepare_enable(dwmac->clk);
-+      if (ret)
-+              return ret;
-+
-+      ret = regmap_read(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, &value);
-+      if (ret < 0) {
-+              clk_disable_unprepare(dwmac->clk);
-+              return ret;
-+      }
-+
-+      /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
-+      value |= BIT(DWMAC_CKEN_GTX)            |
-+               /* Use simple mux for 25/125 Mhz clock switching */
-+               BIT(DWMAC_SIMPLE_MUX)          |
-+               /* set auto switch tx clock source */
-+               BIT(DWMAC_AUTO_TX_SOURCE)      |
-+               /* enable tx & rx vardelay */
-+               BIT(DWMAC_CKEN_TX_OUT)         |
-+               BIT(DWMAC_CKEN_TXN_OUT)        |
-+               BIT(DWMAC_CKEN_TX_IN)          |
-+               BIT(DWMAC_CKEN_RX_OUT)         |
-+               BIT(DWMAC_CKEN_RXN_OUT)        |
-+               BIT(DWMAC_CKEN_RX_IN);
-+      regmap_write(dwmac->regmap, OXNAS_DWMAC_CTRL_REGOFFSET, value);
-+
-+      /* set tx & rx vardelay */
-+      value = DWMAC_TX_VARDELAY(4)    |
-+              DWMAC_TXN_VARDELAY(2)   |
-+              DWMAC_RX_VARDELAY(10)   |
-+              DWMAC_RXN_VARDELAY(8);
-+      regmap_write(dwmac->regmap, OXNAS_DWMAC_DELAY_REGOFFSET, value);
-+
-+      return 0;
-+}
-+
-+static void oxnas_dwmac_exit(struct platform_device *pdev, void *priv)
-+{
-+      struct oxnas_dwmac *dwmac = priv;
-+
-+      clk_disable_unprepare(dwmac->clk);
-+}
-+
-+static int oxnas_dwmac_probe(struct platform_device *pdev)
-+{
-+      struct plat_stmmacenet_data *plat_dat;
-+      struct stmmac_resources stmmac_res;
-+      struct oxnas_dwmac *dwmac;
-+      int ret;
-+
-+      ret = stmmac_get_platform_resources(pdev, &stmmac_res);
-+      if (ret)
-+              return ret;
-+
-+      plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
-+      if (IS_ERR(plat_dat))
-+              return PTR_ERR(plat_dat);
-+
-+      dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
-+      if (!dwmac) {
-+              ret = -ENOMEM;
-+              goto err_remove_config_dt;
-+      }
-+
-+      dwmac->dev = &pdev->dev;
-+      plat_dat->bsp_priv = dwmac;
-+      plat_dat->init = oxnas_dwmac_init;
-+      plat_dat->exit = oxnas_dwmac_exit;
-+
-+      dwmac->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+                                                      "oxsemi,sys-ctrl");
-+      if (IS_ERR(dwmac->regmap)) {
-+              dev_err(&pdev->dev, "failed to have sysctrl regmap\n");
-+              ret = PTR_ERR(dwmac->regmap);
-+              goto err_remove_config_dt;
-+      }
-+
-+      dwmac->clk = devm_clk_get(&pdev->dev, "gmac");
-+      if (IS_ERR(dwmac->clk)) {
-+              ret = PTR_ERR(dwmac->clk);
-+              goto err_remove_config_dt;
-+      }
-+
-+      ret = oxnas_dwmac_init(pdev, plat_dat->bsp_priv);
-+      if (ret)
-+              goto err_remove_config_dt;
-+
-+      ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
-+      if (ret)
-+              goto err_dwmac_exit;
-+
-+
-+      return 0;
-+
-+err_dwmac_exit:
-+      oxnas_dwmac_exit(pdev, plat_dat->bsp_priv);
-+err_remove_config_dt:
-+      stmmac_remove_config_dt(pdev, plat_dat);
-+
-+      return ret;
-+}
-+
-+static const struct of_device_id oxnas_dwmac_match[] = {
-+      { .compatible = "oxsemi,ox820-dwmac" },
-+      { }
-+};
-+MODULE_DEVICE_TABLE(of, oxnas_dwmac_match);
-+
-+static struct platform_driver oxnas_dwmac_driver = {
-+      .probe  = oxnas_dwmac_probe,
-+      .remove = stmmac_pltfr_remove,
-+      .driver = {
-+              .name           = "oxnas-dwmac",
-+              .pm             = &stmmac_pltfr_pm_ops,
-+              .of_match_table = oxnas_dwmac_match,
-+      },
-+};
-+module_platform_driver(oxnas_dwmac_driver);
-+
-+MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
-+MODULE_DESCRIPTION("Oxford Semiconductor OXNAS DWMAC glue layer");
-+MODULE_LICENSE("GPL v2");
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
-@@ -864,6 +864,10 @@ static int rk_gmac_powerup(struct rk_pri
-       int ret;
-       struct device *dev = &bsp_priv->pdev->dev;
-+      ret = gmac_clk_enable(bsp_priv, true);
-+      if (ret)
-+              return ret;
-+
-       /*rmii or rgmii*/
-       if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RGMII) {
-               dev_info(dev, "init for RGMII\n");
-@@ -880,10 +884,6 @@ static int rk_gmac_powerup(struct rk_pri
-       if (ret)
-               return ret;
--      ret = gmac_clk_enable(bsp_priv, true);
--      if (ret)
--              return ret;
--
-       pm_runtime_enable(dev);
-       pm_runtime_get_sync(dev);
-@@ -901,44 +901,6 @@ static void rk_gmac_powerdown(struct rk_
-       gmac_clk_enable(gmac, false);
- }
--static int rk_gmac_init(struct platform_device *pdev, void *priv)
--{
--      struct rk_priv_data *bsp_priv = priv;
--
--      return rk_gmac_powerup(bsp_priv);
--}
--
--static void rk_gmac_exit(struct platform_device *pdev, void *priv)
--{
--      struct rk_priv_data *bsp_priv = priv;
--
--      rk_gmac_powerdown(bsp_priv);
--}
--
--static void rk_gmac_suspend(struct platform_device *pdev, void *priv)
--{
--      struct rk_priv_data *bsp_priv = priv;
--
--      /* Keep the PHY up if we use Wake-on-Lan. */
--      if (device_may_wakeup(&pdev->dev))
--              return;
--
--      rk_gmac_powerdown(bsp_priv);
--      bsp_priv->suspended = true;
--}
--
--static void rk_gmac_resume(struct platform_device *pdev, void *priv)
--{
--      struct rk_priv_data *bsp_priv = priv;
--
--      /* The PHY was up for Wake-on-Lan. */
--      if (!bsp_priv->suspended)
--              return;
--
--      rk_gmac_powerup(bsp_priv);
--      bsp_priv->suspended = false;
--}
--
- static void rk_fix_speed(void *priv, unsigned int speed)
- {
-       struct rk_priv_data *bsp_priv = priv;
-@@ -974,11 +936,7 @@ static int rk_gmac_probe(struct platform
-               return PTR_ERR(plat_dat);
-       plat_dat->has_gmac = true;
--      plat_dat->init = rk_gmac_init;
--      plat_dat->exit = rk_gmac_exit;
-       plat_dat->fix_mac_speed = rk_fix_speed;
--      plat_dat->suspend = rk_gmac_suspend;
--      plat_dat->resume = rk_gmac_resume;
-       plat_dat->bsp_priv = rk_gmac_setup(pdev, data);
-       if (IS_ERR(plat_dat->bsp_priv)) {
-@@ -986,24 +944,65 @@ static int rk_gmac_probe(struct platform
-               goto err_remove_config_dt;
-       }
--      ret = rk_gmac_init(pdev, plat_dat->bsp_priv);
-+      ret = rk_gmac_powerup(plat_dat->bsp_priv);
-       if (ret)
-               goto err_remove_config_dt;
-       ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
-       if (ret)
--              goto err_gmac_exit;
-+              goto err_gmac_powerdown;
-       return 0;
--err_gmac_exit:
--      rk_gmac_exit(pdev, plat_dat->bsp_priv);
-+err_gmac_powerdown:
-+      rk_gmac_powerdown(plat_dat->bsp_priv);
- err_remove_config_dt:
-       stmmac_remove_config_dt(pdev, plat_dat);
-       return ret;
- }
-+static int rk_gmac_remove(struct platform_device *pdev)
-+{
-+      struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(&pdev->dev);
-+      int ret = stmmac_dvr_remove(&pdev->dev);
-+
-+      rk_gmac_powerdown(bsp_priv);
-+
-+      return ret;
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static int rk_gmac_suspend(struct device *dev)
-+{
-+      struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(dev);
-+      int ret = stmmac_suspend(dev);
-+
-+      /* Keep the PHY up if we use Wake-on-Lan. */
-+      if (!device_may_wakeup(dev)) {
-+              rk_gmac_powerdown(bsp_priv);
-+              bsp_priv->suspended = true;
-+      }
-+
-+      return ret;
-+}
-+
-+static int rk_gmac_resume(struct device *dev)
-+{
-+      struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(dev);
-+
-+      /* The PHY was up for Wake-on-Lan. */
-+      if (bsp_priv->suspended) {
-+              rk_gmac_powerup(bsp_priv);
-+              bsp_priv->suspended = false;
-+      }
-+
-+      return stmmac_resume(dev);
-+}
-+#endif /* CONFIG_PM_SLEEP */
-+
-+static SIMPLE_DEV_PM_OPS(rk_gmac_pm_ops, rk_gmac_suspend, rk_gmac_resume);
-+
- static const struct of_device_id rk_gmac_dwmac_match[] = {
-       { .compatible = "rockchip,rk3228-gmac", .data = &rk3228_ops },
-       { .compatible = "rockchip,rk3288-gmac", .data = &rk3288_ops },
-@@ -1016,10 +1015,10 @@ MODULE_DEVICE_TABLE(of, rk_gmac_dwmac_ma
- static struct platform_driver rk_gmac_dwmac_driver = {
-       .probe  = rk_gmac_probe,
--      .remove = stmmac_pltfr_remove,
-+      .remove = rk_gmac_remove,
-       .driver = {
-               .name           = "rk_gmac-dwmac",
--              .pm             = &stmmac_pltfr_pm_ops,
-+              .pm             = &rk_gmac_pm_ops,
-               .of_match_table = rk_gmac_dwmac_match,
-       },
- };
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
-@@ -390,8 +390,8 @@ static int socfpga_dwmac_resume(struct d
-        * control register 0, and can be modified by the phy driver
-        * framework.
-        */
--      if (priv->phydev)
--              phy_resume(priv->phydev);
-+      if (ndev->phydev)
-+              phy_resume(ndev->phydev);
-       return stmmac_resume(dev);
- }
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c
-@@ -126,8 +126,8 @@ struct sti_dwmac {
-       struct clk *clk;        /* PHY clock */
-       u32 ctrl_reg;           /* GMAC glue-logic control register */
-       int clk_sel_reg;        /* GMAC ext clk selection register */
--      struct device *dev;
-       struct regmap *regmap;
-+      bool gmac_en;
-       u32 speed;
-       void (*fix_retime_src)(void *priv, unsigned int speed);
- };
-@@ -191,7 +191,7 @@ static void stih4xx_fix_retime_src(void
-               }
-       }
--      if (src == TX_RETIME_SRC_CLKGEN && dwmac->clk && freq)
-+      if (src == TX_RETIME_SRC_CLKGEN && freq)
-               clk_set_rate(dwmac->clk, freq);
-       regmap_update_bits(dwmac->regmap, reg, STIH4XX_RETIME_SRC_MASK,
-@@ -222,26 +222,20 @@ static void stid127_fix_retime_src(void
-                       freq = DWMAC_2_5MHZ;
-       }
--      if (dwmac->clk && freq)
-+      if (freq)
-               clk_set_rate(dwmac->clk, freq);
-       regmap_update_bits(dwmac->regmap, reg, STID127_RETIME_SRC_MASK, val);
- }
--static int sti_dwmac_init(struct platform_device *pdev, void *priv)
-+static int sti_dwmac_set_mode(struct sti_dwmac *dwmac)
- {
--      struct sti_dwmac *dwmac = priv;
-       struct regmap *regmap = dwmac->regmap;
-       int iface = dwmac->interface;
--      struct device *dev = dwmac->dev;
--      struct device_node *np = dev->of_node;
-       u32 reg = dwmac->ctrl_reg;
-       u32 val;
--      if (dwmac->clk)
--              clk_prepare_enable(dwmac->clk);
--
--      if (of_property_read_bool(np, "st,gmac_en"))
-+      if (dwmac->gmac_en)
-               regmap_update_bits(regmap, reg, EN_MASK, EN);
-       regmap_update_bits(regmap, reg, MII_PHY_SEL_MASK, phy_intf_sels[iface]);
-@@ -249,18 +243,11 @@ static int sti_dwmac_init(struct platfor
-       val = (iface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;
-       regmap_update_bits(regmap, reg, ENMII_MASK, val);
--      dwmac->fix_retime_src(priv, dwmac->speed);
-+      dwmac->fix_retime_src(dwmac, dwmac->speed);
-       return 0;
- }
--static void sti_dwmac_exit(struct platform_device *pdev, void *priv)
--{
--      struct sti_dwmac *dwmac = priv;
--
--      if (dwmac->clk)
--              clk_disable_unprepare(dwmac->clk);
--}
- static int sti_dwmac_parse_data(struct sti_dwmac *dwmac,
-                               struct platform_device *pdev)
- {
-@@ -270,9 +257,6 @@ static int sti_dwmac_parse_data(struct s
-       struct regmap *regmap;
-       int err;
--      if (!np)
--              return -EINVAL;
--
-       /* clk selection from extra syscfg register */
-       dwmac->clk_sel_reg = -ENXIO;
-       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sti-clkconf");
-@@ -289,9 +273,9 @@ static int sti_dwmac_parse_data(struct s
-               return err;
-       }
--      dwmac->dev = dev;
-       dwmac->interface = of_get_phy_mode(np);
-       dwmac->regmap = regmap;
-+      dwmac->gmac_en = of_property_read_bool(np, "st,gmac_en");
-       dwmac->ext_phyclk = of_property_read_bool(np, "st,ext-phyclk");
-       dwmac->tx_retime_src = TX_RETIME_SRC_NA;
-       dwmac->speed = SPEED_100;
-@@ -359,28 +343,65 @@ static int sti_dwmac_probe(struct platfo
-       dwmac->fix_retime_src = data->fix_retime_src;
-       plat_dat->bsp_priv = dwmac;
--      plat_dat->init = sti_dwmac_init;
--      plat_dat->exit = sti_dwmac_exit;
-       plat_dat->fix_mac_speed = data->fix_retime_src;
--      ret = sti_dwmac_init(pdev, plat_dat->bsp_priv);
-+      ret = clk_prepare_enable(dwmac->clk);
-       if (ret)
-               goto err_remove_config_dt;
-+      ret = sti_dwmac_set_mode(dwmac);
-+      if (ret)
-+              goto disable_clk;
-+
-       ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
-       if (ret)
--              goto err_dwmac_exit;
-+              goto disable_clk;
-       return 0;
--err_dwmac_exit:
--      sti_dwmac_exit(pdev, plat_dat->bsp_priv);
-+disable_clk:
-+      clk_disable_unprepare(dwmac->clk);
- err_remove_config_dt:
-       stmmac_remove_config_dt(pdev, plat_dat);
-       return ret;
- }
-+static int sti_dwmac_remove(struct platform_device *pdev)
-+{
-+      struct sti_dwmac *dwmac = get_stmmac_bsp_priv(&pdev->dev);
-+      int ret = stmmac_dvr_remove(&pdev->dev);
-+
-+      clk_disable_unprepare(dwmac->clk);
-+
-+      return ret;
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static int sti_dwmac_suspend(struct device *dev)
-+{
-+      struct sti_dwmac *dwmac = get_stmmac_bsp_priv(dev);
-+      int ret = stmmac_suspend(dev);
-+
-+      clk_disable_unprepare(dwmac->clk);
-+
-+      return ret;
-+}
-+
-+static int sti_dwmac_resume(struct device *dev)
-+{
-+      struct sti_dwmac *dwmac = get_stmmac_bsp_priv(dev);
-+
-+      clk_prepare_enable(dwmac->clk);
-+      sti_dwmac_set_mode(dwmac);
-+
-+      return stmmac_resume(dev);
-+}
-+#endif /* CONFIG_PM_SLEEP */
-+
-+static SIMPLE_DEV_PM_OPS(sti_dwmac_pm_ops, sti_dwmac_suspend,
-+                                         sti_dwmac_resume);
-+
- static const struct sti_dwmac_of_data stih4xx_dwmac_data = {
-       .fix_retime_src = stih4xx_fix_retime_src,
- };
-@@ -400,10 +421,10 @@ MODULE_DEVICE_TABLE(of, sti_dwmac_match)
- static struct platform_driver sti_dwmac_driver = {
-       .probe  = sti_dwmac_probe,
--      .remove = stmmac_pltfr_remove,
-+      .remove = sti_dwmac_remove,
-       .driver = {
-               .name           = "sti-dwmac",
--              .pm             = &stmmac_pltfr_pm_ops,
-+              .pm             = &sti_dwmac_pm_ops,
-               .of_match_table = sti_dwmac_match,
-       },
- };
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
-@@ -225,7 +225,7 @@ enum rx_tx_priority_ratio {
- #define DMA_BUS_MODE_FB               0x00010000      /* Fixed burst */
- #define DMA_BUS_MODE_MB               0x04000000      /* Mixed burst */
--#define DMA_BUS_MODE_RPBL_MASK        0x003e0000      /* Rx-Programmable Burst Len */
-+#define DMA_BUS_MODE_RPBL_MASK        0x007e0000      /* Rx-Programmable Burst Len */
- #define DMA_BUS_MODE_RPBL_SHIFT       17
- #define DMA_BUS_MODE_USP      0x00800000
- #define DMA_BUS_MODE_MAXPBL   0x01000000
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
-@@ -538,6 +538,12 @@ struct mac_device_info *dwmac1000_setup(
-       mac->link.speed = GMAC_CONTROL_FES;
-       mac->mii.addr = GMAC_MII_ADDR;
-       mac->mii.data = GMAC_MII_DATA;
-+      mac->mii.addr_shift = 11;
-+      mac->mii.addr_mask = 0x0000F800;
-+      mac->mii.reg_shift = 6;
-+      mac->mii.reg_mask = 0x000007C0;
-+      mac->mii.clk_csr_shift = 2;
-+      mac->mii.clk_csr_mask = GENMASK(5, 2);
-       /* Get and dump the chip ID */
-       *synopsys_id = stmmac_get_synopsys_id(hwid);
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
-@@ -84,37 +84,39 @@ static void dwmac1000_dma_axi(void __iom
-       writel(value, ioaddr + DMA_AXI_BUS_MODE);
- }
--static void dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
--                             int aal, u32 dma_tx, u32 dma_rx, int atds)
-+static void dwmac1000_dma_init(void __iomem *ioaddr,
-+                             struct stmmac_dma_cfg *dma_cfg,
-+                             u32 dma_tx, u32 dma_rx, int atds)
- {
-       u32 value = readl(ioaddr + DMA_BUS_MODE);
-+      int txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;
-+      int rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;
-       /*
-        * Set the DMA PBL (Programmable Burst Length) mode.
-        *
-        * Note: before stmmac core 3.50 this mode bit was 4xPBL, and
-        * post 3.5 mode bit acts as 8*PBL.
--       *
--       * This configuration doesn't take care about the Separate PBL
--       * so only the bits: 13-8 are programmed with the PBL passed from the
--       * platform.
-        */
--      value |= DMA_BUS_MODE_MAXPBL;
--      value &= ~DMA_BUS_MODE_PBL_MASK;
--      value |= (pbl << DMA_BUS_MODE_PBL_SHIFT);
-+      if (dma_cfg->pblx8)
-+              value |= DMA_BUS_MODE_MAXPBL;
-+      value |= DMA_BUS_MODE_USP;
-+      value &= ~(DMA_BUS_MODE_PBL_MASK | DMA_BUS_MODE_RPBL_MASK);
-+      value |= (txpbl << DMA_BUS_MODE_PBL_SHIFT);
-+      value |= (rxpbl << DMA_BUS_MODE_RPBL_SHIFT);
-       /* Set the Fixed burst mode */
--      if (fb)
-+      if (dma_cfg->fixed_burst)
-               value |= DMA_BUS_MODE_FB;
-       /* Mixed Burst has no effect when fb is set */
--      if (mb)
-+      if (dma_cfg->mixed_burst)
-               value |= DMA_BUS_MODE_MB;
-       if (atds)
-               value |= DMA_BUS_MODE_ATDS;
--      if (aal)
-+      if (dma_cfg->aal)
-               value |= DMA_BUS_MODE_AAL;
-       writel(value, ioaddr + DMA_BUS_MODE);
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
-@@ -192,6 +192,13 @@ struct mac_device_info *dwmac100_setup(v
-       mac->link.speed = 0;
-       mac->mii.addr = MAC_MII_ADDR;
-       mac->mii.data = MAC_MII_DATA;
-+      mac->mii.addr_shift = 11;
-+      mac->mii.addr_mask = 0x0000F800;
-+      mac->mii.reg_shift = 6;
-+      mac->mii.reg_mask = 0x000007C0;
-+      mac->mii.clk_csr_shift = 2;
-+      mac->mii.clk_csr_mask = GENMASK(5, 2);
-+
-       /* Synopsys Id is not available on old chips */
-       *synopsys_id = 0;
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
-@@ -32,11 +32,12 @@
- #include "dwmac100.h"
- #include "dwmac_dma.h"
--static void dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
--                            int aal, u32 dma_tx, u32 dma_rx, int atds)
-+static void dwmac100_dma_init(void __iomem *ioaddr,
-+                            struct stmmac_dma_cfg *dma_cfg,
-+                            u32 dma_tx, u32 dma_rx, int atds)
- {
-       /* Enable Application Access by writing to DMA CSR0 */
--      writel(DMA_BUS_MODE_DEFAULT | (pbl << DMA_BUS_MODE_PBL_SHIFT),
-+      writel(DMA_BUS_MODE_DEFAULT | (dma_cfg->pbl << DMA_BUS_MODE_PBL_SHIFT),
-              ioaddr + DMA_BUS_MODE);
-       /* Mask interrupts by writing to CSR7 */
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
-@@ -155,8 +155,11 @@ enum power_event {
- #define MTL_CHAN_RX_DEBUG(x)          (MTL_CHANX_BASE_ADDR(x) + 0x38)
- #define MTL_OP_MODE_RSF                       BIT(5)
-+#define MTL_OP_MODE_TXQEN             BIT(3)
- #define MTL_OP_MODE_TSF                       BIT(1)
-+#define MTL_OP_MODE_TQS_MASK          GENMASK(24, 16)
-+
- #define MTL_OP_MODE_TTC_MASK          0x70
- #define MTL_OP_MODE_TTC_SHIFT         4
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
-@@ -430,6 +430,12 @@ struct mac_device_info *dwmac4_setup(voi
-       mac->link.speed = GMAC_CONFIG_FES;
-       mac->mii.addr = GMAC_MDIO_ADDR;
-       mac->mii.data = GMAC_MDIO_DATA;
-+      mac->mii.addr_shift = 21;
-+      mac->mii.addr_mask = GENMASK(25, 21);
-+      mac->mii.reg_shift = 16;
-+      mac->mii.reg_mask = GENMASK(20, 16);
-+      mac->mii.clk_csr_shift = 8;
-+      mac->mii.clk_csr_mask = GENMASK(11, 8);
-       /* Get and dump the chip ID */
-       *synopsys_id = stmmac_get_synopsys_id(hwid);
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
-@@ -23,7 +23,7 @@ static int dwmac4_wrback_get_tx_status(v
-       unsigned int tdes3;
-       int ret = tx_done;
--      tdes3 = p->des3;
-+      tdes3 = le32_to_cpu(p->des3);
-       /* Get tx owner first */
-       if (unlikely(tdes3 & TDES3_OWN))
-@@ -77,9 +77,9 @@ static int dwmac4_wrback_get_rx_status(v
-                                      struct dma_desc *p)
- {
-       struct net_device_stats *stats = (struct net_device_stats *)data;
--      unsigned int rdes1 = p->des1;
--      unsigned int rdes2 = p->des2;
--      unsigned int rdes3 = p->des3;
-+      unsigned int rdes1 = le32_to_cpu(p->des1);
-+      unsigned int rdes2 = le32_to_cpu(p->des2);
-+      unsigned int rdes3 = le32_to_cpu(p->des3);
-       int message_type;
-       int ret = good_frame;
-@@ -176,47 +176,48 @@ static int dwmac4_wrback_get_rx_status(v
- static int dwmac4_rd_get_tx_len(struct dma_desc *p)
- {
--      return (p->des2 & TDES2_BUFFER1_SIZE_MASK);
-+      return (le32_to_cpu(p->des2) & TDES2_BUFFER1_SIZE_MASK);
- }
- static int dwmac4_get_tx_owner(struct dma_desc *p)
- {
--      return (p->des3 & TDES3_OWN) >> TDES3_OWN_SHIFT;
-+      return (le32_to_cpu(p->des3) & TDES3_OWN) >> TDES3_OWN_SHIFT;
- }
- static void dwmac4_set_tx_owner(struct dma_desc *p)
- {
--      p->des3 |= TDES3_OWN;
-+      p->des3 |= cpu_to_le32(TDES3_OWN);
- }
- static void dwmac4_set_rx_owner(struct dma_desc *p)
- {
--      p->des3 |= RDES3_OWN;
-+      p->des3 |= cpu_to_le32(RDES3_OWN);
- }
- static int dwmac4_get_tx_ls(struct dma_desc *p)
- {
--      return (p->des3 & TDES3_LAST_DESCRIPTOR) >> TDES3_LAST_DESCRIPTOR_SHIFT;
-+      return (le32_to_cpu(p->des3) & TDES3_LAST_DESCRIPTOR)
-+              >> TDES3_LAST_DESCRIPTOR_SHIFT;
- }
- static int dwmac4_wrback_get_rx_frame_len(struct dma_desc *p, int rx_coe)
- {
--      return (p->des3 & RDES3_PACKET_SIZE_MASK);
-+      return (le32_to_cpu(p->des3) & RDES3_PACKET_SIZE_MASK);
- }
- static void dwmac4_rd_enable_tx_timestamp(struct dma_desc *p)
- {
--      p->des2 |= TDES2_TIMESTAMP_ENABLE;
-+      p->des2 |= cpu_to_le32(TDES2_TIMESTAMP_ENABLE);
- }
- static int dwmac4_wrback_get_tx_timestamp_status(struct dma_desc *p)
- {
-       /* Context type from W/B descriptor must be zero */
--      if (p->des3 & TDES3_CONTEXT_TYPE)
-+      if (le32_to_cpu(p->des3) & TDES3_CONTEXT_TYPE)
-               return -EINVAL;
-       /* Tx Timestamp Status is 1 so des0 and des1'll have valid values */
--      if (p->des3 & TDES3_TIMESTAMP_STATUS)
-+      if (le32_to_cpu(p->des3) & TDES3_TIMESTAMP_STATUS)
-               return 0;
-       return 1;
-@@ -227,9 +228,9 @@ static inline u64 dwmac4_get_timestamp(v
-       struct dma_desc *p = (struct dma_desc *)desc;
-       u64 ns;
--      ns = p->des0;
-+      ns = le32_to_cpu(p->des0);
-       /* convert high/sec time stamp value to nanosecond */
--      ns += p->des1 * 1000000000ULL;
-+      ns += le32_to_cpu(p->des1) * 1000000000ULL;
-       return ns;
- }
-@@ -264,7 +265,7 @@ static int dwmac4_wrback_get_rx_timestam
-       /* Get the status from normal w/b descriptor */
-       if (likely(p->des3 & TDES3_RS1V)) {
--              if (likely(p->des1 & RDES1_TIMESTAMP_AVAILABLE)) {
-+              if (likely(le32_to_cpu(p->des1) & RDES1_TIMESTAMP_AVAILABLE)) {
-                       int i = 0;
-                       /* Check if timestamp is OK from context descriptor */
-@@ -287,10 +288,10 @@ exit:
- static void dwmac4_rd_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
-                                  int mode, int end)
- {
--      p->des3 = RDES3_OWN | RDES3_BUFFER1_VALID_ADDR;
-+      p->des3 = cpu_to_le32(RDES3_OWN | RDES3_BUFFER1_VALID_ADDR);
-       if (!disable_rx_ic)
--              p->des3 |= RDES3_INT_ON_COMPLETION_EN;
-+              p->des3 |= cpu_to_le32(RDES3_INT_ON_COMPLETION_EN);
- }
- static void dwmac4_rd_init_tx_desc(struct dma_desc *p, int mode, int end)
-@@ -305,9 +306,9 @@ static void dwmac4_rd_prepare_tx_desc(st
-                                     bool csum_flag, int mode, bool tx_own,
-                                     bool ls)
- {
--      unsigned int tdes3 = p->des3;
-+      unsigned int tdes3 = le32_to_cpu(p->des3);
--      p->des2 |= (len & TDES2_BUFFER1_SIZE_MASK);
-+      p->des2 |= cpu_to_le32(len & TDES2_BUFFER1_SIZE_MASK);
-       if (is_fs)
-               tdes3 |= TDES3_FIRST_DESCRIPTOR;
-@@ -333,9 +334,9 @@ static void dwmac4_rd_prepare_tx_desc(st
-                * descriptors for the same frame has to be set before, to
-                * avoid race condition.
-                */
--              wmb();
-+              dma_wmb();
--      p->des3 = tdes3;
-+      p->des3 = cpu_to_le32(tdes3);
- }
- static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs,
-@@ -343,14 +344,14 @@ static void dwmac4_rd_prepare_tso_tx_des
-                                         bool ls, unsigned int tcphdrlen,
-                                         unsigned int tcppayloadlen)
- {
--      unsigned int tdes3 = p->des3;
-+      unsigned int tdes3 = le32_to_cpu(p->des3);
-       if (len1)
--              p->des2 |= (len1 & TDES2_BUFFER1_SIZE_MASK);
-+              p->des2 |= cpu_to_le32((len1 & TDES2_BUFFER1_SIZE_MASK));
-       if (len2)
--              p->des2 |= (len2 << TDES2_BUFFER2_SIZE_MASK_SHIFT)
--                          & TDES2_BUFFER2_SIZE_MASK;
-+              p->des2 |= cpu_to_le32((len2 << TDES2_BUFFER2_SIZE_MASK_SHIFT)
-+                          & TDES2_BUFFER2_SIZE_MASK);
-       if (is_fs) {
-               tdes3 |= TDES3_FIRST_DESCRIPTOR |
-@@ -376,9 +377,9 @@ static void dwmac4_rd_prepare_tso_tx_des
-                * descriptors for the same frame has to be set before, to
-                * avoid race condition.
-                */
--              wmb();
-+              dma_wmb();
--      p->des3 = tdes3;
-+      p->des3 = cpu_to_le32(tdes3);
- }
- static void dwmac4_release_tx_desc(struct dma_desc *p, int mode)
-@@ -389,7 +390,7 @@ static void dwmac4_release_tx_desc(struc
- static void dwmac4_rd_set_tx_ic(struct dma_desc *p)
- {
--      p->des2 |= TDES2_INTERRUPT_ON_COMPLETION;
-+      p->des2 |= cpu_to_le32(TDES2_INTERRUPT_ON_COMPLETION);
- }
- static void dwmac4_display_ring(void *head, unsigned int size, bool rx)
-@@ -402,7 +403,8 @@ static void dwmac4_display_ring(void *he
-       for (i = 0; i < size; i++) {
-               pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
-                       i, (unsigned int)virt_to_phys(p),
--                      p->des0, p->des1, p->des2, p->des3);
-+                      le32_to_cpu(p->des0), le32_to_cpu(p->des1),
-+                      le32_to_cpu(p->des2), le32_to_cpu(p->des3));
-               p++;
-       }
- }
-@@ -411,8 +413,8 @@ static void dwmac4_set_mss_ctxt(struct d
- {
-       p->des0 = 0;
-       p->des1 = 0;
--      p->des2 = mss;
--      p->des3 = TDES3_CONTEXT_TYPE | TDES3_CTXT_TCMSSV;
-+      p->des2 = cpu_to_le32(mss);
-+      p->des3 = cpu_to_le32(TDES3_CONTEXT_TYPE | TDES3_CTXT_TCMSSV);
- }
- const struct stmmac_desc_ops dwmac4_desc_ops = {
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
-@@ -71,25 +71,29 @@ static void dwmac4_dma_axi(void __iomem
-       writel(value, ioaddr + DMA_SYS_BUS_MODE);
- }
--static void dwmac4_dma_init_channel(void __iomem *ioaddr, int pbl,
-+static void dwmac4_dma_init_channel(void __iomem *ioaddr,
-+                                  struct stmmac_dma_cfg *dma_cfg,
-                                   u32 dma_tx_phy, u32 dma_rx_phy,
-                                   u32 channel)
- {
-       u32 value;
-+      int txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;
-+      int rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;
-       /* set PBL for each channels. Currently we affect same configuration
-        * on each channel
-        */
-       value = readl(ioaddr + DMA_CHAN_CONTROL(channel));
--      value = value | DMA_BUS_MODE_PBL;
-+      if (dma_cfg->pblx8)
-+              value = value | DMA_BUS_MODE_PBL;
-       writel(value, ioaddr + DMA_CHAN_CONTROL(channel));
-       value = readl(ioaddr + DMA_CHAN_TX_CONTROL(channel));
--      value = value | (pbl << DMA_BUS_MODE_PBL_SHIFT);
-+      value = value | (txpbl << DMA_BUS_MODE_PBL_SHIFT);
-       writel(value, ioaddr + DMA_CHAN_TX_CONTROL(channel));
-       value = readl(ioaddr + DMA_CHAN_RX_CONTROL(channel));
--      value = value | (pbl << DMA_BUS_MODE_RPBL_SHIFT);
-+      value = value | (rxpbl << DMA_BUS_MODE_RPBL_SHIFT);
-       writel(value, ioaddr + DMA_CHAN_RX_CONTROL(channel));
-       /* Mask interrupts by writing to CSR7 */
-@@ -99,27 +103,28 @@ static void dwmac4_dma_init_channel(void
-       writel(dma_rx_phy, ioaddr + DMA_CHAN_RX_BASE_ADDR(channel));
- }
--static void dwmac4_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
--                          int aal, u32 dma_tx, u32 dma_rx, int atds)
-+static void dwmac4_dma_init(void __iomem *ioaddr,
-+                          struct stmmac_dma_cfg *dma_cfg,
-+                          u32 dma_tx, u32 dma_rx, int atds)
- {
-       u32 value = readl(ioaddr + DMA_SYS_BUS_MODE);
-       int i;
-       /* Set the Fixed burst mode */
--      if (fb)
-+      if (dma_cfg->fixed_burst)
-               value |= DMA_SYS_BUS_FB;
-       /* Mixed Burst has no effect when fb is set */
--      if (mb)
-+      if (dma_cfg->mixed_burst)
-               value |= DMA_SYS_BUS_MB;
--      if (aal)
-+      if (dma_cfg->aal)
-               value |= DMA_SYS_BUS_AAL;
-       writel(value, ioaddr + DMA_SYS_BUS_MODE);
-       for (i = 0; i < DMA_CHANNEL_NB_MAX; i++)
--              dwmac4_dma_init_channel(ioaddr, pbl, dma_tx, dma_rx, i);
-+              dwmac4_dma_init_channel(ioaddr, dma_cfg, dma_tx, dma_rx, i);
- }
- static void _dwmac4_dump_dma_regs(void __iomem *ioaddr, u32 channel)
-@@ -215,7 +220,17 @@ static void dwmac4_dma_chan_op_mode(void
-               else
-                       mtl_tx_op |= MTL_OP_MODE_TTC_512;
-       }
--
-+      /* For an IP with DWC_EQOS_NUM_TXQ == 1, the fields TXQEN and TQS are RO
-+       * with reset values: TXQEN on, TQS == DWC_EQOS_TXFIFO_SIZE.
-+       * For an IP with DWC_EQOS_NUM_TXQ > 1, the fields TXQEN and TQS are R/W
-+       * with reset values: TXQEN off, TQS 256 bytes.
-+       *
-+       * Write the bits in both cases, since it will have no effect when RO.
-+       * For DWC_EQOS_NUM_TXQ > 1, the top bits in MTL_OP_MODE_TQS_MASK might
-+       * be RO, however, writing the whole TQS field will result in a value
-+       * equal to DWC_EQOS_TXFIFO_SIZE, just like for DWC_EQOS_NUM_TXQ == 1.
-+       */
-+      mtl_tx_op |= MTL_OP_MODE_TXQEN | MTL_OP_MODE_TQS_MASK;
-       writel(mtl_tx_op, ioaddr +  MTL_CHAN_TX_OP_MODE(channel));
-       mtl_rx_op = readl(ioaddr + MTL_CHAN_RX_OP_MODE(channel));
---- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
-@@ -30,7 +30,7 @@ static int enh_desc_get_tx_status(void *
-                                 struct dma_desc *p, void __iomem *ioaddr)
- {
-       struct net_device_stats *stats = (struct net_device_stats *)data;
--      unsigned int tdes0 = p->des0;
-+      unsigned int tdes0 = le32_to_cpu(p->des0);
-       int ret = tx_done;
-       /* Get tx owner first */
-@@ -95,7 +95,7 @@ static int enh_desc_get_tx_status(void *
- static int enh_desc_get_tx_len(struct dma_desc *p)
- {
--      return (p->des1 & ETDES1_BUFFER1_SIZE_MASK);
-+      return (le32_to_cpu(p->des1) & ETDES1_BUFFER1_SIZE_MASK);
- }
- static int enh_desc_coe_rdes0(int ipc_err, int type, int payload_err)
-@@ -134,8 +134,8 @@ static int enh_desc_coe_rdes0(int ipc_er
- static void enh_desc_get_ext_status(void *data, struct stmmac_extra_stats *x,
-                                   struct dma_extended_desc *p)
- {
--      unsigned int rdes0 = p->basic.des0;
--      unsigned int rdes4 = p->des4;
-+      unsigned int rdes0 = le32_to_cpu(p->basic.des0);
-+      unsigned int rdes4 = le32_to_cpu(p->des4);
-       if (unlikely(rdes0 & ERDES0_RX_MAC_ADDR)) {
-               int message_type = (rdes4 & ERDES4_MSG_TYPE_MASK) >> 8;
-@@ -199,7 +199,7 @@ static int enh_desc_get_rx_status(void *
-                                 struct dma_desc *p)
- {
-       struct net_device_stats *stats = (struct net_device_stats *)data;
--      unsigned int rdes0 = p->des0;
-+      unsigned int rdes0 = le32_to_cpu(p->des0);
-       int ret = good_frame;
-       if (unlikely(rdes0 & RDES0_OWN))
-@@ -265,8 +265,8 @@ static int enh_desc_get_rx_status(void *
- static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
-                                 int mode, int end)
- {
--      p->des0 |= RDES0_OWN;
--      p->des1 |= ((BUF_SIZE_8KiB - 1) & ERDES1_BUFFER1_SIZE_MASK);
-+      p->des0 |= cpu_to_le32(RDES0_OWN);
-+      p->des1 |= cpu_to_le32((BUF_SIZE_8KiB - 1) & ERDES1_BUFFER1_SIZE_MASK);
-       if (mode == STMMAC_CHAIN_MODE)
-               ehn_desc_rx_set_on_chain(p);
-@@ -274,12 +274,12 @@ static void enh_desc_init_rx_desc(struct
-               ehn_desc_rx_set_on_ring(p, end);
-       if (disable_rx_ic)
--              p->des1 |= ERDES1_DISABLE_IC;
-+              p->des1 |= cpu_to_le32(ERDES1_DISABLE_IC);
- }
- static void enh_desc_init_tx_desc(struct dma_desc *p, int mode, int end)
- {
--      p->des0 &= ~ETDES0_OWN;
-+      p->des0 &= cpu_to_le32(~ETDES0_OWN);
-       if (mode == STMMAC_CHAIN_MODE)
-               enh_desc_end_tx_desc_on_chain(p);
-       else
-@@ -288,27 +288,27 @@ static void enh_desc_init_tx_desc(struct
- static int enh_desc_get_tx_owner(struct dma_desc *p)
- {
--      return (p->des0 & ETDES0_OWN) >> 31;
-+      return (le32_to_cpu(p->des0) & ETDES0_OWN) >> 31;
- }
- static void enh_desc_set_tx_owner(struct dma_desc *p)
- {
--      p->des0 |= ETDES0_OWN;
-+      p->des0 |= cpu_to_le32(ETDES0_OWN);
- }
- static void enh_desc_set_rx_owner(struct dma_desc *p)
- {
--      p->des0 |= RDES0_OWN;
-+      p->des0 |= cpu_to_le32(RDES0_OWN);
- }
- static int enh_desc_get_tx_ls(struct dma_desc *p)
- {
--      return (p->des0 & ETDES0_LAST_SEGMENT) >> 29;
-+      return (le32_to_cpu(p->des0) & ETDES0_LAST_SEGMENT) >> 29;
- }
- static void enh_desc_release_tx_desc(struct dma_desc *p, int mode)
- {
--      int ter = (p->des0 & ETDES0_END_RING) >> 21;
-+      int ter = (le32_to_cpu(p->des0) & ETDES0_END_RING) >> 21;
-       memset(p, 0, offsetof(struct dma_desc, des2));
-       if (mode == STMMAC_CHAIN_MODE)
-@@ -321,7 +321,7 @@ static void enh_desc_prepare_tx_desc(str
-                                    bool csum_flag, int mode, bool tx_own,
-                                    bool ls)
- {
--      unsigned int tdes0 = p->des0;
-+      unsigned int tdes0 = le32_to_cpu(p->des0);
-       if (mode == STMMAC_CHAIN_MODE)
-               enh_set_tx_desc_len_on_chain(p, len);
-@@ -350,14 +350,14 @@ static void enh_desc_prepare_tx_desc(str
-                * descriptors for the same frame has to be set before, to
-                * avoid race condition.
-                */
--              wmb();
-+              dma_wmb();
--      p->des0 = tdes0;
-+      p->des0 = cpu_to_le32(tdes0);
- }
- static void enh_desc_set_tx_ic(struct dma_desc *p)
- {
--      p->des0 |= ETDES0_INTERRUPT;
-+      p->des0 |= cpu_to_le32(ETDES0_INTERRUPT);
- }
- static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)
-@@ -372,18 +372,18 @@ static int enh_desc_get_rx_frame_len(str
-       if (rx_coe_type == STMMAC_RX_COE_TYPE1)
-               csum = 2;
--      return (((p->des0 & RDES0_FRAME_LEN_MASK) >> RDES0_FRAME_LEN_SHIFT) -
--              csum);
-+      return (((le32_to_cpu(p->des0) & RDES0_FRAME_LEN_MASK)
-+                              >> RDES0_FRAME_LEN_SHIFT) - csum);
- }
- static void enh_desc_enable_tx_timestamp(struct dma_desc *p)
- {
--      p->des0 |= ETDES0_TIME_STAMP_ENABLE;
-+      p->des0 |= cpu_to_le32(ETDES0_TIME_STAMP_ENABLE);
- }
- static int enh_desc_get_tx_timestamp_status(struct dma_desc *p)
- {
--      return (p->des0 & ETDES0_TIME_STAMP_STATUS) >> 17;
-+      return (le32_to_cpu(p->des0) & ETDES0_TIME_STAMP_STATUS) >> 17;
- }
- static u64 enh_desc_get_timestamp(void *desc, u32 ats)
-@@ -392,13 +392,13 @@ static u64 enh_desc_get_timestamp(void *
-       if (ats) {
-               struct dma_extended_desc *p = (struct dma_extended_desc *)desc;
--              ns = p->des6;
-+              ns = le32_to_cpu(p->des6);
-               /* convert high/sec time stamp value to nanosecond */
--              ns += p->des7 * 1000000000ULL;
-+              ns += le32_to_cpu(p->des7) * 1000000000ULL;
-       } else {
-               struct dma_desc *p = (struct dma_desc *)desc;
--              ns = p->des2;
--              ns += p->des3 * 1000000000ULL;
-+              ns = le32_to_cpu(p->des2);
-+              ns += le32_to_cpu(p->des3) * 1000000000ULL;
-       }
-       return ns;
-@@ -408,10 +408,11 @@ static int enh_desc_get_rx_timestamp_sta
- {
-       if (ats) {
-               struct dma_extended_desc *p = (struct dma_extended_desc *)desc;
--              return (p->basic.des0 & RDES0_IPC_CSUM_ERROR) >> 7;
-+              return (le32_to_cpu(p->basic.des0) & RDES0_IPC_CSUM_ERROR) >> 7;
-       } else {
-               struct dma_desc *p = (struct dma_desc *)desc;
--              if ((p->des2 == 0xffffffff) && (p->des3 == 0xffffffff))
-+              if ((le32_to_cpu(p->des2) == 0xffffffff) &&
-+                  (le32_to_cpu(p->des3) == 0xffffffff))
-                       /* timestamp is corrupted, hence don't store it */
-                       return 0;
-               else
---- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
-@@ -30,8 +30,8 @@ static int ndesc_get_tx_status(void *dat
-                              struct dma_desc *p, void __iomem *ioaddr)
- {
-       struct net_device_stats *stats = (struct net_device_stats *)data;
--      unsigned int tdes0 = p->des0;
--      unsigned int tdes1 = p->des1;
-+      unsigned int tdes0 = le32_to_cpu(p->des0);
-+      unsigned int tdes1 = le32_to_cpu(p->des1);
-       int ret = tx_done;
-       /* Get tx owner first */
-@@ -77,7 +77,7 @@ static int ndesc_get_tx_status(void *dat
- static int ndesc_get_tx_len(struct dma_desc *p)
- {
--      return (p->des1 & RDES1_BUFFER1_SIZE_MASK);
-+      return (le32_to_cpu(p->des1) & RDES1_BUFFER1_SIZE_MASK);
- }
- /* This function verifies if each incoming frame has some errors
-@@ -88,7 +88,7 @@ static int ndesc_get_rx_status(void *dat
-                              struct dma_desc *p)
- {
-       int ret = good_frame;
--      unsigned int rdes0 = p->des0;
-+      unsigned int rdes0 = le32_to_cpu(p->des0);
-       struct net_device_stats *stats = (struct net_device_stats *)data;
-       if (unlikely(rdes0 & RDES0_OWN))
-@@ -141,8 +141,8 @@ static int ndesc_get_rx_status(void *dat
- static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode,
-                              int end)
- {
--      p->des0 |= RDES0_OWN;
--      p->des1 |= (BUF_SIZE_2KiB - 1) & RDES1_BUFFER1_SIZE_MASK;
-+      p->des0 |= cpu_to_le32(RDES0_OWN);
-+      p->des1 |= cpu_to_le32((BUF_SIZE_2KiB - 1) & RDES1_BUFFER1_SIZE_MASK);
-       if (mode == STMMAC_CHAIN_MODE)
-               ndesc_rx_set_on_chain(p, end);
-@@ -150,12 +150,12 @@ static void ndesc_init_rx_desc(struct dm
-               ndesc_rx_set_on_ring(p, end);
-       if (disable_rx_ic)
--              p->des1 |= RDES1_DISABLE_IC;
-+              p->des1 |= cpu_to_le32(RDES1_DISABLE_IC);
- }
- static void ndesc_init_tx_desc(struct dma_desc *p, int mode, int end)
- {
--      p->des0 &= ~TDES0_OWN;
-+      p->des0 &= cpu_to_le32(~TDES0_OWN);
-       if (mode == STMMAC_CHAIN_MODE)
-               ndesc_tx_set_on_chain(p);
-       else
-@@ -164,27 +164,27 @@ static void ndesc_init_tx_desc(struct dm
- static int ndesc_get_tx_owner(struct dma_desc *p)
- {
--      return (p->des0 & TDES0_OWN) >> 31;
-+      return (le32_to_cpu(p->des0) & TDES0_OWN) >> 31;
- }
- static void ndesc_set_tx_owner(struct dma_desc *p)
- {
--      p->des0 |= TDES0_OWN;
-+      p->des0 |= cpu_to_le32(TDES0_OWN);
- }
- static void ndesc_set_rx_owner(struct dma_desc *p)
- {
--      p->des0 |= RDES0_OWN;
-+      p->des0 |= cpu_to_le32(RDES0_OWN);
- }
- static int ndesc_get_tx_ls(struct dma_desc *p)
- {
--      return (p->des1 & TDES1_LAST_SEGMENT) >> 30;
-+      return (le32_to_cpu(p->des1) & TDES1_LAST_SEGMENT) >> 30;
- }
- static void ndesc_release_tx_desc(struct dma_desc *p, int mode)
- {
--      int ter = (p->des1 & TDES1_END_RING) >> 25;
-+      int ter = (le32_to_cpu(p->des1) & TDES1_END_RING) >> 25;
-       memset(p, 0, offsetof(struct dma_desc, des2));
-       if (mode == STMMAC_CHAIN_MODE)
-@@ -197,7 +197,7 @@ static void ndesc_prepare_tx_desc(struct
-                                 bool csum_flag, int mode, bool tx_own,
-                                 bool ls)
- {
--      unsigned int tdes1 = p->des1;
-+      unsigned int tdes1 = le32_to_cpu(p->des1);
-       if (is_fs)
-               tdes1 |= TDES1_FIRST_SEGMENT;
-@@ -212,7 +212,7 @@ static void ndesc_prepare_tx_desc(struct
-       if (ls)
-               tdes1 |= TDES1_LAST_SEGMENT;
--      p->des1 = tdes1;
-+      p->des1 = cpu_to_le32(tdes1);
-       if (mode == STMMAC_CHAIN_MODE)
-               norm_set_tx_desc_len_on_chain(p, len);
-@@ -220,12 +220,12 @@ static void ndesc_prepare_tx_desc(struct
-               norm_set_tx_desc_len_on_ring(p, len);
-       if (tx_own)
--              p->des0 |= TDES0_OWN;
-+              p->des0 |= cpu_to_le32(TDES0_OWN);
- }
- static void ndesc_set_tx_ic(struct dma_desc *p)
- {
--      p->des1 |= TDES1_INTERRUPT;
-+      p->des1 |= cpu_to_le32(TDES1_INTERRUPT);
- }
- static int ndesc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)
-@@ -241,19 +241,20 @@ static int ndesc_get_rx_frame_len(struct
-       if (rx_coe_type == STMMAC_RX_COE_TYPE1)
-               csum = 2;
--      return (((p->des0 & RDES0_FRAME_LEN_MASK) >> RDES0_FRAME_LEN_SHIFT) -
-+      return (((le32_to_cpu(p->des0) & RDES0_FRAME_LEN_MASK)
-+                              >> RDES0_FRAME_LEN_SHIFT) -
-               csum);
- }
- static void ndesc_enable_tx_timestamp(struct dma_desc *p)
- {
--      p->des1 |= TDES1_TIME_STAMP_ENABLE;
-+      p->des1 |= cpu_to_le32(TDES1_TIME_STAMP_ENABLE);
- }
- static int ndesc_get_tx_timestamp_status(struct dma_desc *p)
- {
--      return (p->des0 & TDES0_TIME_STAMP_STATUS) >> 17;
-+      return (le32_to_cpu(p->des0) & TDES0_TIME_STAMP_STATUS) >> 17;
- }
- static u64 ndesc_get_timestamp(void *desc, u32 ats)
-@@ -261,9 +262,9 @@ static u64 ndesc_get_timestamp(void *des
-       struct dma_desc *p = (struct dma_desc *)desc;
-       u64 ns;
--      ns = p->des2;
-+      ns = le32_to_cpu(p->des2);
-       /* convert high/sec time stamp value to nanosecond */
--      ns += p->des3 * 1000000000ULL;
-+      ns += le32_to_cpu(p->des3) * 1000000000ULL;
-       return ns;
- }
-@@ -272,7 +273,8 @@ static int ndesc_get_rx_timestamp_status
- {
-       struct dma_desc *p = (struct dma_desc *)desc;
--      if ((p->des2 == 0xffffffff) && (p->des3 == 0xffffffff))
-+      if ((le32_to_cpu(p->des2) == 0xffffffff) &&
-+          (le32_to_cpu(p->des3) == 0xffffffff))
-               /* timestamp is corrupted, hence don't store it */
-               return 0;
-       else
---- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
-@@ -34,7 +34,7 @@ static int stmmac_jumbo_frm(void *p, str
-       unsigned int entry = priv->cur_tx;
-       struct dma_desc *desc;
-       unsigned int nopaged_len = skb_headlen(skb);
--      unsigned int bmax, len;
-+      unsigned int bmax, len, des2;
-       if (priv->extend_desc)
-               desc = (struct dma_desc *)(priv->dma_etx + entry);
-@@ -50,16 +50,17 @@ static int stmmac_jumbo_frm(void *p, str
-       if (nopaged_len > BUF_SIZE_8KiB) {
--              desc->des2 = dma_map_single(priv->device, skb->data,
--                                          bmax, DMA_TO_DEVICE);
--              if (dma_mapping_error(priv->device, desc->des2))
-+              des2 = dma_map_single(priv->device, skb->data, bmax,
-+                                    DMA_TO_DEVICE);
-+              desc->des2 = cpu_to_le32(des2);
-+              if (dma_mapping_error(priv->device, des2))
-                       return -1;
--              priv->tx_skbuff_dma[entry].buf = desc->des2;
-+              priv->tx_skbuff_dma[entry].buf = des2;
-               priv->tx_skbuff_dma[entry].len = bmax;
-               priv->tx_skbuff_dma[entry].is_jumbo = true;
--              desc->des3 = desc->des2 + BUF_SIZE_4KiB;
-+              desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB);
-               priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum,
-                                               STMMAC_RING_MODE, 0, false);
-               priv->tx_skbuff[entry] = NULL;
-@@ -70,26 +71,28 @@ static int stmmac_jumbo_frm(void *p, str
-               else
-                       desc = priv->dma_tx + entry;
--              desc->des2 = dma_map_single(priv->device, skb->data + bmax,
--                                          len, DMA_TO_DEVICE);
--              if (dma_mapping_error(priv->device, desc->des2))
-+              des2 = dma_map_single(priv->device, skb->data + bmax, len,
-+                                    DMA_TO_DEVICE);
-+              desc->des2 = cpu_to_le32(des2);
-+              if (dma_mapping_error(priv->device, des2))
-                       return -1;
--              priv->tx_skbuff_dma[entry].buf = desc->des2;
-+              priv->tx_skbuff_dma[entry].buf = des2;
-               priv->tx_skbuff_dma[entry].len = len;
-               priv->tx_skbuff_dma[entry].is_jumbo = true;
--              desc->des3 = desc->des2 + BUF_SIZE_4KiB;
-+              desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB);
-               priv->hw->desc->prepare_tx_desc(desc, 0, len, csum,
-                                               STMMAC_RING_MODE, 1, true);
-       } else {
--              desc->des2 = dma_map_single(priv->device, skb->data,
--                                          nopaged_len, DMA_TO_DEVICE);
--              if (dma_mapping_error(priv->device, desc->des2))
-+              des2 = dma_map_single(priv->device, skb->data,
-+                                    nopaged_len, DMA_TO_DEVICE);
-+              desc->des2 = cpu_to_le32(des2);
-+              if (dma_mapping_error(priv->device, des2))
-                       return -1;
--              priv->tx_skbuff_dma[entry].buf = desc->des2;
-+              priv->tx_skbuff_dma[entry].buf = des2;
-               priv->tx_skbuff_dma[entry].len = nopaged_len;
-               priv->tx_skbuff_dma[entry].is_jumbo = true;
--              desc->des3 = desc->des2 + BUF_SIZE_4KiB;
-+              desc->des3 = cpu_to_le32(des2 + BUF_SIZE_4KiB);
-               priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len, csum,
-                                               STMMAC_RING_MODE, 0, true);
-       }
-@@ -115,13 +118,13 @@ static void stmmac_refill_desc3(void *pr
-       /* Fill DES3 in case of RING mode */
-       if (priv->dma_buf_sz >= BUF_SIZE_8KiB)
--              p->des3 = p->des2 + BUF_SIZE_8KiB;
-+              p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB);
- }
- /* In ring mode we need to fill the desc3 because it is used as buffer */
- static void stmmac_init_desc3(struct dma_desc *p)
- {
--      p->des3 = p->des2 + BUF_SIZE_8KiB;
-+      p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB);
- }
- static void stmmac_clean_desc3(void *priv_ptr, struct dma_desc *p)
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-@@ -64,7 +64,6 @@ struct stmmac_priv {
-       dma_addr_t dma_tx_phy;
-       int tx_coalesce;
-       int hwts_tx_en;
--      spinlock_t tx_lock;
-       bool tx_path_in_lpi_mode;
-       struct timer_list txtimer;
-       bool tso;
-@@ -90,7 +89,6 @@ struct stmmac_priv {
-       struct mac_device_info *hw;
-       spinlock_t lock;
--      struct phy_device *phydev ____cacheline_aligned_in_smp;
-       int oldlink;
-       int speed;
-       int oldduplex;
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
-@@ -263,7 +263,7 @@ static void stmmac_ethtool_getdrvinfo(st
- {
-       struct stmmac_priv *priv = netdev_priv(dev);
--      if (priv->plat->has_gmac)
-+      if (priv->plat->has_gmac || priv->plat->has_gmac4)
-               strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
-       else
-               strlcpy(info->driver, MAC100_ETHTOOL_NAME,
-@@ -272,25 +272,26 @@ static void stmmac_ethtool_getdrvinfo(st
-       strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
- }
--static int stmmac_ethtool_getsettings(struct net_device *dev,
--                                    struct ethtool_cmd *cmd)
-+static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,
-+                                           struct ethtool_link_ksettings *cmd)
- {
-       struct stmmac_priv *priv = netdev_priv(dev);
--      struct phy_device *phy = priv->phydev;
-+      struct phy_device *phy = dev->phydev;
-       int rc;
-       if (priv->hw->pcs & STMMAC_PCS_RGMII ||
-           priv->hw->pcs & STMMAC_PCS_SGMII) {
-               struct rgmii_adv adv;
-+              u32 supported, advertising, lp_advertising;