kernel: mtd: add support for EN25QH64 in spi-nor.c
authorRoger Pueyo Centelles <roger.pueyo@guifi.net>
Mon, 24 Dec 2018 14:39:32 +0000 (15:39 +0100)
committerHauke Mehrtens <hauke@hauke-m.de>
Wed, 2 Jan 2019 21:12:19 +0000 (22:12 +0100)
The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip. Its 32, 128 and
256 Mbits siblings are supported upstream but this particular size wasn't.
This commit includes patches for kernels 4.14 and 4.19.

Tested on a COMFAST CF-E120A v3 (ath79).

Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
target/linux/generic/pending-4.14/479-mtd-spi-nor-add-eon-en25qh64.patch [new file with mode: 0644]
target/linux/generic/pending-4.19/479-mtd-spi-nor-add-eon-en25qh64.patch [new file with mode: 0644]

diff --git a/target/linux/generic/pending-4.14/479-mtd-spi-nor-add-eon-en25qh64.patch b/target/linux/generic/pending-4.14/479-mtd-spi-nor-add-eon-en25qh64.patch
new file mode 100644 (file)
index 0000000..c290a78
--- /dev/null
@@ -0,0 +1,10 @@
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -956,6 +956,7 @@ static const struct flash_info spi_nor_i
+       { "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
+       { "en25q128",   INFO(0x1c3018, 0, 64 * 1024,  256, SECT_4K) },
+       { "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
++      { "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,   128, 0) },
+       { "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
+       { "en25qh256",  INFO(0x1c7019, 0, 64 * 1024,  512, 0) },
+       { "en25s64",    INFO(0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
diff --git a/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-eon-en25qh64.patch b/target/linux/generic/pending-4.19/479-mtd-spi-nor-add-eon-en25qh64.patch
new file mode 100644 (file)
index 0000000..6bb7754
--- /dev/null
@@ -0,0 +1,10 @@
+--- a/drivers/mtd/spi-nor/spi-nor.c
++++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -996,6 +996,7 @@ static const struct flash_info spi_nor_i
+       { "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
+       { "en25q128",   INFO(0x1c3018, 0, 64 * 1024,  256, SECT_4K) },
+       { "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
++      { "en25qh64",   INFO(0x1c7017, 0, 64 * 1024,   128, 0) },
+       { "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
+       { "en25qh256",  INFO(0x1c7019, 0, 64 * 1024,  512, 0) },
+       { "en25s64",    INFO(0x1c3817, 0, 64 * 1024,  128, SECT_4K) },