kernel: bump 4.14 to 4.14.95
authorKoen Vandeputte <koen.vandeputte@ncentric.com>
Wed, 23 Jan 2019 12:15:48 +0000 (13:15 +0100)
committerKoen Vandeputte <koen.vandeputte@ncentric.com>
Thu, 24 Jan 2019 09:10:45 +0000 (10:10 +0100)
Refreshed all patches.

Removed superseded patches:
- 0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch

Compile-tested on: ar71xx, cns3xxx, imx6, lantiq (xrx200, AVM 3370), x86_64
Runtime-tested on: ar71xx, cns3xxx, imx6, lantiq (xrx200, AVM 3370)

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Tested-by: Mathias Kresin <dev@kresin.me>
Tested-by: Robert Resch <openwrt@webnmail.de>
include/kernel-version.mk
target/linux/ar71xx/patches-4.14/910-unaligned_access_hacks.patch
target/linux/ath79/patches-4.14/910-unaligned_access_hacks.patch
target/linux/lantiq/patches-4.14/0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch [deleted file]
target/linux/layerscape/patches-4.14/202-core-linux-support-layerscape.patch
target/linux/layerscape/patches-4.14/820-sec-support-layerscape.patch

index db22c81..2e7f67d 100644 (file)
@@ -4,12 +4,12 @@ LINUX_RELEASE?=1
 
 LINUX_VERSION-3.18 = .132
 LINUX_VERSION-4.9 = .152
-LINUX_VERSION-4.14 = .94
+LINUX_VERSION-4.14 = .95
 LINUX_VERSION-4.19 = .16
 
 LINUX_KERNEL_HASH-3.18.132 = c187bd0322372bd34c862cbb06a1996a63524ccb401466362b57ede45901a879
 LINUX_KERNEL_HASH-4.9.152 = 90e47b85c09af47eefafe851685ee731538f640b0650a6a9cfa0234436708e39
-LINUX_KERNEL_HASH-4.14.94 = e728518bb024209acc222e803cdc00d0ea2b1f4ebf28a8ed17a639171a1c23f1
+LINUX_KERNEL_HASH-4.14.95 = ce6729e3fca312520e3cb4f27993852dbb019d94c59c0b35cedab571f9cb58e4
 LINUX_KERNEL_HASH-4.19.16 = d8a088381fe3e7e5484c060dabcdda4b053ef7114f91cfd56db003a89bb11bdf
 
 remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
index ec1d89d..c642176 100644 (file)
   */
 --- a/net/ipv6/datagram.c
 +++ b/net/ipv6/datagram.c
-@@ -485,7 +485,7 @@ int ipv6_recv_error(struct sock *sk, str
+@@ -486,7 +486,7 @@ int ipv6_recv_error(struct sock *sk, str
                                ipv6_iface_scope_id(&sin->sin6_addr,
                                                    IP6CB(skb)->iif);
                } else {
                                               &sin->sin6_addr);
                        sin->sin6_scope_id = 0;
                }
-@@ -836,12 +836,12 @@ int ip6_datagram_send_ctl(struct net *ne
+@@ -835,12 +835,12 @@ int ip6_datagram_send_ctl(struct net *ne
                        }
  
                        if (fl6->flowlabel&IPV6_FLOWINFO_MASK) {
index 5dec120..e43bc97 100644 (file)
   */
 --- a/net/ipv6/datagram.c
 +++ b/net/ipv6/datagram.c
-@@ -485,7 +485,7 @@ int ipv6_recv_error(struct sock *sk, str
+@@ -486,7 +486,7 @@ int ipv6_recv_error(struct sock *sk, str
                                ipv6_iface_scope_id(&sin->sin6_addr,
                                                    IP6CB(skb)->iif);
                } else {
                                               &sin->sin6_addr);
                        sin->sin6_scope_id = 0;
                }
-@@ -836,12 +836,12 @@ int ip6_datagram_send_ctl(struct net *ne
+@@ -835,12 +835,12 @@ int ip6_datagram_send_ctl(struct net *ne
                        }
  
                        if (fl6->flowlabel&IPV6_FLOWINFO_MASK) {
diff --git a/target/linux/lantiq/patches-4.14/0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch b/target/linux/lantiq/patches-4.14/0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch
deleted file mode 100644 (file)
index 7c2deb1..0000000
+++ /dev/null
@@ -1,271 +0,0 @@
-From 8fe9821b478e5c61fef4786b7ec96b6766af196d Mon Sep 17 00:00:00 2001
-From: Mathias Kresin <dev@kresin.me>
-Date: Mon, 8 Jan 2018 23:04:57 +0100
-Subject: [PATCH] Revert "MIPS: smp-mt: Use CPU interrupt controller IPI IRQ
- domain support"
-
-The problem is that the Lantiq IRQ controller gets registered first and
-it directly handles the MIPS native SW1/2 and HW0 - HW5 IRQs. It looks
-like this controller already registers IRQ 0 - 7 and the generic driver
-only gets the following IRQs starting later.
-
-The upstream discussion can be found at https://www.linux-mips.org/archives/linux-mips/2017-05/msg00059.html
-
-This reverts kernel commit 1eed40043579 ("MIPS: smp-mt: Use CPU interrupt
-controller IPI IRQ domain support").
-
-Signed-off-by: Mathias Kresin <dev@kresin.me>
-
----
- arch/mips/kernel/smp-mt.c       | 49 ++++++++++++++++++++++--
- arch/mips/lantiq/irq.c          | 52 ++++++++++++++++++++++++++
- arch/mips/mti-malta/malta-int.c | 83 +++++++++++++++++++++++++++++++++++++++--
- 3 files changed, 176 insertions(+), 8 deletions(-)
-
---- a/arch/mips/kernel/smp-mt.c
-+++ b/arch/mips/kernel/smp-mt.c
-@@ -83,8 +83,6 @@ static unsigned int __init smvp_vpe_init
-       if (tc != 0)
-               smvp_copy_vpe_config();
--      cpu_set_vpe_id(&cpu_data[ncpu], tc);
--
-       return ncpu;
- }
-@@ -116,6 +114,49 @@ static void __init smvp_tc_init(unsigned
-       write_tc_c0_tchalt(TCHALT_H);
- }
-+static void vsmp_send_ipi_single(int cpu, unsigned int action)
-+{
-+      int i;
-+      unsigned long flags;
-+      int vpflags;
-+
-+#ifdef CONFIG_MIPS_GIC
-+      if (gic_present) {
-+              mips_smp_send_ipi_single(cpu, action);
-+              return;
-+      }
-+#endif
-+      local_irq_save(flags);
-+
-+      vpflags = dvpe();       /* can't access the other CPU's registers whilst MVPE enabled */
-+
-+      switch (action) {
-+      case SMP_CALL_FUNCTION:
-+              i = C_SW1;
-+              break;
-+
-+      case SMP_RESCHEDULE_YOURSELF:
-+      default:
-+              i = C_SW0;
-+              break;
-+      }
-+
-+      /* 1:1 mapping of vpe and tc... */
-+      settc(cpu);
-+      write_vpe_c0_cause(read_vpe_c0_cause() | i);
-+      evpe(vpflags);
-+
-+      local_irq_restore(flags);
-+}
-+
-+static void vsmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
-+{
-+      unsigned int i;
-+
-+      for_each_cpu(i, mask)
-+              vsmp_send_ipi_single(i, action);
-+}
-+
- static void vsmp_init_secondary(void)
- {
-       /* This is Malta specific: IPI,performance and timer interrupts */
-@@ -240,8 +281,8 @@ static void __init vsmp_prepare_cpus(uns
- }
- const struct plat_smp_ops vsmp_smp_ops = {
--      .send_ipi_single        = mips_smp_send_ipi_single,
--      .send_ipi_mask          = mips_smp_send_ipi_mask,
-+      .send_ipi_single        = vsmp_send_ipi_single,
-+      .send_ipi_mask          = vsmp_send_ipi_mask,
-       .init_secondary         = vsmp_init_secondary,
-       .smp_finish             = vsmp_smp_finish,
-       .boot_secondary         = vsmp_boot_secondary,
---- a/arch/mips/lantiq/irq.c
-+++ b/arch/mips/lantiq/irq.c
-@@ -272,6 +272,47 @@ static void ltq_hw_irq_handler(struct ir
-       ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
- }
-+#ifdef CONFIG_MIPS_MT_SMP
-+void __init arch_init_ipiirq(int irq, struct irqaction *action)
-+{
-+      setup_irq(irq, action);
-+      irq_set_handler(irq, handle_percpu_irq);
-+}
-+
-+static void ltq_sw0_irqdispatch(void)
-+{
-+      do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
-+}
-+
-+static void ltq_sw1_irqdispatch(void)
-+{
-+      do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ);
-+}
-+static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
-+{
-+      scheduler_ipi();
-+      return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
-+{
-+      generic_smp_call_function_interrupt();
-+      return IRQ_HANDLED;
-+}
-+
-+static struct irqaction irq_resched = {
-+      .handler        = ipi_resched_interrupt,
-+      .flags          = IRQF_PERCPU,
-+      .name           = "IPI_resched"
-+};
-+
-+static struct irqaction irq_call = {
-+      .handler        = ipi_call_interrupt,
-+      .flags          = IRQF_PERCPU,
-+      .name           = "IPI_call"
-+};
-+#endif
-+
- asmlinkage void plat_irq_dispatch(void)
- {
-       unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
-@@ -359,6 +400,17 @@ int __init icu_of_init(struct device_nod
-               (MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE,
-               &irq_domain_ops, 0);
-+#if defined(CONFIG_MIPS_MT_SMP)
-+      if (cpu_has_vint) {
-+              pr_info("Setting up IPI vectored interrupts\n");
-+              set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ltq_sw0_irqdispatch);
-+              set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ltq_sw1_irqdispatch);
-+      }
-+      arch_init_ipiirq(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ,
-+              &irq_resched);
-+      arch_init_ipiirq(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ, &irq_call);
-+#endif
-+
- #ifndef CONFIG_MIPS_MT_SMP
-       set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 |
-               IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
---- a/arch/mips/mti-malta/malta-int.c
-+++ b/arch/mips/mti-malta/malta-int.c
-@@ -144,6 +144,56 @@ static irqreturn_t corehi_handler(int ir
-       return IRQ_HANDLED;
- }
-+#ifdef CONFIG_MIPS_MT_SMP
-+
-+#define MIPS_CPU_IPI_RESCHED_IRQ 0    /* SW int 0 for resched */
-+#define C_RESCHED C_SW0
-+#define MIPS_CPU_IPI_CALL_IRQ 1               /* SW int 1 for resched */
-+#define C_CALL C_SW1
-+static int cpu_ipi_resched_irq, cpu_ipi_call_irq;
-+
-+static void ipi_resched_dispatch(void)
-+{
-+      do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
-+}
-+
-+static void ipi_call_dispatch(void)
-+{
-+      do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ);
-+}
-+
-+static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
-+{
-+#ifdef CONFIG_MIPS_VPE_APSP_API_CMP
-+      if (aprp_hook)
-+              aprp_hook();
-+#endif
-+
-+      scheduler_ipi();
-+
-+      return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
-+{
-+      generic_smp_call_function_interrupt();
-+
-+      return IRQ_HANDLED;
-+}
-+
-+static struct irqaction irq_resched = {
-+      .handler        = ipi_resched_interrupt,
-+      .flags          = IRQF_PERCPU,
-+      .name           = "IPI_resched"
-+};
-+
-+static struct irqaction irq_call = {
-+      .handler        = ipi_call_interrupt,
-+      .flags          = IRQF_PERCPU,
-+      .name           = "IPI_call"
-+};
-+#endif /* CONFIG_MIPS_MT_SMP */
-+
- static struct irqaction corehi_irqaction = {
-       .handler = corehi_handler,
-       .name = "CoreHi",
-@@ -171,6 +221,12 @@ static msc_irqmap_t msc_eicirqmap[] __in
- static int msc_nr_eicirqs __initdata = ARRAY_SIZE(msc_eicirqmap);
-+void __init arch_init_ipiirq(int irq, struct irqaction *action)
-+{
-+      setup_irq(irq, action);
-+      irq_set_handler(irq, handle_percpu_irq);
-+}
-+
- void __init arch_init_irq(void)
- {
-       int corehi_irq;
-@@ -216,11 +272,30 @@ void __init arch_init_irq(void)
-       if (mips_gic_present()) {
-               corehi_irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_COREHI;
--      } else if (cpu_has_veic) {
--              set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch);
--              corehi_irq = MSC01E_INT_BASE + MSC01E_INT_COREHI;
-       } else {
--              corehi_irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_COREHI;
-+#if defined(CONFIG_MIPS_MT_SMP)
-+              /* set up ipi interrupts */
-+              if (cpu_has_veic) {
-+                      set_vi_handler (MSC01E_INT_SW0, ipi_resched_dispatch);
-+                      set_vi_handler (MSC01E_INT_SW1, ipi_call_dispatch);
-+                      cpu_ipi_resched_irq = MSC01E_INT_SW0;
-+                      cpu_ipi_call_irq = MSC01E_INT_SW1;
-+              } else {
-+                      cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE +
-+                              MIPS_CPU_IPI_RESCHED_IRQ;
-+                      cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE +
-+                              MIPS_CPU_IPI_CALL_IRQ;
-+              }
-+              arch_init_ipiirq(cpu_ipi_resched_irq, &irq_resched);
-+              arch_init_ipiirq(cpu_ipi_call_irq, &irq_call);
-+#endif
-+              if (cpu_has_veic) {
-+                      set_vi_handler(MSC01E_INT_COREHI,
-+                                     corehi_irqdispatch);
-+                      corehi_irq = MSC01E_INT_BASE + MSC01E_INT_COREHI;
-+              } else {
-+                      corehi_irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_COREHI;
-+              }
-       }
-       setup_irq(corehi_irq, &corehi_irqaction);
index 14e8d73..15ccde4 100644 (file)
@@ -84,7 +84,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
  {
        struct bonding *bond = netdev_priv(bond_dev);
        const struct net_device_ops *slave_ops = slave_dev->netdev_ops;
-@@ -3506,7 +3507,7 @@ static int bond_do_ioctl(struct net_devi
+@@ -3509,7 +3510,7 @@ static int bond_do_ioctl(struct net_devi
        switch (cmd) {
        case BOND_ENSLAVE_OLD:
        case SIOCBONDENSLAVE:
index 9cec9dc..d1e7595 100644 (file)
@@ -10349,7 +10349,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
                                 edesc->sec4_sg, DMA_TO_DEVICE);
        if (ret)
                goto unmap_ctx;
-@@ -1123,7 +1084,6 @@ static int ahash_final_no_ctx(struct aha
+@@ -1126,7 +1087,6 @@ static int ahash_final_no_ctx(struct aha
                dev_err(jrdev, "unable to map dst\n");
                goto unmap;
        }
@@ -10357,7 +10357,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
  
  #ifdef DEBUG
        print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ",
-@@ -1205,7 +1165,6 @@ static int ahash_update_no_ctx(struct ah
+@@ -1208,7 +1168,6 @@ static int ahash_update_no_ctx(struct ah
  
                edesc->src_nents = src_nents;
                edesc->sec4_sg_bytes = sec4_sg_bytes;
@@ -10365,7 +10365,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
  
                ret = buf_map_to_sec4_sg(jrdev, edesc->sec4_sg, state);
                if (ret)
-@@ -1417,7 +1376,6 @@ static int ahash_update_first(struct aha
+@@ -1420,7 +1379,6 @@ static int ahash_update_first(struct aha
                }
  
                edesc->src_nents = src_nents;
@@ -10373,7 +10373,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
  
                ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, 0, 0,
                                          to_hash);
-@@ -1719,6 +1677,7 @@ static int caam_hash_cra_init(struct cry
+@@ -1722,6 +1680,7 @@ static int caam_hash_cra_init(struct cry
                                         HASH_MSG_LEN + 64,
                                         HASH_MSG_LEN + SHA512_DIGEST_SIZE };
        dma_addr_t dma_addr;
@@ -10381,7 +10381,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
  
        /*
         * Get a Job ring from Job Ring driver to ensure in-order
-@@ -1730,10 +1689,13 @@ static int caam_hash_cra_init(struct cry
+@@ -1733,10 +1692,13 @@ static int caam_hash_cra_init(struct cry
                return PTR_ERR(ctx->jrdev);
        }
  
@@ -10396,7 +10396,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
        if (dma_mapping_error(ctx->jrdev, dma_addr)) {
                dev_err(ctx->jrdev, "unable to map shared descriptors\n");
                caam_jr_free(ctx->jrdev);
-@@ -1768,7 +1730,7 @@ static void caam_hash_cra_exit(struct cr
+@@ -1771,7 +1733,7 @@ static void caam_hash_cra_exit(struct cr
        dma_unmap_single_attrs(ctx->jrdev, ctx->sh_desc_update_dma,
                               offsetof(struct caam_hash_ctx,
                                        sh_desc_update_dma),