#include <asm/danube/danube.h>
#include <asm/danube/danube_irq.h>
#include <asm/danube/danube_dma.h>
+#include <asm/danube/danube_pmu.h>
/*25 descriptors for each dma channel,4096/8/20=25.xx*/
#define DANUBE_DMA_DESCRIPTOR_OFFSET 25
int i;
// enable DMA from PMU
- writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_DMA, DANUBE_PMU_PWDCR);
+ danube_pmu_enable(DANUBE_PMU_PWDCR_DMA);
// reset DMA
writel(readl(DANUBE_DMA_CTRL) | 1, DANUBE_DMA_CTRL);
--- /dev/null
+/*
+ * arch/mips/danube/pmu.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <asm/danube/danube.h>
+
+void
+danube_pmu_enable (unsigned int module)
+{
+ int err = 1000000;
+
+ writel(readl(DANUBE_PMU_PWDCR) & ~module, DANUBE_PMU_PWDCR);
+ while (--err && (readl(DANUBE_PMU_PWDSR) & module)) {}
+
+ if (!err)
+ panic("activating PMU module failed!");
+}
+EXPORT_SYMBOL(danube_pmu_enable);
+
+void
+danube_pmu_disable (unsigned int module)
+{
+ writel(readl(DANUBE_PMU_PWDCR) | module, DANUBE_PMU_PWDCR);
+}
+EXPORT_SYMBOL(danube_pmu_disable);
#include <asm/irq.h>
#include <asm/danube/danube.h>
#include <asm/danube/danube_irq.h>
+#include <asm/danube/danube_pmu.h>
static unsigned int r4k_offset; /* Amount to increment compare reg each time */
static unsigned int r4k_cur; /* What counter should be at next timer irq */
r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur);
- writel(readl(DANUBE_PMU_PWDCR) & ~(DANUBE_PMU_PWDCR_GPT|DANUBE_PMU_PWDCR_FPI), DANUBE_PMU_PWDCR);
+ danube_pmu_enable(DANUBE_PMU_PWDCR_GPT | DANUBE_PMU_PWDCR_FPI);
writel(0x100, DANUBE_GPTU_GPT_CLC);
#include <linux/errno.h>
#include <asm/danube/danube.h>
#include <asm/danube/danube_gpio.h>
-#include <asm/delay.h>
+#include <asm/danube/danube_pmu.h>
#define DANUBE_LED_CLK_EDGE DANUBE_LED_FALLING
//#define DANUBE_LED_CLK_EDGE DANUBE_LED_RISING
}
}
-static void
-danube_led_enable (void)
-{
- int err = 1000000;
-
- writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_LED, DANUBE_PMU_PWDCR);
- while (--err && (readl(DANUBE_PMU_PWDSR) & DANUBE_PMU_PWDCR_LED)) {}
-
- if (!err)
- panic("Activating LED in PMU failed!");
-}
-
-static inline void
-danube_led_disable (void)
-{
- writel(readl(DANUBE_PMU_PWDCR) | DANUBE_PMU_PWDCR_LED, DANUBE_PMU_PWDCR);
-}
-
static int
led_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
writel(readl(DANUBE_LED_CON0) | DANUBE_LED_ADSL_SRC, DANUBE_LED_CON0);
/* per default, the leds are turned on */
- danube_led_enable();
+ danube_pmu_enable(DANUBE_PMU_PWDCR_LED);
danube_led_major = register_chrdev(0, "danube_led", &danube_led_fops);
#include <asm/danube/danube.h>
#include <asm/danube/danube_mii0.h>
#include <asm/danube/danube_dma.h>
+#include <asm/danube/danube_pmu.h>
static struct net_device danube_mii0_dev;
static unsigned char u_boot_ethaddr[MAX_ADDR_LEN];
static void
danube_sw_chip_init (int mode)
{
- writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_DMA, DANUBE_PMU_PWDCR);
- writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_PPE, DANUBE_PMU_PWDCR);
- wmb();
+ danube_pmu_enable(DANUBE_PMU_PWDCR_DMA);
+ danube_pmu_enable(DANUBE_PMU_PWDCR_PPE);
if(mode == REV_MII_MODE)
writel((readl(DANUBE_PPE32_CFG) & PPE32_MII_MASK) | PPE32_MII_REVERSE, DANUBE_PPE32_CFG);
#define DANUBE_PMU_PWDCR ((u32*)(DANUBE_PMU_BASE_ADDR + 0x001C))
#define DANUBE_PMU_PWDSR ((u32*)(DANUBE_PMU_BASE_ADDR + 0x0020))
-#define DANUBE_PMU_PWDCR_DMA 0x20
-#define DANUBE_PMU_PWDCR_LED 0x800
-#define DANUBE_PMU_PWDCR_GPT 0x1000
-#define DANUBE_PMU_PWDCR_PPE 0x2000
-#define DANUBE_PMU_PWDCR_FPI 0x4000
-
/*------------ ICU */
--- /dev/null
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
+ *
+ */
+#ifndef _DANUBE_PMU_H__
+#define _DANUBE_PMU_H__
+
+#define DANUBE_PMU_PWDCR_DMA 0x20
+#define DANUBE_PMU_PWDCR_LED 0x800
+#define DANUBE_PMU_PWDCR_GPT 0x1000
+#define DANUBE_PMU_PWDCR_PPE 0x2000
+#define DANUBE_PMU_PWDCR_FPI 0x4000
+
+void danube_pmu_enable (unsigned int module);
+void danube_pmu_disable (unsigned int module);
+
+#endif
projects / openwrt / openwrt.git / commitdiff