mvebu: drop linux 4.4 and 4.9 support
authorFelix Fietkau <nbd@nbd.name>
Mon, 9 Apr 2018 07:49:44 +0000 (09:49 +0200)
committerFelix Fietkau <nbd@nbd.name>
Thu, 19 Apr 2018 12:38:36 +0000 (14:38 +0200)
Signed-off-by: Felix Fietkau <nbd@nbd.name>
147 files changed:
target/linux/mvebu/config-4.4 [deleted file]
target/linux/mvebu/config-4.9 [deleted file]
target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-rango.dts [deleted file]
target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-shelby.dts [deleted file]
target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-rango.dts [deleted file]
target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-shelby.dts [deleted file]
target/linux/mvebu/patches-4.4/002-add_powertables.patch [deleted file]
target/linux/mvebu/patches-4.4/003-add_switch_nodes.patch [deleted file]
target/linux/mvebu/patches-4.4/010-build_new_dtbs.patch [deleted file]
target/linux/mvebu/patches-4.4/020-mtd-nand-pxa3xx_nand-add-support-for-partial-chunks.patch [deleted file]
target/linux/mvebu/patches-4.4/021-mtd-pxa3xx_nand-Increase-the-initial-chunk-size.patch [deleted file]
target/linux/mvebu/patches-4.4/022-mtd-pxa3xx_nand-Fix-initial-controller-configuration.patch [deleted file]
target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch [deleted file]
target/linux/mvebu/patches-4.4/030-mvneta-consolidate-autoneg-enabling.patch [deleted file]
target/linux/mvebu/patches-4.4/031-mvneta-implement-ethtool-autonegotiation-control.patch [deleted file]
target/linux/mvebu/patches-4.4/032-net-mvneta-Make-the-default-queue-related-for-each-p.patch [deleted file]
target/linux/mvebu/patches-4.4/033-net-mvneta-Associate-RX-queues-with-each-CPU.patch [deleted file]
target/linux/mvebu/patches-4.4/034-net-mvneta-Add-naive-RSS-support.patch [deleted file]
target/linux/mvebu/patches-4.4/035-net-mvneta-Configure-XPS-support.patch [deleted file]
target/linux/mvebu/patches-4.4/036-net-mvneta-fix-trivial-cut-off-issue-in-mvneta_ethto.patch [deleted file]
target/linux/mvebu/patches-4.4/038-net-mvneta-Fix-the-CPU-choice-in-mvneta_percpu_elect.patch [deleted file]
target/linux/mvebu/patches-4.4/039-net-mvneta-Use-on_each_cpu-when-possible.patch [deleted file]
target/linux/mvebu/patches-4.4/040-net-mvneta-Modify-the-queue-related-fields-from-each.patch [deleted file]
target/linux/mvebu/patches-4.4/041-net-mvneta-The-mvneta_percpu_elect-function-should-b.patch [deleted file]
target/linux/mvebu/patches-4.4/042-net-mvneta-Fix-race-condition-during-stopping.patch [deleted file]
target/linux/mvebu/patches-4.4/043-net-mvneta-sort-the-headers-in-alphabetic-order.patch [deleted file]
target/linux/mvebu/patches-4.4/044-net-add-a-hardware-buffer-management-helper-API.patch [deleted file]
target/linux/mvebu/patches-4.4/045-net-mvneta-bm-add-support-for-hardware-buffer-manage.patch [deleted file]
target/linux/mvebu/patches-4.4/046-net-mvneta-Use-the-new-hwbm-framework.patch [deleted file]
target/linux/mvebu/patches-4.4/047-net-mvneta-Fix-spinlock-usage.patch [deleted file]
target/linux/mvebu/patches-4.4/048-net-mvneta-fix-error-messages-in-mvneta_port_down-fu.patch [deleted file]
target/linux/mvebu/patches-4.4/049-net-mvneta-replace-MVNETA_CPU_D_CACHE_LINE_SIZE-with.patch [deleted file]
target/linux/mvebu/patches-4.4/050-net-mvneta-fix-changing-MTU-when-using-per-cpu-proce.patch [deleted file]
target/linux/mvebu/patches-4.4/051-ARM-dts-armada-38x-add-buffer-manager-nodes.patch [deleted file]
target/linux/mvebu/patches-4.4/052-ARM-dts-armada-xp-add-buffer-manager-nodes.patch [deleted file]
target/linux/mvebu/patches-4.4/053-ARM-dts-Add-SolidRun-Armada-388-Clearfog-A1-DT-file.patch [deleted file]
target/linux/mvebu/patches-4.4/054-ARM-dts-armada-38x-enable-buffer-manager-support-on-.patch [deleted file]
target/linux/mvebu/patches-4.4/055-ARM-dts-armada-388-clearfog-remove-duplicate-mdio-en.patch [deleted file]
target/linux/mvebu/patches-4.4/100-find_active_root.patch [deleted file]
target/linux/mvebu/patches-4.4/102-revert_i2c_delay.patch [deleted file]
target/linux/mvebu/patches-4.4/103-remove-nand-driver-bug.patch [deleted file]
target/linux/mvebu/patches-4.4/104-linksys_mamba_disable_keep_config.patch [deleted file]
target/linux/mvebu/patches-4.4/106-enable-bm-on-linksys-devices.patch [deleted file]
target/linux/mvebu/patches-4.4/110-pxa3xxx_revert_irq_thread.patch [deleted file]
target/linux/mvebu/patches-4.4/120-phy-move-fixed_phy-MII-register-generation-to-a-libr.patch [deleted file]
target/linux/mvebu/patches-4.4/121-phy-convert-swphy-register-generation-to-tabular-for.patch [deleted file]
target/linux/mvebu/patches-4.4/122-phy-separate-swphy-state-validation-from-register-ge.patch [deleted file]
target/linux/mvebu/patches-4.4/123-phy-generate-swphy-registers-on-the-fly.patch [deleted file]
target/linux/mvebu/patches-4.4/124-phy-improve-safety-of-fixed-phy-MII-register-reading.patch [deleted file]
target/linux/mvebu/patches-4.4/125-phy-provide-a-hook-for-link-up-link-down-events.patch [deleted file]
target/linux/mvebu/patches-4.4/126-phy-marvell-88E1512-add-flow-control-support.patch [deleted file]
target/linux/mvebu/patches-4.4/127-phy-export-phy_start_machine-for-phylink.patch [deleted file]
target/linux/mvebu/patches-4.4/128-phy-export-phy_speed_to_str-for-phylink.patch [deleted file]
target/linux/mvebu/patches-4.4/129-phy-add-I2C-mdio-bus.patch [deleted file]
target/linux/mvebu/patches-4.4/130-phylink-add-phylink-infrastructure.patch [deleted file]
target/linux/mvebu/patches-4.4/131-phylink-add-hooks-for-SFP-support.patch [deleted file]
target/linux/mvebu/patches-4.4/132-sfp-add-phylink-based-SFP-module-support.patch [deleted file]
target/linux/mvebu/patches-4.4/133-sfp-display-SFP-module-information.patch [deleted file]
target/linux/mvebu/patches-4.4/134-net-mvneta-convert-to-phylink.patch [deleted file]
target/linux/mvebu/patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch [deleted file]
target/linux/mvebu/patches-4.4/136-phylink-add-ethtool-nway_reset-support.patch [deleted file]
target/linux/mvebu/patches-4.4/137-net-mvneta-add-nway_reset-support.patch [deleted file]
target/linux/mvebu/patches-4.4/138-phylink-add-flow-control-support.patch [deleted file]
target/linux/mvebu/patches-4.4/139-net-mvneta-add-flow-control-support-via-phylink.patch [deleted file]
target/linux/mvebu/patches-4.4/140-net-mvneta-enable-flow-control-for-PHY-connections.patch [deleted file]
target/linux/mvebu/patches-4.4/141-net-mvneta-enable-flow-control-for-fixed-connections.patch [deleted file]
target/linux/mvebu/patches-4.4/142-phylink-add-EEE-support.patch [deleted file]
target/linux/mvebu/patches-4.4/143-net-mvneta-add-EEE-support.patch [deleted file]
target/linux/mvebu/patches-4.4/144-phylink-add-module-EEPROM-support.patch [deleted file]
target/linux/mvebu/patches-4.4/145-net-mvneta-add-module-EEPROM-reading-support.patch [deleted file]
target/linux/mvebu/patches-4.4/146-sfp-phylink-hook-up-eeprom-functions.patch [deleted file]
target/linux/mvebu/patches-4.4/147-net-mvneta-add-BQL-support.patch [deleted file]
target/linux/mvebu/patches-4.4/202-gpio_mvebu_add_limited_pwm_support.patch [deleted file]
target/linux/mvebu/patches-4.4/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch [deleted file]
target/linux/mvebu/patches-4.4/204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch [deleted file]
target/linux/mvebu/patches-4.4/205-arm_mvebu_enable_pwm_in_defconfig.patch [deleted file]
target/linux/mvebu/patches-4.4/206-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch [deleted file]
target/linux/mvebu/patches-4.4/207-armada-385-rd-mtd-partitions.patch [deleted file]
target/linux/mvebu/patches-4.4/208-ARM-mvebu-385-ap-Add-partitions.patch [deleted file]
target/linux/mvebu/patches-4.4/209-clearfog_switch_node.patch [deleted file]
target/linux/mvebu/patches-4.4/210-ARM-dts-armada388-clearfog-add-SFP-module-support.patch [deleted file]
target/linux/mvebu/patches-4.4/300-reprobe_sfp_phy.patch [deleted file]
target/linux/mvebu/patches-4.4/400-mvneta-tx-queue-workaround.patch [deleted file]
target/linux/mvebu/patches-4.9/002-add_powertables.patch [deleted file]
target/linux/mvebu/patches-4.9/003-add_switch_nodes.patch [deleted file]
target/linux/mvebu/patches-4.9/004-add_sata_disk_activity_trigger.patch [deleted file]
target/linux/mvebu/patches-4.9/010-build_new_dtbs.patch [deleted file]
target/linux/mvebu/patches-4.9/100-find_active_root.patch [deleted file]
target/linux/mvebu/patches-4.9/102-revert_i2c_delay.patch [deleted file]
target/linux/mvebu/patches-4.9/103-remove-nand-driver-bug.patch [deleted file]
target/linux/mvebu/patches-4.9/104-linksys_mamba_disable_keep_config.patch [deleted file]
target/linux/mvebu/patches-4.9/106-enable-bm-on-linksys-devices.patch [deleted file]
target/linux/mvebu/patches-4.9/110-pxa3xxx_revert_irq_thread.patch [deleted file]
target/linux/mvebu/patches-4.9/120-net-mvneta-add-BQL-support.patch [deleted file]
target/linux/mvebu/patches-4.9/130-irqchip-armada-xp-backport.patch [deleted file]
target/linux/mvebu/patches-4.9/200-gpio_mvebu_add_limited_pwm_support.patch [deleted file]
target/linux/mvebu/patches-4.9/201-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch [deleted file]
target/linux/mvebu/patches-4.9/202-mvebu_xp_add_pwm_properties_to_dtsi_files.patch [deleted file]
target/linux/mvebu/patches-4.9/203-arm_mvebu_enable_pwm_in_defconfig.patch [deleted file]
target/linux/mvebu/patches-4.9/204-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch [deleted file]
target/linux/mvebu/patches-4.9/205-armada-385-rd-mtd-partitions.patch [deleted file]
target/linux/mvebu/patches-4.9/206-ARM-mvebu-385-ap-Add-partitions.patch [deleted file]
target/linux/mvebu/patches-4.9/210-clearfog_switch_node.patch [deleted file]
target/linux/mvebu/patches-4.9/220-ARM-dts-armada388-clearfog-add-SFP-module-support.patch [deleted file]
target/linux/mvebu/patches-4.9/300-mvneta-tx-queue-workaround.patch [deleted file]
target/linux/mvebu/patches-4.9/400-phy-provide-a-hook-for-link-up-link-down-events.patch [deleted file]
target/linux/mvebu/patches-4.9/401-net-phy-move-phy-MMD-accessors-to-phy-core.c.patch [deleted file]
target/linux/mvebu/patches-4.9/402-net-phy-make-phy_-read-write-_mmd-generic-MMD-access.patch [deleted file]
target/linux/mvebu/patches-4.9/403-net-phy-avoid-setting-unsupported-EEE-advertisments.patch [deleted file]
target/linux/mvebu/patches-4.9/404-net-phy-restart-phy-autonegotiation-after-EEE-advert.patch [deleted file]
target/linux/mvebu/patches-4.9/405-net-phy-allow-EEE-with-SGMII-interface-modes.patch [deleted file]
target/linux/mvebu/patches-4.9/406-net-phy-improve-phylib-correctness-for-non-autoneg-s.patch [deleted file]
target/linux/mvebu/patches-4.9/407-net-phy-add-802.3-clause-45-support-to-phylib.patch [deleted file]
target/linux/mvebu/patches-4.9/408-net-phy-hook-up-clause-45-autonegotiation-restart.patch [deleted file]
target/linux/mvebu/patches-4.9/409-net-phy-don-t-double-read-clause-45-status-register.patch [deleted file]
target/linux/mvebu/patches-4.9/410-net-phy-allow-settings-table-to-support-more-than-32.patch [deleted file]
target/linux/mvebu/patches-4.9/411-net-phy-split-out-PHY-speed-and-duplex-string-genera.patch [deleted file]
target/linux/mvebu/patches-4.9/412-net-phy-move-phy_lookup_setting-and-guts-of-phy_supp.patch [deleted file]
target/linux/mvebu/patches-4.9/413-phy-export-phy_start_machine-for-phylink.patch [deleted file]
target/linux/mvebu/patches-4.9/414-phy-add-I2C-mdio-bus.patch [deleted file]
target/linux/mvebu/patches-4.9/415-phylink-add-phylink-infrastructure.patch [deleted file]
target/linux/mvebu/patches-4.9/416-phylink-add-hooks-for-SFP-support.patch [deleted file]
target/linux/mvebu/patches-4.9/417-sfp-add-phylink-based-SFP-module-support.patch [deleted file]
target/linux/mvebu/patches-4.9/418-sfp-display-SFP-module-information.patch [deleted file]
target/linux/mvebu/patches-4.9/419-net-mvneta-convert-to-phylink.patch [deleted file]
target/linux/mvebu/patches-4.9/420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch [deleted file]
target/linux/mvebu/patches-4.9/421-phylink-add-ethtool-nway_reset-support.patch [deleted file]
target/linux/mvebu/patches-4.9/422-net-mvneta-add-nway_reset-support.patch [deleted file]
target/linux/mvebu/patches-4.9/423-phylink-add-flow-control-support.patch [deleted file]
target/linux/mvebu/patches-4.9/424-net-mvneta-add-flow-control-support-via-phylink.patch [deleted file]
target/linux/mvebu/patches-4.9/425-net-mvneta-enable-flow-control-for-PHY-connections.patch [deleted file]
target/linux/mvebu/patches-4.9/426-net-mvneta-enable-flow-control-for-fixed-connections.patch [deleted file]
target/linux/mvebu/patches-4.9/427-phylink-add-EEE-support.patch [deleted file]
target/linux/mvebu/patches-4.9/428-net-mvneta-add-EEE-support.patch [deleted file]
target/linux/mvebu/patches-4.9/429-phylink-add-module-EEPROM-support.patch [deleted file]
target/linux/mvebu/patches-4.9/430-net-mvneta-add-module-EEPROM-reading-support.patch [deleted file]
target/linux/mvebu/patches-4.9/431-sfp-phylink-hook-up-eeprom-functions.patch [deleted file]
target/linux/mvebu/patches-4.9/432-phy-marvell-88E1512-add-flow-control-support.patch [deleted file]
target/linux/mvebu/patches-4.9/433-phy-marvell-88E1111-add-flow-control-support.patch [deleted file]
target/linux/mvebu/patches-4.9/434-phy-marvell-88E1540-add-flow-control-support.patch [deleted file]
target/linux/mvebu/patches-4.9/436-phylink-propagate-PHY-interface-mode-to-MAC-driver.patch [deleted file]
target/linux/mvebu/patches-4.9/437-phylink-ensure-link-drops-are-reported.patch [deleted file]
target/linux/mvebu/patches-4.9/450-reprobe_sfp_phy.patch [deleted file]
target/linux/mvebu/patches-4.9/470-ClearFog-renamed-upstream.patch [deleted file]
target/linux/mvebu/patches-4.9/471-add-ClearFog-Base-device-tree-files.patch [deleted file]
target/linux/mvebu/patches-4.9/472-armada-solidrun-microsom-backport-improvements.patch [deleted file]
target/linux/mvebu/patches-4.9/473-fix-marvell-phy-initialization-issues.patch [deleted file]

diff --git a/target/linux/mvebu/config-4.4 b/target/linux/mvebu/config-4.4
deleted file mode 100644 (file)
index 789b220..0000000
+++ /dev/null
@@ -1,436 +0,0 @@
-CONFIG_AHCI_MVEBU=y
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_MVEBU=y
-CONFIG_ARCH_NR_GPIO=0
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
-CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_ARM=y
-CONFIG_ARMADA_370_CLK=y
-CONFIG_ARMADA_370_XP_TIMER=y
-CONFIG_ARMADA_38X_CLK=y
-CONFIG_ARMADA_THERMAL=y
-CONFIG_ARMADA_XP_CLK=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
-CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
-CONFIG_ARM_CPU_SUSPEND=y
-CONFIG_ARM_CRYPTO=y
-CONFIG_ARM_ERRATA_720789=y
-CONFIG_ARM_GIC=y
-CONFIG_ARM_HAS_SG_CHAIN=y
-CONFIG_ARM_HEAVY_MB=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARM_MVEBU_V7_CPUIDLE=y
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-CONFIG_ARM_THUMB=y
-# CONFIG_ARM_THUMBEE is not set
-CONFIG_ARM_UNWIND=y
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
-CONFIG_ATA=y
-CONFIG_ATAGS=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BOUNCE=y
-# CONFIG_CACHE_FEROCEON_L2 is not set
-CONFIG_CACHE_L2X0=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLKSRC_PROBE=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_COMMON_CLK=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
-CONFIG_CPU_FREQ_GOV_COMMON=y
-# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
-# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_HAS_ASID=y
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_GOV_LADDER=y
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_PJ4B=y
-CONFIG_CPU_PM=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_THERMAL=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-CONFIG_CRYPTO_ABLK_HELPER=y
-CONFIG_CRYPTO_AEAD=y
-CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_AES_ARM=y
-CONFIG_CRYPTO_AES_ARM_BS=y
-# CONFIG_CRYPTO_AES_ARM_CE is not set
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_CRYPTD=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_DEV_MARVELL_CESA=y
-# CONFIG_CRYPTO_GHASH_ARM_CE is not set
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_HW=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_MANAGER2=y
-CONFIG_CRYPTO_NULL2=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA1_ARM=y
-# CONFIG_CRYPTO_SHA1_ARM_CE is not set
-CONFIG_CRYPTO_SHA1_ARM_NEON=y
-CONFIG_CRYPTO_SHA256_ARM=y
-# CONFIG_CRYPTO_SHA2_ARM_CE is not set
-CONFIG_CRYPTO_SHA512_ARM=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
-CONFIG_DEBUG_MVEBU_UART0=y
-# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set
-# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set
-CONFIG_DEBUG_UART_8250=y
-# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
-CONFIG_DEBUG_UART_8250_SHIFT=2
-# CONFIG_DEBUG_UART_8250_WORD is not set
-CONFIG_DEBUG_UART_PHYS=0xd0012000
-CONFIG_DEBUG_UART_VIRT=0xfec12000
-CONFIG_DEBUG_UNCOMPRESS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DMADEVICES=y
-CONFIG_DMA_ENGINE=y
-CONFIG_DMA_ENGINE_RAID=y
-CONFIG_DMA_OF=y
-CONFIG_DTC=y
-# CONFIG_DW_DMAC_PCI is not set
-CONFIG_EARLY_PRINTK=y
-CONFIG_EDAC_ATOMIC_SCRUB=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_EXT4_FS=y
-# CONFIG_F2FS_CHECK_FS is not set
-CONFIG_F2FS_FS=y
-# CONFIG_F2FS_FS_SECURITY is not set
-CONFIG_F2FS_FS_XATTR=y
-CONFIG_F2FS_STAT_FS=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_FS_MBCACHE=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PHY=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GLOB=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_DEVRES=y
-CONFIG_GPIO_MVEBU=y
-CONFIG_GPIO_MVEBU_PWM=y
-CONFIG_GPIO_PCA953X=y
-# CONFIG_GPIO_PCA953X_IRQ is not set
-CONFIG_GPIO_SYSFS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_AUDITSYSCALL=y
-CONFIG_HAVE_ARCH_BITREVERSE=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_ARM_SCU=y
-CONFIG_HAVE_ARM_TWD=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_BPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_OPTPROBES=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_PERF_REGS=y
-CONFIG_HAVE_PERF_USER_STACK_DUMP=y
-CONFIG_HAVE_PROC_CPU=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SMP=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_UID16=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HIGHMEM=y
-# CONFIG_HIGHPTE is not set
-CONFIG_HOTPLUG_CPU=y
-CONFIG_HWBM=y
-CONFIG_HWMON=y
-CONFIG_HZ_FIXED=0
-CONFIG_HZ_PERIODIC=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IOMMU_HELPER=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-# CONFIG_IWMMXT is not set
-CONFIG_JBD2=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_PCA963X=y
-CONFIG_LEDS_TLC591XX=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MACH_ARMADA_370=y
-# CONFIG_MACH_ARMADA_375 is not set
-CONFIG_MACH_ARMADA_38X=y
-# CONFIG_MACH_ARMADA_39X is not set
-CONFIG_MACH_ARMADA_XP=y
-# CONFIG_MACH_DOVE is not set
-CONFIG_MACH_MVEBU_ANY=y
-CONFIG_MACH_MVEBU_V7=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MANGLE_BOOTARGS=y
-CONFIG_MARVELL_PHY=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MDIO_I2C=y
-CONFIG_MEMORY=y
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGHT_HAVE_PCI=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_MVSDIO=y
-CONFIG_MMC_SDHCI=y
-# CONFIG_MMC_SDHCI_PCI is not set
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_PXAV3=y
-# CONFIG_MMC_TIFM_SD is not set
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND_PXA3xx=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_SPLIT_FIRMWARE=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_BLOCK=y
-# CONFIG_MTD_UBI_FASTMAP is not set
-# CONFIG_MTD_UBI_GLUEBI is not set
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MULTI_IRQ_HANDLER=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_MVEBU_CLK_COMMON=y
-CONFIG_MVEBU_CLK_COREDIV=y
-CONFIG_MVEBU_CLK_CPU=y
-CONFIG_MVEBU_DEVBUS=y
-CONFIG_MVEBU_MBUS=y
-CONFIG_MVMDIO=y
-CONFIG_MVNETA=y
-CONFIG_MVNETA_BM=y
-CONFIG_MVSW61XX_PHY=y
-CONFIG_MV_XOR=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEON=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NLS=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_NO_BOOTMEM=y
-CONFIG_NR_CPUS=4
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_MTD=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_OF_RESERVED_MEM=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_ORION_WATCHDOG=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PAGE_OFFSET=0xC0000000
-CONFIG_PCI=y
-# CONFIG_PCI_DOMAINS_GENERIC is not set
-CONFIG_PCI_MVEBU=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PHYLINK=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ARMADA_370=y
-CONFIG_PINCTRL_ARMADA_38X=y
-CONFIG_PINCTRL_ARMADA_XP=y
-CONFIG_PINCTRL_MVEBU=y
-# CONFIG_PINCTRL_SINGLE is not set
-CONFIG_PJ4B_ERRATA_4742=y
-# CONFIG_PL310_ERRATA_588369 is not set
-# CONFIG_PL310_ERRATA_727915 is not set
-# CONFIG_PL310_ERRATA_753970 is not set
-# CONFIG_PL310_ERRATA_769419 is not set
-CONFIG_PLAT_ORION=y
-CONFIG_PM_OPP=y
-CONFIG_PWM=y
-CONFIG_PWM_SYSFS=y
-CONFIG_RATIONAL=y
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_I2C=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_ARMADA38X=y
-CONFIG_RTC_DRV_MV=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_SATA_MV=y
-# CONFIG_SCHED_INFO is not set
-CONFIG_SCSI=y
-CONFIG_SENSORS_PWM_FAN=y
-CONFIG_SENSORS_TMP421=y
-CONFIG_SERIAL_8250_DW=y
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SFP=y
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SOC_BUS=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_ORION=y
-CONFIG_SRAM=y
-CONFIG_SRCU=y
-CONFIG_SWCONFIG=y
-CONFIG_SWIOTLB=y
-CONFIG_SWPHY=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
-CONFIG_THERMAL_GOV_STEP_WISE=y
-CONFIG_THERMAL_HWMON=y
-CONFIG_THERMAL_OF=y
-# CONFIG_THUMB2_KERNEL is not set
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TIMER_STATS=y
-CONFIG_TREE_RCU=y
-CONFIG_UBIFS_FS=y
-# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
-CONFIG_UBIFS_FS_LZO=y
-CONFIG_UBIFS_FS_ZLIB=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_USB=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_HCD_ORION=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_LEDS_TRIGGER_USBPORT=y
-CONFIG_USB_PHY=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SUPPORT=y
-# CONFIG_USB_UHCI_HCD is not set
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_MVEBU=y
-CONFIG_USB_XHCI_PCI=y
-CONFIG_USB_XHCI_PLATFORM=y
-CONFIG_USE_OF=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_VFP=y
-CONFIG_VFPv3=y
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XPS=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/mvebu/config-4.9 b/target/linux/mvebu/config-4.9
deleted file mode 100644 (file)
index 743f667..0000000
+++ /dev/null
@@ -1,457 +0,0 @@
-CONFIG_AHCI_MVEBU=y
-CONFIG_ALIGNMENT_TRAP=y
-CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
-CONFIG_ARCH_HAS_SG_CHAIN=y
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-CONFIG_ARCH_MVEBU=y
-CONFIG_ARCH_NR_GPIO=0
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
-CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_ARM=y
-CONFIG_ARMADA_370_CLK=y
-CONFIG_ARMADA_370_XP_IRQ=y
-CONFIG_ARMADA_370_XP_TIMER=y
-CONFIG_ARMADA_38X_CLK=y
-CONFIG_ARMADA_THERMAL=y
-CONFIG_ARMADA_XP_CLK=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
-CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
-CONFIG_ARM_CPU_SUSPEND=y
-CONFIG_ARM_CRYPTO=y
-CONFIG_ARM_ERRATA_720789=y
-CONFIG_ARM_ERRATA_764369=y
-CONFIG_ARM_GIC=y
-CONFIG_ARM_HAS_SG_CHAIN=y
-CONFIG_ARM_HEAVY_MB=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARM_MVEBU_V7_CPUIDLE=y
-CONFIG_ARM_PATCH_IDIV=y
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-CONFIG_ARM_THUMB=y
-# CONFIG_ARM_THUMBEE is not set
-CONFIG_ARM_UNWIND=y
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
-CONFIG_ATA=y
-CONFIG_ATAGS=y
-CONFIG_AUTO_ZRELADDR=y
-# CONFIG_BINFMT_FLAT is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_MQ_PCI=y
-CONFIG_BOUNCE=y
-# CONFIG_CACHE_FEROCEON_L2 is not set
-CONFIG_CACHE_L2X0=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLKSRC_PROBE=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_COMMON_CLK=y
-CONFIG_CPUFREQ_DT=y
-CONFIG_CPUFREQ_DT_PLATDEV=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
-# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
-CONFIG_CPU_FREQ_GOV_ATTR_SET=y
-CONFIG_CPU_FREQ_GOV_COMMON=y
-# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
-# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
-CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_HAS_ASID=y
-# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_GOV_LADDER=y
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_PJ4B=y
-CONFIG_CPU_PM=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_THERMAL=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-CONFIG_CRYPTO_ABLK_HELPER=y
-CONFIG_CRYPTO_AEAD=y
-CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_AES_ARM=y
-CONFIG_CRYPTO_AES_ARM_BS=y
-# CONFIG_CRYPTO_AES_ARM_CE is not set
-CONFIG_CRYPTO_CRC32=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_CRYPTD=y
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_DEV_MARVELL_CESA=y
-# CONFIG_CRYPTO_GHASH_ARM_CE is not set
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_HW=y
-CONFIG_CRYPTO_LZO=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_MANAGER2=y
-CONFIG_CRYPTO_NULL2=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA1_ARM=y
-# CONFIG_CRYPTO_SHA1_ARM_CE is not set
-CONFIG_CRYPTO_SHA1_ARM_NEON=y
-CONFIG_CRYPTO_SHA256_ARM=y
-# CONFIG_CRYPTO_SHA2_ARM_CE is not set
-CONFIG_CRYPTO_SHA512_ARM=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_DCACHE_WORD_ACCESS=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
-CONFIG_DEBUG_MVEBU_UART0=y
-# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set
-# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set
-CONFIG_DEBUG_UART_8250=y
-# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set
-CONFIG_DEBUG_UART_8250_SHIFT=2
-# CONFIG_DEBUG_UART_8250_WORD is not set
-CONFIG_DEBUG_UART_PHYS=0xd0012000
-CONFIG_DEBUG_UART_VIRT=0xfec12000
-CONFIG_DEBUG_UNCOMPRESS=y
-CONFIG_DEBUG_USER=y
-CONFIG_DMADEVICES=y
-CONFIG_DMA_ENGINE=y
-CONFIG_DMA_ENGINE_RAID=y
-CONFIG_DMA_OF=y
-CONFIG_DTC=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_EDAC_ATOMIC_SCRUB=y
-CONFIG_EDAC_SUPPORT=y
-CONFIG_EXT4_FS=y
-# CONFIG_F2FS_CHECK_FS is not set
-CONFIG_F2FS_FS=y
-# CONFIG_F2FS_FS_SECURITY is not set
-CONFIG_F2FS_FS_XATTR=y
-CONFIG_F2FS_STAT_FS=y
-CONFIG_FIXED_PHY=y
-CONFIG_FIX_EARLYCON_MEM=y
-CONFIG_FS_MBCACHE=y
-CONFIG_GENERIC_ALLOCATOR=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_EARLY_IOREMAP=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
-CONFIG_GENERIC_MSI_IRQ=y
-CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PHY=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GLOB=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_MVEBU=y
-CONFIG_GPIO_MVEBU_PWM=y
-CONFIG_GPIO_PCA953X=y
-# CONFIG_GPIO_PCA953X_IRQ is not set
-CONFIG_GPIO_SYSFS=y
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_AUDITSYSCALL=y
-CONFIG_HAVE_ARCH_BITREVERSE=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-CONFIG_HAVE_ARM_SCU=y
-CONFIG_HAVE_ARM_SMCCC=y
-CONFIG_HAVE_ARM_TWD=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_OPTPROBES=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_PERF_REGS=y
-CONFIG_HAVE_PERF_USER_STACK_DUMP=y
-CONFIG_HAVE_PROC_CPU=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SMP=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_UID16=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HIGHMEM=y
-# CONFIG_HIGHPTE is not set
-CONFIG_HOTPLUG_CPU=y
-CONFIG_HWBM=y
-CONFIG_HWMON=y
-CONFIG_HZ_FIXED=0
-CONFIG_HZ_PERIODIC=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IOMMU_HELPER=y
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_IRQ_DOMAIN_HIERARCHY=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-# CONFIG_IWMMXT is not set
-CONFIG_JBD2=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LEDS_PCA963X=y
-CONFIG_LEDS_TLC591XX=y
-CONFIG_LEDS_TRIGGER_DISK=y
-CONFIG_LIBFDT=y
-CONFIG_LOCK_SPIN_ON_OWNER=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MACH_ARMADA_370=y
-# CONFIG_MACH_ARMADA_375 is not set
-CONFIG_MACH_ARMADA_38X=y
-# CONFIG_MACH_ARMADA_39X is not set
-CONFIG_MACH_ARMADA_XP=y
-# CONFIG_MACH_DOVE is not set
-CONFIG_MACH_MVEBU_ANY=y
-CONFIG_MACH_MVEBU_V7=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MANGLE_BOOTARGS=y
-CONFIG_MARVELL_PHY=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MDIO_I2C=y
-CONFIG_MEMORY=y
-# CONFIG_MFD_MAX77620 is not set
-CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-CONFIG_MIGHT_HAVE_PCI=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-CONFIG_MMC_MVSDIO=y
-CONFIG_MMC_SDHCI=y
-# CONFIG_MMC_SDHCI_PCI is not set
-CONFIG_MMC_SDHCI_PLTFM=y
-CONFIG_MMC_SDHCI_PXAV3=y
-# CONFIG_MMC_TIFM_SD is not set
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND_PXA3xx=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_MTD_SPLIT_FIRMWARE=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_BEB_LIMIT=20
-CONFIG_MTD_UBI_BLOCK=y
-# CONFIG_MTD_UBI_FASTMAP is not set
-# CONFIG_MTD_UBI_GLUEBI is not set
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MULTI_IRQ_HANDLER=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_MVEBU_CLK_COMMON=y
-CONFIG_MVEBU_CLK_COREDIV=y
-CONFIG_MVEBU_CLK_CPU=y
-CONFIG_MVEBU_DEVBUS=y
-CONFIG_MVEBU_MBUS=y
-CONFIG_MVMDIO=y
-CONFIG_MVNETA=y
-CONFIG_MVNETA_BM=y
-CONFIG_MVNETA_BM_ENABLE=y
-CONFIG_MVSW61XX_PHY=y
-CONFIG_MV_XOR=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEON=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NLS=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_NO_BOOTMEM=y
-CONFIG_NR_CPUS=4
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_OF_RESERVED_MEM=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_ORION_WATCHDOG=y
-CONFIG_OUTER_CACHE=y
-CONFIG_OUTER_CACHE_SYNC=y
-CONFIG_PADATA=y
-CONFIG_PAGE_OFFSET=0xC0000000
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DOMAINS_GENERIC=y
-CONFIG_PCI_MSI=y
-CONFIG_PCI_MSI_IRQ_DOMAIN=y
-CONFIG_PCI_MVEBU=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PHYLINK=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_ARMADA_370=y
-CONFIG_PINCTRL_ARMADA_38X=y
-CONFIG_PINCTRL_ARMADA_XP=y
-CONFIG_PINCTRL_MVEBU=y
-# CONFIG_PINCTRL_SINGLE is not set
-CONFIG_PJ4B_ERRATA_4742=y
-# CONFIG_PL310_ERRATA_588369 is not set
-# CONFIG_PL310_ERRATA_727915 is not set
-# CONFIG_PL310_ERRATA_753970 is not set
-# CONFIG_PL310_ERRATA_769419 is not set
-CONFIG_PLAT_ORION=y
-CONFIG_PM_OPP=y
-CONFIG_PWM=y
-CONFIG_PWM_SYSFS=y
-CONFIG_RATIONAL=y
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_REGMAP=y
-CONFIG_REGMAP_I2C=y
-CONFIG_REGMAP_SPI=y
-CONFIG_REGULATOR=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_ARMADA38X=y
-CONFIG_RTC_DRV_MV=y
-CONFIG_RTC_I2C_AND_SPI=y
-CONFIG_RTC_MC146818_LIB=y
-CONFIG_RWSEM_SPIN_ON_OWNER=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_SATA_MV=y
-# CONFIG_SCHED_INFO is not set
-CONFIG_SCSI=y
-CONFIG_SENSORS_PWM_FAN=y
-CONFIG_SENSORS_TMP421=y
-CONFIG_SERIAL_8250_DW=y
-CONFIG_SERIAL_8250_FSL=y
-CONFIG_SERIAL_MVEBU_CONSOLE=y
-CONFIG_SERIAL_MVEBU_UART=y
-CONFIG_SG_POOL=y
-CONFIG_SFP=y
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SOC_BUS=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-# CONFIG_SPI_CADENCE_QUADSPI is not set
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_ORION=y
-CONFIG_SRAM=y
-CONFIG_SRCU=y
-CONFIG_SWCONFIG=y
-CONFIG_SWIOTLB=y
-CONFIG_SWPHY=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_THERMAL=y
-CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
-CONFIG_THERMAL_GOV_STEP_WISE=y
-CONFIG_THERMAL_HWMON=y
-CONFIG_THERMAL_OF=y
-# CONFIG_THUMB2_KERNEL is not set
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TIMER_STATS=y
-CONFIG_TREE_RCU=y
-CONFIG_UBIFS_FS=y
-# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
-CONFIG_UBIFS_FS_LZO=y
-CONFIG_UBIFS_FS_ZLIB=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_USB=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_HCD_ORION=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_EHCI_PCI=y
-CONFIG_USB_LEDS_TRIGGER_USBPORT=y
-CONFIG_USB_PHY=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SUPPORT=y
-# CONFIG_USB_UHCI_HCD is not set
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_MVEBU=y
-CONFIG_USB_XHCI_PCI=y
-CONFIG_USB_XHCI_PLATFORM=y
-CONFIG_USE_OF=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_VFP=y
-CONFIG_VFPv3=y
-CONFIG_WATCHDOG_CORE=y
-CONFIG_XPS=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_ZLIB_INFLATE=y
diff --git a/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-rango.dts b/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-rango.dts
deleted file mode 100644 (file)
index ac4ac1b..0000000
+++ /dev/null
@@ -1,455 +0,0 @@
-/*
- * Device Tree file for the Linksys WRT3200ACM (Rango)
- *
- * Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
- *
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is licensed under the terms of the GNU General Public
- *     License version 2.  This program is licensed "as is" without
- *     any warranty of any kind, whether express or implied.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "armada-385.dtsi"
-
-/ {
-       model = "Linksys WRT3200ACM";
-       compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
-                    "marvell,armada380";
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       memory {
-               device_type = "memory";
-               reg = <0x00000000 0x20000000>; /* 512 MB */
-       };
-
-       soc {
-               ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
-                         MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
-                         MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
-                         MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
-                         MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
-
-               internal-regs {
-
-                       spi@10600 {
-                               status = "disabled";
-                       };
-
-                       i2c@11000 {
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&i2c0_pins>;
-                               status = "okay";
-
-                               tmp421@4c {
-                                       compatible = "ti,tmp421";
-                                       reg = <0x4c>;
-                               };
-
-                               pca9635@68 {
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-                                       compatible = "nxp,pca9635";
-                                       reg = <0x68>;
-
-                                       wan_amber@0 {
-                                               label = "rango:amber:wan";
-                                               reg = <0x0>;
-                                       };
-
-                                       wan_white@1 {
-                                               label = "rango:white:wan";
-                                               reg = <0x1>;
-                                       };
-
-                                       usb2@5 {
-                                               label = "rango:white:usb2";
-                                               reg = <0x5>;
-                                       };
-
-                                       usb3_1@6 {
-                                               label = "rango:white:usb3_1";
-                                               reg = <0x6>;
-                                       };
-
-                                       usb3_2@7 {
-                                               label = "rango:white:usb3_2";
-                                               reg = <0x7>;
-                                       };
-
-                                       wps_white@8 {
-                                               label = "rango:white:wps";
-                                               reg = <0x8>;
-                                       };
-
-                                       wps_amber@9 {
-                                               label = "rango:amber:wps";
-                                               reg = <0x9>;
-                                       };
-                               };
-                       };
-
-                       /* J10: VCC, NC, RX, NC, TX, GND  */
-                       serial@12000 {
-                               status = "okay";
-                       };
-
-                       ethernet@70000 {
-                               status = "okay";
-                               phy-mode = "rgmii-id";
-                               buffer-manager = <&bm>;
-                               bm,pool-long = <0>;
-                               bm,pool-short = <3>;
-                               fixed-link {
-                                       speed = <1000>;
-                                       full-duplex;
-                               };
-                       };
-
-                       ethernet@34000 {
-                               status = "okay";
-                               phy-mode = "sgmii";
-                               buffer-manager = <&bm>;
-                               bm,pool-long = <2>;
-                               bm,pool-short = <3>;
-                               fixed-link {
-                                       speed = <1000>;
-                                       full-duplex;
-                               };
-                       };
-
-                       mdio {
-                               status = "okay";
-                       };
-
-                       bm@c8000 {
-                               status = "okay";
-                       };
-
-                       sata@a8000 {
-                               status = "okay";
-                       };
-
-                       sdhci@d8000 {
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&sdhci_pins>;
-                               no-1-8-v;
-                               broken-cd;
-                               wp-inverted;
-                               bus-width = <8>;
-                               status = "okay";
-                       };
-
-                       /* USB part of the eSATA/USB 2.0 port */
-                       usb@58000 {
-                               status = "okay";
-                       };
-
-                       usb3@f8000 {
-                               status = "okay";
-                               usb-phy = <&usb3_phy>;
-                       };
-
-                       flash@d0000 {
-                               status = "okay";
-                               num-cs = <1>;
-                               nand-ecc-strength = <4>;
-                               nand-ecc-step-size = <512>;
-                               marvell,nand-keep-config;
-                               marvell,nand-enable-arbiter;
-                               nand-on-flash-bbt;
-
-                               partition@0 {
-                                       label = "u-boot";
-                                       reg = <0x0000000 0x200000>;  /* 2MB */
-                                       read-only;
-                               };
-
-                               partition@200000 {
-                                       label = "u_env";
-                                       reg = <0x200000 0x20000>;    /* 128KB */
-                               };
-
-                               partition@220000 {
-                                       label = "s_env";
-                                       reg = <0x220000 0x40000>;    /* 256KB */
-                               };
-
-                               partition@7e0000 {
-                                       label = "devinfo";
-                                       reg = <0x7e0000 0x40000>;   /* 256KB */
-                                       read-only;
-                               };
-
-                               partition@820000 {
-                                       label = "sysdiag";
-                                       reg = <0x820000 0x1e0000>;   /* 1920KB */
-                                       read-only;
-                               };
-
-                               /* kernel1 overlaps with rootfs1 by design */
-                               partition@a00000 {
-                                       label = "kernel1";
-                                       reg = <0xa00000 0x5000000>;  /* 80MB */
-                               };
-
-                               partition@1000000 {
-                                       label = "rootfs1";
-                                       reg = <0x1000000 0x4a00000>;  /* 74MB */
-                               };
-
-                               /* kernel2 overlaps with rootfs2 by design */
-                               partition@5a00000 {
-                                       label = "kernel2";
-                                       reg = <0x5a00000 0x5000000>; /* 80MB */
-                               };
-
-                               partition@6000000 {
-                                       label = "rootfs2";
-                                       reg = <0x6000000 0x4a00000>; /* 74MB */
-                               };
-
-                               /*
-                                * 86MB, last MB is for the BBT, not writable
-                                */
-                               partition@aa00000 {
-                                       label = "syscfg";
-                                       reg = <0xaa00000 0x5600000>;
-                               };
-
-                               /*
-                                * Unused area between "s_env" and "devinfo".
-                                * Moved here because otherwise the renumbered
-                                * partitions would break the bootloader
-                                * supplied bootargs
-                                */
-                               partition@180000 {
-                                       label = "unused_area";
-                                       reg = <0x260000 0x5c0000>;   /* 5.75MB */
-                               };
-                       };
-               };
-
-               bm-bppi {
-                       status = "okay";
-               };
-
-               pcie-controller {
-                       status = "okay";
-
-                       pcie@1,0 {
-                               /* Marvell 88W8964, 5GHz-only */
-                               status = "okay";
-
-                               mwlwifi {
-                                       marvell,2ghz = <0>;
-                                       marvell,chainmask = <4 4>;
-                               };
-
-                       };
-
-                       pcie@2,0 {
-                               /* Marvell 88W8964, 2GHz-only */
-                               status = "okay";
-
-                               mwlwifi {
-                                       marvell,5ghz = <0>;
-                                       marvell,chainmask = <4 4>;
-                               };
-
-                       };
-               };
-       };
-
-       usb3_phy: usb3_phy {
-               compatible = "usb-nop-xceiv";
-               vcc-supply = <&reg_xhci0_vbus>;
-       };
-
-       reg_xhci0_vbus: xhci0-vbus {
-               compatible = "regulator-fixed";
-               pinctrl-names = "default";
-               pinctrl-0 = <&xhci0_vbus_pins>;
-               regulator-name = "xhci0-vbus";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               enable-active-high;
-               gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
-       };
-
-       gpio_keys {
-               compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               pinctrl-0 = <&reset_key_pin &wps_key_pin>;
-               pinctrl-names = "default";
-
-               button@1 {
-                       label = "WPS";
-                       linux,code = <KEY_WPS_BUTTON>;
-                       gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
-               };
-
-               button@2 {
-                       label = "Factory Reset Button";
-                       linux,code = <KEY_RESTART>;
-                       gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
-               };
-       };
-
-       gpio-leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&power_led_pin &sata_led_pin &wlan_2g_led_pin &wlan_5g_led_pin>;
-               pinctrl-names = "default";
-
-               sata {
-                       label = "rango:white:sata";
-                       gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
-                       linux,default-trigger = "disk-activity";
-               };
-
-               wlan_2g {
-                       label = "rango:white:wlan_2g";
-                       gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
-               };
-
-               wlan_5g {
-                       label = "rango:white:wlan_5g";
-                       gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-               };
-
-               power {
-                       label = "rango:white:power";
-                       gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
-                       default-state = "on";
-               };
-       };
-
-       dsa@0 {
-               compatible = "marvell,dsa";
-               #address-cells = <2>;
-               #size-cells = <0>;
-
-               dsa,ethernet = <&eth2>;
-               dsa,mii-bus = <&mdio>;
-
-               switch@0 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       reg = <0x0 0>;  /* MDIO address 0, switch 0 in tree */
-
-                       port@0 {
-                               reg = <0>;
-                               label = "lan4";
-                       };
-
-                       port@1 {
-                               reg = <1>;
-                               label = "lan3";
-                       };
-
-                       port@2 {
-                               reg = <2>;
-                               label = "lan2";
-                       };
-
-                       port@3 {
-                               reg = <3>;
-                               label = "lan1";
-                       };
-
-                       port@4 {
-                               reg = <4>;
-                               label = "wan";
-                       };
-
-                       port@5 {
-                               reg = <5>;
-                               label = "cpu";
-                       };
-               };
-       };
-
-       mvsw61xx {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "marvell,88e6352";
-               status = "okay";
-               reg = <0x10>;
-
-               mii-bus = <&mdio>;
-               cpu-port-0 = <5>;
-               cpu-port-1 = <6>;
-       };
-
-};
-
-&pinctrl {
-       sata_led_pin: sata-led-pin {
-               marvell,pins = "mpp21";
-               marvell,function = "gpio";
-       };
-
-       wps_key_pin: wps-key-pin {
-               marvell,pins = "mpp24";
-               marvell,function = "gpio";
-       };
-
-       reset_key_pin: reset-key-pin {
-               marvell,pins = "mpp29";
-               marvell,function = "gpio";
-       };
-
-       wlan_2g_led_pin: wlan-2g-led-pin {
-               marvell,pins = "mpp45";
-               marvell,function = "gpio";
-       };
-
-       wlan_5g_led_pin: wlan-5g-led-pin {
-               marvell,pins = "mpp46";
-               marvell,function = "gpio";
-       };
-
-       xhci0_vbus_pins: xhci0-vbus-pins {
-               marvell,pins = "mpp47";
-               marvell,function = "gpio";
-       };
-
-       power_led_pin: power-led-pin {
-               marvell,pins = "mpp56";
-               marvell,function = "gpio";
-       };
-};
diff --git a/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-shelby.dts b/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-shelby.dts
deleted file mode 100644 (file)
index f8dd193..0000000
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Device Tree file for the Linksys WRT1900ACS (Shelby)
- *
- * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
- *
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is licensed under the terms of the GNU General Public
- *     License version 2.  This program is licensed "as is" without
- *     any warranty of any kind, whether express or implied.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include "armada-385-linksys.dtsi"
-
-/ {
-       model = "Linksys WRT1900ACS";
-       compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385",
-                    "marvell,armada380";
-
-       soc {
-               internal-regs{
-                       i2c@11000 {
-
-                               pca9635@68 {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                                       wan_amber@0 {
-                                               label = "shelby:amber:wan";
-                                               reg = <0x0>;
-                                       };
-
-                                       wan_white@1 {
-                                               label = "shelby:white:wan";
-                                               reg = <0x1>;
-                                       };
-
-                                       wlan_2g@2 {
-                                               label = "shelby:white:wlan_2g";
-                                               reg = <0x2>;
-                                       };
-
-                                       wlan_5g@3 {
-                                               label = "shelby:white:wlan_5g";
-                                               reg = <0x3>;
-                                       };
-
-                                       usb2@5 {
-                                               label = "shelby:white:usb2";
-                                               reg = <0x5>;
-                                       };
-
-                                       usb3_1@6 {
-                                               label = "shelby:white:usb3_1";
-                                               reg = <0x6>;
-                                       };
-
-                                       usb3_2@7 {
-                                               label = "shelby:white:usb3_2";
-                                               reg = <0x7>;
-                                       };
-
-                                       wps_white@8 {
-                                               label = "shelby:white:wps";
-                                               reg = <0x8>;
-                                       };
-
-                                       wps_amber@9 {
-                                               label = "shelby:amber:wps";
-                                               reg = <0x9>;
-                                       };
-                               };
-                       };
-               };
-       };
-
-       gpio-leds {
-               power {
-                       label = "shelby:white:power";
-               };
-
-               sata {
-                       label = "shelby:white:sata";
-                       linux,default-trigger = "disk-activity";
-               };
-       };
-};
diff --git a/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-rango.dts b/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-rango.dts
deleted file mode 100644 (file)
index ac4ac1b..0000000
+++ /dev/null
@@ -1,455 +0,0 @@
-/*
- * Device Tree file for the Linksys WRT3200ACM (Rango)
- *
- * Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
- *
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is licensed under the terms of the GNU General Public
- *     License version 2.  This program is licensed "as is" without
- *     any warranty of any kind, whether express or implied.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "armada-385.dtsi"
-
-/ {
-       model = "Linksys WRT3200ACM";
-       compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
-                    "marvell,armada380";
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       memory {
-               device_type = "memory";
-               reg = <0x00000000 0x20000000>; /* 512 MB */
-       };
-
-       soc {
-               ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
-                         MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
-                         MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
-                         MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
-                         MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
-
-               internal-regs {
-
-                       spi@10600 {
-                               status = "disabled";
-                       };
-
-                       i2c@11000 {
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&i2c0_pins>;
-                               status = "okay";
-
-                               tmp421@4c {
-                                       compatible = "ti,tmp421";
-                                       reg = <0x4c>;
-                               };
-
-                               pca9635@68 {
-                                       #address-cells = <1>;
-                                       #size-cells = <0>;
-                                       compatible = "nxp,pca9635";
-                                       reg = <0x68>;
-
-                                       wan_amber@0 {
-                                               label = "rango:amber:wan";
-                                               reg = <0x0>;
-                                       };
-
-                                       wan_white@1 {
-                                               label = "rango:white:wan";
-                                               reg = <0x1>;
-                                       };
-
-                                       usb2@5 {
-                                               label = "rango:white:usb2";
-                                               reg = <0x5>;
-                                       };
-
-                                       usb3_1@6 {
-                                               label = "rango:white:usb3_1";
-                                               reg = <0x6>;
-                                       };
-
-                                       usb3_2@7 {
-                                               label = "rango:white:usb3_2";
-                                               reg = <0x7>;
-                                       };
-
-                                       wps_white@8 {
-                                               label = "rango:white:wps";
-                                               reg = <0x8>;
-                                       };
-
-                                       wps_amber@9 {
-                                               label = "rango:amber:wps";
-                                               reg = <0x9>;
-                                       };
-                               };
-                       };
-
-                       /* J10: VCC, NC, RX, NC, TX, GND  */
-                       serial@12000 {
-                               status = "okay";
-                       };
-
-                       ethernet@70000 {
-                               status = "okay";
-                               phy-mode = "rgmii-id";
-                               buffer-manager = <&bm>;
-                               bm,pool-long = <0>;
-                               bm,pool-short = <3>;
-                               fixed-link {
-                                       speed = <1000>;
-                                       full-duplex;
-                               };
-                       };
-
-                       ethernet@34000 {
-                               status = "okay";
-                               phy-mode = "sgmii";
-                               buffer-manager = <&bm>;
-                               bm,pool-long = <2>;
-                               bm,pool-short = <3>;
-                               fixed-link {
-                                       speed = <1000>;
-                                       full-duplex;
-                               };
-                       };
-
-                       mdio {
-                               status = "okay";
-                       };
-
-                       bm@c8000 {
-                               status = "okay";
-                       };
-
-                       sata@a8000 {
-                               status = "okay";
-                       };
-
-                       sdhci@d8000 {
-                               pinctrl-names = "default";
-                               pinctrl-0 = <&sdhci_pins>;
-                               no-1-8-v;
-                               broken-cd;
-                               wp-inverted;
-                               bus-width = <8>;
-                               status = "okay";
-                       };
-
-                       /* USB part of the eSATA/USB 2.0 port */
-                       usb@58000 {
-                               status = "okay";
-                       };
-
-                       usb3@f8000 {
-                               status = "okay";
-                               usb-phy = <&usb3_phy>;
-                       };
-
-                       flash@d0000 {
-                               status = "okay";
-                               num-cs = <1>;
-                               nand-ecc-strength = <4>;
-                               nand-ecc-step-size = <512>;
-                               marvell,nand-keep-config;
-                               marvell,nand-enable-arbiter;
-                               nand-on-flash-bbt;
-
-                               partition@0 {
-                                       label = "u-boot";
-                                       reg = <0x0000000 0x200000>;  /* 2MB */
-                                       read-only;
-                               };
-
-                               partition@200000 {
-                                       label = "u_env";
-                                       reg = <0x200000 0x20000>;    /* 128KB */
-                               };
-
-                               partition@220000 {
-                                       label = "s_env";
-                                       reg = <0x220000 0x40000>;    /* 256KB */
-                               };
-
-                               partition@7e0000 {
-                                       label = "devinfo";
-                                       reg = <0x7e0000 0x40000>;   /* 256KB */
-                                       read-only;
-                               };
-
-                               partition@820000 {
-                                       label = "sysdiag";
-                                       reg = <0x820000 0x1e0000>;   /* 1920KB */
-                                       read-only;
-                               };
-
-                               /* kernel1 overlaps with rootfs1 by design */
-                               partition@a00000 {
-                                       label = "kernel1";
-                                       reg = <0xa00000 0x5000000>;  /* 80MB */
-                               };
-
-                               partition@1000000 {
-                                       label = "rootfs1";
-                                       reg = <0x1000000 0x4a00000>;  /* 74MB */
-                               };
-
-                               /* kernel2 overlaps with rootfs2 by design */
-                               partition@5a00000 {
-                                       label = "kernel2";
-                                       reg = <0x5a00000 0x5000000>; /* 80MB */
-                               };
-
-                               partition@6000000 {
-                                       label = "rootfs2";
-                                       reg = <0x6000000 0x4a00000>; /* 74MB */
-                               };
-
-                               /*
-                                * 86MB, last MB is for the BBT, not writable
-                                */
-                               partition@aa00000 {
-                                       label = "syscfg";
-                                       reg = <0xaa00000 0x5600000>;
-                               };
-
-                               /*
-                                * Unused area between "s_env" and "devinfo".
-                                * Moved here because otherwise the renumbered
-                                * partitions would break the bootloader
-                                * supplied bootargs
-                                */
-                               partition@180000 {
-                                       label = "unused_area";
-                                       reg = <0x260000 0x5c0000>;   /* 5.75MB */
-                               };
-                       };
-               };
-
-               bm-bppi {
-                       status = "okay";
-               };
-
-               pcie-controller {
-                       status = "okay";
-
-                       pcie@1,0 {
-                               /* Marvell 88W8964, 5GHz-only */
-                               status = "okay";
-
-                               mwlwifi {
-                                       marvell,2ghz = <0>;
-                                       marvell,chainmask = <4 4>;
-                               };
-
-                       };
-
-                       pcie@2,0 {
-                               /* Marvell 88W8964, 2GHz-only */
-                               status = "okay";
-
-                               mwlwifi {
-                                       marvell,5ghz = <0>;
-                                       marvell,chainmask = <4 4>;
-                               };
-
-                       };
-               };
-       };
-
-       usb3_phy: usb3_phy {
-               compatible = "usb-nop-xceiv";
-               vcc-supply = <&reg_xhci0_vbus>;
-       };
-
-       reg_xhci0_vbus: xhci0-vbus {
-               compatible = "regulator-fixed";
-               pinctrl-names = "default";
-               pinctrl-0 = <&xhci0_vbus_pins>;
-               regulator-name = "xhci0-vbus";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               enable-active-high;
-               gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
-       };
-
-       gpio_keys {
-               compatible = "gpio-keys";
-               #address-cells = <1>;
-               #size-cells = <0>;
-               pinctrl-0 = <&reset_key_pin &wps_key_pin>;
-               pinctrl-names = "default";
-
-               button@1 {
-                       label = "WPS";
-                       linux,code = <KEY_WPS_BUTTON>;
-                       gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
-               };
-
-               button@2 {
-                       label = "Factory Reset Button";
-                       linux,code = <KEY_RESTART>;
-                       gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
-               };
-       };
-
-       gpio-leds {
-               compatible = "gpio-leds";
-               pinctrl-0 = <&power_led_pin &sata_led_pin &wlan_2g_led_pin &wlan_5g_led_pin>;
-               pinctrl-names = "default";
-
-               sata {
-                       label = "rango:white:sata";
-                       gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
-                       linux,default-trigger = "disk-activity";
-               };
-
-               wlan_2g {
-                       label = "rango:white:wlan_2g";
-                       gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
-               };
-
-               wlan_5g {
-                       label = "rango:white:wlan_5g";
-                       gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-               };
-
-               power {
-                       label = "rango:white:power";
-                       gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
-                       default-state = "on";
-               };
-       };
-
-       dsa@0 {
-               compatible = "marvell,dsa";
-               #address-cells = <2>;
-               #size-cells = <0>;
-
-               dsa,ethernet = <&eth2>;
-               dsa,mii-bus = <&mdio>;
-
-               switch@0 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       reg = <0x0 0>;  /* MDIO address 0, switch 0 in tree */
-
-                       port@0 {
-                               reg = <0>;
-                               label = "lan4";
-                       };
-
-                       port@1 {
-                               reg = <1>;
-                               label = "lan3";
-                       };
-
-                       port@2 {
-                               reg = <2>;
-                               label = "lan2";
-                       };
-
-                       port@3 {
-                               reg = <3>;
-                               label = "lan1";
-                       };
-
-                       port@4 {
-                               reg = <4>;
-                               label = "wan";
-                       };
-
-                       port@5 {
-                               reg = <5>;
-                               label = "cpu";
-                       };
-               };
-       };
-
-       mvsw61xx {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "marvell,88e6352";
-               status = "okay";
-               reg = <0x10>;
-
-               mii-bus = <&mdio>;
-               cpu-port-0 = <5>;
-               cpu-port-1 = <6>;
-       };
-
-};
-
-&pinctrl {
-       sata_led_pin: sata-led-pin {
-               marvell,pins = "mpp21";
-               marvell,function = "gpio";
-       };
-
-       wps_key_pin: wps-key-pin {
-               marvell,pins = "mpp24";
-               marvell,function = "gpio";
-       };
-
-       reset_key_pin: reset-key-pin {
-               marvell,pins = "mpp29";
-               marvell,function = "gpio";
-       };
-
-       wlan_2g_led_pin: wlan-2g-led-pin {
-               marvell,pins = "mpp45";
-               marvell,function = "gpio";
-       };
-
-       wlan_5g_led_pin: wlan-5g-led-pin {
-               marvell,pins = "mpp46";
-               marvell,function = "gpio";
-       };
-
-       xhci0_vbus_pins: xhci0-vbus-pins {
-               marvell,pins = "mpp47";
-               marvell,function = "gpio";
-       };
-
-       power_led_pin: power-led-pin {
-               marvell,pins = "mpp56";
-               marvell,function = "gpio";
-       };
-};
diff --git a/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-shelby.dts b/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-shelby.dts
deleted file mode 100644 (file)
index f8dd193..0000000
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Device Tree file for the Linksys WRT1900ACS (Shelby)
- *
- * Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
- *
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is licensed under the terms of the GNU General Public
- *     License version 2.  This program is licensed "as is" without
- *     any warranty of any kind, whether express or implied.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-#include "armada-385-linksys.dtsi"
-
-/ {
-       model = "Linksys WRT1900ACS";
-       compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385",
-                    "marvell,armada380";
-
-       soc {
-               internal-regs{
-                       i2c@11000 {
-
-                               pca9635@68 {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                                       wan_amber@0 {
-                                               label = "shelby:amber:wan";
-                                               reg = <0x0>;
-                                       };
-
-                                       wan_white@1 {
-                                               label = "shelby:white:wan";
-                                               reg = <0x1>;
-                                       };
-
-                                       wlan_2g@2 {
-                                               label = "shelby:white:wlan_2g";
-                                               reg = <0x2>;
-                                       };
-
-                                       wlan_5g@3 {
-                                               label = "shelby:white:wlan_5g";
-                                               reg = <0x3>;
-                                       };
-
-                                       usb2@5 {
-                                               label = "shelby:white:usb2";
-                                               reg = <0x5>;
-                                       };
-
-                                       usb3_1@6 {
-                                               label = "shelby:white:usb3_1";
-                                               reg = <0x6>;
-                                       };
-
-                                       usb3_2@7 {
-                                               label = "shelby:white:usb3_2";
-                                               reg = <0x7>;
-                                       };
-
-                                       wps_white@8 {
-                                               label = "shelby:white:wps";
-                                               reg = <0x8>;
-                                       };
-
-                                       wps_amber@9 {
-                                               label = "shelby:amber:wps";
-                                               reg = <0x9>;
-                                       };
-                               };
-                       };
-               };
-       };
-
-       gpio-leds {
-               power {
-                       label = "shelby:white:power";
-               };
-
-               sata {
-                       label = "shelby:white:sata";
-                       linux,default-trigger = "disk-activity";
-               };
-       };
-};
diff --git a/target/linux/mvebu/patches-4.4/002-add_powertables.patch b/target/linux/mvebu/patches-4.4/002-add_powertables.patch
deleted file mode 100644 (file)
index a5a47e4..0000000
+++ /dev/null
@@ -1,748 +0,0 @@
---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -86,12 +86,100 @@
-                       pcie@2,0 {
-                               /* Port 0, Lane 1 */
-                               status = "okay";
-+
-+                              mwlwifi {
-+                                      marvell,5ghz = <0>;
-+                                      marvell,chainmask = <4 4>;
-+                                      marvell,powertable {
-+                                              FCC =
-+                                                      <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>;
-+
-+                                              ETSI =
-+                                                      <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>;
-+                                      };
-+                              };
-                       };
-                       /* Second mini-PCIe port */
-                       pcie@3,0 {
-                               /* Port 0, Lane 3 */
-                               status = "okay";
-+
-+                              mwlwifi {
-+                                      marvell,2ghz = <0>;
-+                                      marvell,chainmask = <4 4>;
-+                                      marvell,powertable {
-+                                              FCC =
-+                                                      <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+                                                      <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+                                                      <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+                                                      <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>,
-+                                                      <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>;
-+
-+                                              ETSI =
-+                                                      <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>,
-+                                                      <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>;
-+                                      };
-+                              };
-                       };
-               };
---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts
-@@ -100,6 +100,212 @@
-                               };
-                       };
-               };
-+
-+              pcie-controller {
-+                      pcie@1,0 {
-+                              mwlwifi {
-+                                      marvell,2ghz = <0>;
-+                                      marvell,chainmask = <4 4>;
-+                                      marvell,powertable {
-+                                              AU =
-+                                                      <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
-+                                              CA =
-+                                                      <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+                                              CN =
-+                                                      <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
-+                                              ETSI =
-+                                                      <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
-+                                              FCC =
-+                                                      <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+                                      };
-+                              };
-+                      };
-+
-+                      pcie@2,0 {
-+                              mwlwifi {
-+                                      marvell,5ghz = <0>;
-+                                      marvell,chainmask = <4 4>;
-+                                      marvell,powertable {
-+                                              AU =
-+                                                      <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              CA =
-+                                                      <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              CN =
-+                                                      <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              ETSI =
-+                                                      <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              FCC =
-+                                                      <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+                                      };
-+                              };
-+                      };
-+              };
-       };
-       gpio-leds {
---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts
-@@ -100,6 +100,212 @@
-                               };
-                       };
-               };
-+
-+              pcie-controller {
-+                      pcie@1,0 {
-+                              mwlwifi {
-+                                      marvell,2ghz = <0>;
-+                                      marvell,chainmask = <2 2>;
-+                                      marvell,powertable {
-+                                              AU =
-+                                                      <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+                                                      <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+                                                      <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+                                                      <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+                                                      <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+                                                      <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+                                                      <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
-+                                                      <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>,
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-+                                                      <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+                                                      <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+                                                      <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+                                                      <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>,
-+                                                      <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>;
-+                                      };
-+                              };
-+                      };
-+
-+                      pcie@2,0 {
-+                              mwlwifi {
-+                                      marvell,5ghz = <0>;
-+                                      marvell,chainmask = <2 2>;
-+                                      marvell,powertable {
-+                                              AU =
-+                                                      <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              CA =
-+                                                      <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>,
-+                                                      <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>;
-+                                              CN =
-+                                                      <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              ETSI =
-+                                                      <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              FCC =
-+                                                      <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>;
-+                                      };
-+                              };
-+                      };
-+              };
-       };
-       gpio-leds {
---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts
-+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts
-@@ -100,6 +100,212 @@
-                               };
-                       };
-               };
-+
-+              pcie-controller {
-+                      pcie@1,0 {
-+                              mwlwifi {
-+                                      marvell,2ghz = <0>;
-+                                      marvell,chainmask = <4 4>;
-+                                      marvell,powertable {
-+                                              AU =
-+                                                      <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>,
-+                                                      <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>,
-+                                                      <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>;
-+                                              CA =
-+                                                      <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>,
-+                                                      <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+                                              CN =
-+                                                      <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>;
-+                                              ETSI =
-+                                                      <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>,
-+                                                      <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>;
-+                                              FCC =
-+                                                      <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>,
-+                                                      <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>,
-+                                                      <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>,
-+                                                      <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>;
-+                                      };
-+                              };
-+                      };
-+
-+                      pcie@2,0 {
-+                              mwlwifi {
-+                                      marvell,5ghz = <0>;
-+                                      marvell,chainmask = <4 4>;
-+                                      marvell,powertable {
-+                                              AU =
-+                                                      <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              CA =
-+                                                      <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              CN =
-+                                                      <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              ETSI =
-+                                                      <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>;
-+                                              FCC =
-+                                                      <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>,
-+                                                      <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>;
-+                                      };
-+                              };
-+                      };
-+              };
-       };
-       gpio-leds {
diff --git a/target/linux/mvebu/patches-4.4/003-add_switch_nodes.patch b/target/linux/mvebu/patches-4.4/003-add_switch_nodes.patch
deleted file mode 100644 (file)
index 1502b6b..0000000
+++ /dev/null
@@ -1,40 +0,0 @@
---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts
-@@ -467,6 +467,16 @@
-                       };
-               };
-       };
-+
-+      mvsw61xx {
-+              compatible = "marvell,88e6172";
-+              status = "okay";
-+              reg = <0x10>;
-+
-+              mii-bus = <&mdio>;
-+              cpu-port-0 = <5>;
-+              cpu-port-1 = <6>;
-+      };
- };
- &pinctrl {
---- a/arch/arm/boot/dts/armada-385-linksys.dtsi
-+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi
-@@ -309,6 +309,18 @@
-                       };
-               };
-       };
-+
-+      mvsw61xx {
-+              #address-cells = <1>;
-+              #size-cells = <0>;
-+              compatible = "marvell,88e6176";
-+              status = "okay";
-+              reg = <0x10>;
-+
-+              mii-bus = <&mdio>;
-+              cpu-port-0 = <5>;
-+              cpu-port-1 = <6>;
-+      };
- };
- &pinctrl {
diff --git a/target/linux/mvebu/patches-4.4/010-build_new_dtbs.patch b/target/linux/mvebu/patches-4.4/010-build_new_dtbs.patch
deleted file mode 100644 (file)
index 6ba9ee6..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -748,6 +748,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
-       armada-385-db-ap.dtb \
-       armada-385-linksys-caiman.dtb \
-       armada-385-linksys-cobra.dtb \
-+      armada-385-linksys-rango.dtb \
-+      armada-385-linksys-shelby.dtb \
-       armada-388-db.dtb \
-       armada-388-gp.dtb \
-       armada-388-rd.dtb
diff --git a/target/linux/mvebu/patches-4.4/020-mtd-nand-pxa3xx_nand-add-support-for-partial-chunks.patch b/target/linux/mvebu/patches-4.4/020-mtd-nand-pxa3xx_nand-add-support-for-partial-chunks.patch
deleted file mode 100644 (file)
index 2e67097..0000000
+++ /dev/null
@@ -1,428 +0,0 @@
-From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Date: Wed, 10 Feb 2016 14:54:21 +0100
-Subject: [PATCH] mtd: nand: pxa3xx_nand: add support for partial chunks
-
-This commit is needed to properly support the 8-bits ECC configuration
-with 4KB pages.
-
-When pages larger than 2 KB are used on platforms using the PXA3xx
-NAND controller, the reading/programming operations need to be split
-in chunks of 2 KBs or less because the controller FIFO is limited to
-about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to
-this requirement, the data layout on NAND is a bit strange, with ECC
-interleaved with data, at the end of each chunk.
-
-When a 4-bits ECC configuration is used with 4 KB pages, the physical
-data layout on the NAND looks like this:
-
-| 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC |
-
-So the data chunks have an equal size, 2080 bytes for each chunk,
-which the driver supports properly.
-
-When a 8-bits ECC configuration is used with 4KB pages, the physical
-data layout on the NAND looks like this:
-
-| 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC |
-
-So, the spare area is stored in its own chunk, which has a different
-size than the other chunks. Since OOB is not used by UBIFS, the initial
-implementation of the driver has chosen to not support reading this
-additional "spare" chunk of data.
-
-Unfortunately, Marvell has chosen to store the BBT signature in the
-OOB area. Therefore, if the driver doesn't read this spare area, Linux
-has no way of finding the BBT. It thinks there is no BBT, and rewrites
-one, which U-Boot does not recognize, causing compatibility problems
-between the bootloader and the kernel in terms of NAND usage.
-
-To fix this, this commit implements the support for reading a partial
-last chunk. This support is currently only useful for the case of 8
-bits ECC with 4 KB pages, but it will be useful in the future to
-enable other configurations such as 12 bits and 16 bits ECC with 4 KB
-pages, or 8 bits ECC with 8 KB pages, etc. All those configurations
-have a "last" chunk that doesn't have the same size as the other
-chunks.
-
-In order to implement reading of the last chunk, this commit:
-
- - Adds a number of new fields to the pxa3xx_nand_info to describe how
-   many full chunks and how many chunks we have, the size of full
-   chunks and partial chunks, both in terms of data area and spare
-   area.
-
- - Fills in the step_chunk_size and step_spare_size variables to
-   describe how much data and spare should be read/written for the
-   current read/program step.
-
- - Reworks the state machine to accommodate doing the additional read
-   or program step when a last partial chunk is used.
-
-This commit has been tested on a Marvell Armada 398 DB board, with a
-4KB page NAND, tested in both 4 bits ECC and 8 bits ECC
-configurations. Robert Jarzmik has tested on some PXA platforms.
-
-Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
-Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
-
---- a/drivers/mtd/nand/pxa3xx_nand.c
-+++ b/drivers/mtd/nand/pxa3xx_nand.c
-@@ -228,15 +228,44 @@ struct pxa3xx_nand_info {
-       int                     use_spare;      /* use spare ? */
-       int                     need_wait;
--      unsigned int            data_size;      /* data to be read from FIFO */
--      unsigned int            chunk_size;     /* split commands chunk size */
--      unsigned int            oob_size;
-+      /* Amount of real data per full chunk */
-+      unsigned int            chunk_size;
-+
-+      /* Amount of spare data per full chunk */
-       unsigned int            spare_size;
-+
-+      /* Number of full chunks (i.e chunk_size + spare_size) */
-+      unsigned int            nfullchunks;
-+
-+      /*
-+       * Total number of chunks. If equal to nfullchunks, then there
-+       * are only full chunks. Otherwise, there is one last chunk of
-+       * size (last_chunk_size + last_spare_size)
-+       */
-+      unsigned int            ntotalchunks;
-+
-+      /* Amount of real data in the last chunk */
-+      unsigned int            last_chunk_size;
-+
-+      /* Amount of spare data in the last chunk */
-+      unsigned int            last_spare_size;
-+
-       unsigned int            ecc_size;
-       unsigned int            ecc_err_cnt;
-       unsigned int            max_bitflips;
-       int                     retcode;
-+      /*
-+       * Variables only valid during command
-+       * execution. step_chunk_size and step_spare_size is the
-+       * amount of real data and spare data in the current
-+       * chunk. cur_chunk is the current chunk being
-+       * read/programmed.
-+       */
-+      unsigned int            step_chunk_size;
-+      unsigned int            step_spare_size;
-+      unsigned int            cur_chunk;
-+
-       /* cached register value */
-       uint32_t                reg_ndcr;
-       uint32_t                ndtr0cs0;
-@@ -531,25 +560,6 @@ static int pxa3xx_nand_init(struct pxa3x
-       return 0;
- }
--/*
-- * Set the data and OOB size, depending on the selected
-- * spare and ECC configuration.
-- * Only applicable to READ0, READOOB and PAGEPROG commands.
-- */
--static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info,
--                              struct mtd_info *mtd)
--{
--      int oob_enable = info->reg_ndcr & NDCR_SPARE_EN;
--
--      info->data_size = mtd->writesize;
--      if (!oob_enable)
--              return;
--
--      info->oob_size = info->spare_size;
--      if (!info->use_ecc)
--              info->oob_size += info->ecc_size;
--}
--
- /**
-  * NOTE: it is a must to set ND_RUN firstly, then write
-  * command buffer, otherwise, it does not work.
-@@ -665,28 +675,28 @@ static void drain_fifo(struct pxa3xx_nan
- static void handle_data_pio(struct pxa3xx_nand_info *info)
- {
--      unsigned int do_bytes = min(info->data_size, info->chunk_size);
--
-       switch (info->state) {
-       case STATE_PIO_WRITING:
--              writesl(info->mmio_base + NDDB,
--                      info->data_buff + info->data_buff_pos,
--                      DIV_ROUND_UP(do_bytes, 4));
-+              if (info->step_chunk_size)
-+                      writesl(info->mmio_base + NDDB,
-+                              info->data_buff + info->data_buff_pos,
-+                              DIV_ROUND_UP(info->step_chunk_size, 4));
--              if (info->oob_size > 0)
-+              if (info->step_spare_size)
-                       writesl(info->mmio_base + NDDB,
-                               info->oob_buff + info->oob_buff_pos,
--                              DIV_ROUND_UP(info->oob_size, 4));
-+                              DIV_ROUND_UP(info->step_spare_size, 4));
-               break;
-       case STATE_PIO_READING:
--              drain_fifo(info,
--                         info->data_buff + info->data_buff_pos,
--                         DIV_ROUND_UP(do_bytes, 4));
-+              if (info->step_chunk_size)
-+                      drain_fifo(info,
-+                                 info->data_buff + info->data_buff_pos,
-+                                 DIV_ROUND_UP(info->step_chunk_size, 4));
--              if (info->oob_size > 0)
-+              if (info->step_spare_size)
-                       drain_fifo(info,
-                                  info->oob_buff + info->oob_buff_pos,
--                                 DIV_ROUND_UP(info->oob_size, 4));
-+                                 DIV_ROUND_UP(info->step_spare_size, 4));
-               break;
-       default:
-               dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
-@@ -695,9 +705,8 @@ static void handle_data_pio(struct pxa3x
-       }
-       /* Update buffer pointers for multi-page read/write */
--      info->data_buff_pos += do_bytes;
--      info->oob_buff_pos += info->oob_size;
--      info->data_size -= do_bytes;
-+      info->data_buff_pos += info->step_chunk_size;
-+      info->oob_buff_pos += info->step_spare_size;
- }
- static void pxa3xx_nand_data_dma_irq(void *data)
-@@ -738,8 +747,9 @@ static void start_data_dma(struct pxa3xx
-                               info->state);
-               BUG();
-       }
--      info->sg.length = info->data_size +
--              (info->oob_size ? info->spare_size + info->ecc_size : 0);
-+      info->sg.length = info->chunk_size;
-+      if (info->use_spare)
-+              info->sg.length += info->spare_size + info->ecc_size;
-       dma_map_sg(info->dma_chan->device->dev, &info->sg, 1, info->dma_dir);
-       tx = dmaengine_prep_slave_sg(info->dma_chan, &info->sg, 1, direction,
-@@ -900,9 +910,11 @@ static void prepare_start_command(struct
-       /* reset data and oob column point to handle data */
-       info->buf_start         = 0;
-       info->buf_count         = 0;
--      info->oob_size          = 0;
-       info->data_buff_pos     = 0;
-       info->oob_buff_pos      = 0;
-+      info->step_chunk_size   = 0;
-+      info->step_spare_size   = 0;
-+      info->cur_chunk         = 0;
-       info->use_ecc           = 0;
-       info->use_spare         = 1;
-       info->retcode           = ERR_NONE;
-@@ -914,8 +926,6 @@ static void prepare_start_command(struct
-       case NAND_CMD_READ0:
-       case NAND_CMD_PAGEPROG:
-               info->use_ecc = 1;
--      case NAND_CMD_READOOB:
--              pxa3xx_set_datasize(info, mtd);
-               break;
-       case NAND_CMD_PARAM:
-               info->use_spare = 0;
-@@ -974,6 +984,14 @@ static int prepare_set_command(struct px
-               if (command == NAND_CMD_READOOB)
-                       info->buf_start += mtd->writesize;
-+              if (info->cur_chunk < info->nfullchunks) {
-+                      info->step_chunk_size = info->chunk_size;
-+                      info->step_spare_size = info->spare_size;
-+              } else {
-+                      info->step_chunk_size = info->last_chunk_size;
-+                      info->step_spare_size = info->last_spare_size;
-+              }
-+
-               /*
-                * Multiple page read needs an 'extended command type' field,
-                * which is either naked-read or last-read according to the
-@@ -985,8 +1003,8 @@ static int prepare_set_command(struct px
-                       info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8)
-                                       | NDCB0_LEN_OVRD
-                                       | NDCB0_EXT_CMD_TYPE(ext_cmd_type);
--                      info->ndcb3 = info->chunk_size +
--                                    info->oob_size;
-+                      info->ndcb3 = info->step_chunk_size +
-+                              info->step_spare_size;
-               }
-               set_command_address(info, mtd->writesize, column, page_addr);
-@@ -1006,8 +1024,6 @@ static int prepare_set_command(struct px
-                               | NDCB0_EXT_CMD_TYPE(ext_cmd_type)
-                               | addr_cycle
-                               | command;
--                      /* No data transfer in this case */
--                      info->data_size = 0;
-                       exec_cmd = 1;
-               }
-               break;
-@@ -1019,6 +1035,14 @@ static int prepare_set_command(struct px
-                       break;
-               }
-+              if (info->cur_chunk < info->nfullchunks) {
-+                      info->step_chunk_size = info->chunk_size;
-+                      info->step_spare_size = info->spare_size;
-+              } else {
-+                      info->step_chunk_size = info->last_chunk_size;
-+                      info->step_spare_size = info->last_spare_size;
-+              }
-+
-               /* Second command setting for large pages */
-               if (mtd->writesize > PAGE_CHUNK_SIZE) {
-                       /*
-@@ -1029,14 +1053,14 @@ static int prepare_set_command(struct px
-                       info->ndcb0 |= NDCB0_CMD_TYPE(0x1)
-                                       | NDCB0_LEN_OVRD
-                                       | NDCB0_EXT_CMD_TYPE(ext_cmd_type);
--                      info->ndcb3 = info->chunk_size +
--                                    info->oob_size;
-+                      info->ndcb3 = info->step_chunk_size +
-+                                    info->step_spare_size;
-                       /*
-                        * This is the command dispatch that completes a chunked
-                        * page program operation.
-                        */
--                      if (info->data_size == 0) {
-+                      if (info->cur_chunk == info->ntotalchunks) {
-                               info->ndcb0 = NDCB0_CMD_TYPE(0x1)
-                                       | NDCB0_EXT_CMD_TYPE(ext_cmd_type)
-                                       | command;
-@@ -1063,7 +1087,7 @@ static int prepare_set_command(struct px
-                               | command;
-               info->ndcb1 = (column & 0xFF);
-               info->ndcb3 = INIT_BUFFER_SIZE;
--              info->data_size = INIT_BUFFER_SIZE;
-+              info->step_chunk_size = INIT_BUFFER_SIZE;
-               break;
-       case NAND_CMD_READID:
-@@ -1073,7 +1097,7 @@ static int prepare_set_command(struct px
-                               | command;
-               info->ndcb1 = (column & 0xFF);
--              info->data_size = 8;
-+              info->step_chunk_size = 8;
-               break;
-       case NAND_CMD_STATUS:
-               info->buf_count = 1;
-@@ -1081,7 +1105,7 @@ static int prepare_set_command(struct px
-                               | NDCB0_ADDR_CYC(1)
-                               | command;
--              info->data_size = 8;
-+              info->step_chunk_size = 8;
-               break;
-       case NAND_CMD_ERASE1:
-@@ -1220,6 +1244,7 @@ static void nand_cmdfunc_extended(struct
-       init_completion(&info->dev_ready);
-       do {
-               info->state = STATE_PREPARED;
-+
-               exec_cmd = prepare_set_command(info, command, ext_cmd_type,
-                                              column, page_addr);
-               if (!exec_cmd) {
-@@ -1239,22 +1264,30 @@ static void nand_cmdfunc_extended(struct
-                       break;
-               }
-+              /* Only a few commands need several steps */
-+              if (command != NAND_CMD_PAGEPROG &&
-+                  command != NAND_CMD_READ0    &&
-+                  command != NAND_CMD_READOOB)
-+                      break;
-+
-+              info->cur_chunk++;
-+
-               /* Check if the sequence is complete */
--              if (info->data_size == 0 && command != NAND_CMD_PAGEPROG)
-+              if (info->cur_chunk == info->ntotalchunks && command != NAND_CMD_PAGEPROG)
-                       break;
-               /*
-                * After a splitted program command sequence has issued
-                * the command dispatch, the command sequence is complete.
-                */
--              if (info->data_size == 0 &&
-+              if (info->cur_chunk == (info->ntotalchunks + 1) &&
-                   command == NAND_CMD_PAGEPROG &&
-                   ext_cmd_type == EXT_CMD_TYPE_DISPATCH)
-                       break;
-               if (command == NAND_CMD_READ0 || command == NAND_CMD_READOOB) {
-                       /* Last read: issue a 'last naked read' */
--                      if (info->data_size == info->chunk_size)
-+                      if (info->cur_chunk == info->ntotalchunks - 1)
-                               ext_cmd_type = EXT_CMD_TYPE_LAST_RW;
-                       else
-                               ext_cmd_type = EXT_CMD_TYPE_NAKED_RW;
-@@ -1264,7 +1297,7 @@ static void nand_cmdfunc_extended(struct
-                * the command dispatch must be issued to complete.
-                */
-               } else if (command == NAND_CMD_PAGEPROG &&
--                         info->data_size == 0) {
-+                         info->cur_chunk == info->ntotalchunks) {
-                               ext_cmd_type = EXT_CMD_TYPE_DISPATCH;
-               }
-       } while (1);
-@@ -1514,6 +1547,8 @@ static int pxa_ecc_init(struct pxa3xx_na
-                       int strength, int ecc_stepsize, int page_size)
- {
-       if (strength == 1 && ecc_stepsize == 512 && page_size == 2048) {
-+              info->nfullchunks = 1;
-+              info->ntotalchunks = 1;
-               info->chunk_size = 2048;
-               info->spare_size = 40;
-               info->ecc_size = 24;
-@@ -1522,6 +1557,8 @@ static int pxa_ecc_init(struct pxa3xx_na
-               ecc->strength = 1;
-       } else if (strength == 1 && ecc_stepsize == 512 && page_size == 512) {
-+              info->nfullchunks = 1;
-+              info->ntotalchunks = 1;
-               info->chunk_size = 512;
-               info->spare_size = 8;
-               info->ecc_size = 8;
-@@ -1535,6 +1572,8 @@ static int pxa_ecc_init(struct pxa3xx_na
-        */
-       } else if (strength == 4 && ecc_stepsize == 512 && page_size == 2048) {
-               info->ecc_bch = 1;
-+              info->nfullchunks = 1;
-+              info->ntotalchunks = 1;
-               info->chunk_size = 2048;
-               info->spare_size = 32;
-               info->ecc_size = 32;
-@@ -1545,6 +1584,8 @@ static int pxa_ecc_init(struct pxa3xx_na
-       } else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
-               info->ecc_bch = 1;
-+              info->nfullchunks = 2;
-+              info->ntotalchunks = 2;
-               info->chunk_size = 2048;
-               info->spare_size = 32;
-               info->ecc_size = 32;
-@@ -1559,8 +1600,12 @@ static int pxa_ecc_init(struct pxa3xx_na
-        */
-       } else if (strength == 8 && ecc_stepsize == 512 && page_size == 4096) {
-               info->ecc_bch = 1;
-+              info->nfullchunks = 4;
-+              info->ntotalchunks = 5;
-               info->chunk_size = 1024;
-               info->spare_size = 0;
-+              info->last_chunk_size = 0;
-+              info->last_spare_size = 64;
-               info->ecc_size = 32;
-               ecc->mode = NAND_ECC_HW;
-               ecc->size = info->chunk_size;
diff --git a/target/linux/mvebu/patches-4.4/021-mtd-pxa3xx_nand-Increase-the-initial-chunk-size.patch b/target/linux/mvebu/patches-4.4/021-mtd-pxa3xx_nand-Increase-the-initial-chunk-size.patch
deleted file mode 100644 (file)
index 0b0e047..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-From: =?UTF-8?q?Ezequiel=20Garc=C3=ADa?= <ezequiel@vanguardiasur.com.ar>
-Date: Wed, 4 Nov 2015 13:13:41 -0300
-Subject: [PATCH] mtd: pxa3xx_nand: Increase the initial chunk size
-
-The chunk size represents the size of the data chunks, which
-is used by the controllers that allow to split transfered data.
-
-However, the initial chunk size is used in a non-splitted way,
-during device identification. Therefore, it must be large enough
-for all the NAND commands issued during device identification.
-This includes NAND_CMD_PARAM which was recently changed to
-transfer up to 2048 bytes (for the redundant parameter pages).
-
-Thus, the initial chunk size should be 2048 as well.
-
-On Armada 370/XP platforms (NFCv2) booted without the keep-config
-devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM
-command:
-
-  [..]
-  pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device
-  pxa3xx-nand f10d0000.nand: Wait time out!!!
-  nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
-  nand: Micron MT29F8G08ABABAWP
-  nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224
-
-Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
-Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
-
---- a/drivers/mtd/nand/pxa3xx_nand.c
-+++ b/drivers/mtd/nand/pxa3xx_nand.c
-@@ -1637,7 +1637,7 @@ static int pxa3xx_nand_scan(struct mtd_i
-               goto KEEP_CONFIG;
-       /* Set a default chunk size */
--      info->chunk_size = 512;
-+      info->chunk_size = PAGE_CHUNK_SIZE;
-       ret = pxa3xx_nand_config_flash(info);
-       if (ret)
diff --git a/target/linux/mvebu/patches-4.4/022-mtd-pxa3xx_nand-Fix-initial-controller-configuration.patch b/target/linux/mvebu/patches-4.4/022-mtd-pxa3xx_nand-Fix-initial-controller-configuration.patch
deleted file mode 100644 (file)
index 7d07fb9..0000000
+++ /dev/null
@@ -1,104 +0,0 @@
-From: =?UTF-8?q?Ezequiel=20Garc=C3=ADa?= <ezequiel@vanguardiasur.com.ar>
-Date: Wed, 4 Nov 2015 13:13:42 -0300
-Subject: [PATCH] mtd: pxa3xx_nand: Fix initial controller configuration
-
-The Data Flash Control Register (NDCR) contains two types
-of parameters: those that are needed for device identification,
-and those that can only be set after device identification.
-
-Therefore, the driver can't set them all at once and instead
-needs to configure the first group before nand_scan_ident()
-and the second group later.
-
-Let's split pxa3xx_nand_config in two halves, and set the
-parameters that depend on the device geometry once this is known.
-
-Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
-Signed-off-by: Brian Norris <computersforpeace@gmail.com>
----
-
---- a/drivers/mtd/nand/pxa3xx_nand.c
-+++ b/drivers/mtd/nand/pxa3xx_nand.c
-@@ -1420,34 +1420,43 @@ static int pxa3xx_nand_waitfunc(struct m
-       return NAND_STATUS_READY;
- }
--static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info)
-+static int pxa3xx_nand_config_ident(struct pxa3xx_nand_info *info)
- {
-       struct platform_device *pdev = info->pdev;
-       struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(&pdev->dev);
--      struct pxa3xx_nand_host *host = info->host[info->cs];
--      struct mtd_info *mtd = host->mtd;
--      struct nand_chip *chip = mtd->priv;
--      /* configure default flash values */
-+      /* Configure default flash values */
-+      info->chunk_size = PAGE_CHUNK_SIZE;
-       info->reg_ndcr = 0x0; /* enable all interrupts */
-       info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
-       info->reg_ndcr |= NDCR_RD_ID_CNT(READ_ID_BYTES);
--      info->reg_ndcr |= NDCR_SPARE_EN; /* enable spare by default */
-+      info->reg_ndcr |= NDCR_SPARE_EN;
-+
-+      return 0;
-+}
-+
-+static void pxa3xx_nand_config_tail(struct pxa3xx_nand_info *info)
-+{
-+      struct pxa3xx_nand_host *host = info->host[info->cs];
-+      struct mtd_info *mtd = host->mtd;
-+      struct nand_chip *chip = mtd->priv;
-+
-       info->reg_ndcr |= (host->col_addr_cycles == 2) ? NDCR_RA_START : 0;
-       info->reg_ndcr |= (chip->page_shift == 6) ? NDCR_PG_PER_BLK : 0;
-       info->reg_ndcr |= (mtd->writesize == 2048) ? NDCR_PAGE_SZ : 0;
--
--      return 0;
- }
- static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
- {
-+      struct platform_device *pdev = info->pdev;
-+      struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(&pdev->dev);
-       uint32_t ndcr = nand_readl(info, NDCR);
-       /* Set an initial chunk size */
-       info->chunk_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512;
-       info->reg_ndcr = ndcr &
-               ~(NDCR_INT_MASK | NDCR_ND_ARB_EN | NFCV1_NDCR_ARB_CNTL);
-+      info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
-       info->ndtr0cs0 = nand_readl(info, NDTR0CS0);
-       info->ndtr1cs0 = nand_readl(info, NDTR1CS0);
-       return 0;
-@@ -1636,10 +1645,7 @@ static int pxa3xx_nand_scan(struct mtd_i
-       if (pdata->keep_config && !pxa3xx_nand_detect_config(info))
-               goto KEEP_CONFIG;
--      /* Set a default chunk size */
--      info->chunk_size = PAGE_CHUNK_SIZE;
--
--      ret = pxa3xx_nand_config_flash(info);
-+      ret = pxa3xx_nand_config_ident(info);
-       if (ret)
-               return ret;
-@@ -1652,7 +1658,6 @@ static int pxa3xx_nand_scan(struct mtd_i
-       }
- KEEP_CONFIG:
--      info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;
-       if (info->reg_ndcr & NDCR_DWIDTH_M)
-               chip->options |= NAND_BUSWIDTH_16;
-@@ -1737,6 +1742,10 @@ KEEP_CONFIG:
-               host->row_addr_cycles = 3;
-       else
-               host->row_addr_cycles = 2;
-+
-+      if (!pdata->keep_config)
-+              pxa3xx_nand_config_tail(info);
-+
-       return nand_scan_tail(mtd);
- }
diff --git a/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch b/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch
deleted file mode 100644 (file)
index 58687f3..0000000
+++ /dev/null
@@ -1,94 +0,0 @@
-From: Marcin Wojtas <mw@semihalf.com>
-Date: Mon, 14 Mar 2016 09:39:02 +0100
-Subject: [PATCH] bus: mvebu-mbus: provide api for obtaining IO and DRAM window
- information
-
-This commit enables finding appropriate mbus window and obtaining its
-target id and attribute for given physical address in two separate
-routines, both for IO and DRAM windows. This functionality
-is needed for Armada XP/38x Network Controller's Buffer Manager and
-PnC configuration.
-
-[gregory.clement@free-electrons.com: Fix size test for
-mvebu_mbus_get_dram_win_info]
-
-Signed-off-by: Marcin Wojtas <mw@semihalf.com>
-[DRAM window information reference in LKv3.10]
-Signed-off-by: Evan Wang <xswang@marvell.com>
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/bus/mvebu-mbus.c
-+++ b/drivers/bus/mvebu-mbus.c
-@@ -948,6 +948,58 @@ void mvebu_mbus_get_pcie_io_aperture(str
-       *res = mbus_state.pcie_io_aperture;
- }
-+int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr)
-+{
-+      const struct mbus_dram_target_info *dram;
-+      int i;
-+
-+      /* Get dram info */
-+      dram = mv_mbus_dram_info();
-+      if (!dram) {
-+              pr_err("missing DRAM information\n");
-+              return -ENODEV;
-+      }
-+
-+      /* Try to find matching DRAM window for phyaddr */
-+      for (i = 0; i < dram->num_cs; i++) {
-+              const struct mbus_dram_window *cs = dram->cs + i;
-+
-+              if (cs->base <= phyaddr &&
-+                      phyaddr <= (cs->base + cs->size - 1)) {
-+                      *target = dram->mbus_dram_target_id;
-+                      *attr = cs->mbus_attr;
-+                      return 0;
-+              }
-+      }
-+
-+      pr_err("invalid dram address 0x%x\n", phyaddr);
-+      return -EINVAL;
-+}
-+EXPORT_SYMBOL_GPL(mvebu_mbus_get_dram_win_info);
-+
-+int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
-+                             u8 *attr)
-+{
-+      int win;
-+
-+      for (win = 0; win < mbus_state.soc->num_wins; win++) {
-+              u64 wbase;
-+              int enabled;
-+
-+              mvebu_mbus_read_window(&mbus_state, win, &enabled, &wbase,
-+                                     size, target, attr, NULL);
-+
-+              if (!enabled)
-+                      continue;
-+
-+              if (wbase <= phyaddr && phyaddr <= wbase + *size)
-+                      return win;
-+      }
-+
-+      return -EINVAL;
-+}
-+EXPORT_SYMBOL_GPL(mvebu_mbus_get_io_win_info);
-+
- static __init int mvebu_mbus_debugfs_init(void)
- {
-       struct mvebu_mbus_state *s = &mbus_state;
---- a/include/linux/mbus.h
-+++ b/include/linux/mbus.h
-@@ -69,6 +69,9 @@ static inline const struct mbus_dram_tar
- int mvebu_mbus_save_cpu_target(u32 *store_addr);
- void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
- void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
-+int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr);
-+int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
-+                             u8 *attr);
- int mvebu_mbus_add_window_remap_by_id(unsigned int target,
-                                     unsigned int attribute,
-                                     phys_addr_t base, size_t size,
diff --git a/target/linux/mvebu/patches-4.4/030-mvneta-consolidate-autoneg-enabling.patch b/target/linux/mvebu/patches-4.4/030-mvneta-consolidate-autoneg-enabling.patch
deleted file mode 100644 (file)
index fbee3d2..0000000
+++ /dev/null
@@ -1,55 +0,0 @@
-From: Stas Sergeev <stsp@list.ru>
-Date: Wed, 2 Dec 2015 20:33:56 +0300
-Subject: [PATCH] mvneta: consolidate autoneg enabling
-
-This moves autoneg-related bit manipulations to the single place.
-
-CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-CC: netdev@vger.kernel.org
-CC: linux-kernel@vger.kernel.org
-
-Signed-off-by: Stas Sergeev <stsp@users.sourceforge.net>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -1071,15 +1071,28 @@ static void mvneta_defaults_set(struct m
-                      MVNETA_GMAC_AN_SPEED_EN |
-                      MVNETA_GMAC_AN_DUPLEX_EN;
-               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
-+
-               val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
-               val |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
-               mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
-+
-+              val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
-+              val |= MVNETA_GMAC2_INBAND_AN_ENABLE;
-+              mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
-       } else {
-               val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
-               val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE |
-                      MVNETA_GMAC_AN_SPEED_EN |
-                      MVNETA_GMAC_AN_DUPLEX_EN);
-               mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
-+
-+              val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
-+              val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
-+              mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
-+
-+              val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
-+              val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE;
-+              mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
-       }
-       mvneta_set_ucast_table(pp, -1);
-@@ -3232,9 +3245,6 @@ static int mvneta_port_power_up(struct m
-               return -EINVAL;
-       }
--      if (pp->use_inband_status)
--              ctrl |= MVNETA_GMAC2_INBAND_AN_ENABLE;
--
-       /* Cancel Port Reset */
-       ctrl &= ~MVNETA_GMAC2_PORT_RESET;
-       mvreg_write(pp, MVNETA_GMAC_CTRL_2, ctrl);
diff --git a/target/linux/mvebu/patches-4.4/031-mvneta-implement-ethtool-autonegotiation-control.patch b/target/linux/mvebu/patches-4.4/031-mvneta-implement-ethtool-autonegotiation-control.patch
deleted file mode 100644 (file)
index 3154d7c..0000000
+++ /dev/null
@@ -1,165 +0,0 @@
-From: Stas Sergeev <stsp@list.ru>
-Date: Wed, 2 Dec 2015 20:35:11 +0300
-Subject: [PATCH] mvneta: implement ethtool autonegotiation control
-
-This patch allows to do
-ethtool -s eth0 autoneg off
-ethtool -s eth0 autoneg on
-to disable or enable autonegotiation at run-time.
-Without that functionality, the only way to control the autonegotiation
-is to modify the device tree.
-
-This is needed if you plan to use the same kernel with
-different ethernet switches, the ones that support the in-band
-status and the ones that not.
-
-CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
-CC: netdev@vger.kernel.org
-CC: linux-kernel@vger.kernel.org
-
-Signed-off-by: Stas Sergeev <stsp@users.sourceforge.net>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -371,7 +371,7 @@ struct mvneta_port {
-       unsigned int duplex;
-       unsigned int speed;
-       unsigned int tx_csum_limit;
--      int use_inband_status:1;
-+      unsigned int use_inband_status:1;
-       u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)];
- };
-@@ -977,6 +977,44 @@ static void mvneta_set_other_mcast_table
-               mvreg_write(pp, MVNETA_DA_FILT_OTH_MCAST + offset, val);
- }
-+static void mvneta_set_autoneg(struct mvneta_port *pp, int enable)
-+{
-+      u32 val;
-+
-+      if (enable) {
-+              val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
-+              val &= ~(MVNETA_GMAC_FORCE_LINK_PASS |
-+                       MVNETA_GMAC_FORCE_LINK_DOWN |
-+                       MVNETA_GMAC_AN_FLOW_CTRL_EN);
-+              val |= MVNETA_GMAC_INBAND_AN_ENABLE |
-+                     MVNETA_GMAC_AN_SPEED_EN |
-+                     MVNETA_GMAC_AN_DUPLEX_EN;
-+              mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
-+
-+              val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
-+              val |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
-+              mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
-+
-+              val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
-+              val |= MVNETA_GMAC2_INBAND_AN_ENABLE;
-+              mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
-+      } else {
-+              val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
-+              val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE |
-+                     MVNETA_GMAC_AN_SPEED_EN |
-+                     MVNETA_GMAC_AN_DUPLEX_EN);
-+              mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
-+
-+              val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
-+              val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
-+              mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
-+
-+              val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
-+              val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE;
-+              mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
-+      }
-+}
-+
- /* This method sets defaults to the NETA port:
-  *    Clears interrupt Cause and Mask registers.
-  *    Clears all MAC tables.
-@@ -1062,39 +1100,7 @@ static void mvneta_defaults_set(struct m
-       val &= ~MVNETA_PHY_POLLING_ENABLE;
-       mvreg_write(pp, MVNETA_UNIT_CONTROL, val);
--      if (pp->use_inband_status) {
--              val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
--              val &= ~(MVNETA_GMAC_FORCE_LINK_PASS |
--                       MVNETA_GMAC_FORCE_LINK_DOWN |
--                       MVNETA_GMAC_AN_FLOW_CTRL_EN);
--              val |= MVNETA_GMAC_INBAND_AN_ENABLE |
--                     MVNETA_GMAC_AN_SPEED_EN |
--                     MVNETA_GMAC_AN_DUPLEX_EN;
--              mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
--
--              val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
--              val |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
--              mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
--
--              val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
--              val |= MVNETA_GMAC2_INBAND_AN_ENABLE;
--              mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
--      } else {
--              val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
--              val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE |
--                     MVNETA_GMAC_AN_SPEED_EN |
--                     MVNETA_GMAC_AN_DUPLEX_EN);
--              mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
--
--              val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
--              val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
--              mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
--
--              val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
--              val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE;
--              mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
--      }
--
-+      mvneta_set_autoneg(pp, pp->use_inband_status);
-       mvneta_set_ucast_table(pp, -1);
-       mvneta_set_special_mcast_table(pp, -1);
-       mvneta_set_other_mcast_table(pp, -1);
-@@ -2958,10 +2964,43 @@ int mvneta_ethtool_get_settings(struct n
- int mvneta_ethtool_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
- {
-       struct mvneta_port *pp = netdev_priv(dev);
-+      struct phy_device *phydev = pp->phy_dev;
--      if (!pp->phy_dev)
-+      if (!phydev)
-               return -ENODEV;
-+      if ((cmd->autoneg == AUTONEG_ENABLE) != pp->use_inband_status) {
-+              u32 val;
-+
-+              mvneta_set_autoneg(pp, cmd->autoneg == AUTONEG_ENABLE);
-+
-+              if (cmd->autoneg == AUTONEG_DISABLE) {
-+                      val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
-+                      val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED |
-+                               MVNETA_GMAC_CONFIG_GMII_SPEED |
-+                               MVNETA_GMAC_CONFIG_FULL_DUPLEX);
-+
-+                      if (phydev->duplex)
-+                              val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
-+
-+                      if (phydev->speed == SPEED_1000)
-+                              val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
-+                      else if (phydev->speed == SPEED_100)
-+                              val |= MVNETA_GMAC_CONFIG_MII_SPEED;
-+
-+                      mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
-+              }
-+
-+              pp->use_inband_status = (cmd->autoneg == AUTONEG_ENABLE);
-+              netdev_info(pp->dev, "autoneg status set to %i\n",
-+                          pp->use_inband_status);
-+
-+              if (netif_running(dev)) {
-+                      mvneta_port_down(pp);
-+                      mvneta_port_up(pp);
-+              }
-+      }
-+
-       return phy_ethtool_sset(pp->phy_dev, cmd);
- }
diff --git a/target/linux/mvebu/patches-4.4/032-net-mvneta-Make-the-default-queue-related-for-each-p.patch b/target/linux/mvebu/patches-4.4/032-net-mvneta-Make-the-default-queue-related-for-each-p.patch
deleted file mode 100644 (file)
index 3be47ab..0000000
+++ /dev/null
@@ -1,131 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Wed, 9 Dec 2015 18:23:48 +0100
-Subject: [PATCH] net: mvneta: Make the default queue related for each port
-
-Instead of using the same default queue for all the port. Move it in the
-port struct. It will allow have a different default queue for each port.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -356,6 +356,7 @@ struct mvneta_port {
-       struct mvneta_tx_queue *txqs;
-       struct net_device *dev;
-       struct notifier_block cpu_notifier;
-+      int rxq_def;
-       /* Core clock */
-       struct clk *clk;
-@@ -819,7 +820,7 @@ static void mvneta_port_up(struct mvneta
-       mvreg_write(pp, MVNETA_TXQ_CMD, q_map);
-       /* Enable all initialized RXQs. */
--      mvreg_write(pp, MVNETA_RXQ_CMD, BIT(rxq_def));
-+      mvreg_write(pp, MVNETA_RXQ_CMD, BIT(pp->rxq_def));
- }
- /* Stop the Ethernet port activity */
-@@ -1071,7 +1072,7 @@ static void mvneta_defaults_set(struct m
-       mvreg_write(pp, MVNETA_ACC_MODE, val);
-       /* Update val of portCfg register accordingly with all RxQueue types */
--      val = MVNETA_PORT_CONFIG_DEFL_VALUE(rxq_def);
-+      val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def);
-       mvreg_write(pp, MVNETA_PORT_CONFIG, val);
-       val = 0;
-@@ -2105,19 +2106,19 @@ static void mvneta_set_rx_mode(struct ne
-       if (dev->flags & IFF_PROMISC) {
-               /* Accept all: Multicast + Unicast */
-               mvneta_rx_unicast_promisc_set(pp, 1);
--              mvneta_set_ucast_table(pp, rxq_def);
--              mvneta_set_special_mcast_table(pp, rxq_def);
--              mvneta_set_other_mcast_table(pp, rxq_def);
-+              mvneta_set_ucast_table(pp, pp->rxq_def);
-+              mvneta_set_special_mcast_table(pp, pp->rxq_def);
-+              mvneta_set_other_mcast_table(pp, pp->rxq_def);
-       } else {
-               /* Accept single Unicast */
-               mvneta_rx_unicast_promisc_set(pp, 0);
-               mvneta_set_ucast_table(pp, -1);
--              mvneta_mac_addr_set(pp, dev->dev_addr, rxq_def);
-+              mvneta_mac_addr_set(pp, dev->dev_addr, pp->rxq_def);
-               if (dev->flags & IFF_ALLMULTI) {
-                       /* Accept all multicast */
--                      mvneta_set_special_mcast_table(pp, rxq_def);
--                      mvneta_set_other_mcast_table(pp, rxq_def);
-+                      mvneta_set_special_mcast_table(pp, pp->rxq_def);
-+                      mvneta_set_other_mcast_table(pp, pp->rxq_def);
-               } else {
-                       /* Accept only initialized multicast */
-                       mvneta_set_special_mcast_table(pp, -1);
-@@ -2126,7 +2127,7 @@ static void mvneta_set_rx_mode(struct ne
-                       if (!netdev_mc_empty(dev)) {
-                               netdev_for_each_mc_addr(ha, dev) {
-                                       mvneta_mcast_addr_set(pp, ha->addr,
--                                                            rxq_def);
-+                                                            pp->rxq_def);
-                               }
-                       }
-               }
-@@ -2209,7 +2210,7 @@ static int mvneta_poll(struct napi_struc
-        * RX packets
-        */
-       cause_rx_tx |= port->cause_rx_tx;
--      rx_done = mvneta_rx(pp, budget, &pp->rxqs[rxq_def]);
-+      rx_done = mvneta_rx(pp, budget, &pp->rxqs[pp->rxq_def]);
-       budget -= rx_done;
-       if (budget > 0) {
-@@ -2422,17 +2423,17 @@ static void mvneta_cleanup_txqs(struct m
- /* Cleanup all Rx queues */
- static void mvneta_cleanup_rxqs(struct mvneta_port *pp)
- {
--      mvneta_rxq_deinit(pp, &pp->rxqs[rxq_def]);
-+      mvneta_rxq_deinit(pp, &pp->rxqs[pp->rxq_def]);
- }
- /* Init all Rx queues */
- static int mvneta_setup_rxqs(struct mvneta_port *pp)
- {
--      int err = mvneta_rxq_init(pp, &pp->rxqs[rxq_def]);
-+      int err = mvneta_rxq_init(pp, &pp->rxqs[pp->rxq_def]);
-       if (err) {
-               netdev_err(pp->dev, "%s: can't create rxq=%d\n",
--                         __func__, rxq_def);
-+                         __func__, pp->rxq_def);
-               mvneta_cleanup_rxqs(pp);
-               return err;
-       }
-@@ -2638,7 +2639,7 @@ static int mvneta_set_mac_addr(struct ne
-       mvneta_mac_addr_set(pp, dev->dev_addr, -1);
-       /* Set new addr in hw */
--      mvneta_mac_addr_set(pp, sockaddr->sa_data, rxq_def);
-+      mvneta_mac_addr_set(pp, sockaddr->sa_data, pp->rxq_def);
-       eth_commit_mac_addr_change(dev, addr);
-       return 0;
-@@ -2757,7 +2758,7 @@ static void mvneta_percpu_elect(struct m
- {
-       int online_cpu_idx, cpu, i = 0;
--      online_cpu_idx = rxq_def % num_online_cpus();
-+      online_cpu_idx = pp->rxq_def % num_online_cpus();
-       for_each_online_cpu(cpu) {
-               if (i == online_cpu_idx)
-@@ -3365,6 +3366,8 @@ static int mvneta_probe(struct platform_
-                                strcmp(managed, "in-band-status") == 0);
-       pp->cpu_notifier.notifier_call = mvneta_percpu_notifier;
-+      pp->rxq_def = rxq_def;
-+
-       pp->clk = devm_clk_get(&pdev->dev, NULL);
-       if (IS_ERR(pp->clk)) {
-               err = PTR_ERR(pp->clk);
diff --git a/target/linux/mvebu/patches-4.4/033-net-mvneta-Associate-RX-queues-with-each-CPU.patch b/target/linux/mvebu/patches-4.4/033-net-mvneta-Associate-RX-queues-with-each-CPU.patch
deleted file mode 100644 (file)
index a08d5fd..0000000
+++ /dev/null
@@ -1,278 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Wed, 9 Dec 2015 18:23:49 +0100
-Subject: [PATCH] net: mvneta: Associate RX queues with each CPU
-
-We enable the percpu interrupt for all the CPU and we just associate a
-CPU to a few queue at the neta level. The mapping between the CPUs and
-the queues is static. The queues are associated to the CPU module the
-number of CPUs. However currently we only use on RX queue for a given
-Ethernet port.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -110,9 +110,16 @@
- #define MVNETA_CPU_MAP(cpu)                      (0x2540 + ((cpu) << 2))
- #define      MVNETA_CPU_RXQ_ACCESS_ALL_MASK      0x000000ff
- #define      MVNETA_CPU_TXQ_ACCESS_ALL_MASK      0x0000ff00
-+#define      MVNETA_CPU_RXQ_ACCESS(rxq)                BIT(rxq)
- #define MVNETA_RXQ_TIME_COAL_REG(q)              (0x2580 + ((q) << 2))
--/* Exception Interrupt Port/Queue Cause register */
-+/* Exception Interrupt Port/Queue Cause register
-+ *
-+ * Their behavior depend of the mapping done using the PCPX2Q
-+ * registers. For a given CPU if the bit associated to a queue is not
-+ * set, then for the register a read from this CPU will always return
-+ * 0 and a write won't do anything
-+ */
- #define MVNETA_INTR_NEW_CAUSE                    0x25a0
- #define MVNETA_INTR_NEW_MASK                     0x25a4
-@@ -820,7 +827,13 @@ static void mvneta_port_up(struct mvneta
-       mvreg_write(pp, MVNETA_TXQ_CMD, q_map);
-       /* Enable all initialized RXQs. */
--      mvreg_write(pp, MVNETA_RXQ_CMD, BIT(pp->rxq_def));
-+      for (queue = 0; queue < rxq_number; queue++) {
-+              struct mvneta_rx_queue *rxq = &pp->rxqs[queue];
-+
-+              if (rxq->descs != NULL)
-+                      q_map |= (1 << queue);
-+      }
-+      mvreg_write(pp, MVNETA_RXQ_CMD, q_map);
- }
- /* Stop the Ethernet port activity */
-@@ -1030,6 +1043,7 @@ static void mvneta_defaults_set(struct m
-       int cpu;
-       int queue;
-       u32 val;
-+      int max_cpu = num_present_cpus();
-       /* Clear all Cause registers */
-       mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
-@@ -1045,13 +1059,23 @@ static void mvneta_defaults_set(struct m
-       /* Enable MBUS Retry bit16 */
-       mvreg_write(pp, MVNETA_MBUS_RETRY, 0x20);
--      /* Set CPU queue access map - all CPUs have access to all RX
--       * queues and to all TX queues
-+      /* Set CPU queue access map. CPUs are assigned to the RX
-+       * queues modulo their number and all the TX queues are
-+       * assigned to the CPU associated to the default RX queue.
-        */
--      for_each_present_cpu(cpu)
--              mvreg_write(pp, MVNETA_CPU_MAP(cpu),
--                          (MVNETA_CPU_RXQ_ACCESS_ALL_MASK |
--                           MVNETA_CPU_TXQ_ACCESS_ALL_MASK));
-+      for_each_present_cpu(cpu) {
-+              int rxq_map = 0, txq_map = 0;
-+              int rxq;
-+
-+              for (rxq = 0; rxq < rxq_number; rxq++)
-+                      if ((rxq % max_cpu) == cpu)
-+                              rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq);
-+
-+              if (cpu == rxq_def)
-+                      txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK;
-+
-+              mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map);
-+      }
-       /* Reset RX and TX DMAs */
-       mvreg_write(pp, MVNETA_PORT_RX_RESET, MVNETA_PORT_RX_DMA_RESET);
-@@ -2178,6 +2202,7 @@ static int mvneta_poll(struct napi_struc
- {
-       int rx_done = 0;
-       u32 cause_rx_tx;
-+      int rx_queue;
-       struct mvneta_port *pp = netdev_priv(napi->dev);
-       struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports);
-@@ -2209,8 +2234,15 @@ static int mvneta_poll(struct napi_struc
-       /* For the case where the last mvneta_poll did not process all
-        * RX packets
-        */
-+      rx_queue = fls(((cause_rx_tx >> 8) & 0xff));
-+
-       cause_rx_tx |= port->cause_rx_tx;
--      rx_done = mvneta_rx(pp, budget, &pp->rxqs[pp->rxq_def]);
-+
-+      if (rx_queue) {
-+              rx_queue = rx_queue - 1;
-+              rx_done = mvneta_rx(pp, budget, &pp->rxqs[rx_queue]);
-+      }
-+
-       budget -= rx_done;
-       if (budget > 0) {
-@@ -2423,19 +2455,27 @@ static void mvneta_cleanup_txqs(struct m
- /* Cleanup all Rx queues */
- static void mvneta_cleanup_rxqs(struct mvneta_port *pp)
- {
--      mvneta_rxq_deinit(pp, &pp->rxqs[pp->rxq_def]);
-+      int queue;
-+
-+      for (queue = 0; queue < txq_number; queue++)
-+              mvneta_rxq_deinit(pp, &pp->rxqs[queue]);
- }
- /* Init all Rx queues */
- static int mvneta_setup_rxqs(struct mvneta_port *pp)
- {
--      int err = mvneta_rxq_init(pp, &pp->rxqs[pp->rxq_def]);
--      if (err) {
--              netdev_err(pp->dev, "%s: can't create rxq=%d\n",
--                         __func__, pp->rxq_def);
--              mvneta_cleanup_rxqs(pp);
--              return err;
-+      int queue;
-+
-+      for (queue = 0; queue < rxq_number; queue++) {
-+              int err = mvneta_rxq_init(pp, &pp->rxqs[queue]);
-+
-+              if (err) {
-+                      netdev_err(pp->dev, "%s: can't create rxq=%d\n",
-+                                 __func__, queue);
-+                      mvneta_cleanup_rxqs(pp);
-+                      return err;
-+              }
-       }
-       return 0;
-@@ -2459,6 +2499,19 @@ static int mvneta_setup_txqs(struct mvne
-       return 0;
- }
-+static void mvneta_percpu_unmask_interrupt(void *arg)
-+{
-+      struct mvneta_port *pp = arg;
-+
-+      /* All the queue are unmasked, but actually only the ones
-+       * maped to this CPU will be unmasked
-+       */
-+      mvreg_write(pp, MVNETA_INTR_NEW_MASK,
-+                  MVNETA_RX_INTR_MASK_ALL |
-+                  MVNETA_TX_INTR_MASK_ALL |
-+                  MVNETA_MISCINTR_INTR_MASK);
-+}
-+
- static void mvneta_start_dev(struct mvneta_port *pp)
- {
-       unsigned int cpu;
-@@ -2476,11 +2529,10 @@ static void mvneta_start_dev(struct mvne
-               napi_enable(&port->napi);
-       }
--      /* Unmask interrupts */
--      mvreg_write(pp, MVNETA_INTR_NEW_MASK,
--                  MVNETA_RX_INTR_MASK(rxq_number) |
--                  MVNETA_TX_INTR_MASK(txq_number) |
--                  MVNETA_MISCINTR_INTR_MASK);
-+      /* Unmask interrupts. It has to be done from each CPU */
-+      for_each_online_cpu(cpu)
-+              smp_call_function_single(cpu, mvneta_percpu_unmask_interrupt,
-+                                       pp, true);
-       mvreg_write(pp, MVNETA_INTR_MISC_MASK,
-                   MVNETA_CAUSE_PHY_STATUS_CHANGE |
-                   MVNETA_CAUSE_LINK_CHANGE |
-@@ -2756,22 +2808,35 @@ static void mvneta_percpu_disable(void *
- static void mvneta_percpu_elect(struct mvneta_port *pp)
- {
--      int online_cpu_idx, cpu, i = 0;
-+      int online_cpu_idx, max_cpu, cpu, i = 0;
-       online_cpu_idx = pp->rxq_def % num_online_cpus();
-+      max_cpu = num_present_cpus();
-       for_each_online_cpu(cpu) {
--              if (i == online_cpu_idx)
--                      /* Enable per-CPU interrupt on the one CPU we
--                       * just elected
-+              int rxq_map = 0, txq_map = 0;
-+              int rxq;
-+
-+              for (rxq = 0; rxq < rxq_number; rxq++)
-+                      if ((rxq % max_cpu) == cpu)
-+                              rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq);
-+
-+              if (i == online_cpu_idx) {
-+                      /* Map the default receive queue and transmit
-+                       * queue to the elected CPU
-                        */
--                      smp_call_function_single(cpu, mvneta_percpu_enable,
--                                              pp, true);
--              else
--                      /* Disable per-CPU interrupt on all the other CPU */
--                      smp_call_function_single(cpu, mvneta_percpu_disable,
--                                              pp, true);
-+                      rxq_map |= MVNETA_CPU_RXQ_ACCESS(pp->rxq_def);
-+                      txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK;
-+              }
-+              mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map);
-+
-+              /* Update the interrupt mask on each CPU according the
-+               * new mapping
-+               */
-+              smp_call_function_single(cpu, mvneta_percpu_unmask_interrupt,
-+                                       pp, true);
-               i++;
-+
-       }
- };
-@@ -2806,12 +2871,22 @@ static int mvneta_percpu_notifier(struct
-               mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
-               napi_enable(&port->napi);
-+
-+              /* Enable per-CPU interrupts on the CPU that is
-+               * brought up.
-+               */
-+              smp_call_function_single(cpu, mvneta_percpu_enable,
-+                                       pp, true);
-+
-               /* Enable per-CPU interrupt on the one CPU we care
-                * about.
-                */
-               mvneta_percpu_elect(pp);
--              /* Unmask all ethernet port interrupts */
-+              /* Unmask all ethernet port interrupts, as this
-+               * notifier is called for each CPU then the CPU to
-+               * Queue mapping is applied
-+               */
-               mvreg_write(pp, MVNETA_INTR_NEW_MASK,
-                       MVNETA_RX_INTR_MASK(rxq_number) |
-                       MVNETA_TX_INTR_MASK(txq_number) |
-@@ -2862,7 +2937,7 @@ static int mvneta_percpu_notifier(struct
- static int mvneta_open(struct net_device *dev)
- {
-       struct mvneta_port *pp = netdev_priv(dev);
--      int ret;
-+      int ret, cpu;
-       pp->pkt_size = MVNETA_RX_PKT_SIZE(pp->dev->mtu);
-       pp->frag_size = SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(pp->pkt_size)) +
-@@ -2892,8 +2967,13 @@ static int mvneta_open(struct net_device
-        */
-       mvneta_percpu_disable(pp);
--      /* Elect a CPU to handle our RX queue interrupt */
--      mvneta_percpu_elect(pp);
-+      /* Enable per-CPU interrupt on all the CPU to handle our RX
-+       * queue interrupts
-+       */
-+      for_each_online_cpu(cpu)
-+              smp_call_function_single(cpu, mvneta_percpu_enable,
-+                                       pp, true);
-+
-       /* Register a CPU notifier to handle the case where our CPU
-        * might be taken offline.
diff --git a/target/linux/mvebu/patches-4.4/034-net-mvneta-Add-naive-RSS-support.patch b/target/linux/mvebu/patches-4.4/034-net-mvneta-Add-naive-RSS-support.patch
deleted file mode 100644 (file)
index ee2c71b..0000000
+++ /dev/null
@@ -1,191 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Wed, 9 Dec 2015 18:23:50 +0100
-Subject: [PATCH] net: mvneta: Add naive RSS support
-
-This patch adds the support for the RSS related ethtool
-function. Currently it only uses one entry in the indirection table which
-allows associating an mvneta interface to a given CPU.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Tested-by: Marcin Wojtas <mw@semihalf.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -261,6 +261,11 @@
- #define MVNETA_TX_MTU_MAX             0x3ffff
-+/* The RSS lookup table actually has 256 entries but we do not use
-+ * them yet
-+ */
-+#define MVNETA_RSS_LU_TABLE_SIZE      1
-+
- /* TSO header size */
- #define TSO_HEADER_SIZE 128
-@@ -382,6 +387,8 @@ struct mvneta_port {
-       unsigned int use_inband_status:1;
-       u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)];
-+
-+      u32 indir[MVNETA_RSS_LU_TABLE_SIZE];
- };
- /* The mvneta_tx_desc and mvneta_rx_desc structures describe the
-@@ -1071,7 +1078,7 @@ static void mvneta_defaults_set(struct m
-                       if ((rxq % max_cpu) == cpu)
-                               rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq);
--              if (cpu == rxq_def)
-+              if (cpu == pp->rxq_def)
-                       txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK;
-               mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map);
-@@ -2512,6 +2519,18 @@ static void mvneta_percpu_unmask_interru
-                   MVNETA_MISCINTR_INTR_MASK);
- }
-+static void mvneta_percpu_mask_interrupt(void *arg)
-+{
-+      struct mvneta_port *pp = arg;
-+
-+      /* All the queue are masked, but actually only the ones
-+       * maped to this CPU will be masked
-+       */
-+      mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
-+      mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
-+      mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
-+}
-+
- static void mvneta_start_dev(struct mvneta_port *pp)
- {
-       unsigned int cpu;
-@@ -3233,6 +3252,106 @@ static int mvneta_ethtool_get_sset_count
-       return -EOPNOTSUPP;
- }
-+static u32 mvneta_ethtool_get_rxfh_indir_size(struct net_device *dev)
-+{
-+      return MVNETA_RSS_LU_TABLE_SIZE;
-+}
-+
-+static int mvneta_ethtool_get_rxnfc(struct net_device *dev,
-+                                  struct ethtool_rxnfc *info,
-+                                  u32 *rules __always_unused)
-+{
-+      switch (info->cmd) {
-+      case ETHTOOL_GRXRINGS:
-+              info->data =  rxq_number;
-+              return 0;
-+      case ETHTOOL_GRXFH:
-+              return -EOPNOTSUPP;
-+      default:
-+              return -EOPNOTSUPP;
-+      }
-+}
-+
-+static int  mvneta_config_rss(struct mvneta_port *pp)
-+{
-+      int cpu;
-+      u32 val;
-+
-+      netif_tx_stop_all_queues(pp->dev);
-+
-+      for_each_online_cpu(cpu)
-+              smp_call_function_single(cpu, mvneta_percpu_mask_interrupt,
-+                                       pp, true);
-+
-+      /* We have to synchronise on the napi of each CPU */
-+      for_each_online_cpu(cpu) {
-+              struct mvneta_pcpu_port *pcpu_port =
-+                      per_cpu_ptr(pp->ports, cpu);
-+
-+              napi_synchronize(&pcpu_port->napi);
-+              napi_disable(&pcpu_port->napi);
-+      }
-+
-+      pp->rxq_def = pp->indir[0];
-+
-+      /* Update unicast mapping */
-+      mvneta_set_rx_mode(pp->dev);
-+
-+      /* Update val of portCfg register accordingly with all RxQueue types */
-+      val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def);
-+      mvreg_write(pp, MVNETA_PORT_CONFIG, val);
-+
-+      /* Update the elected CPU matching the new rxq_def */
-+      mvneta_percpu_elect(pp);
-+
-+      /* We have to synchronise on the napi of each CPU */
-+      for_each_online_cpu(cpu) {
-+              struct mvneta_pcpu_port *pcpu_port =
-+                      per_cpu_ptr(pp->ports, cpu);
-+
-+              napi_enable(&pcpu_port->napi);
-+      }
-+
-+      netif_tx_start_all_queues(pp->dev);
-+
-+      return 0;
-+}
-+
-+static int mvneta_ethtool_set_rxfh(struct net_device *dev, const u32 *indir,
-+                                 const u8 *key, const u8 hfunc)
-+{
-+      struct mvneta_port *pp = netdev_priv(dev);
-+      /* We require at least one supported parameter to be changed
-+       * and no change in any of the unsupported parameters
-+       */
-+      if (key ||
-+          (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
-+              return -EOPNOTSUPP;
-+
-+      if (!indir)
-+              return 0;
-+
-+      memcpy(pp->indir, indir, MVNETA_RSS_LU_TABLE_SIZE);
-+
-+      return mvneta_config_rss(pp);
-+}
-+
-+static int mvneta_ethtool_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
-+                                 u8 *hfunc)
-+{
-+      struct mvneta_port *pp = netdev_priv(dev);
-+
-+      if (hfunc)
-+              *hfunc = ETH_RSS_HASH_TOP;
-+
-+      if (!indir)
-+              return 0;
-+
-+      memcpy(indir, pp->indir, MVNETA_RSS_LU_TABLE_SIZE);
-+
-+      return 0;
-+}
-+
- static const struct net_device_ops mvneta_netdev_ops = {
-       .ndo_open            = mvneta_open,
-       .ndo_stop            = mvneta_stop,
-@@ -3257,6 +3376,10 @@ const struct ethtool_ops mvneta_eth_tool
-       .get_strings    = mvneta_ethtool_get_strings,
-       .get_ethtool_stats = mvneta_ethtool_get_stats,
-       .get_sset_count = mvneta_ethtool_get_sset_count,
-+      .get_rxfh_indir_size = mvneta_ethtool_get_rxfh_indir_size,
-+      .get_rxnfc      = mvneta_ethtool_get_rxnfc,
-+      .get_rxfh       = mvneta_ethtool_get_rxfh,
-+      .set_rxfh       = mvneta_ethtool_set_rxfh,
- };
- /* Initialize hw */
-@@ -3448,6 +3571,8 @@ static int mvneta_probe(struct platform_
-       pp->rxq_def = rxq_def;
-+      pp->indir[0] = rxq_def;
-+
-       pp->clk = devm_clk_get(&pdev->dev, NULL);
-       if (IS_ERR(pp->clk)) {
-               err = PTR_ERR(pp->clk);
diff --git a/target/linux/mvebu/patches-4.4/035-net-mvneta-Configure-XPS-support.patch b/target/linux/mvebu/patches-4.4/035-net-mvneta-Configure-XPS-support.patch
deleted file mode 100644 (file)
index 7389466..0000000
+++ /dev/null
@@ -1,124 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Wed, 9 Dec 2015 18:23:51 +0100
-Subject: [PATCH] net: mvneta: Configure XPS support
-
-With this patch each CPU is associated with its own set of TX queues.
-
-It also setup the XPS with an initial configuration which set the
-affinity matching the hardware configuration.
-
-Suggested-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -111,6 +111,7 @@
- #define      MVNETA_CPU_RXQ_ACCESS_ALL_MASK      0x000000ff
- #define      MVNETA_CPU_TXQ_ACCESS_ALL_MASK      0x0000ff00
- #define      MVNETA_CPU_RXQ_ACCESS(rxq)                BIT(rxq)
-+#define      MVNETA_CPU_TXQ_ACCESS(txq)                BIT(txq + 8)
- #define MVNETA_RXQ_TIME_COAL_REG(q)              (0x2580 + ((q) << 2))
- /* Exception Interrupt Port/Queue Cause register
-@@ -514,6 +515,9 @@ struct mvneta_tx_queue {
-       /* DMA address of TSO headers */
-       dma_addr_t tso_hdrs_phys;
-+
-+      /* Affinity mask for CPUs*/
-+      cpumask_t affinity_mask;
- };
- struct mvneta_rx_queue {
-@@ -1066,20 +1070,30 @@ static void mvneta_defaults_set(struct m
-       /* Enable MBUS Retry bit16 */
-       mvreg_write(pp, MVNETA_MBUS_RETRY, 0x20);
--      /* Set CPU queue access map. CPUs are assigned to the RX
--       * queues modulo their number and all the TX queues are
--       * assigned to the CPU associated to the default RX queue.
-+      /* Set CPU queue access map. CPUs are assigned to the RX and
-+       * TX queues modulo their number. If there is only one TX
-+       * queue then it is assigned to the CPU associated to the
-+       * default RX queue.
-        */
-       for_each_present_cpu(cpu) {
-               int rxq_map = 0, txq_map = 0;
--              int rxq;
-+              int rxq, txq;
-               for (rxq = 0; rxq < rxq_number; rxq++)
-                       if ((rxq % max_cpu) == cpu)
-                               rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq);
--              if (cpu == pp->rxq_def)
--                      txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK;
-+              for (txq = 0; txq < txq_number; txq++)
-+                      if ((txq % max_cpu) == cpu)
-+                              txq_map |= MVNETA_CPU_TXQ_ACCESS(txq);
-+
-+              /* With only one TX queue we configure a special case
-+               * which will allow to get all the irq on a single
-+               * CPU
-+               */
-+              if (txq_number == 1)
-+                      txq_map = (cpu == pp->rxq_def) ?
-+                              MVNETA_CPU_TXQ_ACCESS(1) : 0;
-               mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map);
-       }
-@@ -2366,6 +2380,8 @@ static void mvneta_rxq_deinit(struct mvn
- static int mvneta_txq_init(struct mvneta_port *pp,
-                          struct mvneta_tx_queue *txq)
- {
-+      int cpu;
-+
-       txq->size = pp->tx_ring_size;
-       /* A queue must always have room for at least one skb.
-@@ -2418,6 +2434,14 @@ static int mvneta_txq_init(struct mvneta
-       }
-       mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal);
-+      /* Setup XPS mapping */
-+      if (txq_number > 1)
-+              cpu = txq->id % num_present_cpus();
-+      else
-+              cpu = pp->rxq_def % num_present_cpus();
-+      cpumask_set_cpu(cpu, &txq->affinity_mask);
-+      netif_set_xps_queue(pp->dev, &txq->affinity_mask, txq->id);
-+
-       return 0;
- }
-@@ -2840,13 +2864,23 @@ static void mvneta_percpu_elect(struct m
-                       if ((rxq % max_cpu) == cpu)
-                               rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq);
--              if (i == online_cpu_idx) {
--                      /* Map the default receive queue and transmit
--                       * queue to the elected CPU
-+              if (i == online_cpu_idx)
-+                      /* Map the default receive queue queue to the
-+                       * elected CPU
-                        */
-                       rxq_map |= MVNETA_CPU_RXQ_ACCESS(pp->rxq_def);
--                      txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK;
--              }
-+
-+              /* We update the TX queue map only if we have one
-+               * queue. In this case we associate the TX queue to
-+               * the CPU bound to the default RX queue
-+               */
-+              if (txq_number == 1)
-+                      txq_map = (i == online_cpu_idx) ?
-+                              MVNETA_CPU_TXQ_ACCESS(1) : 0;
-+              else
-+                      txq_map = mvreg_read(pp, MVNETA_CPU_MAP(cpu)) &
-+                              MVNETA_CPU_TXQ_ACCESS_ALL_MASK;
-+
-               mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map);
-               /* Update the interrupt mask on each CPU according the
diff --git a/target/linux/mvebu/patches-4.4/036-net-mvneta-fix-trivial-cut-off-issue-in-mvneta_ethto.patch b/target/linux/mvebu/patches-4.4/036-net-mvneta-fix-trivial-cut-off-issue-in-mvneta_ethto.patch
deleted file mode 100644 (file)
index e79a11a..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-From: Jisheng Zhang <jszhang@marvell.com>
-Date: Wed, 20 Jan 2016 16:36:25 +0800
-Subject: [PATCH] net: mvneta: fix trivial cut-off issue in
- mvneta_ethtool_update_stats
-
-When s->type is T_REG_64, the high 32bits are lost in val. This patch
-fixes this trivial issue.
-
-Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
-Fixes: 9b0cdefa4cd5 ("net: mvneta: add ethtool statistics")
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -3244,26 +3244,25 @@ static void mvneta_ethtool_update_stats(
-       const struct mvneta_statistic *s;
-       void __iomem *base = pp->base;
-       u32 high, low, val;
-+      u64 val64;
-       int i;
-       for (i = 0, s = mvneta_statistics;
-            s < mvneta_statistics + ARRAY_SIZE(mvneta_statistics);
-            s++, i++) {
--              val = 0;
--
-               switch (s->type) {
-               case T_REG_32:
-                       val = readl_relaxed(base + s->offset);
-+                      pp->ethtool_stats[i] += val;
-                       break;
-               case T_REG_64:
-                       /* Docs say to read low 32-bit then high */
-                       low = readl_relaxed(base + s->offset);
-                       high = readl_relaxed(base + s->offset + 4);
--                      val = (u64)high << 32 | low;
-+                      val64 = (u64)high << 32 | low;
-+                      pp->ethtool_stats[i] += val64;
-                       break;
-               }
--
--              pp->ethtool_stats[i] += val;
-       }
- }
diff --git a/target/linux/mvebu/patches-4.4/038-net-mvneta-Fix-the-CPU-choice-in-mvneta_percpu_elect.patch b/target/linux/mvebu/patches-4.4/038-net-mvneta-Fix-the-CPU-choice-in-mvneta_percpu_elect.patch
deleted file mode 100644 (file)
index 3423307..0000000
+++ /dev/null
@@ -1,57 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Thu, 4 Feb 2016 22:09:24 +0100
-Subject: [PATCH] net: mvneta: Fix the CPU choice in mvneta_percpu_elect
-
-When passing to the management of multiple RX queue, the
-mvneta_percpu_elect function was broken. The use of the modulo can lead
-to elect the wrong cpu. For example with rxq_def=2, if the CPU 2 goes
-offline and then online, we ended with the third RX queue activated in
-the same time on CPU 0 and CPU2, which lead to a kernel crash.
-
-With this fix, we don't try to get "the closer" CPU if the default CPU is
-gone, now we just use CPU 0 which always be there. Thanks to this, the
-code becomes more readable, easier to maintain and more predicable.
-
-Cc: stable@vger.kernel.org
-Fixes: 2dcf75e2793c ("net: mvneta: Associate RX queues with each CPU")
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -2851,9 +2851,14 @@ static void mvneta_percpu_disable(void *
- static void mvneta_percpu_elect(struct mvneta_port *pp)
- {
--      int online_cpu_idx, max_cpu, cpu, i = 0;
-+      int elected_cpu = 0, max_cpu, cpu, i = 0;
-+
-+      /* Use the cpu associated to the rxq when it is online, in all
-+       * the other cases, use the cpu 0 which can't be offline.
-+       */
-+      if (cpu_online(pp->rxq_def))
-+              elected_cpu = pp->rxq_def;
--      online_cpu_idx = pp->rxq_def % num_online_cpus();
-       max_cpu = num_present_cpus();
-       for_each_online_cpu(cpu) {
-@@ -2864,7 +2869,7 @@ static void mvneta_percpu_elect(struct m
-                       if ((rxq % max_cpu) == cpu)
-                               rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq);
--              if (i == online_cpu_idx)
-+              if (cpu == elected_cpu)
-                       /* Map the default receive queue queue to the
-                        * elected CPU
-                        */
-@@ -2875,7 +2880,7 @@ static void mvneta_percpu_elect(struct m
-                * the CPU bound to the default RX queue
-                */
-               if (txq_number == 1)
--                      txq_map = (i == online_cpu_idx) ?
-+                      txq_map = (cpu == elected_cpu) ?
-                               MVNETA_CPU_TXQ_ACCESS(1) : 0;
-               else
-                       txq_map = mvreg_read(pp, MVNETA_CPU_MAP(cpu)) &
diff --git a/target/linux/mvebu/patches-4.4/039-net-mvneta-Use-on_each_cpu-when-possible.patch b/target/linux/mvebu/patches-4.4/039-net-mvneta-Use-on_each_cpu-when-possible.patch
deleted file mode 100644 (file)
index 8d22df0..0000000
+++ /dev/null
@@ -1,68 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Thu, 4 Feb 2016 22:09:25 +0100
-Subject: [PATCH] net: mvneta: Use on_each_cpu when possible
-
-Instead of using a for_each_* loop in which we just call the
-smp_call_function_single macro, it is more simple to directly use the
-on_each_cpu macro. Moreover, this macro ensures that the calls will be
-done all at once.
-
-Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -2557,7 +2557,7 @@ static void mvneta_percpu_mask_interrupt
- static void mvneta_start_dev(struct mvneta_port *pp)
- {
--      unsigned int cpu;
-+      int cpu;
-       mvneta_max_rx_size_set(pp, pp->pkt_size);
-       mvneta_txq_max_tx_size_set(pp, pp->pkt_size);
-@@ -2573,9 +2573,8 @@ static void mvneta_start_dev(struct mvne
-       }
-       /* Unmask interrupts. It has to be done from each CPU */
--      for_each_online_cpu(cpu)
--              smp_call_function_single(cpu, mvneta_percpu_unmask_interrupt,
--                                       pp, true);
-+      on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
-+
-       mvreg_write(pp, MVNETA_INTR_MISC_MASK,
-                   MVNETA_CAUSE_PHY_STATUS_CHANGE |
-                   MVNETA_CAUSE_LINK_CHANGE |
-@@ -2995,7 +2994,7 @@ static int mvneta_percpu_notifier(struct
- static int mvneta_open(struct net_device *dev)
- {
-       struct mvneta_port *pp = netdev_priv(dev);
--      int ret, cpu;
-+      int ret;
-       pp->pkt_size = MVNETA_RX_PKT_SIZE(pp->dev->mtu);
-       pp->frag_size = SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(pp->pkt_size)) +
-@@ -3028,9 +3027,7 @@ static int mvneta_open(struct net_device
-       /* Enable per-CPU interrupt on all the CPU to handle our RX
-        * queue interrupts
-        */
--      for_each_online_cpu(cpu)
--              smp_call_function_single(cpu, mvneta_percpu_enable,
--                                       pp, true);
-+      on_each_cpu(mvneta_percpu_enable, pp, true);
-       /* Register a CPU notifier to handle the case where our CPU
-@@ -3317,9 +3314,7 @@ static int  mvneta_config_rss(struct mvn
-       netif_tx_stop_all_queues(pp->dev);
--      for_each_online_cpu(cpu)
--              smp_call_function_single(cpu, mvneta_percpu_mask_interrupt,
--                                       pp, true);
-+      on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
-       /* We have to synchronise on the napi of each CPU */
-       for_each_online_cpu(cpu) {
diff --git a/target/linux/mvebu/patches-4.4/040-net-mvneta-Modify-the-queue-related-fields-from-each.patch b/target/linux/mvebu/patches-4.4/040-net-mvneta-Modify-the-queue-related-fields-from-each.patch
deleted file mode 100644 (file)
index acb6c94..0000000
+++ /dev/null
@@ -1,179 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Thu, 4 Feb 2016 22:09:27 +0100
-Subject: [PATCH] net: mvneta: Modify the queue related fields from each cpu
-
-In the MVNETA_INTR_* registers, the queues related fields are per cpu,
-according to the datasheet (comment in [] are added by me):
-"In a multi-CPU system, bits of RX[or TX] queues for which the access by
-the reading[or writing] CPU is disabled are read as 0, and cannot be
-cleared[or written]."
-
-That means that each time we want to manipulate these bits we had to do
-it on each cpu and not only on the current cpu.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -1040,6 +1040,43 @@ static void mvneta_set_autoneg(struct mv
-       }
- }
-+static void mvneta_percpu_unmask_interrupt(void *arg)
-+{
-+      struct mvneta_port *pp = arg;
-+
-+      /* All the queue are unmasked, but actually only the ones
-+       * mapped to this CPU will be unmasked
-+       */
-+      mvreg_write(pp, MVNETA_INTR_NEW_MASK,
-+                  MVNETA_RX_INTR_MASK_ALL |
-+                  MVNETA_TX_INTR_MASK_ALL |
-+                  MVNETA_MISCINTR_INTR_MASK);
-+}
-+
-+static void mvneta_percpu_mask_interrupt(void *arg)
-+{
-+      struct mvneta_port *pp = arg;
-+
-+      /* All the queue are masked, but actually only the ones
-+       * mapped to this CPU will be masked
-+       */
-+      mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
-+      mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
-+      mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
-+}
-+
-+static void mvneta_percpu_clear_intr_cause(void *arg)
-+{
-+      struct mvneta_port *pp = arg;
-+
-+      /* All the queue are cleared, but actually only the ones
-+       * mapped to this CPU will be cleared
-+       */
-+      mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
-+      mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
-+      mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
-+}
-+
- /* This method sets defaults to the NETA port:
-  *    Clears interrupt Cause and Mask registers.
-  *    Clears all MAC tables.
-@@ -1057,14 +1094,10 @@ static void mvneta_defaults_set(struct m
-       int max_cpu = num_present_cpus();
-       /* Clear all Cause registers */
--      mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
--      mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
--      mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
-+      on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
-       /* Mask all interrupts */
--      mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
--      mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
--      mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
-+      on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
-       mvreg_write(pp, MVNETA_INTR_ENABLE, 0);
-       /* Enable MBUS Retry bit16 */
-@@ -2530,31 +2563,6 @@ static int mvneta_setup_txqs(struct mvne
-       return 0;
- }
--static void mvneta_percpu_unmask_interrupt(void *arg)
--{
--      struct mvneta_port *pp = arg;
--
--      /* All the queue are unmasked, but actually only the ones
--       * maped to this CPU will be unmasked
--       */
--      mvreg_write(pp, MVNETA_INTR_NEW_MASK,
--                  MVNETA_RX_INTR_MASK_ALL |
--                  MVNETA_TX_INTR_MASK_ALL |
--                  MVNETA_MISCINTR_INTR_MASK);
--}
--
--static void mvneta_percpu_mask_interrupt(void *arg)
--{
--      struct mvneta_port *pp = arg;
--
--      /* All the queue are masked, but actually only the ones
--       * maped to this CPU will be masked
--       */
--      mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
--      mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
--      mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
--}
--
- static void mvneta_start_dev(struct mvneta_port *pp)
- {
-       int cpu;
-@@ -2605,13 +2613,10 @@ static void mvneta_stop_dev(struct mvnet
-       mvneta_port_disable(pp);
-       /* Clear all ethernet port interrupts */
--      mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
--      mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
-+      on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
-       /* Mask all ethernet port interrupts */
--      mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
--      mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
--      mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
-+      on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
-       mvneta_tx_reset(pp);
-       mvneta_rx_reset(pp);
-@@ -2923,9 +2928,7 @@ static int mvneta_percpu_notifier(struct
-               }
-               /* Mask all ethernet port interrupts */
--              mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
--              mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
--              mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
-+              on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
-               napi_enable(&port->napi);
-@@ -2940,14 +2943,8 @@ static int mvneta_percpu_notifier(struct
-                */
-               mvneta_percpu_elect(pp);
--              /* Unmask all ethernet port interrupts, as this
--               * notifier is called for each CPU then the CPU to
--               * Queue mapping is applied
--               */
--              mvreg_write(pp, MVNETA_INTR_NEW_MASK,
--                      MVNETA_RX_INTR_MASK(rxq_number) |
--                      MVNETA_TX_INTR_MASK(txq_number) |
--                      MVNETA_MISCINTR_INTR_MASK);
-+              /* Unmask all ethernet port interrupts */
-+              on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
-               mvreg_write(pp, MVNETA_INTR_MISC_MASK,
-                       MVNETA_CAUSE_PHY_STATUS_CHANGE |
-                       MVNETA_CAUSE_LINK_CHANGE |
-@@ -2958,9 +2955,7 @@ static int mvneta_percpu_notifier(struct
-       case CPU_DOWN_PREPARE_FROZEN:
-               netif_tx_stop_all_queues(pp->dev);
-               /* Mask all ethernet port interrupts */
--              mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
--              mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
--              mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
-+              on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
-               napi_synchronize(&port->napi);
-               napi_disable(&port->napi);
-@@ -2976,10 +2971,7 @@ static int mvneta_percpu_notifier(struct
-               /* Check if a new CPU must be elected now this on is down */
-               mvneta_percpu_elect(pp);
-               /* Unmask all ethernet port interrupts */
--              mvreg_write(pp, MVNETA_INTR_NEW_MASK,
--                      MVNETA_RX_INTR_MASK(rxq_number) |
--                      MVNETA_TX_INTR_MASK(txq_number) |
--                      MVNETA_MISCINTR_INTR_MASK);
-+              on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
-               mvreg_write(pp, MVNETA_INTR_MISC_MASK,
-                       MVNETA_CAUSE_PHY_STATUS_CHANGE |
-                       MVNETA_CAUSE_LINK_CHANGE |
diff --git a/target/linux/mvebu/patches-4.4/041-net-mvneta-The-mvneta_percpu_elect-function-should-b.patch b/target/linux/mvebu/patches-4.4/041-net-mvneta-The-mvneta_percpu_elect-function-should-b.patch
deleted file mode 100644 (file)
index 1d3d6aa..0000000
+++ /dev/null
@@ -1,68 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Thu, 4 Feb 2016 22:09:28 +0100
-Subject: [PATCH] net: mvneta: The mvneta_percpu_elect function should be
- atomic
-
-Electing a CPU must be done in an atomic way: it should be done after or
-before the removal/insertion of a CPU and this function is not reentrant.
-
-During the loop of mvneta_percpu_elect we associates the queues to the
-CPUs, if there is a topology change during this loop, then the mapping
-between the CPUs and the queues could be wrong. During this loop the
-interrupt mask is also updating for each CPUs, It should not be changed
-in the same time by other part of the driver.
-
-This patch adds spinlock to create the needed critical sections.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -370,6 +370,10 @@ struct mvneta_port {
-       struct net_device *dev;
-       struct notifier_block cpu_notifier;
-       int rxq_def;
-+      /* Protect the access to the percpu interrupt registers,
-+       * ensuring that the configuration remains coherent.
-+       */
-+      spinlock_t lock;
-       /* Core clock */
-       struct clk *clk;
-@@ -2857,6 +2861,12 @@ static void mvneta_percpu_elect(struct m
- {
-       int elected_cpu = 0, max_cpu, cpu, i = 0;
-+      /* Electing a CPU must be done in an atomic way: it should be
-+       * done after or before the removal/insertion of a CPU and
-+       * this function is not reentrant.
-+       */
-+      spin_lock(&pp->lock);
-+
-       /* Use the cpu associated to the rxq when it is online, in all
-        * the other cases, use the cpu 0 which can't be offline.
-        */
-@@ -2900,6 +2910,7 @@ static void mvneta_percpu_elect(struct m
-               i++;
-       }
-+      spin_unlock(&pp->lock);
- };
- static int mvneta_percpu_notifier(struct notifier_block *nfb,
-@@ -2954,8 +2965,13 @@ static int mvneta_percpu_notifier(struct
-       case CPU_DOWN_PREPARE:
-       case CPU_DOWN_PREPARE_FROZEN:
-               netif_tx_stop_all_queues(pp->dev);
-+              /* Thanks to this lock we are sure that any pending
-+               * cpu election is done
-+               */
-+              spin_lock(&pp->lock);
-               /* Mask all ethernet port interrupts */
-               on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
-+              spin_unlock(&pp->lock);
-               napi_synchronize(&port->napi);
-               napi_disable(&port->napi);
diff --git a/target/linux/mvebu/patches-4.4/042-net-mvneta-Fix-race-condition-during-stopping.patch b/target/linux/mvebu/patches-4.4/042-net-mvneta-Fix-race-condition-during-stopping.patch
deleted file mode 100644 (file)
index 878229c..0000000
+++ /dev/null
@@ -1,128 +0,0 @@
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Thu, 4 Feb 2016 22:09:29 +0100
-Subject: [PATCH] net: mvneta: Fix race condition during stopping
-
-When stopping the port, the CPU notifier are still there whereas the
-mvneta_stop_dev function calls mvneta_percpu_disable() on each CPUs.
-It was possible to have a new CPU coming at this point which could be
-racy.
-
-This patch adds a flag preventing executing the code notifier for a new
-CPU when the port is stopping. It also uses the spinlock introduces
-previously. To avoid the deadlock, the lock has been moved outside the
-mvneta_percpu_elect function.
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
-
---- a/drivers/net/ethernet/marvell/mvneta.c
-+++ b/drivers/net/ethernet/marvell/mvneta.c
-@@ -374,6 +374,7 @@ struct mvneta_port {
-        * ensuring that the configuration remains coherent.
-        */
-       spinlock_t lock;
-+      bool is_stopped;
-       /* Core clock */
-       struct clk *clk;
-@@ -2857,16 +2858,14 @@ static void mvneta_percpu_disable(void *
-       disable_percpu_irq(pp->dev->irq);
- }
-+/* Electing a CPU must be done in an atomic way: it should be done
-+ * after or before the removal/insertion of a CPU and this function is
-+ * not reentrant.
-+ */
- static void mvneta_percpu_elect(struct mvneta_port *pp)
- {
-       int elected_cpu = 0, max_cpu, cpu, i = 0;
--      /* Electing a CPU must be done in an atomic way: it should be
--       * done after or before the removal/insertion of a CPU and
--       * this function is not reentrant.
--       */
--      spin_lock(&pp->lock);
--
-       /* Use the cpu associated to the rxq when it is online, in all
-        * the other cases, use the cpu 0 which can't be offline.
-        */
-@@ -2910,7 +2909,6 @@ static void mvneta_percpu_elect(struct m
-               i++;
-       }
--      spin_unlock(&pp->lock);
- };
- static int mvneta_percpu_notifier(struct notifier_block *nfb,
-@@ -2924,6 +2922,14 @@ static int mvneta_percpu_notifier(struct
-       switch (action) {
-       case CPU_ONLINE:
-       case CPU_ONLINE_FROZEN:
-+              spin_lock(&pp->lock);
-+              /* Configuring the driver for a new CPU while the
-+               * driver is stopping is racy, so just avoid it.
-+               */
-+              if (pp->is_stopped) {
-+                      spin_unlock(&pp->lock);
-+                      break;
-+              }
-               netif_tx_stop_all_queues(pp->dev);
-               /* We have to synchronise on tha napi of each CPU
-@@ -2961,6 +2967,7 @@ static int mvneta_percpu_notifier(struct
-                       MVNETA_CAUSE_LINK_CHANGE |
-                       MVNETA_CAUSE_PSC_SYNC_CHANGE);
-               netif_tx_start_all_queues(pp->dev);
-+              spin_unlock(&pp->lock);
-               break;
-       case CPU_DOWN_PREPARE:
-       case CPU_DOWN_PREPARE_FROZEN:
-@@ -2985,7 +2992,9 @@ static int mvneta_percpu_notifier(struct
-       case CPU_DEAD:
-       case CPU_DEAD_FROZEN:
-               /* Check if a new CPU must be elected now this on is down */
-+              spin_lock(&pp->lock);
-               mvneta_percpu_elect(pp);
-+              spin_unlock(&pp->lock);
-               /* Unmask all ethernet port interrupts */
-               on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
-               mvreg_write(pp, MVNETA_INTR_MISC_MASK,
-@@ -3037,7 +3046,7 @@ static int mvneta_open(struct net_device
-        */
-       on_each_cpu(mvneta_percpu_enable, pp, true);
--
-+      pp->is_stopped = false;
-       /* Register a CPU notifier to handle the case where our CPU
-        * might be taken offline.
-        */
-@@ -3070,9 +3079,18 @@ static int mvneta_stop(struct net_device
- {
-       struct mvneta_port *pp = netdev_priv(dev);
-+      /* Inform that we are stopping so we don't want to setup the
-+       * driver for new CPUs in the notifiers
-+       */
-+      spin_lock(&pp->lock);
-+      pp->is_stopped = true;
-       mvneta_stop_dev(pp);
-       mvneta_mdio_remove(pp);
-       unregister_cpu_notifier(&pp->cpu_notifier);
-+      /* Now that the notifier are unregistered, we can release le
-+       * lock
-+       */
-+      spin_unlock(&pp->lock);
-       on_each_cpu(mvneta_percpu_disable, pp, true);
-       free_percpu_irq(dev->irq, pp->ports);
-       mvneta_cleanup_rxqs(pp);
-@@ -3343,7 +3361,9 @@ static int  mvneta_config_rss(struct mvn
-       mvreg_write(pp, MVNETA_PORT_CONFIG, val);
-       /* Update the elected CPU matching the new rxq_def */
-+      spin_lock(&pp->lock);
-       mvneta_percpu_elect(pp);
-+      spin_unlock(&pp->lock);
-       /* We have to synchronise on the napi of each CPU */
-       for_each_online_cpu(cpu) {
diff --git a/target/linux/mvebu/patches-4.4/043-net-mvneta-sort-the-headers-in-alphabetic-order.patch b/target/linux/mvebu/patches-4.4/043-net-mvneta-sort-the-headers-in-alphabetic-order.patch
deleted file mode 100644 (file)
index 502c258..0000000
--- a/t