arch/arm/boot/dts/imx6dl.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
-diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
-index 80d0abe..9c4942f 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
-@@ -22,6 +22,26 @@
+@@ -21,6 +21,26 @@
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
cpu@1 {
---
-2.0.3
-
--- /dev/null
+From 804f57b1a63c7435fe43b36942581cc6c79ebb5c Mon Sep 17 00:00:00 2001
+From: Lucas Stach <l.stach@pengutronix.de>
+Date: Wed, 5 Mar 2014 14:25:51 +0100
+Subject: [PATCH] PCI: designware: Use new OF interrupt mapping when possible
+
+Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible.
+This is the recommended method of doing the IRQ mapping. For old
+devicetrees we fall back to the previous practice.
+
+This makes INTB, INTC, and INTD work on i.MX.
+
+Tested-by: Tim Harvey <tharvey@gateworks.com>
+Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Marek Vasut <marex@denx.de>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Acked-by: Jingoo Han <jg1.han@samsung.com>
+---
+ drivers/pci/host/pcie-designware.c | 12 +++++++++---
+ 1 file changed, 9 insertions(+), 3 deletions(-)
+
+--- a/drivers/pci/host/pcie-designware.c
++++ b/drivers/pci/host/pcie-designware.c
+@@ -17,6 +17,7 @@
+ #include <linux/module.h>
+ #include <linux/msi.h>
+ #include <linux/of_address.h>
++#include <linux/of_pci.h>
+ #include <linux/pci.h>
+ #include <linux/pci_regs.h>
+ #include <linux/types.h>
+@@ -492,7 +493,7 @@ int __init dw_pcie_host_init(struct pcie
+ dw_pci.nr_controllers = 1;
+ dw_pci.private_data = (void **)&pp;
+
+- pci_common_init(&dw_pci);
++ pci_common_init_dev(pp->dev, &dw_pci);
+ pci_assign_unassigned_resources();
+ #ifdef CONFIG_PCI_DOMAINS
+ dw_pci.domain++;
+@@ -725,7 +726,7 @@ static struct pci_bus *dw_pcie_scan_bus(
+
+ if (pp) {
+ pp->root_bus_nr = sys->busnr;
+- bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops,
++ bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops,
+ sys, &sys->resources);
+ } else {
+ bus = NULL;
+@@ -738,8 +739,13 @@ static struct pci_bus *dw_pcie_scan_bus(
+ static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+ {
+ struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
++ int irq;
+
+- return pp->irq;
++ irq = of_irq_parse_and_map_pci(dev, slot, pin);
++ if (!irq)
++ irq = pp->irq;
++
++ return irq;
+ }
+
+ static void dw_pcie_add_bus(struct pci_bus *bus)
--- /dev/null
+From 07134a365f1c4be6e840a00ae452d1593f15c5fc Mon Sep 17 00:00:00 2001
+From: Lucas Stach <l.stach@pengutronix.de>
+Date: Wed, 5 Mar 2014 14:25:50 +0100
+Subject: [PATCH] ARM: dts: imx6: add PCIe interrupt mapping properties
+
+As defined by the common PCI bindings.
+
+Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
+Acked-by: Arnd Bergmann <arnd@arndb.de>
+Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+---
+ arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm/boot/dts/imx6qdl.dtsi
++++ b/arch/arm/boot/dts/imx6qdl.dtsi
+@@ -10,6 +10,8 @@
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++
+ #include "skeleton.dtsi"
+
+ / {
+@@ -127,6 +129,12 @@
+ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
+ num-lanes = <1>;
+ interrupts = <0 123 0x04>;
++ #interrupt-cells = <1>;
++ interrupt-map-mask = <0 0 0 0x7>;
++ interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
++ <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
++ <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
++ <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
+ clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
+ status = "disabled";
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
-@@ -38,8 +38,6 @@
+@@ -40,8 +40,6 @@
intc: interrupt-controller@00a01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
+++ /dev/null
-commit 62fe03d1dd629a98c6da86cabb2a98b85e89d516
-Author: Lucas Stach <l.stach@pengutronix.de>
-Date: Wed Mar 5 14:25:51 2014 +0100
-
- PCI: designware: use new OF interrupt mapping when possible
-
- This is the recommended method of doing the IRQ
- mapping. For old devicetrees we fall back to the
- previous practice.
-
- Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
- Acked-by: Arnd Bergmann <arnd@arndb.de>
- Acked-by: Jingoo Han <jg1.han@samsung.com>
- Reviewed-by: Marek Vasut <marex@denx.de>
-
---- a/drivers/pci/host/pcie-designware.c
-+++ b/drivers/pci/host/pcie-designware.c
-@@ -17,6 +17,7 @@
- #include <linux/module.h>
- #include <linux/msi.h>
- #include <linux/of_address.h>
-+#include <linux/of_pci.h>
- #include <linux/pci.h>
- #include <linux/pci_regs.h>
- #include <linux/types.h>
-@@ -492,7 +493,7 @@ int __init dw_pcie_host_init(struct pcie
- dw_pci.nr_controllers = 1;
- dw_pci.private_data = (void **)&pp;
-
-- pci_common_init(&dw_pci);
-+ pci_common_init_dev(pp->dev, &dw_pci);
- pci_assign_unassigned_resources();
- #ifdef CONFIG_PCI_DOMAINS
- dw_pci.domain++;
-@@ -725,7 +726,7 @@ static struct pci_bus *dw_pcie_scan_bus(
-
- if (pp) {
- pp->root_bus_nr = sys->busnr;
-- bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops,
-+ bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops,
- sys, &sys->resources);
- } else {
- bus = NULL;
-@@ -738,8 +739,13 @@ static struct pci_bus *dw_pcie_scan_bus(
- static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
- {
- struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
-+ int irq;
-
-- return pp->irq;
-+ irq = of_irq_parse_and_map_pci(dev, slot, pin);
-+ if (!irq)
-+ irq = pp->irq;
-+
-+ return irq;
- }
-
- static void dw_pcie_add_bus(struct pci_bus *bus)
+++ /dev/null
-From 07134a365f1c4be6e840a00ae452d1593f15c5fc Mon Sep 17 00:00:00 2001
-From: Lucas Stach <l.stach@pengutronix.de>
-Date: Wed, 5 Mar 2014 14:25:50 +0100
-Subject: [PATCH] ARM: dts: imx6: add PCIe interrupt mapping properties
-
-As defined by the common PCI bindings.
-
-Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
----
- arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm/boot/dts/imx6qdl.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl.dtsi
-@@ -10,6 +10,8 @@
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+
- #include "skeleton.dtsi"
-
- / {
-@@ -125,6 +127,12 @@
- 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
- num-lanes = <1>;
- interrupts = <0 123 0x04>;
-+ #interrupt-cells = <1>;
-+ interrupt-map-mask = <0 0 0 0x7>;
-+ interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
- clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
- status = "disabled";
projects / openwrt / openwrt.git / commitdiff