kernel: bump to 4.4.39
authorKevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
Fri, 16 Dec 2016 11:33:38 +0000 (11:33 +0000)
committerJohn Crispin <john@phrozen.org>
Tue, 20 Dec 2016 08:35:36 +0000 (09:35 +0100)
Bump & refresh patches for all 4.4 targets.

Compile & run tested: ar71xx Archer C7 v2

Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
12 files changed:
include/kernel-version.mk
target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch
target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch
target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch
target/linux/generic/patches-4.4/540-crypto-xz-decompression-support.patch
target/linux/layerscape/patches-4.4/3143-armv8-aarch32-Execute-32-bit-Linux-for-ls1046a.patch
target/linux/layerscape/patches-4.4/7021-net-Make-the-netdev-watchdog-aware-of-hardware-multi.patch
target/linux/layerscape/patches-4.4/8129-clk-qoriq-add-ls1046a-support.patch
target/linux/layerscape/patches-4.4/8134-pci-layerscape-add-LUT-DBG-reigster-offset-member.patch
target/linux/layerscape/patches-4.4/8138-pci-layerscape-add-MSI-interrupt-support.patch
target/linux/layerscape/patches-4.4/8142-drivers-mmc-Add-compatible-string-for-LS1046A.patch
target/linux/ramips/patches-4.4/102-add-dlink-dwr158-in-usb-serial-option.patch

index 32752a2..41d2df3 100644 (file)
@@ -4,11 +4,11 @@ LINUX_RELEASE?=1
 
 LINUX_VERSION-3.18 = .43
 LINUX_VERSION-4.1 = .34
-LINUX_VERSION-4.4 = .38
+LINUX_VERSION-4.4 = .39
 
 LINUX_KERNEL_HASH-3.18.43 = 1236e8123a6ce537d5029232560966feed054ae31776fe8481dd7d18cdd5492c
 LINUX_KERNEL_HASH-4.1.34 = 412316b32b5c7a513ba3ab8e68fc443db4d9423f07b577473089def0ee7406af
-LINUX_KERNEL_HASH-4.4.38 = 77ed9e650b65788a1f9f371ba87c2e50b5ba7624bc834ae38b036f7f592816a6
+LINUX_KERNEL_HASH-4.4.39 = 864bc186b02bf62974676efa282eda775fe12e5729a3416cfe4b17f0c59111a1
 
 ifdef KERNEL_PATCHVER
   LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
index 61b6b4e..0e33674 100644 (file)
@@ -29,9 +29,7 @@
 -      u32 bootstrap;
 +      void __iomem *phy_reg;
 +      u32 t;
--      bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
--      if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
++
 +      phy_reg = ioremap(base, 4);
 +      if (!phy_reg)
 +              return;
@@ -43,7 +41,9 @@
 +
 +      iounmap(phy_reg);
 +}
-+
+-      bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
+-      if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
 +static void ar934x_usb_reset_notifier(struct platform_device *pdev)
 +{
 +      if (pdev->id != -1)
index c503577..0126f6a 100644 (file)
 +#define AR934X_RESET_LUT              BIT(2)
 +#define AR934X_RESET_MBOX             BIT(1)
 +#define AR934X_RESET_I2S              BIT(0)
++
 +#define QCA955X_RESET_HOST            BIT(31)
 +#define QCA955X_RESET_SLIC            BIT(30)
 +#define QCA955X_RESET_HDMA            BIT(29)
 +#define QCA955X_RESET_LUT             BIT(2)
 +#define QCA955X_RESET_MBOX            BIT(1)
 +#define QCA955X_RESET_I2S             BIT(0)
-+
 +#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
 +#define AR933X_BOOTSTRAP_EEPBUSY      BIT(4)
  #define AR933X_BOOTSTRAP_REF_CLK_40   BIT(0)
index 5d9d802..4d7902e 100644 (file)
 +static void __init ap136_common_setup(void)
 +{
 +      u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
--static int ap136_pci_plat_dev_init(struct pci_dev *dev)
++
 +      ath79_register_m25p80(NULL);
 +
 +      ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
 +      ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL);
 +
 +      ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
-+
+-static int ap136_pci_plat_dev_init(struct pci_dev *dev)
 +      ath79_register_mdio(0, 0x0);
 +      ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0);
 +
 +      /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
 +      ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII;
 +      ap136_ar8327_pad0_cfg.sgmii_delay_en = true;
--      ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
--      ath79_register_pci();
++
 +      /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */
 +      ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_RGMII;
 +      ap136_ar8327_pad6_cfg.txclk_delay_en = true;
 +      ap136_ar8327_pad6_cfg.rxclk_delay_en = true;
 +      ap136_ar8327_pad6_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1;
 +      ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2;
-+
+-      ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
+-      ath79_register_pci();
 +      ath79_eth0_pll_data.pll_1000 = 0x56000000;
 +      ath79_eth1_pll_data.pll_1000 = 0x03000101;
 +
index 86017b5..8a3377d 100644 (file)
@@ -16,7 +16,7 @@
  config CRYPTO_ANSI_CPRNG
 --- a/crypto/Makefile
 +++ b/crypto/Makefile
-@@ -107,6 +107,7 @@ obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.
+@@ -108,6 +108,7 @@ obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.
  obj-$(CONFIG_CRYPTO_LZO) += lzo.o
  obj-$(CONFIG_CRYPTO_LZ4) += lz4.o
  obj-$(CONFIG_CRYPTO_LZ4HC) += lz4hc.o
index fc50e98..8754ea4 100644 (file)
@@ -8,8 +8,6 @@ Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
  arch/arm/mach-imx/mach-layerscape.c |    4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)
 
-diff --git a/arch/arm/mach-imx/mach-layerscape.c b/arch/arm/mach-imx/mach-layerscape.c
-index b87a90a..cbc541e 100644
 --- a/arch/arm/mach-imx/mach-layerscape.c
 +++ b/arch/arm/mach-imx/mach-layerscape.c
 @@ -12,11 +12,13 @@
@@ -27,6 +25,3 @@ index b87a90a..cbc541e 100644
 +      .smp            = smp_ops(layerscape_smp_ops),
        .dt_compat      = layerscape_dt_compat,
  MACHINE_END
--- 
-1.7.9.5
-
index 35bad5d..69bba05 100644 (file)
@@ -21,7 +21,7 @@ Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
 
 --- a/net/sched/sch_generic.c
 +++ b/net/sched/sch_generic.c
-@@ -334,8 +334,23 @@ static void dev_watchdog(unsigned long a
+@@ -290,8 +290,23 @@ static void dev_watchdog(unsigned long a
                                txq = netdev_get_tx_queue(dev, i);
                                /*
                                 * old device drivers set dev->trans_start
index 8dd5cdb..ed2f565 100644 (file)
@@ -65,7 +65,7 @@ Integated-by: Yutang Jiang <yutang.jiang@nxp.com>
                .compat = "fsl,ls2080a-clockgen",
                .cmux_groups = {
                        &clockgen2_cmux_cga12, &clockgen2_cmux_cgb
-@@ -1285,6 +1325,7 @@ CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qo
+@@ -1292,6 +1332,7 @@ CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qo
  CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
  CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
  CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
index 4f7f515..c3256e9 100644 (file)
@@ -35,7 +35,7 @@ Integrated-by: Yutang Jiang <yutang.jiang@nxp.com>
                 pcie->drvdata->ltssm_shift) &
                 LTSSM_STATE_MASK;
  
-@@ -196,24 +197,28 @@ static struct ls_pcie_drvdata ls1021_drvdata = {
+@@ -196,24 +197,28 @@ static struct ls_pcie_drvdata ls1021_drv
  static struct ls_pcie_drvdata ls1012_drvdata = {
        .lut_offset = 0xC0000,
        .ltssm_shift = 24,
index fd597e5..96c69f3 100644 (file)
@@ -129,7 +129,7 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
  static bool ls_pcie_is_bridge(struct ls_pcie *pcie)
  {
        u32 header_type;
-@@ -283,10 +308,28 @@ static int __init ls_pcie_probe(struct p
+@@ -276,10 +301,28 @@ static int __init ls_pcie_probe(struct p
  
        pcie->drvdata = match->data;
        pcie->lut = pcie->dbi + pcie->drvdata->lut_offset;
index d86de8b..34add83 100644 (file)
@@ -8,11 +8,9 @@ Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
  drivers/mmc/host/sdhci-of-esdhc.c |    1 +
  1 file changed, 1 insertion(+)
 
-diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
-index a04ed4e..1116d38 100644
 --- a/drivers/mmc/host/sdhci-of-esdhc.c
 +++ b/drivers/mmc/host/sdhci-of-esdhc.c
-@@ -607,6 +607,7 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
+@@ -607,6 +607,7 @@ static int sdhci_esdhc_probe(struct plat
            of_device_is_compatible(np, "fsl,p4080-esdhc") ||
            of_device_is_compatible(np, "fsl,p1020-esdhc") ||
            of_device_is_compatible(np, "fsl,t1040-esdhc") ||
@@ -20,6 +18,3 @@ index a04ed4e..1116d38 100644
            of_device_is_compatible(np, "fsl,ls1021a-esdhc"))
                host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  
--- 
-1.7.9.5
-
index f074d70..59743e7 100644 (file)
@@ -2,9 +2,9 @@ Adding registration for 3G modem DWM-158 in usb-serial-option
 
 Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
 
---- a/drivers/usb/serial/option.c      2016-12-03 17:51:59.873595002 +0100
-+++ b/drivers/usb/serial/option.c      2016-12-05 19:45:19.891240692 +0100
-@@ -1989,6 +1989,7 @@
+--- a/drivers/usb/serial/option.c
++++ b/drivers/usb/serial/option.c
+@@ -1989,6 +1989,7 @@ static const struct usb_device_id option
        { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d02, 0xff, 0x00, 0x00) },
        { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x02, 0x01) },
        { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x00, 0x00) },