ipq806x: fix pcie tx termination offset
authorPavel Kubelun <be.dissent@gmail.com>
Thu, 18 Jan 2018 10:51:25 +0000 (13:51 +0300)
committerJohn Crispin <john@phrozen.org>
Thu, 24 May 2018 15:24:31 +0000 (17:24 +0200)
According to GPL tarballs and QSDK related branch tx termination
offset for ipq8064 SoC version >= 2.0 should be equal to 0 and
not 7.

https://github.com/paul-chambers/netgear-r7800/blob/master/git_home/linux.git/sourcecode/arch/arm/mach-msm/board-ipq806x.c#L1682-L1685

Fix this.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
[slh: rebase for kernel v4.14 as well]
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
(cherry picked from commit fbedc2213c19023bb4ec4ed7bd71908501aaf6d1)

target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi

index 5a40b03..8c522a8 100644 (file)
                        tx_deamp_3_5db = <32>;
                        mpll = <0xa0>;
                };
+
+               pcie0: pci@1b500000 {
+                       phy-tx0-term-offset = <0>;
+               };
+
+               pcie1: pci@1b700000 {
+                       phy-tx0-term-offset = <0>;
+               };
+
+               pcie2: pci@1b900000 {
+                       phy-tx0-term-offset = <0>;
+               };
        };
 };
index 5a40b03..8c522a8 100644 (file)
                        tx_deamp_3_5db = <32>;
                        mpll = <0xa0>;
                };
+
+               pcie0: pci@1b500000 {
+                       phy-tx0-term-offset = <0>;
+               };
+
+               pcie1: pci@1b700000 {
+                       phy-tx0-term-offset = <0>;
+               };
+
+               pcie2: pci@1b900000 {
+                       phy-tx0-term-offset = <0>;
+               };
        };
 };