ipq8064: fix dwc3-of-simple module unloading for Netgear R7500
authorThomas Reifferscheid <thomas@reifferscheid.org>
Sun, 2 Apr 2017 22:34:34 +0000 (00:34 +0200)
committerJohn Crispin <john@phrozen.org>
Mon, 24 Apr 2017 07:20:23 +0000 (09:20 +0200)
Without patch unloading the dwc3-of-simple module went stuck after
successfully removing hcd.1 during the hcd.0 removal:

root@LEDE:/# rmmod dwc3-of-simple
[   21.391846] xhci-hcd xhci-hcd.1.auto: remove, state 1
[   21.391931] usb usb4: USB disconnect, device number 1
[   21.397038] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[   21.401111] xhci-hcd xhci-hcd.1.auto: remove, state 1
[   21.406685] usb usb3: USB disconnect, device number 1
[   21.412848] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[   21.417248] xhci-hcd xhci-hcd.0.auto: remove, state 1
[   21.422521] usb usb2: USB disconnect, device number 1
followed by nothing.

Sometimes a stall CPU was detected, or a kernel panic,
or a reboot occurred after a couple of minutes.

At the same time unloading the dwc3 module followed by dwc3-of-simple
module was working repeatedly.

root@LEDE:/# rmmod dwc3
[   53.827328] xhci-hcd xhci-hcd.1.auto: remove, state 1
[   53.827412] usb usb4: USB disconnect, device number 1
[   53.832630] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[   53.836452] xhci-hcd xhci-hcd.1.auto: remove, state 1
[   53.842314] usb usb3: USB disconnect, device number 1
[   53.848412] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[   53.852542] xhci-hcd xhci-hcd.0.auto: remove, state 1
[   53.857882] usb usb2: USB disconnect, device number 1
[   53.863956] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
[   53.867875] xhci-hcd xhci-hcd.0.auto: remove, state 1
[   53.873696] usb usb1: USB disconnect, device number 1
[   53.879742] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
root@LEDE:/# rmmod dwc3-of-simple
root@LEDE:/#

For the non-working case, the code was stuck in a readl() in
http://lxr.free-electrons.com/source/drivers/usb/host/xhci.c#L91
because
http://lxr.free-electrons.com/source/drivers/usb/dwc3/dwc3-of-simple.c#L126
was disabling the wrong clocks when removing hcd.1 (it was disabling
the clock of hcd.0). That's why the readl() went stuck when removing
hcd.0

The patch however addresses the clock assignment from the Netgear R7500
dts file and backs off the previous attempt.

Now unloading and repeated module loading is working just fine.

root@LEDE:/# rmmod dwc3-of-simple
[   24.089679] xhci-hcd xhci-hcd.1.auto: remove, state 1
[   24.089765] usb usb4: USB disconnect, device number 1
[   24.094856] xhci-hcd xhci-hcd.1.auto: USB bus 4 deregistered
[   24.098963] xhci-hcd xhci-hcd.1.auto: remove, state 1
[   24.104522] usb usb3: USB disconnect, device number 1
[   24.111194] xhci-hcd xhci-hcd.1.auto: USB bus 3 deregistered
[   24.115086] xhci-hcd xhci-hcd.0.auto: remove, state 1
[   24.120396] usb usb2: USB disconnect, device number 1
[   24.126503] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
[   24.130347] xhci-hcd xhci-hcd.0.auto: remove, state 1
[   24.135948] usb usb1: USB disconnect, device number 1
[   24.142085] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
root@LEDE:/#

Fixes: dwc3-of-simple module unloading for Netgear R7500

Signed-off-by: Thomas Reifferscheid <thomas@reifferscheid.org>
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi

index b31f34c..2ea856d 100644 (file)
                };
 
                phy@100f8800 {          /* USB3 port 1 HS phy */
+                       clocks = <&gcc USB30_0_UTMI_CLK>;
                        status = "ok";
                };
 
                phy@100f8830 {          /* USB3 port 1 SS phy */
+                       clocks = <&gcc USB30_0_MASTER_CLK>;
                        status = "ok";
                };
 
                phy@110f8800 {          /* USB3 port 0 HS phy */
+                       clocks = <&gcc USB30_1_UTMI_CLK>;
                        status = "ok";
                };
 
                phy@110f8830 {          /* USB3 port 0 SS phy */
+                       clocks = <&gcc USB30_1_MASTER_CLK>;
                        status = "ok";
                };
 
                usb30@0 {
+                       clocks = <&gcc USB30_1_MASTER_CLK>;
                        status = "ok";
                };
 
                usb30@1 {
+                       clocks = <&gcc USB30_0_MASTER_CLK>;
                        status = "ok";
                };
 
index 296e7ba..9996bd7 100644 (file)
                        reg = <0x01200600 0x100>;
                };
 
-               hs_phy_1: phy@110f8800 {
+               hs_phy_1: phy@100f8800 {
                        compatible = "qcom,dwc3-hs-usb-phy";
-                       reg = <0x110f8800 0x30>;
+                       reg = <0x100f8800 0x30>;
                        clocks = <&gcc USB30_1_UTMI_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
                        status = "disabled";
                };
 
-               ss_phy_1: phy@110f8830 {
+               ss_phy_1: phy@100f8830 {
                        compatible = "qcom,dwc3-ss-usb-phy";
-                       reg = <0x110f8830 0x30>;
+                       reg = <0x100f8830 0x30>;
                        clocks = <&gcc USB30_1_MASTER_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
                        status = "disabled";
                };
 
-               hs_phy_0: phy@100f8800 {
+               hs_phy_0: phy@110f8800 {
                        compatible = "qcom,dwc3-hs-usb-phy";
-                       reg = <0x100f8800 0x30>;
+                       reg = <0x110f8800 0x30>;
                        clocks = <&gcc USB30_0_UTMI_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
                        status = "disabled";
                };
 
-               ss_phy_0: phy@100f8830 {
+               ss_phy_0: phy@110f8830 {
                        compatible = "qcom,dwc3-ss-usb-phy";
-                       reg = <0x100f8830 0x30>;
+                       reg = <0x110f8830 0x30>;
                        clocks = <&gcc USB30_0_MASTER_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
 
                        status = "disabled";
 
-                       dwc3@10000000 {
+                       dwc3@11000000 {
                                compatible = "snps,dwc3";
-                               reg = <0x10000000 0xcd00>;
-                               interrupts = <0 205 0x4>;
+                               reg = <0x11000000 0xcd00>;
+                               interrupts = <0 110 0x4>;
                                phys = <&hs_phy_0>, <&ss_phy_0>;
                                phy-names = "usb2-phy", "usb3-phy";
                                dr_mode = "host";
 
                        status = "disabled";
 
-                       dwc3@11000000 {
+                       dwc3@10000000 {
                                compatible = "snps,dwc3";
-                               reg = <0x11000000 0xcd00>;
-                               interrupts = <0 110 0x4>;
+                               reg = <0x10000000 0xcd00>;
+                               interrupts = <0 205 0x4>;
                                phys = <&hs_phy_1>, <&ss_phy_1>;
                                phy-names = "usb2-phy", "usb3-phy";
                                dr_mode = "host";