Revert "ipq8064: Fix dwc3 module unloading"
authorPavel Kubelun <be.dissent@gmail.com>
Thu, 15 Jun 2017 07:45:17 +0000 (03:45 -0400)
committerFelix Fietkau <nbd@nbd.name>
Wed, 17 Jan 2018 10:02:05 +0000 (11:02 +0100)
Preparing for proper fixes thus reverting commits:
8db079a9ff1756059250b801617a20baba214684 "ipq8064: Fix dwc3 module unloading"
c75f059b0c4d09dd0da60e14c4933a9f645266d1 "ipq8064: Fix dwc3 module unloading"

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
target/linux/ipq806x/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch

index a15a0d3..c91d0a9 100644 (file)
@@ -39,7 +39,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org>
 +obj-$(CONFIG_PHY_QCOM_DWC3)           += phy-qcom-dwc3.o
 --- /dev/null
 +++ b/drivers/phy/phy-qcom-dwc3.c
-@@ -0,0 +1,492 @@
+@@ -0,0 +1,484 @@
 +/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved.
 + *
 + * This program is free software; you can redistribute it and/or modify
@@ -99,7 +99,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org>
 +
 +/* PHY_CTRL_REG */
 +#define SSUSB_CTRL_REF_USE_PAD                BIT(28)
-+#define SSUSB_CTRL_TEST_POWERDOWN     BIT(26)
++#define SSUSB_CTRL_TEST_POWERDOWN     BIT(27)
 +#define SSUSB_CTRL_LANE0_PWR_PRESENT  BIT(24)
 +#define SSUSB_CTRL_SS_PHY_EN          BIT(8)
 +#define SSUSB_CTRL_SS_PHY_RESET               BIT(7)
@@ -331,14 +331,6 @@ Signed-off-by: Andy Gross <agross@codeaurora.org>
 +
 +      /* reset phy */
 +      data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG);
-+
-+       /* Test and clear SSUSB_CTRL_TEST_POWERDOWN */
-+       if (data & SSUSB_CTRL_TEST_POWERDOWN) {
-+               qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
-+                               SSUSB_CTRL_TEST_POWERDOWN, 0x0);
-+               data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG);
-+       }
-+
 +      writel(data | SSUSB_CTRL_SS_PHY_RESET,
 +              phy_dwc3->base + SSUSB_PHY_CTRL_REG);
 +      usleep_range(2000, 2200);
@@ -428,7 +420,7 @@ Signed-off-by: Andy Gross <agross@codeaurora.org>
 +      qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
 +              SSUSB_CTRL_REF_USE_PAD, 0x0);
 +      qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG,
-+              SSUSB_CTRL_TEST_POWERDOWN, SSUSB_CTRL_TEST_POWERDOWN);
++              0x0, SSUSB_CTRL_TEST_POWERDOWN);
 +
 +      return 0;
 +}