ath79: add support for Qihoo C301
authorChuanhong Guo <gch981213@gmail.com>
Mon, 15 Jul 2019 11:43:31 +0000 (19:43 +0800)
committerChuanhong Guo <gch981213@gmail.com>
Tue, 16 Jul 2019 01:51:03 +0000 (09:51 +0800)
Specifications:
- SoC: AR9344
- RAM: 128MB
- Flash: 2 * 16MB (MX25L12845)
- Ethernet: 2 * FE LAN & 1 * FE WAN
- WiFi: 2.4G: AR9344 5G: QCA9882

Flash instruction:
1. Hold reset and power up the router
2. Set your IP to 192.168.1.x
3. Open 192.168.1.1 and upload the generated *factory* firmware

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
package/boot/uboot-envtools/files/ath79
target/linux/ath79/base-files/etc/board.d/01_leds
target/linux/ath79/base-files/etc/board.d/02_network
target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom
target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
target/linux/ath79/base-files/etc/init.d/bootcount [new file with mode: 0755]
target/linux/ath79/config-4.19
target/linux/ath79/dts/ar9344_qihoo_c301.dts [new file with mode: 0644]
target/linux/ath79/image/generic.mk

index 069d7be..cc11725 100644 (file)
@@ -29,6 +29,9 @@ openmesh,om5p-ac-v2|\
 yuncore,a770)
        ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
        ;;
+qihoo,c301)
+       ubootenv_add_uci_config "/dev/mtd9" "0x0" "0x10000" "0x10000"
+       ;;
 esac
 
 config_load ubootenv
index 46b3e51..ecfb7b0 100755 (executable)
@@ -104,6 +104,9 @@ pcs,cr3000)
        ucidef_set_led_switch "lan3" "LAN3" "pcs:blue:lan3" "switch0" "0x10"
        ucidef_set_led_switch "lan4" "LAN4" "pcs:blue:lan4" "switch0" "0x02"
        ;;
+qihoo,c301)
+       ucidef_set_led_wlan "wlan" "WLAN" "$boardname:green:wlan" "phy0tpt"
+       ;;
 tplink,archer-a7-v5|\
 tplink,archer-c7-v4|\
 tplink,archer-c7-v5)
index 85e57c6..f7cac3e 100755 (executable)
@@ -184,6 +184,11 @@ ath79_setup_interfaces()
                ucidef_add_switch "switch0" \
                        "0@eth0" "3:lan:1" "5:lan:2" "4:wan"
                ;;
+       qihoo,c301)
+               ucidef_set_interface_wan "eth1"
+               ucidef_add_switch "switch0" \
+                       "0@eth0" "2:lan" "3:lan"
+               ;;
        rosinson,wr818)
                ucidef_add_switch "switch0" \
                        "0@eth0" "1:lan" "2:lan" "3:wan"
@@ -328,6 +333,10 @@ ath79_setup_macs()
                lan_mac=$(k2t_get_mac "lan_mac")
                wan_mac=$(k2t_get_mac "wan_mac")
                ;;
+       qihoo,c301)
+               lan_mac=$(mtd_get_mac_ascii devdata lanmac)
+               wan_mac=$(mtd_get_mac_ascii devdata wanmac)
+               ;;
        rosinson,wr818)
                wan_mac=$(mtd_get_mac_binary factory 0)
                lan_mac=$(macaddr_setbit_la "$wan_mac")
index 5a20b84..f049dbd 100644 (file)
@@ -127,6 +127,10 @@ case "$FIRMWARE" in
                ath9k_eeprom_extract "art" 4096 1088
                ath9k_patch_fw_mac $(mtd_get_mac_text board_data 1664) 2
                ;;
+       qihoo,c301)
+               ath9k_eeprom_extract "radiocfg" 4096 1088
+               ath9k_patch_fw_mac $(mtd_get_mac_ascii devdata "wlan24mac") 2
+               ;;
        *)
                ath9k_eeprom_die "board $board is not supported yet"
                ;;
index 06a48e2..149d744 100644 (file)
@@ -138,6 +138,10 @@ case "$FIRMWARE" in
                ath10kcal_extract "art" 20480 2116
                ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +16)
                ;;
+       qihoo,c301)
+               ath10kcal_extract "radiocfg" 20480 2116
+               ath10kcal_patch_mac_crc $(mtd_get_mac_ascii devdata wlan5mac)
+               ;;
        tplink,archer-a7-v5|\
        tplink,archer-c2-v3|\
        tplink,archer-c7-v4|\
diff --git a/target/linux/ath79/base-files/etc/init.d/bootcount b/target/linux/ath79/base-files/etc/init.d/bootcount
new file mode 100755 (executable)
index 0000000..b71fbf9
--- /dev/null
@@ -0,0 +1,11 @@
+#!/bin/sh /etc/rc.common
+START=99
+
+boot() {
+       case $(board_name) in
+       qihoo,c301)
+               local n=$(fw_printenv activeregion | cut -d = -f 2)
+               fw_setenv "image${n}trynum" 0
+               ;;
+       esac
+}
index 6cdbb96..3843702 100644 (file)
@@ -167,6 +167,7 @@ CONFIG_MTD_PARSER_CYBERTAN=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_SPI_NOR=y
 CONFIG_MTD_SPLIT_LZMA_FW=y
+CONFIG_MTD_SPLIT_SEAMA_FW=y
 CONFIG_MTD_SPLIT_TPLINK_FW=y
 CONFIG_MTD_SPLIT_UIMAGE_FW=y
 CONFIG_MTD_TPLINK_PARTS=y
diff --git a/target/linux/ath79/dts/ar9344_qihoo_c301.dts b/target/linux/ath79/dts/ar9344_qihoo_c301.dts
new file mode 100644 (file)
index 0000000..746c7f5
--- /dev/null
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9344.dtsi"
+
+/ {
+       model = "Qihoo 360 C301";
+       compatible = "qihoo,c301";
+
+       aliases {
+               led-boot = &led_wlan_g;
+               led-failsafe = &led_wlan_o;
+               led-upgrade = &led_wlan_o;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&jtag_disable_pins>;
+
+               led_wlan_g: wlan_g {
+                       label = "c301:green:wlan";
+                       gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
+               };
+
+               led_wlan_o: wlan_o {
+                       label = "c301:orange:wlan";
+                       gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "phy1tpt";
+               };
+       };
+
+       keys {
+               compatible = "gpio-keys";
+
+               reset {
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
+                       debounce-interval = <60>;
+               };
+       };
+
+       reg_eth_led_vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "eth_led_vbus";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               gpio = <&gpio 18 GPIO_ACTIVE_LOW>;
+       };
+
+       reg_usb_vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               enable-active-high;
+               regulator-always-on;
+               gpio = <&gpio 19 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&pinmux {
+       pmx_spi_cs1: pinmux_spi_cs1 {
+               pinctrl-single,bits = <0xc 0x07 0xff>;
+       };
+
+       pmx_led_switch: pinmux_led_switch {
+               pinctrl-single,bits = <0x0 0x2b2a2d00 0xffffff00>;
+       };
+};
+
+&ref {
+       clock-frequency = <40000000>;
+};
+
+&uart {
+       status = "okay";
+};
+
+&gpio {
+       status = "okay";
+
+       gpio_ext_lna0 {
+               gpio-hog;
+               gpios = <14 0>;
+               output-high;
+               line-name = "c301:ext:lna0";
+       };
+
+       gpio_ext_lna1 {
+               gpio-hog;
+               gpios = <15 0>;
+               output-high;
+               line-name = "c301:ext:lna1";
+       };
+};
+
+&builtin_switch {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pmx_led_switch>;
+};
+
+&spi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pmx_spi_cs1>;
+       status = "okay";
+
+       num-cs = <2>;
+       cs-gpios= <0>, <0>;
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <25000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       uboot: partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x40000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "u-boot-env";
+                               reg = <0x40000 0x10000>;
+                               read-only;
+                       };
+
+                       partition@50000 {
+                               label = "devdata";
+                               reg = <0x50000 0x10000>;
+                               read-only;
+                       };
+
+                       partition@60000 {
+                               label = "devconf";
+                               reg = <0x60000 0x10000>;
+                               read-only;
+                       };
+
+                       partition@70000 {
+                               compatible = "seama";
+                               label = "firmware";
+                               reg = <0x70000 0xf60000>;
+                       };
+
+                       partition@fd0000 {
+                               label = "warm_start";
+                               reg = <0xfd0000 0x10000>;
+                               read-only;
+                       };
+
+                       partition@fe0000 {
+                               label = "action_image_config";
+                               reg = <0xfe0000 0x10000>;
+                       };
+
+                       partition@ff0000 {
+                               label = "radiocfg";
+                               reg = <0xff0000 0x10000>;
+                               read-only;
+                       };
+               };
+       };
+
+       flash@1 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               reg = <1>;
+               spi-max-frequency = <25000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "firmware2";
+                               reg = <0x0 0xf00000>;
+                       };
+
+                       partition@f00000 {
+                               label = "privatedata";
+                               reg = <0xf00000 0x100000>;
+                               read-only;
+                       };
+               };
+       };
+};
+
+&usb {
+       status = "okay";
+};
+
+&usb_phy {
+       status = "okay";
+};
+
+&pcie {
+       status = "okay";
+
+       wifi@0,0 {
+               compatible = "qcom,ath10k";
+               reg = <0 0 0 0 0>;
+       };
+};
+
+&wmac {
+       status = "okay";
+       qca,no-eeprom;
+};
+
+&eth1 {
+       status = "okay";
+       gmac-config {
+               device = <&gmac>;
+               switch-phy-swap = <1>;
+               switch-only-mode = <1>;
+       };
+};
+
+&eth0 {
+       status = "okay";
+       phy-handle = <&swphy0>;
+};
index 0836751..4662383 100644 (file)
@@ -728,6 +728,18 @@ define Device/phicomm_k2t
 endef
 TARGET_DEVICES += phicomm_k2t
 
+define Device/qihoo_c301
+  $(Device/seama)
+  ATH_SOC := ar9344
+  DEVICE_VENDOR := Qihoo
+  DEVICE_MODEL := C301
+  DEVICE_PACKAGES := kmod-usb2 kmod-ath10k-ct ath10k-firmware-qca988x-ct uboot-envtools
+  IMAGE_SIZE := 15744k
+  SEAMA_SIGNATURE := wrgac26_qihoo360_360rg
+  SUPPORTED_DEVICES += qihoo-c301
+endef
+TARGET_DEVICES += qihoo_c301
+
 define Device/rosinson_wr818
   ATH_SOC := qca9563
   DEVICE_VENDOR := Rosinson