ar71xx: add support for ar7241 and ar7242
authorFelix Fietkau <nbd@openwrt.org>
Fri, 26 Mar 2010 22:35:41 +0000 (22:35 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Fri, 26 Mar 2010 22:35:41 +0000 (22:35 +0000)
SVN-Revision: 20494

target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c
target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
target/linux/ar71xx/files/arch/mips/ar71xx/pci.c
target/linux/ar71xx/files/arch/mips/ar71xx/setup.c
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c

index 0eddf26fbb422c2cb5c37fb541797d398ab30bb0..5d05562de0e75b586c6517ae5fd741e316b05c16 100644 (file)
@@ -50,6 +50,8 @@ void ar71xx_device_stop(u32 mask)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
                local_irq_save(flags);
                t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
@@ -90,6 +92,8 @@ void ar71xx_device_start(u32 mask)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
                local_irq_save(flags);
                t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
@@ -128,6 +132,8 @@ int ar71xx_device_stopped(u32 mask)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                local_irq_save(flags);
                t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
                local_irq_restore(flags);
index 514ab3d7b7a9ff40ec4fd824b152f1652a8e773d..fb006c70520e9535d63b947a476e9b740ad3dd4d 100644 (file)
@@ -128,10 +128,16 @@ static void __init ar7240_usb_setup(void)
        /* WAR for HW bug. Here it adjusts the duration between two SOFS */
        ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
 
-       ar71xx_ohci_device.resource = ar7240_ohci_resources;
-       ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
-
-       platform_device_register(&ar71xx_ohci_device);
+       if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
+               ar71xx_ehci_data.is_ar91xx = 1;
+               ar71xx_ehci_device.resource = ar7240_ohci_resources;
+               ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
+               platform_device_register(&ar71xx_ehci_device);
+       } else {
+               ar71xx_ohci_device.resource = ar7240_ohci_resources;
+               ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
+               platform_device_register(&ar71xx_ohci_device);
+       }
 }
 
 static void __init ar91xx_usb_setup(void)
@@ -153,6 +159,8 @@ void __init ar71xx_add_device_usb(void)
 {
        switch (ar71xx_soc) {
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                ar7240_usb_setup();
                break;
 
index 6aee4dc5cbadf0946c93d781e69f3f57a9932330..a7714eef9fc8389389d6853286cd01bac2e78890 100644 (file)
@@ -84,8 +84,15 @@ struct platform_device ar71xx_mdio_device = {
 
 void __init ar71xx_add_device_mdio(u32 phy_mask)
 {
-       if (ar71xx_soc == AR71XX_SOC_AR7240)
+       switch (ar71xx_soc) {
+       case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                ar71xx_mdio_data.is_ar7240 = 1;
+               break;
+       default:
+               break;
+       }
 
        ar71xx_mdio_data.phy_mask = phy_mask;
 
@@ -333,6 +340,8 @@ static void __init ar71xx_init_eth_pll_data(unsigned int id)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                pll_10 = AR724X_PLL_VAL_10;
                pll_100 = AR724X_PLL_VAL_100;
                pll_1000 = AR724X_PLL_VAL_1000;
@@ -428,6 +437,8 @@ void __init ar71xx_add_device_eth(unsigned int id)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
                                      : ar724x_ddr_flush_ge0;
                pdata->set_pll =  id ? ar724x_set_pll_ge1
index dd5b9bb8d2e25b406b244036fa6d31f1cba7ebdd..cdb614bbe1e50081e0cb7e45d54b855fbcb65a15 100644 (file)
@@ -162,6 +162,8 @@ void __init ar71xx_gpio_init(void)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                ar71xx_gpio_chip.ngpio = AR724X_GPIO_COUNT;
                break;
 
index 352548c4ef851dd5d0a6c61b20fd3459dcdfb83a..eecdd9f714b81a6bfb6de3ee62b553748fbc15f7 100644 (file)
@@ -209,10 +209,16 @@ static void __init ar71xx_misc_irq_init(void)
        __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
        __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
 
-       if (ar71xx_soc == AR71XX_SOC_AR7240)
+       switch (ar71xx_soc) {
+       case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
-       else
+               break;
+       default:
                ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
+               break;
+       }
 
        for (i = AR71XX_MISC_IRQ_BASE;
             i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
index 6a07697f0ddcdde023fcd11bde3d04e220b4bdcf..3e1e8dbdef2b450535727c91a052ace997ed48f3 100644 (file)
@@ -52,6 +52,8 @@ int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                ret = ar724x_pcibios_map_irq(dev, slot, pin);
                break;
 
@@ -75,6 +77,8 @@ int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                ret = ar724x_pcibios_init();
                break;
 
index 10e45af73411be7c051eeeaf00e9a8c7dd4f9cbb..d89505f1b4b3ccd3aef5fd10b9b927a8e56962f5 100644 (file)
@@ -106,12 +106,24 @@ static void __init ar71xx_detect_sys_type(void)
                }
                break;
 
-       case REV_ID_MAJOR_AR724X:
+       case REV_ID_MAJOR_AR7240:
                ar71xx_soc = AR71XX_SOC_AR7240;
                chip = "7240";
                rev = (id & AR724X_REV_ID_REVISION_MASK);
                break;
 
+       case REV_ID_MAJOR_AR7241:
+               ar71xx_soc = AR71XX_SOC_AR7241;
+               chip = "7241";
+               rev = (id & AR724X_REV_ID_REVISION_MASK);
+               break;
+
+       case REV_ID_MAJOR_AR7242:
+               ar71xx_soc = AR71XX_SOC_AR7242;
+               chip = "7242";
+               rev = (id & AR724X_REV_ID_REVISION_MASK);
+               break;
+
        case REV_ID_MAJOR_AR913X:
                minor = id & AR91XX_REV_ID_MINOR_MASK;
                rev = id >> AR91XX_REV_ID_REVISION_SHIFT;
@@ -210,6 +222,8 @@ static void __init detect_sys_frequency(void)
                break;
 
        case AR71XX_SOC_AR7240:
+       case AR71XX_SOC_AR7241:
+       case AR71XX_SOC_AR7242:
                ar724x_detect_sys_frequency();
                break;
 
index d21df49d660f25ae0baab2aaf5842f74af959764..7a7d75c3feed67e6936689b1486e714f5ce41148 100644 (file)
@@ -112,6 +112,8 @@ enum ar71xx_soc_type {
        AR71XX_SOC_AR7141,
        AR71XX_SOC_AR7161,
        AR71XX_SOC_AR7240,
+       AR71XX_SOC_AR7241,
+       AR71XX_SOC_AR7242,
        AR71XX_SOC_AR9130,
        AR71XX_SOC_AR9132
 };
@@ -429,10 +431,12 @@ void ar71xx_ddr_flush(u32 reg);
 #define AR724X_RESET_PCIE_PHY          BIT(7)
 #define AR724X_RESET_PCIE              BIT(6)
 
-#define REV_ID_MAJOR_MASK      0xf0
-#define REV_ID_MAJOR_AR71XX    0xa0
-#define REV_ID_MAJOR_AR913X    0xb0
-#define REV_ID_MAJOR_AR724X    0xc0
+#define REV_ID_MAJOR_MASK      0xfff0
+#define REV_ID_MAJOR_AR71XX    0x00a0
+#define REV_ID_MAJOR_AR913X    0x00b0
+#define REV_ID_MAJOR_AR7240    0x00c0
+#define REV_ID_MAJOR_AR7241    0x0100
+#define REV_ID_MAJOR_AR7242    0x1100
 
 #define AR71XX_REV_ID_MINOR_MASK       0x3
 #define AR71XX_REV_ID_MINOR_AR7130     0x0
index 3bbad1f3a4e425e148e9321a6aa97e7a0b18b6db..b1f5fa9ee1957403626649672697de017397b022 100644 (file)
@@ -248,6 +248,12 @@ static int __init ar724x_pci_setup(void)
                return -ENODEV;
        }
 
+       if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
+               t = __raw_readl(base + AR724X_PCI_REG_APP);
+               t |= BIT(16);
+               __raw_writel(t, base + AR724X_PCI_REG_APP);
+       }
+
        return 0;
 }