ipq806x: fix pci pins

Fix pci pins drive-strength according to oem sources.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
index 0d5430370ff16c2c945880455c39779d090ce587..bff9979adfcc3373c4d777a7d719607529ee65f6 100644 (file)
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -305,7 +305,7 @@
                                mux {
                                        pins = "gpio3";
                                        function = "pcie1_rst";
                                mux {
                                        pins = "gpio3";
                                        function = "pcie1_rst";

-                                       drive-strength = <12>;
+                                       drive-strength = <2>;

                                        bias-disable;
                                };
                        };
                                        bias-disable;
                                };
                        };


@@ -314,7 +314,7 @@
                                mux {
                                        pins = "gpio48";
                                        function = "pcie2_rst";
                                mux {
                                        pins = "gpio48";
                                        function = "pcie2_rst";

-                                       drive-strength = <12>;
+                                       drive-strength = <2>;

                                        bias-disable;
                                };
                        };
                                        bias-disable;
                                };
                        };


@@ -323,8 +323,9 @@
                                mux {
                                        pins = "gpio63";
                                        function = "pcie3_rst";
                                mux {
                                        pins = "gpio63";
                                        function = "pcie3_rst";

-                                       drive-strength = <12>;
+                                       drive-strength = <2>;

                                        bias-disable;
                                        bias-disable;

+                                       output-low;

                                };
                        };
                };
                                };
                        };
                };

diff --git a/target/linux/ipq806x/patches-4.4/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.4/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch
index 2394926f8f426a9e2cf7d4854aa5492f3f992d84..31a384f499be66e87cd4164da73a716159f84445 100644 (file)
--- a/target/linux/ipq806x/patches-4.4/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch
+++ b/target/linux/ipq806x/patches-4.4/112-ARM-dts-qcom-add-pcie-nodes-to-ipq806x-platforms.patch
@@ -63,7 +63,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
  
  / {
        model = "Qualcomm IPQ8064";
  
  / {
        model = "Qualcomm IPQ8064";

-@@ -99,6 +102,33 @@
+@@ -99,6 +102,34 @@

                        interrupt-controller;
                        #interrupt-cells = <2>;
                        interrupts = <0 16 0x4>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
                        interrupts = <0 16 0x4>;


@@ -72,7 +72,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
 +                              mux {
 +                                      pins = "gpio3";
 +                                      function = "pcie1_rst";
 +                              mux {
 +                                      pins = "gpio3";
 +                                      function = "pcie1_rst";

-+                                      drive-strength = <12>;
++                                      drive-strength = <2>;

 +                                      bias-disable;
 +                              };
 +                      };
 +                                      bias-disable;
 +                              };
 +                      };


@@ -81,7 +81,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
 +                              mux {
 +                                      pins = "gpio48";
 +                                      function = "pcie2_rst";
 +                              mux {
 +                                      pins = "gpio48";
 +                                      function = "pcie2_rst";

-+                                      drive-strength = <12>;
++                                      drive-strength = <2>;

 +                                      bias-disable;
 +                              };
 +                      };
 +                                      bias-disable;
 +                              };
 +                      };


@@ -90,8 +90,9 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
 +                              mux {
 +                                      pins = "gpio63";
 +                                      function = "pcie3_rst";
 +                              mux {
 +                                      pins = "gpio63";
 +                                      function = "pcie3_rst";

-+                                      drive-strength = <12>;
++                                      drive-strength = <2>;

 +                                      bias-disable;
 +                                      bias-disable;

++                                      output-low;

 +                              };
 +                      };
                };
 +                              };
 +                      };
                };