sunxi: remove 3.13 support
authorZoltan Herpai <wigyori@uid0.hu>
Sun, 21 Sep 2014 15:42:36 +0000 (15:42 +0000)
committerZoltan Herpai <wigyori@uid0.hu>
Sun, 21 Sep 2014 15:42:36 +0000 (15:42 +0000)
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
SVN-Revision: 42628

172 files changed:
target/linux/sunxi/config-3.13 [deleted file]
target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch [deleted file]
target/linux/sunxi/patches-3.13/101-fix-off-by-one-masks.patch [deleted file]
target/linux/sunxi/patches-3.13/102-clk-factors-clear-vars.patch [deleted file]
target/linux/sunxi/patches-3.13/103-sunxi-clk-core-clock-protect.patch [deleted file]
target/linux/sunxi/patches-3.13/104-clk-sunxi-fix-memory-leak.patch [deleted file]
target/linux/sunxi/patches-3.13/105-reset-add-reset-ctrler.patch [deleted file]
target/linux/sunxi/patches-3.13/106-add-Kconfig-for-reset.patch [deleted file]
target/linux/sunxi/patches-3.13/107-sunxi-register-a31-reset.patch [deleted file]
target/linux/sunxi/patches-3.13/108-sun6i-add-smp-support.patch [deleted file]
target/linux/sunxi/patches-3.13/109-dt-sun6i-add-reset-ctrler.patch [deleted file]
target/linux/sunxi/patches-3.13/110-sun4i-clkevent-fill-irqfield.patch [deleted file]
target/linux/sunxi/patches-3.13/111-sun4i-clksrc-change-cpu-mask.patch [deleted file]
target/linux/sunxi/patches-3.13/112-sun4i-clksrc-increase-a-bit-in-clockevent.patch [deleted file]
target/linux/sunxi/patches-3.13/113-clk-sunxi-register-factors-clocks.patch [deleted file]
target/linux/sunxi/patches-3.13/114-clk-sunxi-clean-magic-number.patch [deleted file]
target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch [deleted file]
target/linux/sunxi/patches-3.13/116-clk-sunxi-add-pll4.patch [deleted file]
target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch [deleted file]
target/linux/sunxi/patches-3.13/118-clk-sunxi-add-pll5-pll6.patch [deleted file]
target/linux/sunxi/patches-3.13/119-dt-sunxi-add-pll5-pll6.patch [deleted file]
target/linux/sunxi/patches-3.13/120-clk-sunxi-mod0.patch [deleted file]
target/linux/sunxi/patches-3.13/121-clk-sunxi-better-factor-dt-nodes.patch [deleted file]
target/linux/sunxi/patches-3.13/122-1-dt-sun4i-add-mod0.patch [deleted file]
target/linux/sunxi/patches-3.13/122-2-dt-sun5i-add-mod0.patch [deleted file]
target/linux/sunxi/patches-3.13/122-3-dt-sun7i-add-mod0.patch [deleted file]
target/linux/sunxi/patches-3.13/123-clk-sunxi-automatic-reparenting.patch [deleted file]
target/linux/sunxi/patches-3.13/125-dt-sun6i-add-nodes-for-additional-cores.patch [deleted file]
target/linux/sunxi/patches-3.13/126-dt-sun7i-add-external-clock-outputs.patch [deleted file]
target/linux/sunxi/patches-3.13/127-1-dt-sun4i-rename-clock-node-names.patch [deleted file]
target/linux/sunxi/patches-3.13/127-2-dt-sun5i-rename-clock-node-names.patch [deleted file]
target/linux/sunxi/patches-3.13/127-3-dt-sun6i-rename-clock-node-names.patch [deleted file]
target/linux/sunxi/patches-3.13/127-4-dt-sun7i-rename-clock-node-names.patch [deleted file]
target/linux/sunxi/patches-3.13/128-dt-sunxi-add-mbusclk.patch [deleted file]
target/linux/sunxi/patches-3.13/130-1-dt-sunxi-add-emac-aliases.patch [deleted file]
target/linux/sunxi/patches-3.13/130-2-dt-sun7i-update-eth-aliases.patch [deleted file]
target/linux/sunxi/patches-3.13/131-dt-sun7i-add-arch-timers.patch [deleted file]
target/linux/sunxi/patches-3.13/132-dt-sun5i-a13-add-olinuxino-micro.patch [deleted file]
target/linux/sunxi/patches-3.13/140-sun47i-rtc-driver.patch [deleted file]
target/linux/sunxi/patches-3.13/141-dt-sun47i-add-rtc.patch [deleted file]
target/linux/sunxi/patches-3.13/145-clksrc-add-hstimer.patch [deleted file]
target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch [deleted file]
target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch [deleted file]
target/linux/sunxi/patches-3.13/146-3-dt-sun7i-a20-add-hstimer.patch [deleted file]
target/linux/sunxi/patches-3.13/146-4-dt-sun6i-a31-add-hstimer.patch [deleted file]
target/linux/sunxi/patches-3.13/150-1-dt-sun7i-add-gmac-clock-node.patch [deleted file]
target/linux/sunxi/patches-3.13/150-2-dt-sun7i-add-gmac-ctrler-node.patch [deleted file]
target/linux/sunxi/patches-3.13/150-3-dt-sun7i-gmac-add-pinmuxing.patch [deleted file]
target/linux/sunxi/patches-3.13/151-0-stmmac-fixup-0.patch [deleted file]
target/linux/sunxi/patches-3.13/151-1-stmmac-fixup-1.patch [deleted file]
target/linux/sunxi/patches-3.13/151-2-stmmac-fixup-2.patch [deleted file]
target/linux/sunxi/patches-3.13/151-3-stmmac-fixup-3.patch [deleted file]
target/linux/sunxi/patches-3.13/151-4-stmmac-fixup-4.patch [deleted file]
target/linux/sunxi/patches-3.13/151-5-stmmac-fixup-5.patch [deleted file]
target/linux/sunxi/patches-3.13/151-6-stmmac-fixup-6.patch [deleted file]
target/linux/sunxi/patches-3.13/151-7-stmmac-fixup-7.patch [deleted file]
target/linux/sunxi/patches-3.13/151-8-stmmac-fixup-8.patch [deleted file]
target/linux/sunxi/patches-3.13/151-9-stmmac-fixup-9.patch [deleted file]
target/linux/sunxi/patches-3.13/152-1-dt-sun7i-enable-gmac-cubietruck.patch [deleted file]
target/linux/sunxi/patches-3.13/152-2-dt-sun7i-enable-gmac-cubieboard2.patch [deleted file]
target/linux/sunxi/patches-3.13/152-3-dt-sun7i-enable-gmac-a20-micro.patch [deleted file]
target/linux/sunxi/patches-3.13/153-1-stmmac-enable-main-clock-when-probing.patch [deleted file]
target/linux/sunxi/patches-3.13/153-2-stmmac-add-support-for-optional-reset-control.patch [deleted file]
target/linux/sunxi/patches-3.13/153-3-stmmac-allocate-pass-board-specific-data-to-callbacks.patch [deleted file]
target/linux/sunxi/patches-3.13/153-4-stmmac-honor-dt-parameter-to-dma-store-and-fwd.patch [deleted file]
target/linux/sunxi/patches-3.13/153-5-stmmac-deprecate-snps-phy-addr.patch [deleted file]
target/linux/sunxi/patches-3.13/153-6-stmmac-use-drvdata-callback-with-compat-strings.patch [deleted file]
target/linux/sunxi/patches-3.13/153-7-stmmac-sunxi-extensions-for-a20.patch [deleted file]
target/linux/sunxi/patches-3.13/160-1-phy-core-phy_get_leave-error-logging-to-caller.patch [deleted file]
target/linux/sunxi/patches-3.13/160-2-phy-core-dont-porpagate-ENOSUPP.patch [deleted file]
target/linux/sunxi/patches-3.13/160-3-phy-core-no-module-build.patch [deleted file]
target/linux/sunxi/patches-3.13/160-4-libahci-allow-override-start_engine.patch [deleted file]
target/linux/sunxi/patches-3.13/160-5-ahci-platform-devs-with-more-than-1-clock.patch [deleted file]
target/linux/sunxi/patches-3.13/160-6-ahci-platform-support-optional-regulator.patch [deleted file]
target/linux/sunxi/patches-3.13/160-7-ahci-platform-add-resource-helpers.patch [deleted file]
target/linux/sunxi/patches-3.13/160-8-ahci-plat-libraryise-ahci_probe.patch [deleted file]
target/linux/sunxi/patches-3.13/160-9-ahci-plat-libraryise-suspend-resume.patch [deleted file]
target/linux/sunxi/patches-3.13/161-ahci-add-sunxi-to-ahci_platform.patch [deleted file]
target/linux/sunxi/patches-3.13/162-1-ahci-plat-add-dt-compat.patch [deleted file]
target/linux/sunxi/patches-3.13/162-2-ahci-plat-manage-sata-phy.patch [deleted file]
target/linux/sunxi/patches-3.13/162-3-ahci-plat-runtime-resume.patch [deleted file]
target/linux/sunxi/patches-3.13/163-ahci_sunxi-use-mdelay.patch [deleted file]
target/linux/sunxi/patches-3.13/164-1-dt-sun4i-add-ahci.patch [deleted file]
target/linux/sunxi/patches-3.13/164-2-dt-sun7i-add-ahci.patch [deleted file]
target/linux/sunxi/patches-3.13/170-1-mmc-add-driver.patch [deleted file]
target/linux/sunxi/patches-3.13/170-2-mmc-simplify-clkdelay.patch [deleted file]
target/linux/sunxi/patches-3.13/170-3-mmc-dont-set-mmc_clk-in-lowpower.patch [deleted file]
target/linux/sunxi/patches-3.13/170-4-mmc-stop-claiming-UHS.patch [deleted file]
target/linux/sunxi/patches-3.13/170-5-mmc-fix-caps-override.patch [deleted file]
target/linux/sunxi/patches-3.13/170-6-mmc-dont-call-mmc_of_parser-until-ready.patch [deleted file]
target/linux/sunxi/patches-3.13/170-7-clk-export-mmc-phasectrl.patch [deleted file]
target/linux/sunxi/patches-3.13/170-8-clk-sunxi-implement-mmc-phasectrl.patch [deleted file]
target/linux/sunxi/patches-3.13/170-9-mmc-fixup-revert-sdio.patch [deleted file]
target/linux/sunxi/patches-3.13/171-1-pinctrl-sunxi-fix-port-F-multiplexing.patch [deleted file]
target/linux/sunxi/patches-3.13/171-3-pinctrl-sunxi-fix-masking-with-irqtype.patch [deleted file]
target/linux/sunxi/patches-3.13/171-4-pinctrl-sunxi-fix-irqregister-offset-calcs.patch [deleted file]
target/linux/sunxi/patches-3.13/173-1-dt-sun4i-add-mmc.patch [deleted file]
target/linux/sunxi/patches-3.13/173-2-dt-sun5i-add-mmc.patch [deleted file]
target/linux/sunxi/patches-3.13/173-3-dt-sun7i-add-mmc.patch [deleted file]
target/linux/sunxi/patches-3.13/173-5-dt-sun5i-fixup-mmc.patch [deleted file]
target/linux/sunxi/patches-3.13/173-6-dt-sun7i-fixup-mmc.patch [deleted file]
target/linux/sunxi/patches-3.13/175-lradc-add-driver.patch [deleted file]
target/linux/sunxi/patches-3.13/176-1-dt-sun7i-add-lradc.patch [deleted file]
target/linux/sunxi/patches-3.13/176-2-dt-sun4i-add-lradc.patch [deleted file]
target/linux/sunxi/patches-3.13/176-3-dt-sun5i-add-lradc.patch [deleted file]
target/linux/sunxi/patches-3.13/180-0-usb-backport-device_wakeup_enable.patch [deleted file]
target/linux/sunxi/patches-3.13/180-1-usb-ohci-platform-dt-instantiation.patch [deleted file]
target/linux/sunxi/patches-3.13/180-2-usb-ehci-platform-support-clk-phy-via-dt.patch [deleted file]
target/linux/sunxi/patches-3.13/180-3-usb-ohci-platform-support-bigendian.patch [deleted file]
target/linux/sunxi/patches-3.13/180-4-usb-ehci-platform-support-bigendian.patch [deleted file]
target/linux/sunxi/patches-3.13/180-5-usb-ohci-change-compat-string.patch [deleted file]
target/linux/sunxi/patches-3.13/180-6-usb-ehci-change-compat-string.patch [deleted file]
target/linux/sunxi/patches-3.13/180-7-usb-uhci-change-compat-string.patch [deleted file]
target/linux/sunxi/patches-3.13/180-8-usb-xhci-change-compat-string.patch [deleted file]
target/linux/sunxi/patches-3.13/180-9-clk-sunxi-add-usb-clockreg-reset.patch [deleted file]
target/linux/sunxi/patches-3.13/180-a-clk-sunxi-add-usb-clockreg-defs.patch [deleted file]
target/linux/sunxi/patches-3.13/181-1-dt-sun4i-add-vbus-reg-dtsi.patch [deleted file]
target/linux/sunxi/patches-3.13/181-2-dt-sun5i-add-vbus-reg-dtsi.patch [deleted file]
target/linux/sunxi/patches-3.13/182-usb-add-ehci-driver.patch [deleted file]
target/linux/sunxi/patches-3.13/183-1-dt-sun4i-add-usbclock-nodes.patch [deleted file]
target/linux/sunxi/patches-3.13/183-2-dt-sun4i-add-usb-bindings.patch [deleted file]
target/linux/sunxi/patches-3.13/183-3-dt-sun4i-add-ehci-cubieboard.patch [deleted file]
target/linux/sunxi/patches-3.13/183-4-dt-sun4i-add-ehci-a1000.patch [deleted file]
target/linux/sunxi/patches-3.13/184-1-dt-sun7i-add-usbclock-nodes.patch [deleted file]
target/linux/sunxi/patches-3.13/184-2-dt-sun7i-add-usb-bindings.patch [deleted file]
target/linux/sunxi/patches-3.13/184-3-dt-sun7i-add-ehci-cubieboard2.patch [deleted file]
target/linux/sunxi/patches-3.13/184-4-dt-sun7i-add-ehci-olinuxino-a20-micro.patch [deleted file]
target/linux/sunxi/patches-3.13/184-5-dt-sun7i-add-ehci-cubietruck.patch [deleted file]
target/linux/sunxi/patches-3.13/185-1-dt-sun5i-add-usbclock-nodes.patch [deleted file]
target/linux/sunxi/patches-3.13/185-2-dt-sun5i-add-usb-bindings.patch [deleted file]
target/linux/sunxi/patches-3.13/185-3-dt-sun5i-add-ehci-a13.patch [deleted file]
target/linux/sunxi/patches-3.13/190-sunxi-select-PSCI.patch [deleted file]
target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch [deleted file]
target/linux/sunxi/patches-3.13/201-reset-add-of_reset_control_get.patch [deleted file]
target/linux/sunxi/patches-3.13/202-reset-rename-compat-prop.patch [deleted file]
target/linux/sunxi/patches-3.13/210-clk-sunxi-add-a20-output-clk.patch [deleted file]
target/linux/sunxi/patches-3.13/211-pinctrl-sunxi-add-a20-output-clkpin-funcs.patch [deleted file]
target/linux/sunxi/patches-3.13/212-dt-sun7i-add-pinmuxing-for-extclocks.patch [deleted file]
target/linux/sunxi/patches-3.13/220-dt-sun4i-move-aliases-to-dtsi.patch [deleted file]
target/linux/sunxi/patches-3.13/230-dt-sunxi-change-emac-to-new-compats.patch [deleted file]
target/linux/sunxi/patches-3.13/231-dt-sunxi-net-phy-add-new-compats.patch [deleted file]
target/linux/sunxi/patches-3.13/232-dt-sunxi-change-to-new-net-compats.patch [deleted file]
target/linux/sunxi/patches-3.13/240-1-dt-sun4i-add-missing-serial-aliases.patch [deleted file]
target/linux/sunxi/patches-3.13/240-2-dt-sun5i-a10s-add-missing-serial-aliases.patch [deleted file]
target/linux/sunxi/patches-3.13/240-3-dt-sun5i-a13-add-missing-serial-aliases.patch [deleted file]
target/linux/sunxi/patches-3.13/240-4-dt-sun6i-add-missing-serial-aliases.patch [deleted file]
target/linux/sunxi/patches-3.13/241-dt-sun7i-add-pinmuxing-for-uart2.patch [deleted file]
target/linux/sunxi/patches-3.13/250-clk-sunxi-get-divs-parent-clkname.patch [deleted file]
target/linux/sunxi/patches-3.13/251-clk-sunxi-add-clk-output-names-dt-prop.patch [deleted file]
target/linux/sunxi/patches-3.13/252-clk-sunxi-add-names-for-pll5-6-into-factors_data.patch [deleted file]
target/linux/sunxi/patches-3.13/253-clk-sunxi-add-a20a31-gmac-clock.patch [deleted file]
target/linux/sunxi/patches-3.13/254-dt-sun7i-change-32k-osc-nodename.patch [deleted file]
target/linux/sunxi/patches-3.13/255-clk-sunxi-add-a31-pll6.patch [deleted file]
target/linux/sunxi/patches-3.13/260-spi-add-a31-spi-driver.patch [deleted file]
target/linux/sunxi/patches-3.13/261-dt-sun6i-add-pll6-and-spi.patch [deleted file]
target/linux/sunxi/patches-3.13/262-spi-add-a10-spi-driver.patch [deleted file]
target/linux/sunxi/patches-3.13/263-1-dt-sun7i-add-a20-spi.patch [deleted file]
target/linux/sunxi/patches-3.13/263-2-dt-sun4i-add-a10-spi.patch [deleted file]
target/linux/sunxi/patches-3.13/263-3-dt-sun5i-a10s-add-a10-spi.patch [deleted file]
target/linux/sunxi/patches-3.13/263-4-dt-sun5i-a13-add-a10-spi.patch [deleted file]
target/linux/sunxi/patches-3.13/263-5-dt-sun7i-add-spi-muxing.patch [deleted file]
target/linux/sunxi/patches-3.13/264-5-dt-sun7i-enable-spi-on-a20micro.patch [deleted file]
target/linux/sunxi/patches-3.13/270-1-wdt-sunxi-introduce-new-compat.patch [deleted file]
target/linux/sunxi/patches-3.13/270-2-wdt-sunxi-add-new-wdt-compats-into-reboot-code.patch [deleted file]
target/linux/sunxi/patches-3.13/270-3-dt-sunxi-watchdog-update-compats.patch [deleted file]
target/linux/sunxi/patches-3.13/280-input-add-sun4i-ts-driver.patch [deleted file]
target/linux/sunxi/patches-3.13/301-1-dt-sun4i-add-pcduino.patch [deleted file]
target/linux/sunxi/patches-3.13/301-2-dt-sun4i-pcduino-add-mmc.patch [deleted file]
target/linux/sunxi/patches-3.13/301-3-dt-sun4i-pcduino-add-usb.patch [deleted file]
target/linux/sunxi/patches-3.13/302-dt-sun4i-add-lime.patch [deleted file]
target/linux/sunxi/patches-3.13/303-dt-add-pcduinov3.patch [deleted file]
target/linux/sunxi/patches-3.13/304-dt-add-bananapi.patch [deleted file]

diff --git a/target/linux/sunxi/config-3.13 b/target/linux/sunxi/config-3.13
deleted file mode 100644 (file)
index 6577df6..0000000
+++ /dev/null
@@ -1,430 +0,0 @@
-CONFIG_AHCI_SUNXI=y
-CONFIG_ALIGNMENT_TRAP=y
-# CONFIG_APM_EMULATION is not set
-CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
-CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-CONFIG_ARCH_HAS_RESET_CONTROLLER=y
-CONFIG_ARCH_HAS_TICK_BROADCAST=y
-CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
-# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
-CONFIG_ARCH_NR_GPIO=288
-CONFIG_ARCH_REQUIRE_GPIOLIB=y
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-CONFIG_ARCH_SUNXI=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
-CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_ARM=y
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
-CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
-# CONFIG_ARM_CPU_SUSPEND is not set
-CONFIG_ARM_ERRATA_430973=y
-CONFIG_ARM_ERRATA_720789=y
-CONFIG_ARM_ERRATA_754322=y
-CONFIG_ARM_ERRATA_775420=y
-CONFIG_ARM_GIC=y
-CONFIG_ARM_L1_CACHE_SHIFT=6
-CONFIG_ARM_L1_CACHE_SHIFT_6=y
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARM_NR_BANKS=8
-CONFIG_ARM_PATCH_PHYS_VIRT=y
-CONFIG_ARM_PSCI=y
-CONFIG_ARM_THUMB=y
-# CONFIG_ARM_THUMBEE is not set
-CONFIG_ARM_VIRT_EXT=y
-CONFIG_ATA=y
-CONFIG_ATAGS=y
-CONFIG_AUDIT=y
-# CONFIG_AUDITSYSCALL is not set
-CONFIG_AUDIT_GENERIC=y
-CONFIG_AUTO_ZRELADDR=y
-CONFIG_AVERAGE=y
-CONFIG_BCH=y
-CONFIG_BINFMT_MISC=y
-CONFIG_BLK_CGROUP=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_BOUNCE=y
-CONFIG_BRIDGE_IGMP_SNOOPING=y
-# CONFIG_CACHE_L2X0 is not set
-CONFIG_CFQ_GROUP_IOSCHED=y
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_CPUACCT=y
-CONFIG_CGROUP_DEVICE=y
-CONFIG_CGROUP_FREEZER=y
-# CONFIG_CGROUP_PERF is not set
-# CONFIG_CGROUP_SCHED is not set
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLKSRC_MMIO=y
-CONFIG_CLKSRC_OF=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CMDLINE="console=ttyS0,115200 earlyprintk rootwait root=/dev/mmcblk0p2"
-CONFIG_CMDLINE_FORCE=y
-CONFIG_COMMON_CLK=y
-CONFIG_COMPACTION=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_CONNECTOR=y
-CONFIG_CONSOLE_TRANSLATIONS=y
-CONFIG_COREDUMP=y
-CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
-CONFIG_CPUSETS=y
-CONFIG_CPU_32v6K=y
-CONFIG_CPU_32v7=y
-CONFIG_CPU_ABRT_EV7=y
-# CONFIG_CPU_BPREDICT_DISABLE is not set
-CONFIG_CPU_CACHE_V7=y
-CONFIG_CPU_CACHE_VIPT=y
-CONFIG_CPU_COPY_V6=y
-CONFIG_CPU_CP15=y
-CONFIG_CPU_CP15_MMU=y
-CONFIG_CPU_HAS_ASID=y
-# CONFIG_CPU_ICACHE_DISABLE is not set
-CONFIG_CPU_PABRT_V7=y
-CONFIG_CPU_RMAP=y
-CONFIG_CPU_TLB_V7=y
-CONFIG_CPU_V7=y
-CONFIG_CRC16=y
-CONFIG_CRC_T10DIF=y
-CONFIG_CRYPTO_ARC4=y
-CONFIG_CRYPTO_BLKCIPHER=y
-CONFIG_CRYPTO_BLKCIPHER2=y
-CONFIG_CRYPTO_CRC32C=y
-CONFIG_CRYPTO_CRCT10DIF=y
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_DCACHE_WORD_ACCESS=y
-# CONFIG_DEBUG_BLK_CGROUP is not set
-CONFIG_DEBUG_BUGVERBOSE=y
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
-CONFIG_DEBUG_MEMORY_INIT=y
-# CONFIG_DEBUG_UART_8250 is not set
-# CONFIG_DEBUG_UART_PL01X is not set
-# CONFIG_DEBUG_USER is not set
-CONFIG_DECOMPRESS_BZIP2=y
-CONFIG_DECOMPRESS_GZIP=y
-CONFIG_DECOMPRESS_LZ4=y
-CONFIG_DECOMPRESS_LZMA=y
-CONFIG_DECOMPRESS_LZO=y
-CONFIG_DECOMPRESS_XZ=y
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-CONFIG_DIRECT_IO=y
-CONFIG_DMADEVICES=y
-CONFIG_DMA_OF=y
-CONFIG_DNOTIFY=y
-CONFIG_DTC=y
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_DWMAC_SUNXI=y
-# CONFIG_DW_DMAC_CORE is not set
-CONFIG_DYNAMIC_DEBUG=y
-# CONFIG_EEPROM_SUNXI_SID is not set
-CONFIG_ELF_CORE=y
-# CONFIG_EMBEDDED is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_EXPERT is not set
-CONFIG_EXT4_FS=y
-CONFIG_FRAME_POINTER=y
-CONFIG_FRAME_WARN=2048
-CONFIG_FREEZER=y
-CONFIG_FS_MBCACHE=y
-CONFIG_FS_POSIX_ACL=y
-CONFIG_GARP=y
-CONFIG_GENERIC_ACL=y
-CONFIG_GENERIC_BUG=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_NET_UTILS=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PHY=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_STRNCPY_FROM_USER=y
-CONFIG_GENERIC_STRNLEN_USER=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_DEVRES=y
-# CONFIG_HAMRADIO is not set
-CONFIG_HARDIRQS_SW_RESEND=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_PFN_VALID=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_BPF_JIT=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CLK_PREPARE=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_HW_BREAKPOINT=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_KERNEL_GZIP=y
-CONFIG_HAVE_KERNEL_LZ4=y
-CONFIG_HAVE_KERNEL_LZMA=y
-CONFIG_HAVE_KERNEL_LZO=y
-CONFIG_HAVE_KERNEL_XZ=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_PERF_REGS=y
-CONFIG_HAVE_PERF_USER_STACK_DUMP=y
-CONFIG_HAVE_PROC_CPU=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SMP=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_UID16=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HIGHMEM=y
-# CONFIG_HIGHPTE is not set
-CONFIG_HW_CONSOLE=y
-CONFIG_HZ_FIXED=0
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_MUX=y
-# CONFIG_I2C_MUX_GPIO is not set
-# CONFIG_I2C_MUX_PCA9541 is not set
-# CONFIG_I2C_MUX_PCA954x is not set
-CONFIG_I2C_MUX_PINCTRL=y
-CONFIG_I2C_MV64XXX=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_INPUT=y
-# CONFIG_INPUT_MISC is not set
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_IPC_NS=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_BOOTP is not set
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_RARP is not set
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_WORK=y
-CONFIG_KALLSYMS=y
-CONFIG_KERNEL_GZIP=y
-# CONFIG_KERNEL_XZ is not set
-CONFIG_KEYBOARD_SUN4I_LRADC=y
-CONFIG_KSM=y
-CONFIG_KTIME_SCALAR=y
-CONFIG_LEDS_GPIO=y
-# CONFIG_LEDS_REGULATOR is not set
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-CONFIG_LOG_BUF_SHIFT=19
-CONFIG_LZ4_DECOMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_MDIO_BOARDINFO=y
-CONFIG_MDIO_SUN4I=y
-# CONFIG_MEMCG is not set
-CONFIG_MIGRATION=y
-CONFIG_MMC=y
-CONFIG_MMC_BLOCK=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_SUNXI=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MULTI_IRQ_HANDLER=y
-CONFIG_MUTEX_SPIN_ON_OWNER=y
-CONFIG_NAMESPACES=y
-CONFIG_NEED_DMA_MAP_STATE=y
-# CONFIG_NEON is not set
-# CONFIG_NETPRIO_CGROUP is not set
-# CONFIG_NET_CLS_CGROUP is not set
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NET_NS=y
-CONFIG_NET_RX_BUSY_POLL=y
-CONFIG_NET_VENDOR_ALLWINNER=y
-CONFIG_NLS=y
-CONFIG_NO_HZ=y
-CONFIG_NO_HZ_COMMON=y
-CONFIG_NO_HZ_IDLE=y
-CONFIG_NR_CPUS=4
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_MTD=y
-CONFIG_OF_NET=y
-CONFIG_OLD_SIGACTION=y
-CONFIG_OLD_SIGSUSPEND3=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_PAGE_OFFSET=0xC0000000
-# CONFIG_PARTITION_ADVANCED is not set
-# CONFIG_PCI_SYSCALL is not set
-CONFIG_PERF_EVENTS=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PHYLIB=y
-CONFIG_PHY_SUN4I_USB=y
-CONFIG_PID_NS=y
-CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_SINGLE is not set
-CONFIG_PINCTRL_SUNXI=y
-CONFIG_PM=y
-CONFIG_PM_CLK=y
-# CONFIG_PM_DEBUG is not set
-CONFIG_PM_RUNTIME=y
-CONFIG_POWER_SUPPLY=y
-CONFIG_PPS=y
-CONFIG_PREEMPT=y
-CONFIG_PREEMPT_COUNT=y
-# CONFIG_PREEMPT_NONE is not set
-CONFIG_PREEMPT_RCU=y
-CONFIG_PRINTK_TIME=y
-# CONFIG_PRINT_QUOTA_WARNING is not set
-CONFIG_PROC_DEVICETREE=y
-CONFIG_PROC_EVENTS=y
-CONFIG_PROC_PAGE_MONITOR=y
-CONFIG_PROC_PID_CPUSET=y
-CONFIG_PTP_1588_CLOCK=y
-# CONFIG_QFMT_V1 is not set
-# CONFIG_QFMT_V2 is not set
-CONFIG_QUOTA=y
-CONFIG_QUOTACTL=y
-CONFIG_QUOTA_NETLINK_INTERFACE=y
-# CONFIG_RCU_BOOST is not set
-CONFIG_RCU_CPU_STALL_VERBOSE=y
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_RD_BZIP2=y
-CONFIG_RD_GZIP=y
-CONFIG_RD_LZ4=y
-CONFIG_RD_LZMA=y
-CONFIG_RD_LZO=y
-CONFIG_RD_XZ=y
-CONFIG_REGMAP=y
-CONFIG_REGULATOR=y
-# CONFIG_REGULATOR_DEBUG is not set
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
-# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
-CONFIG_RELAY=y
-CONFIG_RESET_CONTROLLER=y
-CONFIG_RESOURCE_COUNTERS=y
-# CONFIG_RFKILL_REGULATOR is not set
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_SATA_AHCI_PLATFORM=y
-CONFIG_SCHED_HRTICK=y
-CONFIG_SCSI=y
-CONFIG_SECURITYFS=y
-CONFIG_SERIAL_8250_DW=y
-CONFIG_SERIAL_8250_NR_UARTS=8
-CONFIG_SERIAL_8250_RUNTIME_UARTS=8
-CONFIG_SERIAL_8250_SYSRQ=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_APBPS2 is not set
-# CONFIG_SERIO_OLPC_APSP is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SLAB is not set
-CONFIG_SLUB=y
-CONFIG_SLUB_CPU_PARTIAL=y
-CONFIG_SLUB_DEBUG=y
-# CONFIG_SLUB_DEBUG_ON is not set
-CONFIG_SMP=y
-CONFIG_SMP_ON_UP=y
-CONFIG_SPARSE_IRQ=y
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_SUN4I=y
-# CONFIG_SPI_SUN6I is not set
-# CONFIG_STAGING is not set
-# CONFIG_STMMAC_DA is not set
-# CONFIG_STMMAC_DEBUG_FS is not set
-CONFIG_STMMAC_ETH=y
-CONFIG_STMMAC_PLATFORM=y
-CONFIG_STOP_MACHINE=y
-CONFIG_STRICT_DEVMEM=y
-# CONFIG_SUN4I_EMAC is not set
-CONFIG_SUN4I_TIMER=y
-CONFIG_SUN5I_HSTIMER=y
-CONFIG_SUNXI_WATCHDOG=y
-CONFIG_SWIOTLB=y
-CONFIG_SWP_EMULATE=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_TASK_IO_ACCOUNTING=y
-CONFIG_TASK_XACCT=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-# CONFIG_THUMB2_KERNEL is not set
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_TOUCHSCREEN_SUN4I=y
-CONFIG_TREE_PREEMPT_RCU=y
-CONFIG_UEVENT_HELPER_PATH=""
-CONFIG_UID16=y
-CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-CONFIG_UNINLINE_SPIN_UNLOCK=y
-CONFIG_USB=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_COMMON=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_HCD_PLATFORM=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SUPPORT=y
-# CONFIG_USER_NS is not set
-CONFIG_USE_OF=y
-CONFIG_UTS_NS=y
-CONFIG_VECTORS_BASE=0xffff0000
-CONFIG_VFP=y
-CONFIG_VFPv3=y
-CONFIG_VLAN_8021Q_GVRP=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_WATCHDOG_CORE=y
-# CONFIG_XEN is not set
-CONFIG_XFRM_ALGO=y
-CONFIG_XFRM_USER=y
-CONFIG_XPS=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_ARMTHUMB=y
-CONFIG_XZ_DEC_BCJ=y
-CONFIG_ZBOOT_ROM_BSS=0
-CONFIG_ZBOOT_ROM_TEXT=0
-# CONFIG_ZBUD is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZONE_DMA_FLAG=0
diff --git a/target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch b/target/linux/sunxi/patches-3.13/100-clk-composite-determine-rate.patch
deleted file mode 100644 (file)
index 4984d15..0000000
+++ /dev/null
@@ -1,70 +0,0 @@
-From a968e9dc5983d258a4aa7e496d58c92e9e4cf670 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Sat, 14 Sep 2013 21:37:59 -0300
-Subject: [PATCH] clk: composite: .determine_rate support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit adds .determine_rate support to the composite clock. It will
-use the .determine_rate callback from the rate component if available,
-and fall back on the mux component otherwise. This allows composite
-clocks to enjoy the benefits of automatic clock reparenting.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/clk/clk-composite.c | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
---- a/drivers/clk/clk-composite.c
-+++ b/drivers/clk/clk-composite.c
-@@ -55,6 +55,30 @@ static unsigned long clk_composite_recal
-       return rate_ops->recalc_rate(rate_hw, parent_rate);
- }
-+static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
-+                                      unsigned long *best_parent_rate,
-+                                      struct clk **best_parent_p)
-+{
-+      struct clk_composite *composite = to_clk_composite(hw);
-+      const struct clk_ops *rate_ops = composite->rate_ops;
-+      const struct clk_ops *mux_ops = composite->mux_ops;
-+      struct clk_hw *rate_hw = composite->rate_hw;
-+      struct clk_hw *mux_hw = composite->mux_hw;
-+
-+      if (rate_hw && rate_ops && rate_ops->determine_rate) {
-+              rate_hw->clk = hw->clk;
-+              return rate_ops->determine_rate(rate_hw, rate, best_parent_rate,
-+                                              best_parent_p);
-+      } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
-+              mux_hw->clk = hw->clk;
-+              return mux_ops->determine_rate(rate_hw, rate, best_parent_rate,
-+                                             best_parent_p);
-+      } else {
-+              pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
-+              return 0;
-+      }
-+}
-+
- static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
-                                 unsigned long *prate)
- {
-@@ -147,6 +171,8 @@ struct clk *clk_register_composite(struc
-               composite->mux_ops = mux_ops;
-               clk_composite_ops->get_parent = clk_composite_get_parent;
-               clk_composite_ops->set_parent = clk_composite_set_parent;
-+              if (mux_ops->determine_rate)
-+                      clk_composite_ops->determine_rate = clk_composite_determine_rate;
-       }
-       if (rate_hw && rate_ops) {
-@@ -170,6 +196,8 @@ struct clk *clk_register_composite(struc
-               composite->rate_hw = rate_hw;
-               composite->rate_ops = rate_ops;
-               clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
-+              if (rate_ops->determine_rate)
-+                      clk_composite_ops->determine_rate = clk_composite_determine_rate;
-       }
-       if (gate_hw && gate_ops) {
diff --git a/target/linux/sunxi/patches-3.13/101-fix-off-by-one-masks.patch b/target/linux/sunxi/patches-3.13/101-fix-off-by-one-masks.patch
deleted file mode 100644 (file)
index f6d7a13..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-From b3cb099f8b0cbe56fcfbb4fb9c7cce48afff41f0 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Fri, 20 Sep 2013 22:03:10 -0300
-Subject: [PATCH] clk: sunxi: factors: fix off-by-one masks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The previous code would generate one bit too long masks, and was
-needlessly complicated. This patch replaces it by simpler code that can
-generate the masks correctly.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/clk/sunxi/clk-factors.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/sunxi/clk-factors.c
-+++ b/drivers/clk/sunxi/clk-factors.c
-@@ -40,7 +40,7 @@ struct clk_factors {
- #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
--#define SETMASK(len, pos)             (((-1U) >> (31-len))  << (pos))
-+#define SETMASK(len, pos)             (((1U << (len)) - 1) << (pos))
- #define CLRMASK(len, pos)             (~(SETMASK(len, pos)))
- #define FACTOR_GET(bit, len, reg)     (((reg) & SETMASK(len, bit)) >> (bit))
diff --git a/target/linux/sunxi/patches-3.13/102-clk-factors-clear-vars.patch b/target/linux/sunxi/patches-3.13/102-clk-factors-clear-vars.patch
deleted file mode 100644 (file)
index b1396d6..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-From 789bea92aba0256a7f5309992327df8729333750 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Fri, 20 Sep 2013 22:03:11 -0300
-Subject: [PATCH] clk: sunxi: factors: clear variables before using them
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Random bits may get into our factors if we don't clear n, k, m and p.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/clk/sunxi/clk-factors.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/sunxi/clk-factors.c
-+++ b/drivers/clk/sunxi/clk-factors.c
-@@ -88,7 +88,7 @@ static long clk_factors_round_rate(struc
- static int clk_factors_set_rate(struct clk_hw *hw, unsigned long rate,
-                               unsigned long parent_rate)
- {
--      u8 n, k, m, p;
-+      u8 n = 0, k = 0, m = 0, p = 0;
-       u32 reg;
-       struct clk_factors *factors = to_clk_factors(hw);
-       struct clk_factors_config *config = factors->config;
diff --git a/target/linux/sunxi/patches-3.13/103-sunxi-clk-core-clock-protect.patch b/target/linux/sunxi/patches-3.13/103-sunxi-clk-core-clock-protect.patch
deleted file mode 100644 (file)
index 87c5b35..0000000
+++ /dev/null
@@ -1,66 +0,0 @@
-From 7df19a0adca7806e081479eecb07365652c26ef5 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Fri, 20 Sep 2013 22:03:12 -0300
-Subject: [PATCH] clk: sunxi: protect core clocks from accidental shutdown
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Some important clocks may get disabled as a side effect of another clock
-being disabled, because they have no consumers. This patch implements a
-mechanism so those clocks can be claimed by the driver and therefore
-remain enabled at all times.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-
-Conflicts:
-       drivers/clk/sunxi/clk-sunxi.c
----
- drivers/clk/sunxi/clk-sunxi.c | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -616,6 +616,31 @@ static void __init of_sunxi_table_clock_
-       }
- }
-+/**
-+ * System clock protection
-+ *
-+ * By enabling these critical clocks, we prevent their accidental gating
-+ * by the framework
-+ */
-+static void __init sunxi_clock_protect(void)
-+{
-+      struct clk *clk;
-+
-+      /* memory bus clock - sun5i+ */
-+      clk = clk_get(NULL, "mbus");
-+      if (!IS_ERR(clk)) {
-+              clk_prepare_enable(clk);
-+              clk_put(clk);
-+      }
-+
-+      /* DDR clock - sun4i+ */
-+      clk = clk_get(NULL, "pll5_ddr");
-+      if (!IS_ERR(clk)) {
-+              clk_prepare_enable(clk);
-+              clk_put(clk);
-+      }
-+}
-+
- static void __init sunxi_init_clocks(struct device_node *np)
- {
-       /* Register factor clocks */
-@@ -629,6 +654,9 @@ static void __init sunxi_init_clocks(str
-       /* Register gate clocks */
-       of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup);
-+
-+      /* Enable core system clocks */
-+      sunxi_clock_protect();
- }
- CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks);
- CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);
diff --git a/target/linux/sunxi/patches-3.13/104-clk-sunxi-fix-memory-leak.patch b/target/linux/sunxi/patches-3.13/104-clk-sunxi-fix-memory-leak.patch
deleted file mode 100644 (file)
index 8f2e42f..0000000
+++ /dev/null
@@ -1,63 +0,0 @@
-From 9dc8189536f4c59bb7ad8c736021cefc1488bf74 Mon Sep 17 00:00:00 2001
-From: "Victor N. Ramos Mello" <victornrm@gmail.com>
-Date: Fri, 18 Oct 2013 20:27:51 -0300
-Subject: [PATCH] drivers: clk: sunxi: Fix memory leakage in clk-sunxi.c
-
-Fix a possible memory leak in sun4i_osc_clk_setup().
-Moved clock-frequency check to save superfluous allocation.
-
-Signed-off-by: Victor N. Ramos Mello <victornrm@gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/clk/sunxi/clk-sunxi.c | 28 +++++++++++++++++-----------
- 1 file changed, 17 insertions(+), 11 deletions(-)
-
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -37,18 +37,16 @@ static void __init sun4i_osc_clk_setup(s
-       const char *clk_name = node->name;
-       u32 rate;
-+      if (of_property_read_u32(node, "clock-frequency", &rate))
-+              return;
-+
-       /* allocate fixed-rate and gate clock structs */
-       fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);
-       if (!fixed)
-               return;
-       gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
--      if (!gate) {
--              kfree(fixed);
--              return;
--      }
--
--      if (of_property_read_u32(node, "clock-frequency", &rate))
--              return;
-+      if (!gate)
-+              goto err_free_fixed;
-       /* set up gate and fixed rate properties */
-       gate->reg = of_iomap(node, 0);
-@@ -63,10 +61,18 @@ static void __init sun4i_osc_clk_setup(s
-                       &gate->hw, &clk_gate_ops,
-                       CLK_IS_ROOT);
--      if (!IS_ERR(clk)) {
--              of_clk_add_provider(node, of_clk_src_simple_get, clk);
--              clk_register_clkdev(clk, clk_name, NULL);
--      }
-+      if (IS_ERR(clk))
-+              goto err_free_gate;
-+
-+      of_clk_add_provider(node, of_clk_src_simple_get, clk);
-+      clk_register_clkdev(clk, clk_name, NULL);
-+
-+      return;
-+
-+err_free_gate:
-+      kfree(gate);
-+err_free_fixed:
-+      kfree(fixed);
- }
- CLK_OF_DECLARE(sun4i_osc, "allwinner,sun4i-osc-clk", sun4i_osc_clk_setup);
diff --git a/target/linux/sunxi/patches-3.13/105-reset-add-reset-ctrler.patch b/target/linux/sunxi/patches-3.13/105-reset-add-reset-ctrler.patch
deleted file mode 100644 (file)
index b997203..0000000
+++ /dev/null
@@ -1,206 +0,0 @@
-From 8015cea648c452bbfe0fc820dcb1185beaeb8736 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 24 Sep 2013 11:07:43 +0300
-Subject: [PATCH] reset: Add Allwinner SoCs Reset Controller Driver
-
-The Allwinner A31 and most of the other Allwinner SoCs have an IP
-maintaining a few other IPs in the SoC in reset by default. Among these
-IPs are the A31's High Speed Timers, hence why we can't use the regular
-driver construct in every cases, and need to call the registering
-function directly during machine initialisation.
-
-Apart from this, the implementation is fairly straightforward, and could
-easily be moved to a generic MMIO-based reset controller driver if the
-need ever arise.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
----
- drivers/reset/Makefile      |   1 +
- drivers/reset/reset-sunxi.c | 175 ++++++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 176 insertions(+)
- create mode 100644 drivers/reset/reset-sunxi.c
-
---- a/drivers/reset/Makefile
-+++ b/drivers/reset/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_RESET_CONTROLLER) += core.o
-+obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
---- /dev/null
-+++ b/drivers/reset/reset-sunxi.c
-@@ -0,0 +1,175 @@
-+/*
-+ * Allwinner SoCs Reset Controller driver
-+ *
-+ * Copyright 2013 Maxime Ripard
-+ *
-+ * Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/platform_device.h>
-+#include <linux/reset-controller.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+#include <linux/types.h>
-+
-+struct sunxi_reset_data {
-+      spinlock_t                      lock;
-+      void __iomem                    *membase;
-+      struct reset_controller_dev     rcdev;
-+};
-+
-+static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
-+                            unsigned long id)
-+{
-+      struct sunxi_reset_data *data = container_of(rcdev,
-+                                                   struct sunxi_reset_data,
-+                                                   rcdev);
-+      int bank = id / BITS_PER_LONG;
-+      int offset = id % BITS_PER_LONG;
-+      unsigned long flags;
-+      u32 reg;
-+
-+      spin_lock_irqsave(&data->lock, flags);
-+
-+      reg = readl(data->membase + (bank * 4));
-+      writel(reg & ~BIT(offset), data->membase + (bank * 4));
-+
-+      spin_unlock_irqrestore(&data->lock, flags);
-+
-+      return 0;
-+}
-+
-+static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
-+                              unsigned long id)
-+{
-+      struct sunxi_reset_data *data = container_of(rcdev,
-+                                                   struct sunxi_reset_data,
-+                                                   rcdev);
-+      int bank = id / BITS_PER_LONG;
-+      int offset = id % BITS_PER_LONG;
-+      unsigned long flags;
-+      u32 reg;
-+
-+      spin_lock_irqsave(&data->lock, flags);
-+
-+      reg = readl(data->membase + (bank * 4));
-+      writel(reg | BIT(offset), data->membase + (bank * 4));
-+
-+      spin_unlock_irqrestore(&data->lock, flags);
-+
-+      return 0;
-+}
-+
-+static struct reset_control_ops sunxi_reset_ops = {
-+      .assert         = sunxi_reset_assert,
-+      .deassert       = sunxi_reset_deassert,
-+};
-+
-+static int sunxi_reset_init(struct device_node *np)
-+{
-+      struct sunxi_reset_data *data;
-+      struct resource res;
-+      resource_size_t size;
-+      int ret;
-+
-+      data = kzalloc(sizeof(*data), GFP_KERNEL);
-+      if (!data)
-+              return -ENOMEM;
-+
-+      ret = of_address_to_resource(np, 0, &res);
-+      if (ret)
-+              goto err_alloc;
-+
-+      size = resource_size(&res);
-+      if (!request_mem_region(res.start, size, np->name)) {
-+              ret = -EBUSY;
-+              goto err_alloc;
-+      }
-+
-+      data->membase = ioremap(res.start, size);
-+      if (!data->membase) {
-+              ret = -ENOMEM;
-+              goto err_alloc;
-+      }
-+
-+      data->rcdev.owner = THIS_MODULE;
-+      data->rcdev.nr_resets = size * 32;
-+      data->rcdev.ops = &sunxi_reset_ops;
-+      data->rcdev.of_node = np;
-+      reset_controller_register(&data->rcdev);
-+
-+      return 0;
-+
-+err_alloc:
-+      kfree(data);
-+      return ret;
-+};
-+
-+/*
-+ * These are the reset controller we need to initialize early on in
-+ * our system, before we can even think of using a regular device
-+ * driver for it.
-+ */
-+static const struct of_device_id sunxi_early_reset_dt_ids[] __initdata = {
-+      { .compatible = "allwinner,sun6i-a31-ahb1-reset", },
-+      { /* sentinel */ },
-+};
-+
-+void __init sun6i_reset_init(void)
-+{
-+      struct device_node *np;
-+
-+      for_each_matching_node(np, sunxi_early_reset_dt_ids)
-+              sunxi_reset_init(np);
-+}
-+
-+/*
-+ * And these are the controllers we can register through the regular
-+ * device model.
-+ */
-+static const struct of_device_id sunxi_reset_dt_ids[] = {
-+       { .compatible = "allwinner,sun6i-a31-clock-reset", },
-+       { /* sentinel */ },
-+};
-+MODULE_DEVICE_TABLE(of, sunxi_reset_dt_ids);
-+
-+static int sunxi_reset_probe(struct platform_device *pdev)
-+{
-+      return sunxi_reset_init(pdev->dev.of_node);
-+}
-+
-+static int sunxi_reset_remove(struct platform_device *pdev)
-+{
-+      struct sunxi_reset_data *data = platform_get_drvdata(pdev);
-+
-+      reset_controller_unregister(&data->rcdev);
-+      iounmap(data->membase);
-+      kfree(data);
-+
-+      return 0;
-+}
-+
-+static struct platform_driver sunxi_reset_driver = {
-+      .probe  = sunxi_reset_probe,
-+      .remove = sunxi_reset_remove,
-+      .driver = {
-+              .name           = "sunxi-reset",
-+              .owner          = THIS_MODULE,
-+              .of_match_table = sunxi_reset_dt_ids,
-+      },
-+};
-+module_platform_driver(sunxi_reset_driver);
-+
-+MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
-+MODULE_DESCRIPTION("Allwinner SoCs Reset Controller Driver");
-+MODULE_LICENSE("GPL");
diff --git a/target/linux/sunxi/patches-3.13/106-add-Kconfig-for-reset.patch b/target/linux/sunxi/patches-3.13/106-add-Kconfig-for-reset.patch
deleted file mode 100644 (file)
index f3fd664..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-From 73f948fb57f489ed8252fa8480575c91f027200d Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 24 Sep 2013 11:09:55 +0300
-Subject: [PATCH] ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER
-
-The A31 has a reset controller, and we have to select this option to
-have access to the reset controller framework.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
----
- arch/arm/mach-sunxi/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -1,5 +1,6 @@
- config ARCH_SUNXI
-       bool "Allwinner A1X SOCs" if ARCH_MULTI_V7
-+      select ARCH_HAS_RESET_CONTROLLER
-       select ARCH_REQUIRE_GPIOLIB
-       select ARM_GIC
-       select CLKSRC_MMIO
diff --git a/target/linux/sunxi/patches-3.13/107-sunxi-register-a31-reset.patch b/target/linux/sunxi/patches-3.13/107-sunxi-register-a31-reset.patch
deleted file mode 100644 (file)
index fcbb64f..0000000
+++ /dev/null
@@ -1,45 +0,0 @@
-From dae0e37c2df466f5eb6459d05f392e86b4236666 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Sat, 5 Oct 2013 14:53:48 +0200
-Subject: [PATCH] ARM: sunxi: Register the A31 reset IP in init_time
-
-The A31 has a reset IP that maintains a few other IPs in reset by
-default. Among these IPs are the UARTs, and most notably the timers. We
-thus need to register the reset driver before initializing the timers so
-that the reset timer can use the reset framework.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
----
- arch/arm/mach-sunxi/sunxi.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/arch/arm/mach-sunxi/sunxi.c
-+++ b/arch/arm/mach-sunxi/sunxi.c
-@@ -10,6 +10,8 @@
-  * warranty of any kind, whether express or implied.
-  */
-+#include <linux/clk-provider.h>
-+#include <linux/clocksource.h>
- #include <linux/delay.h>
- #include <linux/kernel.h>
- #include <linux/init.h>
-@@ -132,8 +134,17 @@ static const char * const sun6i_board_dt
-       NULL,
- };
-+extern void __init sun6i_reset_init(void);
-+static void __init sun6i_timer_init(void)
-+{
-+      of_clk_init(NULL);
-+      sun6i_reset_init();
-+      clocksource_of_init();
-+}
-+
- DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")
-       .init_machine   = sunxi_dt_init,
-+      .init_time      = sun6i_timer_init,
-       .dt_compat      = sun6i_board_dt_compat,
-       .restart        = sun6i_restart,
- MACHINE_END
diff --git a/target/linux/sunxi/patches-3.13/108-sun6i-add-smp-support.patch b/target/linux/sunxi/patches-3.13/108-sun6i-add-smp-support.patch
deleted file mode 100644 (file)
index 24689e5..0000000
+++ /dev/null
@@ -1,206 +0,0 @@
-From 6f5002c91f35f6b171bc608b87b3f2b55451f32b Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Sun, 3 Nov 2013 10:30:13 +0100
-Subject: [PATCH] ARM: sun6i: Add SMP support for the Allwinner A31
-
-The A31 is a quad Cortex-A7. Add the logic to use the IPs used to
-control the CPU configuration and the CPU power so that we can bring up
-secondary CPUs at boot.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/mach-sunxi/Makefile  |   1 +
- arch/arm/mach-sunxi/common.h  |  19 +++++++
- arch/arm/mach-sunxi/headsmp.S |   9 +++
- arch/arm/mach-sunxi/platsmp.c | 124 ++++++++++++++++++++++++++++++++++++++++++
- arch/arm/mach-sunxi/sunxi.c   |   3 +
- 5 files changed, 156 insertions(+)
- create mode 100644 arch/arm/mach-sunxi/common.h
- create mode 100644 arch/arm/mach-sunxi/headsmp.S
- create mode 100644 arch/arm/mach-sunxi/platsmp.c
-
---- a/arch/arm/mach-sunxi/Makefile
-+++ b/arch/arm/mach-sunxi/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_ARCH_SUNXI) += sunxi.o
-+obj-$(CONFIG_SMP) += platsmp.o headsmp.o
---- /dev/null
-+++ b/arch/arm/mach-sunxi/common.h
-@@ -0,0 +1,19 @@
-+/*
-+ * Core functions for Allwinner SoCs
-+ *
-+ * Copyright (C) 2013 Maxime Ripard
-+ *
-+ * Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2.  This program is licensed "as is" without any
-+ * warranty of any kind, whether express or implied.
-+ */
-+
-+#ifndef __ARCH_SUNXI_COMMON_H_
-+#define __ARCH_SUNXI_COMMON_H_
-+
-+void sun6i_secondary_startup(void);
-+extern struct smp_operations sun6i_smp_ops;
-+
-+#endif /* __ARCH_SUNXI_COMMON_H_ */
---- /dev/null
-+++ b/arch/arm/mach-sunxi/headsmp.S
-@@ -0,0 +1,9 @@
-+#include <linux/linkage.h>
-+#include <linux/init.h>
-+
-+        .section ".text.head", "ax"
-+
-+ENTRY(sun6i_secondary_startup)
-+      msr     cpsr_fsxc, #0xd3
-+      b       secondary_startup
-+ENDPROC(sun6i_secondary_startup)
---- /dev/null
-+++ b/arch/arm/mach-sunxi/platsmp.c
-@@ -0,0 +1,124 @@
-+/*
-+ * SMP support for Allwinner SoCs
-+ *
-+ * Copyright (C) 2013 Maxime Ripard
-+ *
-+ * Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * Based on code
-+ *  Copyright (C) 2012-2013 Allwinner Ltd.
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2.  This program is licensed "as is" without any
-+ * warranty of any kind, whether express or implied.
-+ */
-+
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/memory.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/smp.h>
-+
-+#include "common.h"
-+
-+#define CPUCFG_CPU_PWR_CLAMP_STATUS_REG(cpu)  ((cpu) * 0x40 + 0x64)
-+#define CPUCFG_CPU_RST_CTRL_REG(cpu)          (((cpu) + 1) * 0x40)
-+#define CPUCFG_CPU_CTRL_REG(cpu)              (((cpu) + 1) * 0x40 + 0x04)
-+#define CPUCFG_CPU_STATUS_REG(cpu)            (((cpu) + 1) * 0x40 + 0x08)
-+#define CPUCFG_GEN_CTRL_REG                   0x184
-+#define CPUCFG_PRIVATE0_REG                   0x1a4
-+#define CPUCFG_PRIVATE1_REG                   0x1a8
-+#define CPUCFG_DBG_CTL0_REG                   0x1e0
-+#define CPUCFG_DBG_CTL1_REG                   0x1e4
-+
-+#define PRCM_CPU_PWROFF_REG                   0x100
-+#define PRCM_CPU_PWR_CLAMP_REG(cpu)           (((cpu) * 4) + 0x140)
-+
-+static void __iomem *cpucfg_membase;
-+static void __iomem *prcm_membase;
-+
-+static DEFINE_SPINLOCK(cpu_lock);
-+
-+static void __init sun6i_smp_prepare_cpus(unsigned int max_cpus)
-+{
-+      struct device_node *node;
-+
-+      node = of_find_compatible_node(NULL, NULL, "allwinner,sun6i-a31-prcm");
-+      if (!node) {
-+              pr_err("Missing A31 PRCM node in the device tree\n");
-+              return;
-+      }
-+
-+      prcm_membase = of_iomap(node, 0);
-+      if (!prcm_membase) {
-+              pr_err("Couldn't map A31 PRCM registers\n");
-+              return;
-+      }
-+
-+      node = of_find_compatible_node(NULL, NULL,
-+                                     "allwinner,sun6i-a31-cpuconfig");
-+      if (!node) {
-+              pr_err("Missing A31 CPU config node in the device tree\n");
-+              return;
-+      }
-+
-+      cpucfg_membase = of_iomap(node, 0);
-+      if (!cpucfg_membase)
-+              pr_err("Couldn't map A31 CPU config registers\n");
-+
-+}
-+
-+static int sun6i_smp_boot_secondary(unsigned int cpu,
-+                                  struct task_struct *idle)
-+{
-+      u32 reg;
-+      int i;
-+
-+      if (!(prcm_membase && cpucfg_membase))
-+              return -EFAULT;
-+
-+      spin_lock(&cpu_lock);
-+
-+      /* Set CPU boot address */
-+      writel(virt_to_phys(sun6i_secondary_startup),
-+             cpucfg_membase + CPUCFG_PRIVATE0_REG);
-+
-+      /* Assert the CPU core in reset */
-+      writel(0, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));
-+
-+      /* Assert the L1 cache in reset */
-+      reg = readl(cpucfg_membase + CPUCFG_GEN_CTRL_REG);
-+      writel(reg & ~BIT(cpu), cpucfg_membase + CPUCFG_GEN_CTRL_REG);
-+
-+      /* Disable external debug access */
-+      reg = readl(cpucfg_membase + CPUCFG_DBG_CTL1_REG);
-+      writel(reg & ~BIT(cpu), cpucfg_membase + CPUCFG_DBG_CTL1_REG);
-+
-+      /* Power up the CPU */
-+      for (i = 0; i <= 8; i++)
-+              writel(0xff >> i, prcm_membase + PRCM_CPU_PWR_CLAMP_REG(cpu));
-+      mdelay(10);
-+
-+      /* Clear CPU power-off gating */
-+      reg = readl(prcm_membase + PRCM_CPU_PWROFF_REG);
-+      writel(reg & ~BIT(cpu), prcm_membase + PRCM_CPU_PWROFF_REG);
-+      mdelay(1);
-+
-+      /* Deassert the CPU core reset */
-+      writel(3, cpucfg_membase + CPUCFG_CPU_RST_CTRL_REG(cpu));
-+
-+      /* Enable back the external debug accesses */
-+      reg = readl(cpucfg_membase + CPUCFG_DBG_CTL1_REG);
-+      writel(reg | BIT(cpu), cpucfg_membase + CPUCFG_DBG_CTL1_REG);
-+
-+      spin_unlock(&cpu_lock);
-+
-+      return 0;
-+}
-+
-+struct smp_operations sun6i_smp_ops __initdata = {
-+      .smp_prepare_cpus       = sun6i_smp_prepare_cpus,
-+      .smp_boot_secondary     = sun6i_smp_boot_secondary,
-+};
---- a/arch/arm/mach-sunxi/sunxi.c
-+++ b/arch/arm/mach-sunxi/sunxi.c
-@@ -25,6 +25,8 @@
- #include <asm/mach/map.h>
- #include <asm/system_misc.h>
-+#include "common.h"
-+
- #define SUN4I_WATCHDOG_CTRL_REG               0x00
- #define SUN4I_WATCHDOG_CTRL_RESTART           BIT(0)
- #define SUN4I_WATCHDOG_MODE_REG               0x04
-@@ -147,6 +149,7 @@ DT_MACHINE_START(SUN6I_DT, "Allwinner su
-       .init_time      = sun6i_timer_init,
-       .dt_compat      = sun6i_board_dt_compat,
-       .restart        = sun6i_restart,
-+      .smp            = smp_ops(sun6i_smp_ops),
- MACHINE_END
- static const char * const sun7i_board_dt_compat[] = {
diff --git a/target/linux/sunxi/patches-3.13/109-dt-sun6i-add-reset-ctrler.patch b/target/linux/sunxi/patches-3.13/109-dt-sun6i-add-reset-ctrler.patch
deleted file mode 100644 (file)
index 05f0056..0000000
+++ /dev/null
@@ -1,90 +0,0 @@
-From f88dc0623908b574d9dcdae8815ccd0829fc6828 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 24 Sep 2013 11:10:41 +0300
-Subject: [PATCH] ARM: sun6i: Add the reset controller to the DTSI
-
-The A31 has a reset controller IP that maintains a few other IPs in
-reset, among which we can find the UARTs, high speed timers or the I2C.
-Now that we have support for them, add the reset controllers to the DTSI.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
----
- arch/arm/boot/dts/sun6i-a31.dtsi | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
---- a/arch/arm/boot/dts/sun6i-a31.dtsi
-+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
-@@ -212,6 +212,24 @@
-                       };
-               };
-+              ahb1_rst: reset@01c202c0 {
-+                      #reset-cells = <1>;
-+                      compatible = "allwinner,sun6i-a31-ahb1-reset";
-+                      reg = <0x01c202c0 0xc>;
-+              };
-+
-+              apb1_rst: reset@01c202d0 {
-+                      #reset-cells = <1>;
-+                      compatible = "allwinner,sun6i-a31-clock-reset";
-+                      reg = <0x01c202d0 0x4>;
-+              };
-+
-+              apb2_rst: reset@01c202d8 {
-+                      #reset-cells = <1>;
-+                      compatible = "allwinner,sun6i-a31-clock-reset";
-+                      reg = <0x01c202d8 0x4>;
-+              };
-+
-               timer@01c20c00 {
-                       compatible = "allwinner,sun4i-timer";
-                       reg = <0x01c20c00 0xa0>;
-@@ -235,6 +253,7 @@
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
-                       clocks = <&apb2_gates 16>;
-+                      resets = <&apb2_rst 16>;
-                       status = "disabled";
-               };
-@@ -245,6 +264,7 @@
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
-                       clocks = <&apb2_gates 17>;
-+                      resets = <&apb2_rst 17>;
-                       status = "disabled";
-               };
-@@ -255,6 +275,7 @@
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
-                       clocks = <&apb2_gates 18>;
-+                      resets = <&apb2_rst 18>;
-                       status = "disabled";
-               };
-@@ -265,6 +286,7 @@
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
-                       clocks = <&apb2_gates 19>;
-+                      resets = <&apb2_rst 19>;
-                       status = "disabled";
-               };
-@@ -275,6 +297,7 @@
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
-                       clocks = <&apb2_gates 20>;
-+                      resets = <&apb2_rst 20>;
-                       status = "disabled";
-               };
-@@ -285,6 +308,7 @@
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
-                       clocks = <&apb2_gates 21>;
-+                      resets = <&apb2_rst 21>;
-                       status = "disabled";
-               };
diff --git a/target/linux/sunxi/patches-3.13/110-sun4i-clkevent-fill-irqfield.patch b/target/linux/sunxi/patches-3.13/110-sun4i-clkevent-fill-irqfield.patch
deleted file mode 100644 (file)
index 2445a78..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-From abc12cd5c39556824cc9022db6eddc64e8e8dbe9 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Wed, 23 Oct 2013 17:54:39 +0100
-Subject: [PATCH] clockevent: sun4i: Fill the irq field in the clockevent
- structure
-
-The clock event structure irq field was not filled previously to the
-interrupt we're using.
-
-This was resulting in the timer not being used at all when using a
-configuration with SMP enabled on a system with several CPUs, and with
-the cpumask set to the cpu_possible_mask.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/clocksource/sun4i_timer.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/clocksource/sun4i_timer.c
-+++ b/drivers/clocksource/sun4i_timer.c
-@@ -191,6 +191,7 @@ static void __init sun4i_timer_init(stru
-       writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
-       sun4i_clockevent.cpumask = cpumask_of(0);
-+      sun4i_clockevent.irq = irq;
-       clockevents_config_and_register(&sun4i_clockevent, rate,
-                                       TIMER_SYNC_TICKS, 0xffffffff);
diff --git a/target/linux/sunxi/patches-3.13/111-sun4i-clksrc-change-cpu-mask.patch b/target/linux/sunxi/patches-3.13/111-sun4i-clksrc-change-cpu-mask.patch
deleted file mode 100644 (file)
index ff80769..0000000
+++ /dev/null
@@ -1,25 +0,0 @@
-From 64a9fa131380f9cef9328d0cf9f2d49a538e6dd2 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Wed, 9 Oct 2013 22:44:56 +0200
-Subject: [PATCH] clocksource: sun4i: change CPU mask to cpu_possible_mask
-
-The interrupt for the timer is a shared processor interrupt, so any CPU
-found in the system can handle it. Switch to our cpumask to
-cpu_possible_mask instead of cpumask_of(0).
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/clocksource/sun4i_timer.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clocksource/sun4i_timer.c
-+++ b/drivers/clocksource/sun4i_timer.c
-@@ -190,7 +190,7 @@ static void __init sun4i_timer_init(stru
-       val = readl(timer_base + TIMER_IRQ_EN_REG);
-       writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
--      sun4i_clockevent.cpumask = cpumask_of(0);
-+      sun4i_clockevent.cpumask = cpu_possible_mask;
-       sun4i_clockevent.irq = irq;
-       clockevents_config_and_register(&sun4i_clockevent, rate,
diff --git a/target/linux/sunxi/patches-3.13/112-sun4i-clksrc-increase-a-bit-in-clockevent.patch b/target/linux/sunxi/patches-3.13/112-sun4i-clksrc-increase-a-bit-in-clockevent.patch
deleted file mode 100644 (file)
index 9dd7b78..0000000
+++ /dev/null
@@ -1,41 +0,0 @@
-From a4eb936767bd6a63d54734b9ce48932609ce58eb Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 7 Nov 2013 12:01:48 +0100
-Subject: [PATCH] clocksource: sun4i: Increase a bit the clock event and
- sources rating
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We want to keep this driver as the default provider of the clock events
-and source, yet some other driver might fit in the "desired" category of
-ratings. Hence, we need to increase a bit the rating so that we can have
-more flexibility in the ratings we choose.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
----
- drivers/clocksource/sun4i_timer.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/clocksource/sun4i_timer.c
-+++ b/drivers/clocksource/sun4i_timer.c
-@@ -114,7 +114,7 @@ static int sun4i_clkevt_next_event(unsig
- static struct clock_event_device sun4i_clockevent = {
-       .name = "sun4i_tick",
--      .rating = 300,
-+      .rating = 350,
-       .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-       .set_mode = sun4i_clkevt_mode,
-       .set_next_event = sun4i_clkevt_next_event,
-@@ -172,7 +172,7 @@ static void __init sun4i_timer_init(stru
-       setup_sched_clock(sun4i_timer_sched_read, 32, rate);
-       clocksource_mmio_init(timer_base + TIMER_CNTVAL_REG(1), node->name,
--                            rate, 300, 32, clocksource_mmio_readl_down);
-+                            rate, 350, 32, clocksource_mmio_readl_down);
-       ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
diff --git a/target/linux/sunxi/patches-3.13/113-clk-sunxi-register-factors-clocks.patch b/target/linux/sunxi/patches-3.13/113-clk-sunxi-register-factors-clocks.patch
deleted file mode 100644 (file)
index 73d0e24..0000000
+++ /dev/null
@@ -1,223 +0,0 @@
-From 9212bc4a3752e9a4db2f73afd99278eb28e5dcff Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:32 -0300
-Subject: [PATCH] clk: sunxi: register factors clocks behind composite
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit reworks factors clock registration to be done behind a
-composite clock. This allows us to additionally add a gate, mux or
-divisors, as it will be needed by some future PLLs.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/clk/sunxi/clk-factors.c | 63 +------------------------------------
- drivers/clk/sunxi/clk-factors.h | 16 +++++-----
- drivers/clk/sunxi/clk-sunxi.c   | 70 ++++++++++++++++++++++++++++++++++++++---
- 3 files changed, 76 insertions(+), 73 deletions(-)
-
---- a/drivers/clk/sunxi/clk-factors.c
-+++ b/drivers/clk/sunxi/clk-factors.c
-@@ -30,14 +30,6 @@
-  * parent - fixed parent.  No clk_set_parent support
-  */
--struct clk_factors {
--      struct clk_hw hw;
--      void __iomem *reg;
--      struct clk_factors_config *config;
--      void (*get_factors) (u32 *rate, u32 parent, u8 *n, u8 *k, u8 *m, u8 *p);
--      spinlock_t *lock;
--};
--
- #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
- #define SETMASK(len, pos)             (((1U << (len)) - 1) << (pos))
-@@ -120,61 +112,8 @@ static int clk_factors_set_rate(struct c
-       return 0;
- }
--static const struct clk_ops clk_factors_ops = {
-+const struct clk_ops clk_factors_ops = {
-       .recalc_rate = clk_factors_recalc_rate,
-       .round_rate = clk_factors_round_rate,
-       .set_rate = clk_factors_set_rate,
- };
--
--/**
-- * clk_register_factors - register a factors clock with
-- * the clock framework
-- * @dev: device registering this clock
-- * @name: name of this clock
-- * @parent_name: name of clock's parent
-- * @flags: framework-specific flags
-- * @reg: register address to adjust factors
-- * @config: shift and width of factors n, k, m and p
-- * @get_factors: function to calculate the factors for a given frequency
-- * @lock: shared register lock for this clock
-- */
--struct clk *clk_register_factors(struct device *dev, const char *name,
--                               const char *parent_name,
--                               unsigned long flags, void __iomem *reg,
--                               struct clk_factors_config *config,
--                               void (*get_factors)(u32 *rate, u32 parent,
--                                                   u8 *n, u8 *k, u8 *m, u8 *p),
--                               spinlock_t *lock)
--{
--      struct clk_factors *factors;
--      struct clk *clk;
--      struct clk_init_data init;
--
--      /* allocate the factors */
--      factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
--      if (!factors) {
--              pr_err("%s: could not allocate factors clk\n", __func__);
--              return ERR_PTR(-ENOMEM);
--      }
--
--      init.name = name;
--      init.ops = &clk_factors_ops;
--      init.flags = flags;
--      init.parent_names = (parent_name ? &parent_name : NULL);
--      init.num_parents = (parent_name ? 1 : 0);
--
--      /* struct clk_factors assignments */
--      factors->reg = reg;
--      factors->config = config;
--      factors->lock = lock;
--      factors->hw.init = &init;
--      factors->get_factors = get_factors;
--
--      /* register the clock */
--      clk = clk_register(dev, &factors->hw);
--
--      if (IS_ERR(clk))
--              kfree(factors);
--
--      return clk;
--}
---- a/drivers/clk/sunxi/clk-factors.h
-+++ b/drivers/clk/sunxi/clk-factors.h
-@@ -17,11 +17,13 @@ struct clk_factors_config {
-       u8 pwidth;
- };
--struct clk *clk_register_factors(struct device *dev, const char *name,
--                               const char *parent_name,
--                               unsigned long flags, void __iomem *reg,
--                               struct clk_factors_config *config,
--                               void (*get_factors) (u32 *rate, u32 parent_rate,
--                                                    u8 *n, u8 *k, u8 *m, u8 *p),
--                               spinlock_t *lock);
-+struct clk_factors {
-+      struct clk_hw hw;
-+      void __iomem *reg;
-+      struct clk_factors_config *config;
-+      void (*get_factors) (u32 *rate, u32 parent, u8 *n, u8 *k, u8 *m, u8 *p);
-+      spinlock_t *lock;
-+};
-+
-+extern const struct clk_ops clk_factors_ops;
- #endif
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -23,6 +23,9 @@
- static DEFINE_SPINLOCK(clk_lock);
-+/* Maximum number of parents our clocks have */
-+#define SUNXI_MAX_PARENTS     5
-+
- /**
-  * sun4i_osc_clk_setup() - Setup function for gatable oscillator
-  */
-@@ -261,7 +264,11 @@ static void sun4i_get_apb1_factors(u32 *
-  * sunxi_factors_clk_setup() - Setup function for factor clocks
-  */
-+#define SUNXI_FACTORS_MUX_MASK 0x3
-+
- struct factors_data {
-+      int enable;
-+      int mux;
-       struct clk_factors_config *table;
-       void (*getter) (u32 *rate, u32 parent_rate, u8 *n, u8 *k, u8 *m, u8 *p);
- };
-@@ -312,16 +319,71 @@ static void __init sunxi_factors_clk_set
-                                          struct factors_data *data)
- {
-       struct clk *clk;
-+      struct clk_factors *factors;
-+      struct clk_gate *gate = NULL;
-+      struct clk_mux *mux = NULL;
-+      struct clk_hw *gate_hw = NULL;
-+      struct clk_hw *mux_hw = NULL;
-       const char *clk_name = node->name;
--      const char *parent;
-+      const char *parents[SUNXI_MAX_PARENTS];
-       void *reg;
-+      int i = 0;
-       reg = of_iomap(node, 0);
--      parent = of_clk_get_parent_name(node, 0);
-+      /* if we have a mux, we will have >1 parents */
-+      while (i < SUNXI_MAX_PARENTS &&
-+             (parents[i] = of_clk_get_parent_name(node, i)) != NULL)
-+              i++;
-+
-+      factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
-+      if (!factors)
-+              return;
-+
-+      /* Add a gate if this factor clock can be gated */
-+      if (data->enable) {
-+              gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
-+              if (!gate) {
-+                      kfree(factors);
-+                      return;
-+              }
-+
-+              /* set up gate properties */
-+              gate->reg = reg;
-+              gate->bit_idx = data->enable;
-+              gate->lock = &clk_lock;
-+              gate_hw = &gate->hw;
-+      }
-+
-+      /* Add a mux if this factor clock can be muxed */
-+      if (data->mux) {
-+              mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);
-+              if (!mux) {
-+                      kfree(factors);
-+                      kfree(gate);
-+                      return;
-+              }
-+
-+              /* set up gate properties */
-+              mux->reg = reg;
-+              mux->shift = data->mux;
-+              mux->mask = SUNXI_FACTORS_MUX_MASK;
-+              mux->lock = &clk_lock;
-+              mux_hw = &mux->hw;
-+      }
--      clk = clk_register_factors(NULL, clk_name, parent, 0, reg,
--                                 data->table, data->getter, &clk_lock);
-+      /* set up factors properties */
-+      factors->reg = reg;
-+      factors->config = data->table;
-+      factors->get_factors = data->getter;
-+      factors->lock = &clk_lock;
-+
-+      clk = clk_register_composite(NULL, clk_name,
-+                      parents, i,
-+                      mux_hw, &clk_mux_ops,
-+                      &factors->hw, &clk_factors_ops,
-+                      gate_hw, &clk_gate_ops,
-+                      i ? 0 : CLK_IS_ROOT);
-       if (!IS_ERR(clk)) {
-               of_clk_add_provider(node, of_clk_src_simple_get, clk);
diff --git a/target/linux/sunxi/patches-3.13/114-clk-sunxi-clean-magic-number.patch b/target/linux/sunxi/patches-3.13/114-clk-sunxi-clean-magic-number.patch
deleted file mode 100644 (file)
index a327481..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-From 33574f94b0d4d8bc8af732fbcb4f911c3dd8c96b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:33 -0300
-Subject: [PATCH] clk: sunxi: clean the magic number of mux parents
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This was pointed out during the review of the factor patches. Let's
-indicate what does that magic 5 mean.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
----
- drivers/clk/sunxi/clk-sunxi.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -420,13 +420,14 @@ static void __init sunxi_mux_clk_setup(s
- {
-       struct clk *clk;
-       const char *clk_name = node->name;
--      const char *parents[5];
-+      const char *parents[SUNXI_MAX_PARENTS];
-       void *reg;
-       int i = 0;
-       reg = of_iomap(node, 0);
--      while (i < 5 && (parents[i] = of_clk_get_parent_name(node, i)) != NULL)
-+      while (i < SUNXI_MAX_PARENTS &&
-+             (parents[i] = of_clk_get_parent_name(node, i)) != NULL)
-               i++;
-       clk = clk_register_mux(NULL, clk_name, parents, i,
diff --git a/target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch b/target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch
deleted file mode 100644 (file)
index 6b63000..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-From 3d56b9643ff9fff3c7ceb095e03f4ab7e149b9ce Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:34 -0300
-Subject: [PATCH] clk: sunxi: add gating support to PLL1
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit adds gating support to PLL1 on the clock driver. This makes
-the PLL1 implementation fully compatible with PLL4 as well.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Mike Turquette <mturquette@linaro.org>
----
- Documentation/devicetree/bindings/clock/sunxi.txt | 2 +-
- drivers/clk/sunxi/clk-sunxi.c                     | 2 ++
- 2 files changed, 3 insertions(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/clock/sunxi.txt
-+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
-@@ -7,7 +7,7 @@ This binding uses the common clock bindi
- Required properties:
- - compatible : shall be one of the following:
-       "allwinner,sun4i-osc-clk" - for a gatable oscillator
--      "allwinner,sun4i-pll1-clk" - for the main PLL clock
-+      "allwinner,sun4i-pll1-clk" - for the main PLL clock and PLL4
-       "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
-       "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
-       "allwinner,sun4i-axi-clk" - for the AXI clock
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -301,11 +301,13 @@ static struct clk_factors_config sun4i_a
- };
- static const struct factors_data sun4i_pll1_data __initconst = {
-+      .enable = 31,
-       .table = &sun4i_pll1_config,
-       .getter = sun4i_get_pll1_factors,
- };
- static const struct factors_data sun6i_a31_pll1_data __initconst = {
-+      .enable = 31,
-       .table = &sun6i_a31_pll1_config,
-       .getter = sun6i_a31_get_pll1_factors,
- };
diff --git a/target/linux/sunxi/patches-3.13/116-clk-sunxi-add-pll4.patch b/target/linux/sunxi/patches-3.13/116-clk-sunxi-add-pll4.patch
deleted file mode 100644 (file)
index 147c209..0000000
+++ /dev/null
@@ -1,84 +0,0 @@
-From ff0b5fdb65bc7f10af7e83bb0919cb6bec2dc624 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:35 -0300
-Subject: [PATCH] ARM: sunxi: add PLL4 support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit adds the PLL4 definition to the sun4i, sun5i and sun7i
-device trees. PLL4 is compatible with PLL1.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun4i-a10.dtsi  | 7 +++++++
- arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +++++++
- arch/arm/boot/dts/sun5i-a13.dtsi  | 7 +++++++
- arch/arm/boot/dts/sun7i-a20.dtsi  | 7 +++++++
- 4 files changed, 28 insertions(+)
-
---- a/arch/arm/boot/dts/sun4i-a10.dtsi
-+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
-@@ -66,6 +66,13 @@
-                       clocks = <&osc24M>;
-               };
-+              pll4: pll4@01c20018 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-pll1-clk";
-+                      reg = <0x01c20018 0x4>;
-+                      clocks = <&osc24M>;
-+              };
-+
-               /* dummy is 200M */
-               cpu: cpu@01c20054 {
-                       #clock-cells = <0>;
---- a/arch/arm/boot/dts/sun5i-a10s.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
-@@ -63,6 +63,13 @@
-                       clocks = <&osc24M>;
-               };
-+              pll4: pll4@01c20018 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-pll1-clk";
-+                      reg = <0x01c20018 0x4>;
-+                      clocks = <&osc24M>;
-+              };
-+
-               /* dummy is 200M */
-               cpu: cpu@01c20054 {
-                       #clock-cells = <0>;
---- a/arch/arm/boot/dts/sun5i-a13.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
-@@ -67,6 +67,13 @@
-                       clocks = <&osc24M>;
-               };
-+              pll4: pll4@01c20018 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-pll1-clk";
-+                      reg = <0x01c20018 0x4>;
-+                      clocks = <&osc24M>;
-+              };
-+
-               /* dummy is 200M */
-               cpu: cpu@01c20054 {
-                       #clock-cells = <0>;
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -62,6 +62,13 @@
-                       clocks = <&osc24M>;
-               };
-+              pll4: pll4@01c20018 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-pll1-clk";
-+                      reg = <0x01c20018 0x4>;
-+                      clocks = <&osc24M>;
-+              };
-+
-               /*
-                * This is a dummy clock, to be used as placeholder on
-                * other mux clocks when a specific parent clock is not
diff --git a/target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch b/target/linux/sunxi/patches-3.13/117-clk-sunxi-factors_clk_setup_update.patch
deleted file mode 100644 (file)
index 8feab5b..0000000
+++ /dev/null
@@ -1,74 +0,0 @@
-From 8a3282a0a185108e37e7a48437b58d956ff56f4a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:36 -0300
-Subject: [PATCH] clk: sunxi: make factors_clk_setup return the clock it
- registers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We will be needing this to register a factor clock as parent with leaf
-divisors on a single call.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Mike Turquette <mturquette@linaro.org>
----
- drivers/clk/sunxi/clk-sunxi.c | 15 ++++++++-------
- 1 file changed, 8 insertions(+), 7 deletions(-)
-
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -317,8 +317,8 @@ static const struct factors_data sun4i_a
-       .getter = sun4i_get_apb1_factors,
- };
--static void __init sunxi_factors_clk_setup(struct device_node *node,
--                                         struct factors_data *data)
-+static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
-+                                              const struct factors_data *data)
- {
-       struct clk *clk;
-       struct clk_factors *factors;
-@@ -340,14 +340,14 @@ static void __init sunxi_factors_clk_set
-       factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
-       if (!factors)
--              return;
-+              return NULL;
-       /* Add a gate if this factor clock can be gated */
-       if (data->enable) {
-               gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
-               if (!gate) {
-                       kfree(factors);
--                      return;
-+                      return NULL;
-               }
-               /* set up gate properties */
-@@ -363,7 +363,7 @@ static void __init sunxi_factors_clk_set
-               if (!mux) {
-                       kfree(factors);
-                       kfree(gate);
--                      return;
-+                      return NULL;
-               }
-               /* set up gate properties */
-@@ -384,13 +384,14 @@ static void __init sunxi_factors_clk_set
-                       parents, i,
-                       mux_hw, &clk_mux_ops,
-                       &factors->hw, &clk_factors_ops,
--                      gate_hw, &clk_gate_ops,
--                      i ? 0 : CLK_IS_ROOT);
-+                      gate_hw, &clk_gate_ops, 0);
-       if (!IS_ERR(clk)) {
-               of_clk_add_provider(node, of_clk_src_simple_get, clk);
-               clk_register_clkdev(clk, clk_name, NULL);
-       }
-+
-+      return clk;
- }
diff --git a/target/linux/sunxi/patches-3.13/118-clk-sunxi-add-pll5-pll6.patch b/target/linux/sunxi/patches-3.13/118-clk-sunxi-add-pll5-pll6.patch
deleted file mode 100644 (file)
index 6cff37f..0000000
+++ /dev/null
@@ -1,303 +0,0 @@
-From 655893a197a5134a371a5c6b579f1bbce03ab413 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:37 -0300
-Subject: [PATCH] clk: sunxi: add PLL5 and PLL6 support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit implements PLL5 and PLL6 support on the sunxi clock driver.
-These PLLs use a similar factor clock, but differ on their outputs.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Mike Turquette <mturquette@linaro.org>
----
- Documentation/devicetree/bindings/clock/sunxi.txt |   2 +
- drivers/clk/sunxi/clk-sunxi.c                     | 230 ++++++++++++++++++++++
- 2 files changed, 232 insertions(+)
-
---- a/Documentation/devicetree/bindings/clock/sunxi.txt
-+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
-@@ -9,6 +9,8 @@ Required properties:
-       "allwinner,sun4i-osc-clk" - for a gatable oscillator
-       "allwinner,sun4i-pll1-clk" - for the main PLL clock and PLL4
-       "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
-+      "allwinner,sun4i-pll5-clk" - for the PLL5 clock
-+      "allwinner,sun4i-pll6-clk" - for the PLL6 clock
-       "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock
-       "allwinner,sun4i-axi-clk" - for the AXI clock
-       "allwinner,sun4i-axi-gates-clk" - for the AXI gates
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -218,6 +218,40 @@ static void sun6i_a31_get_pll1_factors(u
- }
- /**
-+ * sun4i_get_pll5_factors() - calculates n, k factors for PLL5
-+ * PLL5 rate is calculated as follows
-+ * rate = parent_rate * n * (k + 1)
-+ * parent_rate is always 24Mhz
-+ */
-+
-+static void sun4i_get_pll5_factors(u32 *freq, u32 parent_rate,
-+                                 u8 *n, u8 *k, u8 *m, u8 *p)
-+{
-+      u8 div;
-+
-+      /* Normalize value to a parent_rate multiple (24M) */
-+      div = *freq / parent_rate;
-+      *freq = parent_rate * div;
-+
-+      /* we were called to round the frequency, we can now return */
-+      if (n == NULL)
-+              return;
-+
-+      if (div < 31)
-+              *k = 0;
-+      else if (div / 2 < 31)
-+              *k = 1;
-+      else if (div / 3 < 31)
-+              *k = 2;
-+      else
-+              *k = 3;
-+
-+      *n = DIV_ROUND_UP(div, (*k+1));
-+}
-+
-+
-+
-+/**
-  * sun4i_get_apb1_factors() - calculates m, p factors for APB1
-  * APB1 rate is calculated as follows
-  * rate = (parent_rate >> p) / (m + 1);
-@@ -293,6 +327,13 @@ static struct clk_factors_config sun6i_a
-       .mwidth = 2,
- };
-+static struct clk_factors_config sun4i_pll5_config = {
-+      .nshift = 8,
-+      .nwidth = 5,
-+      .kshift = 4,
-+      .kwidth = 2,
-+};
-+
- static struct clk_factors_config sun4i_apb1_config = {
-       .mshift = 0,
-       .mwidth = 5,
-@@ -312,6 +353,12 @@ static const struct factors_data sun6i_a
-       .getter = sun6i_a31_get_pll1_factors,
- };
-+static const struct factors_data sun4i_pll5_data __initconst = {
-+      .enable = 31,
-+      .table = &sun4i_pll5_config,
-+      .getter = sun4i_get_pll5_factors,
-+};
-+
- static const struct factors_data sun4i_apb1_data __initconst = {
-       .table = &sun4i_apb1_config,
-       .getter = sun4i_get_apb1_factors,
-@@ -627,6 +674,179 @@ static void __init sunxi_gates_clk_setup
-       of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
- }
-+
-+
-+/**
-+ * sunxi_divs_clk_setup() helper data
-+ */
-+
-+#define SUNXI_DIVS_MAX_QTY    2
-+#define SUNXI_DIVISOR_WIDTH   2
-+
-+struct divs_data {
-+      const struct factors_data *factors; /* data for the factor clock */
-+      struct {
-+              u8 fixed; /* is it a fixed divisor? if not... */
-+              struct clk_div_table *table; /* is it a table based divisor? */
-+              u8 shift; /* otherwise it's a normal divisor with this shift */
-+              u8 pow;   /* is it power-of-two based? */
-+              u8 gate;  /* is it independently gateable? */
-+      } div[SUNXI_DIVS_MAX_QTY];
-+};
-+
-+static struct clk_div_table pll6_sata_tbl[] = {
-+      { .val = 0, .div = 6, },
-+      { .val = 1, .div = 12, },
-+      { .val = 2, .div = 18, },
-+      { .val = 3, .div = 24, },
-+      { } /* sentinel */
-+};
-+
-+static const struct divs_data pll5_divs_data __initconst = {
-+      .factors = &sun4i_pll5_data,
-+      .div = {
-+              { .shift = 0, .pow = 0, }, /* M, DDR */
-+              { .shift = 16, .pow = 1, }, /* P, other */
-+      }
-+};
-+
-+static const struct divs_data pll6_divs_data __initconst = {
-+      .factors = &sun4i_pll5_data,
-+      .div = {
-+              { .shift = 0, .table = pll6_sata_tbl, .gate = 14 }, /* M, SATA */
-+              { .fixed = 2 }, /* P, other */
-+      }
-+};
-+
-+/**
-+ * sunxi_divs_clk_setup() - Setup function for leaf divisors on clocks
-+ *
-+ * These clocks look something like this
-+ *            ________________________
-+ *           |         ___divisor 1---|----> to consumer
-+ * parent >--|  pll___/___divisor 2---|----> to consumer
-+ *           |        \_______________|____> to consumer
-+ *           |________________________|
-+ */
-+
-+static void __init sunxi_divs_clk_setup(struct device_node *node,
-+                                      struct divs_data *data)
-+{
-+      struct clk_onecell_data *clk_data;
-+      const char *parent  = node->name;
-+      const char *clk_name;
-+      struct clk **clks, *pclk;
-+      struct clk_hw *gate_hw, *rate_hw;
-+      const struct clk_ops *rate_ops;
-+      struct clk_gate *gate = NULL;
-+      struct clk_fixed_factor *fix_factor;
-+      struct clk_divider *divider;
-+      void *reg;
-+      int i = 0;
-+      int flags, clkflags;
-+
-+      /* Set up factor clock that we will be dividing */
-+      pclk = sunxi_factors_clk_setup(node, data->factors);
-+
-+      reg = of_iomap(node, 0);
-+
-+      clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
-+      if (!clk_data)
-+              return;
-+
-+      clks = kzalloc(SUNXI_DIVS_MAX_QTY * sizeof(struct clk *), GFP_KERNEL);
-+      if (!clks)
-+              goto free_clkdata;
-+
-+      clk_data->clks = clks;
-+
-+      /* It's not a good idea to have automatic reparenting changing
-+       * our RAM clock! */
-+      clkflags = !strcmp("pll5", parent) ? 0 : CLK_SET_RATE_PARENT;
-+
-+      for (i = 0; i < SUNXI_DIVS_MAX_QTY; i++) {
-+              if (of_property_read_string_index(node, "clock-output-names",
-+                                                i, &clk_name) != 0)
-+                      break;
-+
-+              gate_hw = NULL;
-+              rate_hw = NULL;
-+              rate_ops = NULL;
-+
-+              /* If this leaf clock can be gated, create a gate */
-+              if (data->div[i].gate) {
-+                      gate = kzalloc(sizeof(*gate), GFP_KERNEL);
-+                      if (!gate)
-+                              goto free_clks;
-+
-+                      gate->reg = reg;
-+                      gate->bit_idx = data->div[i].gate;
-+                      gate->lock = &clk_lock;
-+
-+                      gate_hw = &gate->hw;
-+              }
-+
-+              /* Leaves can be fixed or configurable divisors */
-+              if (data->div[i].fixed) {
-+                      fix_factor = kzalloc(sizeof(*fix_factor), GFP_KERNEL);
-+                      if (!fix_factor)
-+                              goto free_gate;
-+
-+                      fix_factor->mult = 1;
-+                      fix_factor->div = data->div[i].fixed;
-+
-+                      rate_hw = &fix_factor->hw;
-+                      rate_ops = &clk_fixed_factor_ops;
-+              } else {
-+                      divider = kzalloc(sizeof(*divider), GFP_KERNEL);
-+                      if (!divider)
-+                              goto free_gate;
-+
-+                      flags = data->div[i].pow ? CLK_DIVIDER_POWER_OF_TWO : 0;
-+
-+                      divider->reg = reg;
-+                      divider->shift = data->div[i].shift;
-+                      divider->width = SUNXI_DIVISOR_WIDTH;
-+                      divider->flags = flags;
-+                      divider->lock = &clk_lock;
-+                      divider->table = data->div[i].table;
-+
-+                      rate_hw = &divider->hw;
-+                      rate_ops = &clk_divider_ops;
-+              }
-+
-+              /* Wrap the (potential) gate and the divisor on a composite
-+               * clock to unify them */
-+              clks[i] = clk_register_composite(NULL, clk_name, &parent, 1,
-+                                               NULL, NULL,
-+                                               rate_hw, rate_ops,
-+                                               gate_hw, &clk_gate_ops,
-+                                               clkflags);
-+
-+              WARN_ON(IS_ERR(clk_data->clks[i]));
-+              clk_register_clkdev(clks[i], clk_name, NULL);
-+      }
-+
-+      /* The last clock available on the getter is the parent */
-+      clks[i++] = pclk;
-+
-+      /* Adjust to the real max */
-+      clk_data->clk_num = i;
-+
-+      of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
-+
-+      return;
-+
-+free_gate:
-+      kfree(gate);
-+free_clks:
-+      kfree(clks);
-+free_clkdata:
-+      kfree(clk_data);
-+}
-+
-+
-+
- /* Matches for factors clocks */
- static const struct of_device_id clk_factors_match[] __initconst = {
-       {.compatible = "allwinner,sun4i-pll1-clk", .data = &sun4i_pll1_data,},
-@@ -644,6 +864,13 @@ static const struct of_device_id clk_div
-       {}
- };
-+/* Matches for divided outputs */
-+static const struct of_device_id clk_divs_match[] __initconst = {
-+      {.compatible = "allwinner,sun4i-pll5-clk", .data = &pll5_divs_data,},
-+      {.compatible = "allwinner,sun4i-pll6-clk", .data = &pll6_divs_data,},
-+      {}
-+};
-+
- /* Matches for mux clocks */
- static const struct of_device_id clk_mux_match[] __initconst = {
-       {.compatible = "allwinner,sun4i-cpu-clk", .data = &sun4i_cpu_mux_data,},
-@@ -721,6 +948,9 @@ static void __init sunxi_init_clocks(str
-       /* Register divider clocks */
-       of_sunxi_table_clock_setup(clk_div_match, sunxi_divider_clk_setup);
-+      /* Register divided output clocks */
-+      of_sunxi_table_clock_setup(clk_divs_match, sunxi_divs_clk_setup);
-+
-       /* Register mux clocks */
-       of_sunxi_table_clock_setup(clk_mux_match, sunxi_mux_clk_setup);
diff --git a/target/linux/sunxi/patches-3.13/119-dt-sunxi-add-pll5-pll6.patch b/target/linux/sunxi/patches-3.13/119-dt-sunxi-add-pll5-pll6.patch
deleted file mode 100644 (file)
index db0020e..0000000
+++ /dev/null
@@ -1,187 +0,0 @@
-From 6d3ca59232090bff1b5e1abfd3417a3859e47425 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:38 -0300
-Subject: [PATCH] ARM: sunxi: add PLL5 and PLL6 support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit adds PLL5 and PLL6 nodes to the sun4i, sun5i and sun7i
-device trees.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun4i-a10.dtsi  | 19 +++++++++++++++++--
- arch/arm/boot/dts/sun5i-a10s.dtsi | 19 +++++++++++++++++--
- arch/arm/boot/dts/sun5i-a13.dtsi  | 19 +++++++++++++++++--
- arch/arm/boot/dts/sun7i-a20.dtsi  | 28 ++++++++++++++++------------
- 4 files changed, 67 insertions(+), 18 deletions(-)
-
---- a/arch/arm/boot/dts/sun4i-a10.dtsi
-+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
-@@ -73,6 +73,22 @@
-                       clocks = <&osc24M>;
-               };
-+              pll5: pll5@01c20020 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll5-clk";
-+                      reg = <0x01c20020 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll5_ddr", "pll5_other";
-+              };
-+
-+              pll6: pll6@01c20028 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll6-clk";
-+                      reg = <0x01c20028 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll6_sata", "pll6_other", "pll6";
-+              };
-+
-               /* dummy is 200M */
-               cpu: cpu@01c20054 {
-                       #clock-cells = <0>;
-@@ -138,12 +154,11 @@
-                               "apb0_ir1", "apb0_keypad";
-               };
--              /* dummy is pll62 */
-               apb1_mux: apb1_mux@01c20058 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
--                      clocks = <&osc24M>, <&dummy>, <&osc32k>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-               };
-               apb1: apb1@01c20058 {
---- a/arch/arm/boot/dts/sun5i-a10s.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
-@@ -70,6 +70,22 @@
-                       clocks = <&osc24M>;
-               };
-+              pll5: pll5@01c20020 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll5-clk";
-+                      reg = <0x01c20020 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll5_ddr", "pll5_other";
-+              };
-+
-+              pll6: pll6@01c20028 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll6-clk";
-+                      reg = <0x01c20028 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll6_sata", "pll6_other", "pll6";
-+              };
-+
-               /* dummy is 200M */
-               cpu: cpu@01c20054 {
-                       #clock-cells = <0>;
-@@ -130,12 +146,11 @@
-                               "apb0_ir", "apb0_keypad";
-               };
--              /* dummy is pll62 */
-               apb1_mux: apb1_mux@01c20058 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
--                      clocks = <&osc24M>, <&dummy>, <&osc32k>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-               };
-               apb1: apb1@01c20058 {
---- a/arch/arm/boot/dts/sun5i-a13.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
-@@ -74,6 +74,22 @@
-                       clocks = <&osc24M>;
-               };
-+              pll5: pll5@01c20020 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll5-clk";
-+                      reg = <0x01c20020 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll5_ddr", "pll5_other";
-+              };
-+
-+              pll6: pll6@01c20028 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll6-clk";
-+                      reg = <0x01c20028 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll6_sata", "pll6_other", "pll6";
-+              };
-+
-               /* dummy is 200M */
-               cpu: cpu@01c20054 {
-                       #clock-cells = <0>;
-@@ -132,12 +148,11 @@
-                       clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
-               };
--              /* dummy is pll6 */
-               apb1_mux: apb1_mux@01c20058 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
--                      clocks = <&osc24M>, <&dummy>, <&osc32k>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-               };
-               apb1: apb1@01c20058 {
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -69,23 +69,27 @@
-                       clocks = <&osc24M>;
-               };
--              /*
--               * This is a dummy clock, to be used as placeholder on
--               * other mux clocks when a specific parent clock is not
--               * yet implemented. It should be dropped when the driver
--               * is complete.
--               */
--              pll6: pll6 {
--                      #clock-cells = <0>;
--                      compatible = "fixed-clock";
--                      clock-frequency = <0>;
-+              pll5: pll5@01c20020 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll5-clk";
-+                      reg = <0x01c20020 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll5_ddr", "pll5_other";
-+              };
-+
-+              pll6: pll6@01c20028 {
-+                      #clock-cells = <1>;
-+                      compatible = "allwinner,sun4i-pll6-clk";
-+                      reg = <0x01c20028 0x4>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "pll6_sata", "pll6_other", "pll6";
-               };
-               cpu: cpu@01c20054 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-cpu-clk";
-                       reg = <0x01c20054 0x4>;
--                      clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll6>;
-+                      clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll6 1>;
-               };
-               axi: axi@01c20054 {
-@@ -144,7 +148,7 @@
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
--                      clocks = <&osc24M>, <&pll6>, <&osc32k>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-               };
-               apb1: apb1@01c20058 {
diff --git a/target/linux/sunxi/patches-3.13/120-clk-sunxi-mod0.patch b/target/linux/sunxi/patches-3.13/120-clk-sunxi-mod0.patch
deleted file mode 100644 (file)
index 8432c3c..0000000
+++ /dev/null
@@ -1,122 +0,0 @@
-From bdc913d1ef5143a8728ae414fcb90f9ed87a58da Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:39 -0300
-Subject: [PATCH] clk: sunxi: mod0 support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit implements support for the "module 0" type of clocks, as
-used by MMC, IR, NAND, SATA and other components.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Mike Turquette <mturquette@linaro.org>
----
- Documentation/devicetree/bindings/clock/sunxi.txt |  5 +-
- drivers/clk/sunxi/clk-sunxi.c                     | 57 +++++++++++++++++++++++
- 2 files changed, 61 insertions(+), 1 deletion(-)
-
---- a/Documentation/devicetree/bindings/clock/sunxi.txt
-+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
-@@ -35,10 +35,13 @@ Required properties:
-       "allwinner,sun7i-a20-apb1-gates-clk" - for the APB1 gates on A20
-       "allwinner,sun6i-a31-apb2-div-clk" - for the APB2 gates on A31
-       "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
-+      "allwinner,sun4i-mod0-clk" - for the module 0 family of clocks
- Required properties for all clocks:
- - reg : shall be the control register address for the clock.
--- clocks : shall be the input parent clock(s) phandle for the clock
-+- clocks : shall be the input parent clock(s) phandle for the clock. For
-+      multiplexed clocks, the list order must match the hardware
-+      programming order.
- - #clock-cells : from common clock binding; shall be set to 0 except for
-       "allwinner,*-gates-clk" where it shall be set to 1
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -295,6 +295,47 @@ static void sun4i_get_apb1_factors(u32 *
- /**
-+ * sun4i_get_mod0_factors() - calculates m, n factors for MOD0-style clocks
-+ * MMC rate is calculated as follows
-+ * rate = (parent_rate >> p) / (m + 1);
-+ */
-+
-+static void sun4i_get_mod0_factors(u32 *freq, u32 parent_rate,
-+                                 u8 *n, u8 *k, u8 *m, u8 *p)
-+{
-+      u8 div, calcm, calcp;
-+
-+      /* These clocks can only divide, so we will never be able to achieve
-+       * frequencies higher than the parent frequency */
-+      if (*freq > parent_rate)
-+              *freq = parent_rate;
-+
-+      div = parent_rate / *freq;
-+
-+      if (div < 16)
-+              calcp = 0;
-+      else if (div / 2 < 16)
-+              calcp = 1;
-+      else if (div / 4 < 16)
-+              calcp = 2;
-+      else
-+              calcp = 3;
-+
-+      calcm = DIV_ROUND_UP(div, 1 << calcp);
-+
-+      *freq = (parent_rate >> calcp) / calcm;
-+
-+      /* we were called to round the frequency, we can now return */
-+      if (n == NULL)
-+              return;
-+
-+      *m = calcm - 1;
-+      *p = calcp;
-+}
-+
-+
-+
-+/**
-  * sunxi_factors_clk_setup() - Setup function for factor clocks
-  */
-@@ -341,6 +382,14 @@ static struct clk_factors_config sun4i_a
-       .pwidth = 2,
- };
-+/* user manual says "n" but it's really "p" */
-+static struct clk_factors_config sun4i_mod0_config = {
-+      .mshift = 0,
-+      .mwidth = 4,
-+      .pshift = 16,
-+      .pwidth = 2,
-+};
-+
- static const struct factors_data sun4i_pll1_data __initconst = {
-       .enable = 31,
-       .table = &sun4i_pll1_config,
-@@ -364,6 +413,13 @@ static const struct factors_data sun4i_a
-       .getter = sun4i_get_apb1_factors,
- };
-+static const struct factors_data sun4i_mod0_data __initconst = {
-+      .enable = 31,
-+      .mux = 24,
-+      .table = &sun4i_mod0_config,
-+      .getter = sun4i_get_mod0_factors,
-+};
-+
- static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
-                                               const struct factors_data *data)
- {
-@@ -852,6 +908,7 @@ static const struct of_device_id clk_fac
-       {.compatible = "allwinner,sun4i-pll1-clk", .data = &sun4i_pll1_data,},
-       {.compatible = "allwinner,sun6i-a31-pll1-clk", .data = &sun6i_a31_pll1_data,},
-       {.compatible = "allwinner,sun4i-apb1-clk", .data = &sun4i_apb1_data,},
-+      {.compatible = "allwinner,sun4i-mod0-clk", .data = &sun4i_mod0_data,},
-       {}
- };
diff --git a/target/linux/sunxi/patches-3.13/121-clk-sunxi-better-factor-dt-nodes.patch b/target/linux/sunxi/patches-3.13/121-clk-sunxi-better-factor-dt-nodes.patch
deleted file mode 100644 (file)
index 5f4d738..0000000
+++ /dev/null
@@ -1,47 +0,0 @@
-From 7d47b009bf287bf5e0817f47c40e32b7ec0e8151 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:40 -0300
-Subject: [PATCH] clk: sunxi: support better factor DT nodes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The DT nodes should look like
-
-    abc_clk: clk@deadbeef {
-        ...
-        clock-output-names = "abc";
-    }
-
-But our old DT nodes look like
-
-    abc: abc@deadbeef {
-        ...
-    }
-
-So, let's support both formats, until we can transition everything
-to the new, correct one.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
----
- drivers/clk/sunxi/clk-sunxi.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
---- a/drivers/clk/sunxi/clk-sunxi.c
-+++ b/drivers/clk/sunxi/clk-sunxi.c
-@@ -441,6 +441,15 @@ static struct clk * __init sunxi_factors
-              (parents[i] = of_clk_get_parent_name(node, i)) != NULL)
-               i++;
-+      /* Nodes should be providing the name via clock-output-names
-+       * but originally our dts didn't, and so we used node->name.
-+       * The new, better nodes look like clk@deadbeef, so we pull the
-+       * name just in this case */
-+      if (!strcmp("clk", clk_name)) {
-+              of_property_read_string_index(node, "clock-output-names",
-+                                            0, &clk_name);
-+      }
-+
-       factors = kzalloc(sizeof(struct clk_factors), GFP_KERNEL);
-       if (!factors)
-               return NULL;
diff --git a/target/linux/sunxi/patches-3.13/122-1-dt-sun4i-add-mod0.patch b/target/linux/sunxi/patches-3.13/122-1-dt-sun4i-add-mod0.patch
deleted file mode 100644 (file)
index f0112bb..0000000
+++ /dev/null
@@ -1,145 +0,0 @@
-From dda274b6f95902b619af1fb14f26e231bb420371 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:41 -0300
-Subject: [PATCH] ARM: sun4i: dt: mod0 clocks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit adds all the mod0 clocks present on sun4i to its device tree
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun4i-a10.dtsi | 120 +++++++++++++++++++++++++++++++++++++++
- 1 file changed, 120 insertions(+)
-
---- a/arch/arm/boot/dts/sun4i-a10.dtsi
-+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
-@@ -180,6 +180,126 @@
-                               "apb1_uart4", "apb1_uart5", "apb1_uart6",
-                               "apb1_uart7";
-               };
-+
-+              nand_clk: clk@01c20080 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20080 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "nand";
-+              };
-+
-+              ms_clk: clk@01c20084 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20084 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ms";
-+              };
-+
-+              mmc0_clk: clk@01c20088 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20088 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc0";
-+              };
-+
-+              mmc1_clk: clk@01c2008c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2008c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc1";
-+              };
-+
-+              mmc2_clk: clk@01c20090 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20090 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc2";
-+              };
-+
-+              mmc3_clk: clk@01c20094 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20094 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc3";
-+              };
-+
-+              ts_clk: clk@01c20098 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20098 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ts";
-+              };
-+
-+              ss_clk: clk@01c2009c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2009c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ss";
-+              };
-+
-+              spi0_clk: clk@01c200a0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi0";
-+              };
-+
-+              spi1_clk: clk@01c200a4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi1";
-+              };
-+
-+              spi2_clk: clk@01c200a8 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a8 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi2";
-+              };
-+
-+              pata_clk: clk@01c200ac {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200ac 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "pata";
-+              };
-+
-+              ir0_clk: clk@01c200b0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200b0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ir0";
-+              };
-+
-+              ir1_clk: clk@01c200b4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200b4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ir1";
-+              };
-+
-+              spi3_clk: clk@01c200d4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200d4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi3";
-+              };
-       };
-       soc@01c00000 {
diff --git a/target/linux/sunxi/patches-3.13/122-2-dt-sun5i-add-mod0.patch b/target/linux/sunxi/patches-3.13/122-2-dt-sun5i-add-mod0.patch
deleted file mode 100644 (file)
index 83a6217..0000000
+++ /dev/null
@@ -1,213 +0,0 @@
-From 9a8d3f21c94099a2bcd79ac1684cc8020fd98df2 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:42 -0300
-Subject: [PATCH] ARM: sun5i: dt: mod0 clocks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit adds all the mod0 clocks available on A10 and A13. The list
-has been constructed by looking at the Allwinner code release for A10S
-and A13.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun5i-a10s.dtsi | 88 +++++++++++++++++++++++++++++++++++++++
- arch/arm/boot/dts/sun5i-a13.dtsi  | 88 +++++++++++++++++++++++++++++++++++++++
- 2 files changed, 176 insertions(+)
-
---- a/arch/arm/boot/dts/sun5i-a10s.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
-@@ -169,6 +169,94 @@
-                               "apb1_i2c2", "apb1_uart0", "apb1_uart1",
-                               "apb1_uart2", "apb1_uart3";
-               };
-+
-+              nand_clk: clk@01c20080 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20080 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "nand";
-+              };
-+
-+              ms_clk: clk@01c20084 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20084 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ms";
-+              };
-+
-+              mmc0_clk: clk@01c20088 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20088 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc0";
-+              };
-+
-+              mmc1_clk: clk@01c2008c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2008c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc1";
-+              };
-+
-+              mmc2_clk: clk@01c20090 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20090 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc2";
-+              };
-+
-+              ts_clk: clk@01c20098 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20098 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ts";
-+              };
-+
-+              ss_clk: clk@01c2009c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2009c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ss";
-+              };
-+
-+              spi0_clk: clk@01c200a0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi0";
-+              };
-+
-+              spi1_clk: clk@01c200a4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi1";
-+              };
-+
-+              spi2_clk: clk@01c200a8 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a8 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi2";
-+              };
-+
-+              ir0_clk: clk@01c200b0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200b0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ir0";
-+              };
-       };
-       soc@01c00000 {
---- a/arch/arm/boot/dts/sun5i-a13.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
-@@ -170,6 +170,94 @@
-                       clock-output-names = "apb1_i2c0", "apb1_i2c1",
-                               "apb1_i2c2", "apb1_uart1", "apb1_uart3";
-               };
-+
-+              nand_clk: clk@01c20080 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20080 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "nand";
-+              };
-+
-+              ms_clk: clk@01c20084 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20084 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ms";
-+              };
-+
-+              mmc0_clk: clk@01c20088 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20088 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc0";
-+              };
-+
-+              mmc1_clk: clk@01c2008c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2008c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc1";
-+              };
-+
-+              mmc2_clk: clk@01c20090 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20090 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc2";
-+              };
-+
-+              ts_clk: clk@01c20098 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20098 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ts";
-+              };
-+
-+              ss_clk: clk@01c2009c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2009c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ss";
-+              };
-+
-+              spi0_clk: clk@01c200a0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi0";
-+              };
-+
-+              spi1_clk: clk@01c200a4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi1";
-+              };
-+
-+              spi2_clk: clk@01c200a8 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a8 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi2";
-+              };
-+
-+              ir0_clk: clk@01c200b0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200b0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ir0";
-+              };
-       };
-       soc@01c00000 {
diff --git a/target/linux/sunxi/patches-3.13/122-3-dt-sun7i-add-mod0.patch b/target/linux/sunxi/patches-3.13/122-3-dt-sun7i-add-mod0.patch
deleted file mode 100644 (file)
index bcfedc0..0000000
+++ /dev/null
@@ -1,146 +0,0 @@
-From d7904e075e3378bec09333b6a3247b3146b3dd91 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:43 -0300
-Subject: [PATCH] ARM: sun7i: dt: mod0 clocks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit adds all the mod0 clocks available on A20 to its device
-tree. This list was created by looking at AW's code release.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 120 +++++++++++++++++++++++++++++++++++++++
- 1 file changed, 120 insertions(+)
-
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -170,6 +170,126 @@
-                               "apb1_uart2", "apb1_uart3", "apb1_uart4",
-                               "apb1_uart5", "apb1_uart6", "apb1_uart7";
-               };
-+
-+              nand_clk: clk@01c20080 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20080 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "nand";
-+              };
-+
-+              ms_clk: clk@01c20084 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20084 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ms";
-+              };
-+
-+              mmc0_clk: clk@01c20088 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20088 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc0";
-+              };
-+
-+              mmc1_clk: clk@01c2008c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2008c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc1";
-+              };
-+
-+              mmc2_clk: clk@01c20090 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20090 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc2";
-+              };
-+
-+              mmc3_clk: clk@01c20094 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20094 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mmc3";
-+              };
-+
-+              ts_clk: clk@01c20098 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c20098 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ts";
-+              };
-+
-+              ss_clk: clk@01c2009c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2009c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ss";
-+              };
-+
-+              spi0_clk: clk@01c200a0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi0";
-+              };
-+
-+              spi1_clk: clk@01c200a4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi1";
-+              };
-+
-+              spi2_clk: clk@01c200a8 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200a8 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi2";
-+              };
-+
-+              pata_clk: clk@01c200ac {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200ac 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "pata";
-+              };
-+
-+              ir0_clk: clk@01c200b0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200b0 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ir0";
-+              };
-+
-+              ir1_clk: clk@01c200b4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200b4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "ir1";
-+              };
-+
-+              spi3_clk: clk@01c200d4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c200d4 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "spi3";
-+              };
-       };
-       soc@01c00000 {
diff --git a/target/linux/sunxi/patches-3.13/123-clk-sunxi-automatic-reparenting.patch b/target/linux/sunxi/patches-3.13/123-clk-sunxi-automatic-reparenting.patch
deleted file mode 100644 (file)
index cd635ed..0000000
+++ /dev/null
@@ -1,68 +0,0 @@
-From 04b5b3f9c83c0c0b472c4704d83ec7f56a485a21 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Thu, 5 Sep 2013 19:52:41 -0300
-Subject: [PATCH] clk: sunxi: factors: automatic reparenting support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This commit implements .determine_rate, so that our factor clocks can be
-reparented when needed.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
----
- drivers/clk/sunxi/clk-factors.c | 36 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 36 insertions(+)
-
---- a/drivers/clk/sunxi/clk-factors.c
-+++ b/drivers/clk/sunxi/clk-factors.c
-@@ -77,6 +77,41 @@ static long clk_factors_round_rate(struc
-       return rate;
- }
-+static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate,
-+                                     unsigned long *best_parent_rate,
-+                                     struct clk **best_parent_p)
-+{
-+      struct clk *clk = hw->clk, *parent, *best_parent = NULL;
-+      int i, num_parents;
-+      unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0;
-+
-+      /* find the parent that can help provide the fastest rate <= rate */
-+      num_parents = __clk_get_num_parents(clk);
-+      for (i = 0; i < num_parents; i++) {
-+              parent = clk_get_parent_by_index(clk, i);
-+              if (!parent)
-+                      continue;
-+              if (__clk_get_flags(clk) & CLK_SET_RATE_PARENT)
-+                      parent_rate = __clk_round_rate(parent, rate);
-+              else
-+                      parent_rate = __clk_get_rate(parent);
-+
-+              child_rate = clk_factors_round_rate(hw, rate, &parent_rate);
-+
-+              if (child_rate <= rate && child_rate > best_child_rate) {
-+                      best_parent = parent;
-+                      best = parent_rate;
-+                      best_child_rate = child_rate;
-+              }
-+      }
-+
-+      if (best_parent)
-+              *best_parent_p = best_parent;
-+      *best_parent_rate = best;
-+
-+      return best_child_rate;
-+}
-+
- static int clk_factors_set_rate(struct clk_hw *hw, unsigned long rate,
-                               unsigned long parent_rate)
- {
-@@ -113,6 +148,7 @@ static int clk_factors_set_rate(struct c
- }
- const struct clk_ops clk_factors_ops = {
-+      .determine_rate = clk_factors_determine_rate,
-       .recalc_rate = clk_factors_recalc_rate,
-       .round_rate = clk_factors_round_rate,
-       .set_rate = clk_factors_set_rate,
diff --git a/target/linux/sunxi/patches-3.13/125-dt-sun6i-add-nodes-for-additional-cores.patch b/target/linux/sunxi/patches-3.13/125-dt-sun6i-add-nodes-for-additional-cores.patch
deleted file mode 100644 (file)
index 8d0e23a..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From d3861805e84e1b54073e20dc499b9380b38bb7ab Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Sun, 3 Nov 2013 10:30:12 +0100
-Subject: [PATCH] ARM: sun6i: dt: Add IP needed to bring up the additional
- cores
-
-Add the PRCM and CPU configuration units needed for SMP in the A31 DTSI.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/arch/arm/boot/dts/sun6i-a31.dtsi
-+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
-@@ -322,5 +322,15 @@
-                       #interrupt-cells = <3>;
-                       interrupts = <1 9 0xf04>;
-               };
-+
-+              cpucfg@01f01c00 {
-+                      compatible = "allwinner,sun6i-a31-cpuconfig";
-+                      reg = <0x01f01c00 0x300>;
-+              };
-+
-+              prcm@01f01c00 {
-+                      compatible = "allwinner,sun6i-a31-prcm";
-+                      reg = <0x01f01400 0x200>;
-+              };
-       };
- };
diff --git a/target/linux/sunxi/patches-3.13/126-dt-sun7i-add-external-clock-outputs.patch b/target/linux/sunxi/patches-3.13/126-dt-sun7i-add-external-clock-outputs.patch
deleted file mode 100644 (file)
index 84ca843..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-From 0aff0370cbffeadc14456556b904c80e30b3717e Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Wed, 1 Jan 2014 10:30:48 +0800
-Subject: [PATCH] ARM: dts: sun7i: external clock outputs
-
-This commit adds the two external clock outputs available on A20 to
-its device tree. A dummy fixed factor clock is also added to serve as
-the first input of the clock outputs, which according to AW's A20 user
-manual, is the 24MHz oscillator divided by 750.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
-index edad6f1..0d54998 100644
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -303,6 +303,34 @@
-                       clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
-                       clock-output-names = "mbus";
-               };
-+
-+              /*
-+               * Dummy clock used by output clocks
-+               */
-+              osc24M_32k: clk@1 {
-+                      #clock-cells = <0>;
-+                      compatible = "fixed-factor-clock";
-+                      clock-div = <750>;
-+                      clock-mult = <1>;
-+                      clocks = <&osc24M>;
-+                      clock-output-names = "osc24M_32k";
-+              };
-+
-+              clk_out_a: clk@01c201f0 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun7i-a20-out-clk";
-+                      reg = <0x01c201f0 0x4>;
-+                      clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
-+                      clock-output-names = "clk_out_a";
-+              };
-+
-+              clk_out_b: clk@01c201f4 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun7i-a20-out-clk";
-+                      reg = <0x01c201f4 0x4>;
-+                      clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
-+                      clock-output-names = "clk_out_b";
-+              };
-       };
-       soc@01c00000 {
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/127-1-dt-sun4i-rename-clock-node-names.patch b/target/linux/sunxi/patches-3.13/127-1-dt-sun4i-rename-clock-node-names.patch
deleted file mode 100644 (file)
index dfcdba4..0000000
+++ /dev/null
@@ -1,139 +0,0 @@
-From dfb12c0c35b6cca5e55f40870b65af87988adb3e Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 3 Feb 2014 09:51:41 +0800
-Subject: [PATCH] ARM: dts: sun4i: rename clock node names to clk@N
-
-Device tree naming conventions state that node names should match
-node function. Change fully functioning clock nodes to match and
-add clock-output-names to all sunxi clock nodes.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun4i-a10.dtsi | 30 ++++++++++++++++++++----------
- 1 file changed, 20 insertions(+), 10 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
-index 28273f9..26cf191 100644
---- a/arch/arm/boot/dts/sun4i-a10.dtsi
-+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
-@@ -58,34 +58,38 @@
-                       clock-frequency = <0>;
-               };
--              osc24M: osc24M@01c20050 {
-+              osc24M: clk@01c20050 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-osc-clk";
-                       reg = <0x01c20050 0x4>;
-                       clock-frequency = <24000000>;
-+                      clock-output-names = "osc24M";
-               };
--              osc32k: osc32k {
-+              osc32k: clk@0 {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <32768>;
-+                      clock-output-names = "osc32k";
-               };
--              pll1: pll1@01c20000 {
-+              pll1: clk@01c20000 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20000 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll1";
-               };
--              pll4: pll4@01c20018 {
-+              pll4: clk@01c20018 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20018 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll4";
-               };
--              pll5: pll5@01c20020 {
-+              pll5: clk@01c20020 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll5-clk";
-                       reg = <0x01c20020 0x4>;
-@@ -93,7 +97,7 @@
-                       clock-output-names = "pll5_ddr", "pll5_other";
-               };
--              pll6: pll6@01c20028 {
-+              pll6: clk@01c20028 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll6-clk";
-                       reg = <0x01c20028 0x4>;
-@@ -107,6 +111,7 @@
-                       compatible = "allwinner,sun4i-cpu-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>;
-+                      clock-output-names = "cpu";
-               };
-               axi: axi@01c20054 {
-@@ -114,9 +119,10 @@
-                       compatible = "allwinner,sun4i-axi-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&cpu>;
-+                      clock-output-names = "axi";
-               };
--              axi_gates: axi_gates@01c2005c {
-+              axi_gates: clk@01c2005c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-axi-gates-clk";
-                       reg = <0x01c2005c 0x4>;
-@@ -129,9 +135,10 @@
-                       compatible = "allwinner,sun4i-ahb-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&axi>;
-+                      clock-output-names = "ahb";
-               };
--              ahb_gates: ahb_gates@01c20060 {
-+              ahb_gates: clk@01c20060 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-ahb-gates-clk";
-                       reg = <0x01c20060 0x8>;
-@@ -154,9 +161,10 @@
-                       compatible = "allwinner,sun4i-apb0-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&ahb>;
-+                      clock-output-names = "apb0";
-               };
--              apb0_gates: apb0_gates@01c20068 {
-+              apb0_gates: clk@01c20068 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-apb0-gates-clk";
-                       reg = <0x01c20068 0x4>;
-@@ -171,6 +179,7 @@
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-+                      clock-output-names = "apb1_mux";
-               };
-               apb1: apb1@01c20058 {
-@@ -178,9 +187,10 @@
-                       compatible = "allwinner,sun4i-apb1-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&apb1_mux>;
-+                      clock-output-names = "apb1";
-               };
--              apb1_gates: apb1_gates@01c2006c {
-+              apb1_gates: clk@01c2006c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-apb1-gates-clk";
-                       reg = <0x01c2006c 0x4>;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/127-2-dt-sun5i-rename-clock-node-names.patch b/target/linux/sunxi/patches-3.13/127-2-dt-sun5i-rename-clock-node-names.patch
deleted file mode 100644 (file)
index 1678a8b..0000000
+++ /dev/null
@@ -1,261 +0,0 @@
-From 3dce8324949eaa1ab4b750e8422ce78ddceb7aa4 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 3 Feb 2014 09:51:42 +0800
-Subject: [PATCH] ARM: dts: sun5i: rename clock node names to clk@N
-
-Device tree naming conventions state that node names should match
-node function. Change fully functioning clock nodes to match and
-add clock-output-names to all sunxi clock nodes.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun5i-a10s.dtsi | 30 ++++++++++++++++++++----------
- arch/arm/boot/dts/sun5i-a13.dtsi  | 30 ++++++++++++++++++++----------
- 2 files changed, 40 insertions(+), 20 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
-index 2318082..b114be7 100644
---- a/arch/arm/boot/dts/sun5i-a10s.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
-@@ -51,34 +51,38 @@
-                       clock-frequency = <0>;
-               };
--              osc24M: osc24M@01c20050 {
-+              osc24M: clk@01c20050 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-osc-clk";
-                       reg = <0x01c20050 0x4>;
-                       clock-frequency = <24000000>;
-+                      clock-output-names = "osc24M";
-               };
--              osc32k: osc32k {
-+              osc32k: clk@0 {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <32768>;
-+                      clock-output-names = "osc32k";
-               };
--              pll1: pll1@01c20000 {
-+              pll1: clk@01c20000 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20000 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll1";
-               };
--              pll4: pll4@01c20018 {
-+              pll4: clk@01c20018 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20018 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll4";
-               };
--              pll5: pll5@01c20020 {
-+              pll5: clk@01c20020 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll5-clk";
-                       reg = <0x01c20020 0x4>;
-@@ -86,7 +90,7 @@
-                       clock-output-names = "pll5_ddr", "pll5_other";
-               };
--              pll6: pll6@01c20028 {
-+              pll6: clk@01c20028 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll6-clk";
-                       reg = <0x01c20028 0x4>;
-@@ -100,6 +104,7 @@
-                       compatible = "allwinner,sun4i-cpu-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>;
-+                      clock-output-names = "cpu";
-               };
-               axi: axi@01c20054 {
-@@ -107,9 +112,10 @@
-                       compatible = "allwinner,sun4i-axi-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&cpu>;
-+                      clock-output-names = "axi";
-               };
--              axi_gates: axi_gates@01c2005c {
-+              axi_gates: clk@01c2005c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-axi-gates-clk";
-                       reg = <0x01c2005c 0x4>;
-@@ -122,9 +128,10 @@
-                       compatible = "allwinner,sun4i-ahb-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&axi>;
-+                      clock-output-names = "ahb";
-               };
--              ahb_gates: ahb_gates@01c20060 {
-+              ahb_gates: clk@01c20060 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
-                       reg = <0x01c20060 0x8>;
-@@ -143,9 +150,10 @@
-                       compatible = "allwinner,sun4i-apb0-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&ahb>;
-+                      clock-output-names = "apb0";
-               };
--              apb0_gates: apb0_gates@01c20068 {
-+              apb0_gates: clk@01c20068 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
-                       reg = <0x01c20068 0x4>;
-@@ -159,6 +167,7 @@
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-+                      clock-output-names = "apb1_mux";
-               };
-               apb1: apb1@01c20058 {
-@@ -166,9 +175,10 @@
-                       compatible = "allwinner,sun4i-apb1-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&apb1_mux>;
-+                      clock-output-names = "apb1";
-               };
--              apb1_gates: apb1_gates@01c2006c {
-+              apb1_gates: clk@01c2006c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
-                       reg = <0x01c2006c 0x4>;
-diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
-index 6de40b6..5c121fc 100644
---- a/arch/arm/boot/dts/sun5i-a13.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
-@@ -52,34 +52,38 @@
-                       clock-frequency = <0>;
-               };
--              osc24M: osc24M@01c20050 {
-+              osc24M: clk@01c20050 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-osc-clk";
-                       reg = <0x01c20050 0x4>;
-                       clock-frequency = <24000000>;
-+                      clock-output-names = "osc24M";
-               };
--              osc32k: osc32k {
-+              osc32k: clk@0 {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <32768>;
-+                      clock-output-names = "osc32k";
-               };
--              pll1: pll1@01c20000 {
-+              pll1: clk@01c20000 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20000 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll1";
-               };
--              pll4: pll4@01c20018 {
-+              pll4: clk@01c20018 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20018 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll4";
-               };
--              pll5: pll5@01c20020 {
-+              pll5: clk@01c20020 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll5-clk";
-                       reg = <0x01c20020 0x4>;
-@@ -87,7 +91,7 @@
-                       clock-output-names = "pll5_ddr", "pll5_other";
-               };
--              pll6: pll6@01c20028 {
-+              pll6: clk@01c20028 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll6-clk";
-                       reg = <0x01c20028 0x4>;
-@@ -101,6 +105,7 @@
-                       compatible = "allwinner,sun4i-cpu-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>;
-+                      clock-output-names = "cpu";
-               };
-               axi: axi@01c20054 {
-@@ -108,9 +113,10 @@
-                       compatible = "allwinner,sun4i-axi-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&cpu>;
-+                      clock-output-names = "axi";
-               };
--              axi_gates: axi_gates@01c2005c {
-+              axi_gates: clk@01c2005c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-axi-gates-clk";
-                       reg = <0x01c2005c 0x4>;
-@@ -123,9 +129,10 @@
-                       compatible = "allwinner,sun4i-ahb-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&axi>;
-+                      clock-output-names = "ahb";
-               };
--              ahb_gates: ahb_gates@01c20060 {
-+              ahb_gates: clk@01c20060 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a13-ahb-gates-clk";
-                       reg = <0x01c20060 0x8>;
-@@ -143,9 +150,10 @@
-                       compatible = "allwinner,sun4i-apb0-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&ahb>;
-+                      clock-output-names = "apb0";
-               };
--              apb0_gates: apb0_gates@01c20068 {
-+              apb0_gates: clk@01c20068 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a13-apb0-gates-clk";
-                       reg = <0x01c20068 0x4>;
-@@ -158,6 +166,7 @@
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-+                      clock-output-names = "apb1_mux";
-               };
-               apb1: apb1@01c20058 {
-@@ -165,9 +174,10 @@
-                       compatible = "allwinner,sun4i-apb1-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&apb1_mux>;
-+                      clock-output-names = "apb1";
-               };
--              apb1_gates: apb1_gates@01c2006c {
-+              apb1_gates: clk@01c2006c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a13-apb1-gates-clk";
-                       reg = <0x01c2006c 0x4>;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/127-3-dt-sun6i-rename-clock-node-names.patch b/target/linux/sunxi/patches-3.13/127-3-dt-sun6i-rename-clock-node-names.patch
deleted file mode 100644 (file)
index fe0a1a0..0000000
+++ /dev/null
@@ -1,112 +0,0 @@
-From 5cd0fa24e51d342f175d31ecb72c2e957a6bd0af Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 3 Feb 2014 09:51:43 +0800
-Subject: [PATCH] ARM: dts: sun6i: rename clock node names to clk@N
-
-Device tree naming conventions state that node names should match
-node function. Change fully functioning clock nodes to match and
-add clock-output-names to all sunxi clock nodes.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun6i-a31.dtsi | 19 ++++++++++++++-----
- 1 file changed, 14 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
-index fc07f70..d3f1995 100644
---- a/arch/arm/boot/dts/sun6i-a31.dtsi
-+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
-@@ -70,17 +70,19 @@
-                       clock-frequency = <24000000>;
-               };
--              osc32k: osc32k {
-+              osc32k: clk@0 {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <32768>;
-+                      clock-output-names = "osc32k";
-               };
--              pll1: pll1@01c20000 {
-+              pll1: clk@01c20000 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun6i-a31-pll1-clk";
-                       reg = <0x01c20000 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll1";
-               };
-               pll6: clk@01c20028 {
-@@ -103,6 +105,7 @@
-                        * Allwinner.
-                        */
-                       clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
-+                      clock-output-names = "cpu";
-               };
-               axi: axi@01c20050 {
-@@ -110,6 +113,7 @@
-                       compatible = "allwinner,sun4i-axi-clk";
-                       reg = <0x01c20050 0x4>;
-                       clocks = <&cpu>;
-+                      clock-output-names = "axi";
-               };
-               ahb1_mux: ahb1_mux@01c20054 {
-@@ -117,6 +121,7 @@
-                       compatible = "allwinner,sun6i-a31-ahb1-mux-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6>;
-+                      clock-output-names = "ahb1_mux";
-               };
-               ahb1: ahb1@01c20054 {
-@@ -124,9 +129,10 @@
-                       compatible = "allwinner,sun4i-ahb-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&ahb1_mux>;
-+                      clock-output-names = "ahb1";
-               };
--              ahb1_gates: ahb1_gates@01c20060 {
-+              ahb1_gates: clk@01c20060 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun6i-a31-ahb1-gates-clk";
-                       reg = <0x01c20060 0x8>;
-@@ -152,9 +158,10 @@
-                       compatible = "allwinner,sun4i-apb0-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&ahb1>;
-+                      clock-output-names = "apb1";
-               };
--              apb1_gates: apb1_gates@01c20060 {
-+              apb1_gates: clk@01c20068 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun6i-a31-apb1-gates-clk";
-                       reg = <0x01c20068 0x4>;
-@@ -169,6 +176,7 @@
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
-+                      clock-output-names = "apb2_mux";
-               };
-               apb2: apb2@01c20058 {
-@@ -176,9 +184,10 @@
-                       compatible = "allwinner,sun6i-a31-apb2-div-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&apb2_mux>;
-+                      clock-output-names = "apb2";
-               };
--              apb2_gates: apb2_gates@01c2006c {
-+              apb2_gates: clk@01c2006c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun6i-a31-apb2-gates-clk";
-                       reg = <0x01c2006c 0x4>;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/127-4-dt-sun7i-rename-clock-node-names.patch b/target/linux/sunxi/patches-3.13/127-4-dt-sun7i-rename-clock-node-names.patch
deleted file mode 100644 (file)
index 0fba0bc..0000000
+++ /dev/null
@@ -1,132 +0,0 @@
-From cb6050998de262d5acf2207c5451d4f5995a5bff Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 3 Feb 2014 09:51:44 +0800
-Subject: [PATCH] ARM: dts: sun7i: rename clock node names to clk@N
-
-Device tree naming conventions state that node names should match
-node function. Change fully functioning clock nodes to match and
-add clock-output-names to all sunxi clock nodes.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 25 +++++++++++++++++--------
- 1 file changed, 17 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
-index fe0fe47..cefd7ac 100644
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -54,11 +54,12 @@
-               #size-cells = <1>;
-               ranges;
--              osc24M: osc24M@01c20050 {
-+              osc24M: clk@01c20050 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-osc-clk";
-                       reg = <0x01c20050 0x4>;
-                       clock-frequency = <24000000>;
-+                      clock-output-names = "osc24M";
-               };
-               osc32k: clk@0 {
-@@ -68,21 +69,23 @@
-                       clock-output-names = "osc32k";
-               };
--              pll1: pll1@01c20000 {
-+              pll1: clk@01c20000 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20000 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll1";
-               };
--              pll4: pll4@01c20018 {
-+              pll4: clk@01c20018 {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-pll1-clk";
-                       reg = <0x01c20018 0x4>;
-                       clocks = <&osc24M>;
-+                      clock-output-names = "pll4";
-               };
--              pll5: pll5@01c20020 {
-+              pll5: clk@01c20020 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll5-clk";
-                       reg = <0x01c20020 0x4>;
-@@ -90,7 +93,7 @@
-                       clock-output-names = "pll5_ddr", "pll5_other";
-               };
--              pll6: pll6@01c20028 {
-+              pll6: clk@01c20028 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun4i-pll6-clk";
-                       reg = <0x01c20028 0x4>;
-@@ -103,6 +106,7 @@
-                       compatible = "allwinner,sun4i-cpu-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll6 1>;
-+                      clock-output-names = "cpu";
-               };
-               axi: axi@01c20054 {
-@@ -110,6 +114,7 @@
-                       compatible = "allwinner,sun4i-axi-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&cpu>;
-+                      clock-output-names = "axi";
-               };
-               ahb: ahb@01c20054 {
-@@ -117,9 +122,10 @@
-                       compatible = "allwinner,sun4i-ahb-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&axi>;
-+                      clock-output-names = "ahb";
-               };
--              ahb_gates: ahb_gates@01c20060 {
-+              ahb_gates: clk@01c20060 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun7i-a20-ahb-gates-clk";
-                       reg = <0x01c20060 0x8>;
-@@ -144,9 +150,10 @@
-                       compatible = "allwinner,sun4i-apb0-clk";
-                       reg = <0x01c20054 0x4>;
-                       clocks = <&ahb>;
-+                      clock-output-names = "apb0";
-               };
--              apb0_gates: apb0_gates@01c20068 {
-+              apb0_gates: clk@01c20068 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun7i-a20-apb0-gates-clk";
-                       reg = <0x01c20068 0x4>;
-@@ -162,6 +169,7 @@
-                       compatible = "allwinner,sun4i-apb1-mux-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
-+                      clock-output-names = "apb1_mux";
-               };
-               apb1: apb1@01c20058 {
-@@ -169,9 +177,10 @@
-                       compatible = "allwinner,sun4i-apb1-clk";
-                       reg = <0x01c20058 0x4>;
-                       clocks = <&apb1_mux>;
-+                      clock-output-names = "apb1";
-               };
--              apb1_gates: apb1_gates@01c2006c {
-+              apb1_gates: clk@01c2006c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun7i-a20-apb1-gates-clk";
-                       reg = <0x01c2006c 0x4>;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/128-dt-sunxi-add-mbusclk.patch b/target/linux/sunxi/patches-3.13/128-dt-sunxi-add-mbusclk.patch
deleted file mode 100644 (file)
index cb8b109..0000000
+++ /dev/null
@@ -1,70 +0,0 @@
-From 538d4a6ca5f41039d906f28be82e0f4d26ec8ac9 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Mon, 23 Dec 2013 00:32:44 -0300
-Subject: [PATCH] ARM: sunxi: dt: add nodes for the mbus clock
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-mbus is the memory bus clock, and it is present on both sun5i and sun7i
-machines. Its register layout is compatible with the mod0 one.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun5i-a10s.dtsi | 8 ++++++++
- arch/arm/boot/dts/sun5i-a13.dtsi  | 8 ++++++++
- arch/arm/boot/dts/sun7i-a20.dtsi  | 8 ++++++++
- 3 files changed, 24 insertions(+)
-
---- a/arch/arm/boot/dts/sun5i-a10s.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
-@@ -257,6 +257,14 @@
-                       clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-                       clock-output-names = "ir0";
-               };
-+
-+              mbus_clk: clk@01c2015c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2015c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mbus";
-+              };
-       };
-       soc@01c00000 {
---- a/arch/arm/boot/dts/sun5i-a13.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
-@@ -258,6 +258,14 @@
-                       clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-                       clock-output-names = "ir0";
-               };
-+
-+              mbus_clk: clk@01c2015c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2015c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-+                      clock-output-names = "mbus";
-+              };
-       };
-       soc@01c00000 {
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -290,6 +290,14 @@
-                       clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
-                       clock-output-names = "spi3";
-               };
-+
-+              mbus_clk: clk@01c2015c {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun4i-mod0-clk";
-+                      reg = <0x01c2015c 0x4>;
-+                      clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
-+                      clock-output-names = "mbus";
-+              };
-       };
-       soc@01c00000 {
diff --git a/target/linux/sunxi/patches-3.13/130-1-dt-sunxi-add-emac-aliases.patch b/target/linux/sunxi/patches-3.13/130-1-dt-sunxi-add-emac-aliases.patch
deleted file mode 100644 (file)
index 70a5787..0000000
+++ /dev/null
@@ -1,60 +0,0 @@
-From 2af807481169af627dc63f98b773c33d85020658 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
-Date: Fri, 15 Nov 2013 15:26:44 -0300
-Subject: [PATCH] ARM: sunxi: dt: add EMAC aliases
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-U-Boot uses the ethernet0 alias to locate the right node to fill in
-the MAC address of the first ethernet interface. This patch adds the
-alias on all the sunxi SoCs with EMAC. In this way, people using
-ethernet in U-Boot (eg, for tftp) can keep a consistent address on both
-U-Boot and Linux with no additional effort.
-
-Signed-off-by: Emilio López <emilio@elopez.com.ar>
----
- arch/arm/boot/dts/sun4i-a10.dtsi  | 4 ++++
- arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++++
- arch/arm/boot/dts/sun7i-a20.dtsi  | 4 ++++
- 3 files changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/sun4i-a10.dtsi
-+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
-@@ -15,6 +15,10 @@
- / {
-       interrupt-parent = <&intc>;
-+      aliases {
-+              ethernet0 = &emac;
-+      };
-+
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
---- a/arch/arm/boot/dts/sun5i-a10s.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
-@@ -16,6 +16,10 @@
- / {
-       interrupt-parent = <&intc>;
-+      aliases {
-+              ethernet0 = &emac;
-+      };
-+
-       cpus {
-               cpu@0 {
-                       compatible = "arm,cortex-a8";
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -16,6 +16,10 @@
- / {
-       interrupt-parent = <&gic>;
-+      aliases {
-+              ethernet0 = &emac;
-+      };
-+
-       cpus {
-               #address-cells = <1>;
-               #size-cells = <0>;
diff --git a/target/linux/sunxi/patches-3.13/130-2-dt-sun7i-update-eth-aliases.patch b/target/linux/sunxi/patches-3.13/130-2-dt-sun7i-update-eth-aliases.patch
deleted file mode 100644 (file)
index 543dd57..0000000
+++ /dev/null
@@ -1,25 +0,0 @@
-From dfd4430579f5e53324c00e9e21fb0929bb46542c Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Sat, 7 Dec 2013 01:29:43 +0800
-Subject: [PATCH] ARM: dts: sun7i: Add ethernet alias for GMAC
-
-U-Boot will insert MAC address into the device tree image.
-It looks up ethernet[0-5] aliases to find the ethernet nodes.
-Alias GMAC as ethernet0, as it is the only ethernet controller used.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -17,7 +17,7 @@
-       interrupt-parent = <&gic>;
-       aliases {
--              ethernet0 = &emac;
-+              ethernet0 = &gmac;
-       };
-       cpus {
diff --git a/target/linux/sunxi/patches-3.13/131-dt-sun7i-add-arch-timers.patch b/target/linux/sunxi/patches-3.13/131-dt-sun7i-add-arch-timers.patch
deleted file mode 100644 (file)
index dc9f8ac..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-From fdc4530902ed845fc0f31b9bbcc45e05fefe21da Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Sun, 1 Dec 2013 22:40:34 +0100
-Subject: [PATCH] ARM: dts: sun7i: Add arch timers
-
-Note this requires a new enough uboot, otherwise things won't work, ie:
-
-https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-next
-or:
-http://xenbits.xen.org/gitweb/?p=people/ianc/u-boot.git;a=shortlog;h=refs/heads/devel/sunxi-psci
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
-index f4ecd79..fa2ef07 100644
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -370,6 +370,14 @@
-               };
-       };
-+      timer {
-+              compatible = "arm,armv7-timer";
-+              interrupts = <1 13 0xf08>,
-+                           <1 14 0xf08>,
-+                           <1 11 0xf08>,
-+                           <1 10 0xf08>;
-+      };
-+
-       soc@01c00000 {
-               compatible = "simple-bus";
-               #address-cells = <1>;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/132-dt-sun5i-a13-add-olinuxino-micro.patch b/target/linux/sunxi/patches-3.13/132-dt-sun5i-a13-add-olinuxino-micro.patch
deleted file mode 100644 (file)
index 93b7252..0000000
+++ /dev/null
@@ -1,108 +0,0 @@
-From aad62992a2921436ec7c054f8b80bc916b8cc9d7 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Sat, 14 Dec 2013 16:26:17 +0100
-Subject: [PATCH] ARM: dts: sun5i: Add new sun5i-a13-olinuxino-micro board
-
-The A13-OLinuXino-MICRO is a small dev-board with the Allwinner A13 SoC:
-https://www.olimex.com/Products/OLinuXino/A13/A13-OLinuXino-MICRO/
-
-Features:
-A13 Cortex A8 processor at 1GHz, 3D Mali400 GPU
-256 MB RAM (128Mbit x 16)
-5VDC input power supply with own ICs, noise immune design
-1 USB host
-1 USB OTG which can power the board
-SD-card connector for booting the Linux image
-VGA video output
-LCD signals available on connector so you still can use LCD if you disable VGA/HDMI
-Audio output
-Microphone input pads (no connector)
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
- arch/arm/boot/dts/Makefile                      |  1 +
- arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 68 +++++++++++++++++++++++++
- 2 files changed, 69 insertions(+)
- create mode 100644 arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -255,6 +255,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
-       sun4i-a10-hackberry.dtb \
-       sun5i-a10s-olinuxino-micro.dtb \
-       sun5i-a13-olinuxino.dtb \
-+      sun5i-a13-olinuxino-micro.dtb \
-       sun6i-a31-colombus.dtb \
-       sun7i-a20-cubieboard2.dtb \
-       sun7i-a20-cubietruck.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
-@@ -0,0 +1,68 @@
-+/*
-+ * Copyright 2012 Maxime Ripard
-+ * Copyright 2013 Hans de Goede <hdegoede@redhat.com>
-+ *
-+ * Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+/include/ "sun5i-a13.dtsi"
-+
-+/ {
-+      model = "Olimex A13-Olinuxino Micro";
-+      compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
-+
-+      soc@01c00000 {
-+              pinctrl@01c20800 {
-+                      led_pins_olinuxinom: led_pins@0 {
-+                              allwinner,pins = "PG9";
-+                              allwinner,function = "gpio_out";
-+                              allwinner,drive = <1>;
-+                              allwinner,pull = <0>;
-+                      };
-+              };
-+
-+              uart1: serial@01c28400 {
-+                      pinctrl-names = "default";
-+                      pinctrl-0 = <&uart1_pins_b>;
-+                      status = "okay";
-+              };
-+
-+              i2c0: i2c@01c2ac00 {
-+                      pinctrl-names = "default";
-+                      pinctrl-0 = <&i2c0_pins_a>;
-+                      status = "okay";
-+              };
-+
-+              i2c1: i2c@01c2b000 {
-+                      pinctrl-names = "default";
-+                      pinctrl-0 = <&i2c1_pins_a>;
-+                      status = "okay";
-+              };
-+
-+              i2c2: i2c@01c2b400 {
-+                      pinctrl-names = "default";
-+                      pinctrl-0 = <&i2c2_pins_a>;
-+                      status = "okay";
-+              };
-+      };
-+
-+      leds {
-+              compatible = "gpio-leds";
-+              pinctrl-names = "default";
-+              pinctrl-0 = <&led_pins_olinuxinom>;
-+
-+              power {
-+                      label = "a13-olinuxino-micro:green:power";
-+                      gpios = <&pio 6 9 0>;
-+                      default-state = "on";
-+              };
-+      };
-+};
diff --git a/target/linux/sunxi/patches-3.13/140-sun47i-rtc-driver.patch b/target/linux/sunxi/patches-3.13/140-sun47i-rtc-driver.patch
deleted file mode 100644 (file)
index 3baa9df..0000000
+++ /dev/null
@@ -1,570 +0,0 @@
-From c6890cadc2129a07d69f3dcbfca66522c27b8069 Mon Sep 17 00:00:00 2001
-From: Carlo Caione <carlo.caione@gmail.com>
-Date: Sat, 16 Nov 2013 18:33:54 +0100
-Subject: [PATCH] ARM: sun4i/sun7i: RTC driver
-
-This patch introduces the driver for the RTC in the Allwinner A10 and
-A20 SoCs.
-
-Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
-Acked-by: Alessandro Zummo <a.zummo@towertech.it>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- drivers/rtc/Kconfig     |   7 +
- drivers/rtc/Makefile    |   1 +
- drivers/rtc/rtc-sunxi.c | 523 ++++++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 531 insertions(+)
- create mode 100644 drivers/rtc/rtc-sunxi.c
-
---- a/drivers/rtc/Kconfig
-+++ b/drivers/rtc/Kconfig
-@@ -1122,6 +1122,13 @@ config RTC_DRV_SUN4V
-         If you say Y here you will get support for the Hypervisor
-         based RTC on SUN4V systems.
-+config RTC_DRV_SUNXI
-+      tristate "Allwinner sun4i/sun7i RTC"
-+      depends on ARCH_SUNXI
-+      help
-+        If you say Y here you will get support for the RTC found on
-+        Allwinner A10/A20.
-+
- config RTC_DRV_STARFIRE
-       bool "Starfire RTC"
-       depends on SPARC64
---- a/drivers/rtc/Makefile
-+++ b/drivers/rtc/Makefile
-@@ -119,6 +119,7 @@ obj-$(CONFIG_RTC_DRV_STARFIRE)     += rtc-st
- obj-$(CONFIG_RTC_DRV_STK17TA8)        += rtc-stk17ta8.o
- obj-$(CONFIG_RTC_DRV_STMP)    += rtc-stmp3xxx.o
- obj-$(CONFIG_RTC_DRV_SUN4V)   += rtc-sun4v.o
-+obj-$(CONFIG_RTC_DRV_SUNXI)   += rtc-sunxi.o
- obj-$(CONFIG_RTC_DRV_TEGRA)   += rtc-tegra.o
- obj-$(CONFIG_RTC_DRV_TEST)    += rtc-test.o
- obj-$(CONFIG_RTC_DRV_TILE)    += rtc-tile.o
---- /dev/null
-+++ b/drivers/rtc/rtc-sunxi.c
-@@ -0,0 +1,523 @@
-+/*
-+ * An RTC driver for Allwinner A10/A20
-+ *
-+ * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-+ */
-+
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/fs.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/of_device.h>
-+#include <linux/platform_device.h>
-+#include <linux/rtc.h>
-+#include <linux/types.h>
-+
-+#define SUNXI_LOSC_CTRL                               0x0000
-+#define SUNXI_LOSC_CTRL_RTC_HMS_ACC           BIT(8)
-+#define SUNXI_LOSC_CTRL_RTC_YMD_ACC           BIT(7)
-+
-+#define SUNXI_RTC_YMD                         0x0004
-+
-+#define SUNXI_RTC_HMS                         0x0008
-+
-+#define SUNXI_ALRM_DHMS                               0x000c
-+
-+#define SUNXI_ALRM_EN                         0x0014
-+#define SUNXI_ALRM_EN_CNT_EN                  BIT(8)
-+
-+#define SUNXI_ALRM_IRQ_EN                     0x0018
-+#define SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN          BIT(0)
-+
-+#define SUNXI_ALRM_IRQ_STA                    0x001c
-+#define SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND               BIT(0)
-+
-+#define SUNXI_MASK_DH                         0x0000001f
-+#define SUNXI_MASK_SM                         0x0000003f
-+#define SUNXI_MASK_M                          0x0000000f
-+#define SUNXI_MASK_LY                         0x00000001
-+#define SUNXI_MASK_D                          0x00000ffe
-+#define SUNXI_MASK_M                          0x0000000f
-+
-+#define SUNXI_GET(x, mask, shift)             (((x) & ((mask) << (shift))) \
-+                                                      >> (shift))
-+
-+#define SUNXI_SET(x, mask, shift)             (((x) & (mask)) << (shift))
-+
-+/*
-+ * Get date values
-+ */
-+#define SUNXI_DATE_GET_DAY_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_DH, 0)
-+#define SUNXI_DATE_GET_MON_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_M, 8)
-+#define SUNXI_DATE_GET_YEAR_VALUE(x, mask)    SUNXI_GET(x, mask, 16)
-+
-+/*
-+ * Get time values
-+ */
-+#define SUNXI_TIME_GET_SEC_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_SM, 0)
-+#define SUNXI_TIME_GET_MIN_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_SM, 8)
-+#define SUNXI_TIME_GET_HOUR_VALUE(x)          SUNXI_GET(x, SUNXI_MASK_DH, 16)
-+
-+/*
-+ * Get alarm values
-+ */
-+#define SUNXI_ALRM_GET_SEC_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_SM, 0)
-+#define SUNXI_ALRM_GET_MIN_VALUE(x)           SUNXI_GET(x, SUNXI_MASK_SM, 8)
-+#define SUNXI_ALRM_GET_HOUR_VALUE(x)          SUNXI_GET(x, SUNXI_MASK_DH, 16)
-+
-+/*
-+ * Set date values
-+ */
-+#define SUNXI_DATE_SET_DAY_VALUE(x)           SUNXI_DATE_GET_DAY_VALUE(x)
-+#define SUNXI_DATE_SET_MON_VALUE(x)           SUNXI_SET(x, SUNXI_MASK_M, 8)
-+#define SUNXI_DATE_SET_YEAR_VALUE(x, mask)    SUNXI_SET(x, mask, 16)
-+#define SUNXI_LEAP_SET_VALUE(x, shift)                SUNXI_SET(x, SUNXI_MASK_LY, shift)
-+
-+/*
-+ * Set time values
-+ */
-+#define SUNXI_TIME_SET_SEC_VALUE(x)           SUNXI_TIME_GET_SEC_VALUE(x)
-+#define SUNXI_TIME_SET_MIN_VALUE(x)           SUNXI_SET(x, SUNXI_MASK_SM, 8)
-+#define SUNXI_TIME_SET_HOUR_VALUE(x)          SUNXI_SET(x, SUNXI_MASK_DH, 16)
-+
-+/*
-+ * Set alarm values
-+ */
-+#define SUNXI_ALRM_SET_SEC_VALUE(x)           SUNXI_ALRM_GET_SEC_VALUE(x)
-+#define SUNXI_ALRM_SET_MIN_VALUE(x)           SUNXI_SET(x, SUNXI_MASK_SM, 8)
-+#define SUNXI_ALRM_SET_HOUR_VALUE(x)          SUNXI_SET(x, SUNXI_MASK_DH, 16)
-+#define SUNXI_ALRM_SET_DAY_VALUE(x)           SUNXI_SET(x, SUNXI_MASK_D, 21)
-+
-+/*
-+ * Time unit conversions
-+ */
-+#define SEC_IN_MIN                            60
-+#define SEC_IN_HOUR                           (60 * SEC_IN_MIN)
-+#define SEC_IN_DAY                            (24 * SEC_IN_HOUR)
-+
-+/*
-+ * The year parameter passed to the driver is usually an offset relative to
-+ * the year 1900. This macro is used to convert this offset to another one
-+ * relative to the minimum year allowed by the hardware.
-+ */
-+#define SUNXI_YEAR_OFF(x)                     ((x)->min - 1900)
-+
-+/*
-+ * min and max year are arbitrary set considering the limited range of the
-+ * hardware register field
-+ */
-+struct sunxi_rtc_data_year {
-+      unsigned int min;               /* min year allowed */
-+      unsigned int max;               /* max year allowed */
-+      unsigned int mask;              /* mask for the year field */
-+      unsigned char leap_shift;       /* bit shift to get the leap year */
-+};
-+
-+static struct sunxi_rtc_data_year data_year_param[] = {
-+      [0] = {
-+              .min            = 2010,
-+              .max            = 2073,
-+              .mask           = 0x3f,
-+              .leap_shift     = 22,
-+      },
-+      [1] = {
-+              .min            = 1970,
-+              .max            = 2225,
-+              .mask           = 0xff,
-+              .leap_shift     = 24,
-+      },
-+};
-+
-+struct sunxi_rtc_dev {
-+      struct rtc_device *rtc;
-+      struct device *dev;
-+      struct sunxi_rtc_data_year *data_year;
-+      void __iomem *base;
-+      int irq;
-+};
-+
-+static irqreturn_t sunxi_rtc_alarmirq(int irq, void *id)
-+{
-+      struct sunxi_rtc_dev *chip = (struct sunxi_rtc_dev *) id;
-+      u32 val;
-+
-+      val = readl(chip->base + SUNXI_ALRM_IRQ_STA);
-+
-+      if (val & SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND) {
-+              val |= SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND;
-+              writel(val, chip->base + SUNXI_ALRM_IRQ_STA);
-+
-+              rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
-+
-+              return IRQ_HANDLED;
-+      }
-+
-+      return IRQ_NONE;
-+}
-+
-+static void sunxi_rtc_setaie(int to, struct sunxi_rtc_dev *chip)
-+{
-+      u32 alrm_val = 0;
-+      u32 alrm_irq_val = 0;
-+
-+      if (to) {
-+              alrm_val = readl(chip->base + SUNXI_ALRM_EN);
-+              alrm_val |= SUNXI_ALRM_EN_CNT_EN;
-+
-+              alrm_irq_val = readl(chip->base + SUNXI_ALRM_IRQ_EN);
-+              alrm_irq_val |= SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN;
-+      } else {
-+              writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND,
-+                              chip->base + SUNXI_ALRM_IRQ_STA);
-+      }
-+
-+      writel(alrm_val, chip->base + SUNXI_ALRM_EN);
-+      writel(alrm_irq_val, chip->base + SUNXI_ALRM_IRQ_EN);
-+}
-+
-+static int sunxi_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
-+{
-+      struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
-+      struct rtc_time *alrm_tm = &wkalrm->time;
-+      u32 alrm;
-+      u32 alrm_en;
-+      u32 date;
-+
-+      alrm = readl(chip->base + SUNXI_ALRM_DHMS);
-+      date = readl(chip->base + SUNXI_RTC_YMD);
-+
-+      alrm_tm->tm_sec = SUNXI_ALRM_GET_SEC_VALUE(alrm);
-+      alrm_tm->tm_min = SUNXI_ALRM_GET_MIN_VALUE(alrm);
-+      alrm_tm->tm_hour = SUNXI_ALRM_GET_HOUR_VALUE(alrm);
-+
-+      alrm_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
-+      alrm_tm->tm_mon = SUNXI_DATE_GET_MON_VALUE(date);
-+      alrm_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
-+                      chip->data_year->mask);
-+
-+      alrm_tm->tm_mon -= 1;
-+
-+      /*
-+       * switch from (data_year->min)-relative offset to
-+       * a (1900)-relative one
-+       */
-+      alrm_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
-+
-+      alrm_en = readl(chip->base + SUNXI_ALRM_IRQ_EN);
-+      if (alrm_en & SUNXI_ALRM_EN_CNT_EN)
-+              wkalrm->enabled = 1;
-+
-+      return 0;
-+}
-+
-+static int sunxi_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
-+{
-+      struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
-+      u32 date, time;
-+
-+      /*
-+       * read again in case it changes
-+       */
-+      do {
-+              date = readl(chip->base + SUNXI_RTC_YMD);
-+              time = readl(chip->base + SUNXI_RTC_HMS);
-+      } while ((date != readl(chip->base + SUNXI_RTC_YMD)) ||
-+               (time != readl(chip->base + SUNXI_RTC_HMS)));
-+
-+      rtc_tm->tm_sec  = SUNXI_TIME_GET_SEC_VALUE(time);
-+      rtc_tm->tm_min  = SUNXI_TIME_GET_MIN_VALUE(time);
-+      rtc_tm->tm_hour = SUNXI_TIME_GET_HOUR_VALUE(time);
-+
-+      rtc_tm->tm_mday = SUNXI_DATE_GET_DAY_VALUE(date);
-+      rtc_tm->tm_mon  = SUNXI_DATE_GET_MON_VALUE(date);
-+      rtc_tm->tm_year = SUNXI_DATE_GET_YEAR_VALUE(date,
-+                                      chip->data_year->mask);
-+
-+      rtc_tm->tm_mon  -= 1;
-+
-+      /*
-+       * switch from (data_year->min)-relative offset to
-+       * a (1900)-relative one
-+       */
-+      rtc_tm->tm_year += SUNXI_YEAR_OFF(chip->data_year);
-+
-+      return rtc_valid_tm(rtc_tm);
-+}
-+
-+static int sunxi_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
-+{
-+      struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
-+      struct rtc_time *alrm_tm = &wkalrm->time;
-+      struct rtc_time tm_now;
-+      u32 alrm = 0;
-+      unsigned long time_now = 0;
-+      unsigned long time_set = 0;
-+      unsigned long time_gap = 0;
-+      unsigned long time_gap_day = 0;
-+      unsigned long time_gap_hour = 0;
-+      unsigned long time_gap_min = 0;
-+      int ret = 0;
-+
-+      ret = sunxi_rtc_gettime(dev, &tm_now);
-+      if (ret < 0) {
-+              dev_err(dev, "Error in getting time\n");
-+              return -EINVAL;
-+      }
-+
-+      rtc_tm_to_time(alrm_tm, &time_set);
-+      rtc_tm_to_time(&tm_now, &time_now);
-+      if (time_set <= time_now) {
-+              dev_err(dev, "Date to set in the past\n");
-+              return -EINVAL;
-+      }
-+
-+      time_gap = time_set - time_now;
-+      time_gap_day = time_gap / SEC_IN_DAY;
-+      time_gap -= time_gap_day * SEC_IN_DAY;
-+      time_gap_hour = time_gap / SEC_IN_HOUR;
-+      time_gap -= time_gap_hour * SEC_IN_HOUR;
-+      time_gap_min = time_gap / SEC_IN_MIN;
-+      time_gap -= time_gap_min * SEC_IN_MIN;
-+
-+      if (time_gap_day > 255) {
-+              dev_err(dev, "Day must be in the range 0 - 255\n");
-+              return -EINVAL;
-+      }
-+
-+      sunxi_rtc_setaie(0, chip);
-+      writel(0, chip->base + SUNXI_ALRM_DHMS);
-+      usleep_range(100, 300);
-+
-+      alrm = SUNXI_ALRM_SET_SEC_VALUE(time_gap) |
-+              SUNXI_ALRM_SET_MIN_VALUE(time_gap_min) |
-+              SUNXI_ALRM_SET_HOUR_VALUE(time_gap_hour) |
-+              SUNXI_ALRM_SET_DAY_VALUE(time_gap_day);
-+      writel(alrm, chip->base + SUNXI_ALRM_DHMS);
-+
-+      writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
-+      writel(SUNXI_ALRM_IRQ_EN_CNT_IRQ_EN, chip->base + SUNXI_ALRM_IRQ_EN);
-+
-+      sunxi_rtc_setaie(wkalrm->enabled, chip);
-+
-+      return 0;
-+}
-+
-+static int sunxi_rtc_wait(struct sunxi_rtc_dev *chip, int offset,
-+                        unsigned int mask, unsigned int ms_timeout)
-+{
-+      const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
-+      u32 reg;
-+
-+      do {
-+              reg = readl(chip->base + offset);
-+              reg &= mask;
-+
-+              if (reg == mask)
-+                      return 0;
-+
-+      } while (time_before(jiffies, timeout));
-+
-+      return -ETIMEDOUT;
-+}
-+
-+static int sunxi_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
-+{
-+      struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
-+      u32 date = 0;
-+      u32 time = 0;
-+      int year;
-+
-+      /*
-+       * the input rtc_tm->tm_year is the offset relative to 1900. We use
-+       * the SUNXI_YEAR_OFF macro to rebase it with respect to the min year
-+       * allowed by the hardware
-+       */
-+
-+      year = rtc_tm->tm_year + 1900;
-+      if (year < chip->data_year->min || year > chip->data_year->max) {
-+              dev_err(dev, "rtc only supports year in range %d - %d\n",
-+                              chip->data_year->min, chip->data_year->max);
-+              return -EINVAL;
-+      }
-+
-+      rtc_tm->tm_year -= SUNXI_YEAR_OFF(chip->data_year);
-+      rtc_tm->tm_mon += 1;
-+
-+      date = SUNXI_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
-+              SUNXI_DATE_SET_MON_VALUE(rtc_tm->tm_mon)  |
-+              SUNXI_DATE_SET_YEAR_VALUE(rtc_tm->tm_year,
-+                              chip->data_year->mask);
-+
-+      if (is_leap_year(year))
-+              date |= SUNXI_LEAP_SET_VALUE(1, chip->data_year->leap_shift);
-+
-+      time = SUNXI_TIME_SET_SEC_VALUE(rtc_tm->tm_sec)  |
-+              SUNXI_TIME_SET_MIN_VALUE(rtc_tm->tm_min)  |
-+              SUNXI_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
-+
-+      writel(0, chip->base + SUNXI_RTC_HMS);
-+      writel(0, chip->base + SUNXI_RTC_YMD);
-+
-+      writel(time, chip->base + SUNXI_RTC_HMS);
-+
-+      /*
-+       * After writing the RTC HH-MM-SS register, the
-+       * SUNXI_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
-+       * be cleared until the real writing operation is finished
-+       */
-+
-+      if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
-+                              SUNXI_LOSC_CTRL_RTC_HMS_ACC, 50)) {
-+              dev_err(dev, "Failed to set rtc time.\n");
-+              return -1;
-+      }
-+
-+      writel(date, chip->base + SUNXI_RTC_YMD);
-+
-+      /*
-+       * After writing the RTC YY-MM-DD register, the
-+       * SUNXI_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
-+       * be cleared until the real writing operation is finished
-+       */
-+
-+      if (sunxi_rtc_wait(chip, SUNXI_LOSC_CTRL,
-+                              SUNXI_LOSC_CTRL_RTC_YMD_ACC, 50)) {
-+              dev_err(dev, "Failed to set rtc time.\n");
-+              return -1;
-+      }
-+
-+      return 0;
-+}
-+
-+static int sunxi_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
-+{
-+      struct sunxi_rtc_dev *chip = dev_get_drvdata(dev);
-+
-+      if (!enabled)
-+              sunxi_rtc_setaie(enabled, chip);
-+
-+      return 0;
-+}
-+
-+static const struct rtc_class_ops sunxi_rtc_ops = {
-+      .read_time              = sunxi_rtc_gettime,
-+      .set_time               = sunxi_rtc_settime,
-+      .read_alarm             = sunxi_rtc_getalarm,
-+      .set_alarm              = sunxi_rtc_setalarm,
-+      .alarm_irq_enable       = sunxi_rtc_alarm_irq_enable
-+};
-+
-+static const struct of_device_id sunxi_rtc_dt_ids[] = {
-+      { .compatible = "allwinner,sun4i-rtc", .data = &data_year_param[0] },
-+      { .compatible = "allwinner,sun7i-a20-rtc", .data = &data_year_param[1] },
-+      { /* sentinel */ },
-+};
-+MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids);
-+
-+static int sunxi_rtc_probe(struct platform_device *pdev)
-+{
-+      struct sunxi_rtc_dev *chip;
-+      struct resource *res;
-+      const struct of_device_id *of_id;
-+      int ret;
-+
-+      chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
-+      if (!chip)
-+              return -ENOMEM;
-+
-+      platform_set_drvdata(pdev, chip);
-+      chip->dev = &pdev->dev;
-+
-+      res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+      chip->base = devm_ioremap_resource(&pdev->dev, res);
-+      if (IS_ERR(chip->base))
-+              return PTR_ERR(chip->base);
-+
-+      chip->irq = platform_get_irq(pdev, 0);
-+      if (chip->irq < 0) {
-+              dev_err(&pdev->dev, "No IRQ resource\n");
-+              return chip->irq;
-+      }
-+      ret = devm_request_irq(&pdev->dev, chip->irq, sunxi_rtc_alarmirq,
-+                      0, dev_name(&pdev->dev), chip);
-+      if (ret) {
-+              dev_err(&pdev->dev, "Could not request IRQ\n");
-+              return ret;
-+      }
-+
-+      of_id = of_match_device(sunxi_rtc_dt_ids, &pdev->dev);
-+      if (!of_id) {
-+              dev_err(&pdev->dev, "Unable to setup RTC data\n");
-+              return -ENODEV;
-+      }
-+      chip->data_year = (struct sunxi_rtc_data_year *) of_id->data;
-+
-+      /* clear the alarm count value */
-+      writel(0, chip->base + SUNXI_ALRM_DHMS);
-+
-+      /* disable alarm, not generate irq pending */
-+      writel(0, chip->base + SUNXI_ALRM_EN);
-+
-+      /* disable alarm week/cnt irq, unset to cpu */
-+      writel(0, chip->base + SUNXI_ALRM_IRQ_EN);
-+
-+      /* clear alarm week/cnt irq pending */
-+      writel(SUNXI_ALRM_IRQ_STA_CNT_IRQ_PEND, chip->base +
-+                      SUNXI_ALRM_IRQ_STA);
-+
-+      chip->rtc = rtc_device_register("rtc-sunxi", &pdev->dev,
-+                      &sunxi_rtc_ops, THIS_MODULE);
-+      if (IS_ERR(chip->rtc)) {
-+              dev_err(&pdev->dev, "unable to register device\n");
-+              return PTR_ERR(chip->rtc);
-+      }
-+
-+      dev_info(&pdev->dev, "RTC enabled\n");
-+
-+      return 0;
-+}
-+
-+static int sunxi_rtc_remove(struct platform_device *pdev)
-+{
-+      struct sunxi_rtc_dev *chip = platform_get_drvdata(pdev);
-+
-+      rtc_device_unregister(chip->rtc);
-+
-+      return 0;
-+}
-+
-+static struct platform_driver sunxi_rtc_driver = {
-+      .probe          = sunxi_rtc_probe,
-+      .remove         = sunxi_rtc_remove,
-+      .driver         = {
-+              .name           = "sunxi-rtc",
-+              .owner          = THIS_MODULE,
-+              .of_match_table = sunxi_rtc_dt_ids,
-+      },
-+};
-+
-+module_platform_driver(sunxi_rtc_driver);
-+
-+MODULE_DESCRIPTION("sunxi RTC driver");
-+MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
-+MODULE_LICENSE("GPL");
diff --git a/target/linux/sunxi/patches-3.13/141-dt-sun47i-add-rtc.patch b/target/linux/sunxi/patches-3.13/141-dt-sun47i-add-rtc.patch
deleted file mode 100644 (file)
index 8e051c8..0000000
+++ /dev/null
@@ -1,44 +0,0 @@
-From b15b9f68606134222f7aff5120c8ef70ffab92b8 Mon Sep 17 00:00:00 2001
-From: Carlo Caione <carlo.caione@gmail.com>
-Date: Wed, 16 Oct 2013 20:30:26 +0200
-Subject: [PATCH] ARM: dts: sun4i/sun7i: add RTC node
-
-Add the RTC node to DTS for Allwinner A10 and Allwinner A20.
-
-Signed-off-by: Carlo Caione <carlo.caione@gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun4i-a10.dtsi | 6 ++++++
- arch/arm/boot/dts/sun7i-a20.dtsi | 6 ++++++
- 2 files changed, 12 insertions(+)
-
---- a/arch/arm/boot/dts/sun4i-a10.dtsi
-+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
-@@ -412,6 +412,12 @@
-                       reg = <0x01c20c90 0x10>;
-               };
-+              rtc: rtc@01c20d00 {
-+                      compatible = "allwinner,sun4i-rtc";
-+                      reg = <0x01c20d00 0x20>;
-+                      interrupts = <24>;
-+              };
-+
-               sid: eeprom@01c23800 {
-                       compatible = "allwinner,sun4i-sid";
-                       reg = <0x01c23800 0x10>;
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -416,6 +416,12 @@
-                       reg = <0x01c20c90 0x10>;
-               };
-+              rtc: rtc@01c20d00 {
-+                      compatible = "allwinner,sun7i-a20-rtc";
-+                      reg = <0x01c20d00 0x20>;
-+                      interrupts = <0 24 1>;
-+              };
-+
-               sid: eeprom@01c23800 {
-                       compatible = "allwinner,sun7i-a20-sid";
-                       reg = <0x01c23800 0x200>;
diff --git a/target/linux/sunxi/patches-3.13/145-clksrc-add-hstimer.patch b/target/linux/sunxi/patches-3.13/145-clksrc-add-hstimer.patch
deleted file mode 100644 (file)
index 552ef00..0000000
+++ /dev/null
@@ -1,282 +0,0 @@
-From 3bf30f6381f9287eb99ce096bf2fa327a69c8a71 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 7 Nov 2013 12:01:48 +0100
-Subject: [PATCH] clocksource: Add Allwinner SoCs HS timers driver
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Most of the Allwinner SoCs (at this time, all but the A10) also have a
-High Speed timers that are not using the 24MHz oscillator as a source
-but rather the AHB clock running much faster.
-
-The IP is slightly different between the A10s/A13 and the one used in
-the A20/A31, since the latter have 4 timers available, while the former
-have only 2 of them.
-
-[dlezcano] : Fixed conflict with b788beda "Order Kconfig options
-               alphabetically"
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
----
- .../bindings/timer/allwinner,sun5i-a13-hstimer.txt |  22 +++
- arch/arm/mach-sunxi/Kconfig                        |   1 +
- drivers/clocksource/Kconfig                        |   4 +
- drivers/clocksource/Makefile                       |   1 +
- drivers/clocksource/timer-sun5i.c                  | 192 +++++++++++++++++++++
- 5 files changed, 220 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt
- create mode 100644 drivers/clocksource/timer-sun5i.c
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt
-@@ -0,0 +1,22 @@
-+Allwinner SoCs High Speed Timer Controller
-+
-+Required properties:
-+
-+- compatible :        should be "allwinner,sun5i-a13-hstimer" or
-+              "allwinner,sun7i-a20-hstimer"
-+- reg : Specifies base physical address and size of the registers.
-+- interrupts :        The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i
-+              one)
-+- clocks: phandle to the source clock (usually the AHB clock)
-+
-+Example:
-+
-+timer@01c60000 {
-+      compatible = "allwinner,sun7i-a20-hstimer";
-+      reg = <0x01c60000 0x1000>;
-+      interrupts = <0 51 1>,
-+                   <0 52 1>,
-+                   <0 53 1>,
-+                   <0 54 1>;
-+      clocks = <&ahb1_gates 19>;
-+};
---- a/arch/arm/mach-sunxi/Kconfig
-+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -13,3 +13,4 @@ config ARCH_SUNXI
-       select PINCTRL_SUNXI
-       select SPARSE_IRQ
-       select SUN4I_TIMER
-+      select SUN5I_HSTIMER
---- a/drivers/clocksource/Kconfig
-+++ b/drivers/clocksource/Kconfig
-@@ -37,6 +37,10 @@ config SUN4I_TIMER
-       select CLKSRC_MMIO
-       bool
-+config SUN5I_HSTIMER
-+      select CLKSRC_MMIO
-+      bool
-+
- config VT8500_TIMER
-       bool
---- a/drivers/clocksource/Makefile
-+++ b/drivers/clocksource/Makefile
-@@ -22,6 +22,7 @@ obj-$(CONFIG_ARCH_MOXART)    += moxart_time
- obj-$(CONFIG_ARCH_MXS)                += mxs_timer.o
- obj-$(CONFIG_ARCH_PRIMA2)     += timer-prima2.o
- obj-$(CONFIG_SUN4I_TIMER)     += sun4i_timer.o
-+obj-$(CONFIG_SUN5I_HSTIMER)   += timer-sun5i.o
- obj-$(CONFIG_ARCH_TEGRA)      += tegra20_timer.o
- obj-$(CONFIG_VT8500_TIMER)    += vt8500_timer.o
- obj-$(CONFIG_ARCH_NSPIRE)     += zevio-timer.o
---- /dev/null
-+++ b/drivers/clocksource/timer-sun5i.c
-@@ -0,0 +1,192 @@
-+/*
-+ * Allwinner SoCs hstimer driver.
-+ *
-+ * Copyright (C) 2013 Maxime Ripard
-+ *
-+ * Maxime Ripard <maxime.ripard@free-electrons.com>
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2.  This program is licensed "as is" without any
-+ * warranty of any kind, whether express or implied.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/clockchips.h>
-+#include <linux/delay.h>
-+#include <linux/interrupt.h>
-+#include <linux/irq.h>
-+#include <linux/irqreturn.h>
-+#include <linux/sched_clock.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/of_irq.h>
-+
-+#define TIMER_IRQ_EN_REG              0x00
-+#define TIMER_IRQ_EN(val)                     BIT(val)
-+#define TIMER_IRQ_ST_REG              0x04
-+#define TIMER_CTL_REG(val)            (0x20 * (val) + 0x10)
-+#define TIMER_CTL_ENABLE                      BIT(0)
-+#define TIMER_CTL_RELOAD                      BIT(1)
-+#define TIMER_CTL_CLK_PRES(val)                       (((val) & 0x7) << 4)
-+#define TIMER_CTL_ONESHOT                     BIT(7)
-+#define TIMER_INTVAL_LO_REG(val)      (0x20 * (val) + 0x14)
-+#define TIMER_INTVAL_HI_REG(val)      (0x20 * (val) + 0x18)
-+#define TIMER_CNTVAL_LO_REG(val)      (0x20 * (val) + 0x1c)
-+#define TIMER_CNTVAL_HI_REG(val)      (0x20 * (val) + 0x20)
-+
-+#define TIMER_SYNC_TICKS      3
-+
-+static void __iomem *timer_base;
-+static u32 ticks_per_jiffy;
-+
-+/*
-+ * When we disable a timer, we need to wait at least for 2 cycles of
-+ * the timer source clock. We will use for that the clocksource timer
-+ * that is already setup and runs at the same frequency than the other
-+ * timers, and we never will be disabled.
-+ */
-+static void sun5i_clkevt_sync(void)
-+{
-+      u32 old = readl(timer_base + TIMER_CNTVAL_LO_REG(1));
-+
-+      while ((old - readl(timer_base + TIMER_CNTVAL_LO_REG(1))) < TIMER_SYNC_TICKS)
-+              cpu_relax();
-+}
-+
-+static void sun5i_clkevt_time_stop(u8 timer)
-+{
-+      u32 val = readl(timer_base + TIMER_CTL_REG(timer));
-+      writel(val & ~TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG(timer));
-+
-+      sun5i_clkevt_sync();
-+}
-+
-+static void sun5i_clkevt_time_setup(u8 timer, u32 delay)
-+{
-+      writel(delay, timer_base + TIMER_INTVAL_LO_REG(timer));
-+}
-+
-+static void sun5i_clkevt_time_start(u8 timer, bool periodic)
-+{
-+      u32 val = readl(timer_base + TIMER_CTL_REG(timer));
-+
-+      if (periodic)
-+              val &= ~TIMER_CTL_ONESHOT;
-+      else
-+              val |= TIMER_CTL_ONESHOT;
-+
-+      writel(val | TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
-+             timer_base + TIMER_CTL_REG(timer));
-+}
-+
-+static void sun5i_clkevt_mode(enum clock_event_mode mode,
-+                            struct clock_event_device *clk)
-+{
-+      switch (mode) {
-+      case CLOCK_EVT_MODE_PERIODIC:
-+              sun5i_clkevt_time_stop(0);
-+              sun5i_clkevt_time_setup(0, ticks_per_jiffy);
-+              sun5i_clkevt_time_start(0, true);
-+              break;
-+      case CLOCK_EVT_MODE_ONESHOT:
-+              sun5i_clkevt_time_stop(0);
-+              sun5i_clkevt_time_start(0, false);
-+              break;
-+      case CLOCK_EVT_MODE_UNUSED:
-+      case CLOCK_EVT_MODE_SHUTDOWN:
-+      default:
-+              sun5i_clkevt_time_stop(0);
-+              break;
-+      }
-+}
-+
-+static int sun5i_clkevt_next_event(unsigned long evt,
-+                                 struct clock_event_device *unused)
-+{
-+      sun5i_clkevt_time_stop(0);
-+      sun5i_clkevt_time_setup(0, evt - TIMER_SYNC_TICKS);
-+      sun5i_clkevt_time_start(0, false);
-+
-+      return 0;
-+}
-+
-+static struct clock_event_device sun5i_clockevent = {
-+      .name = "sun5i_tick",
-+      .rating = 340,
-+      .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-+      .set_mode = sun5i_clkevt_mode,
-+      .set_next_event = sun5i_clkevt_next_event,
-+};
-+
-+
-+static irqreturn_t sun5i_timer_interrupt(int irq, void *dev_id)
-+{
-+      struct clock_event_device *evt = (struct clock_event_device *)dev_id;
-+
-+      writel(0x1, timer_base + TIMER_IRQ_ST_REG);
-+      evt->event_handler(evt);
-+
-+      return IRQ_HANDLED;
-+}
-+
-+static struct irqaction sun5i_timer_irq = {
-+      .name = "sun5i_timer0",
-+      .flags = IRQF_TIMER | IRQF_IRQPOLL,
-+      .handler = sun5i_timer_interrupt,
-+      .dev_id = &sun5i_clockevent,
-+};
-+
-+static u32 sun5i_timer_sched_read(void)
-+{
-+      return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1));
-+}
-+
-+static void __init sun5i_timer_init(struct device_node *node)
-+{
-+      unsigned long rate;
-+      struct clk *clk;
-+      int ret, irq;
-+      u32 val;
-+
-+      timer_base = of_iomap(node, 0);
-+      if (!timer_base)
-+              panic("Can't map registers");
-+
-+      irq = irq_of_parse_and_map(node, 0);
-+      if (irq <= 0)
-+              panic("Can't parse IRQ");
-+
-+      clk = of_clk_get(node, 0);
-+      if (IS_ERR(clk))
-+              panic("Can't get timer clock");
-+      clk_prepare_enable(clk);
-+      rate = clk_get_rate(clk);
-+
-+      writel(~0, timer_base + TIMER_INTVAL_LO_REG(1));
-+      writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
-+             timer_base + TIMER_CTL_REG(1));
-+
-+      setup_sched_clock(sun5i_timer_sched_read, 32, rate);
-+      clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name,
-+                            rate, 340, 32, clocksource_mmio_readl_down);
-+
-+      ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
-+
-+      ret = setup_irq(irq, &sun5i_timer_irq);
-+      if (ret)
-+              pr_warn("failed to setup irq %d\n", irq);
-+
-+      /* Enable timer0 interrupt */
-+      val = readl(timer_base + TIMER_IRQ_EN_REG);
-+      writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
-+
-+      sun5i_clockevent.cpumask = cpu_possible_mask;
-+      sun5i_clockevent.irq = irq;
-+
-+      clockevents_config_and_register(&sun5i_clockevent, rate,
-+                                      TIMER_SYNC_TICKS, 0xffffffff);
-+}
-+CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
-+                     sun5i_timer_init);
-+CLOCKSOURCE_OF_DECLARE(sun7i_a20, "allwinner,sun7i-a20-hstimer",
-+                     sun5i_timer_init);
diff --git a/target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch b/target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch
deleted file mode 100644 (file)
index b583a59..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-From 5ace5467690055b1772dcac69dd1377735b8a34b Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 7 Nov 2013 12:01:48 +0100
-Subject: [PATCH] ARM: sun5i: a10s: Add support for the High Speed Timers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The Allwinner A10s has support for two high speed timers. Now that we
-have a driver to support it, we can enable them in the device tree.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
----
- arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm/boot/dts/sun5i-a10s.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
-@@ -454,5 +454,12 @@
-                       clock-frequency = <100000>;
-                       status = "disabled";
-               };
-+
-+              timer@01c60000 {
-+                      compatible = "allwinner,sun5i-a13-hstimer";
-+                      reg = <0x01c60000 0x1000>;
-+                      interrupts = <82>, <83>;
-+                      clocks = <&ahb_gates 28>;
-+              };
-       };
- };
diff --git a/target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch b/target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch
deleted file mode 100644 (file)
index 629073b..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-From 22a3eff19679e0e592e061201690670a2f5fdba7 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 7 Nov 2013 12:01:48 +0100
-Subject: [PATCH] ARM: sun5i: a13: Add support for the High Speed Timers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The Allwinner A13 has support for two high speed timers. Now that we
-have a driver to support it, we can enable them in the device tree.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
----
- arch/arm/boot/dts/sun5i-a13.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm/boot/dts/sun5i-a13.dtsi
-+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
-@@ -391,5 +391,12 @@
-                       clock-frequency = <100000>;
-                       status = "disabled";
-               };
-+
-+              timer@01c60000 {
-+                      compatible = "allwinner,sun5i-a13-hstimer";
-+                      reg = <0x01c60000 0x1000>;
-+                      interrupts = <82>, <83>;
-+                      clocks = <&ahb_gates 28>;
-+              };
-       };
- };
diff --git a/target/linux/sunxi/patches-3.13/146-3-dt-sun7i-a20-add-hstimer.patch b/target/linux/sunxi/patches-3.13/146-3-dt-sun7i-a20-add-hstimer.patch
deleted file mode 100644 (file)
index dc9ce4f..0000000
+++ /dev/null
@@ -1,43 +0,0 @@
-From 6c23e1fa6bd220b8f5665c150c83d4c016d95482 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 7 Nov 2013 12:01:48 +0100
-Subject: [PATCH] ARM: sun7i: a20: Add support for the High Speed Timers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The Allwinner A20 has support for four high speed timers. Apart for the
-number of timers (4 vs 2), it's basically the same logic than the high
-speed timers found in the sun5i chips.
-
-Now that we have a driver to support it, we can enable them in the
-device tree.
-
-[dlezcano] : Fixed conflict with 428abbb8 "Enable the I2C controllers"
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Emilio López <emilio@elopez.com.ar>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -552,6 +552,16 @@
-                       status = "disabled";
-               };
-+              hstimer@01c60000 {
-+                      compatible = "allwinner,sun7i-a20-hstimer";
-+                      reg = <0x01c60000 0x1000>;
-+                      interrupts = <0 81 4>,
-+                                   <0 82 4>,
-+                                   <0 83 4>,
-+                                   <0 84 4>;
-+                      clocks = <&ahb_gates 28>;
-+              };
-+
-               gic: interrupt-controller@01c81000 {
-                       compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
-                       reg = <0x01c81000 0x1000>,
diff --git a/target/linux/sunxi/patches-3.13/146-4-dt-sun6i-a31-add-hstimer.patch b/target/linux/sunxi/patches-3.13/146-4-dt-sun6i-a31-add-hstimer.patch
deleted file mode 100644 (file)
index 7014b48..0000000
+++ /dev/null
@@ -1,37 +0,0 @@
-From 28a9c5d93113cab73dd3a4b4a74a983151c08b9d Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Fri, 20 Dec 2013 22:41:09 +0100
-Subject: [PATCH] ARM: sun6i: a31: Add support for the High Speed Timers
-
-The Allwinner A31 has support for four high speed timers. Apart for the
-number of timers (4 vs 2), it's basically the same logic than the high
-speed timers found in the sun5i chips.
-
-Now that we have a driver to support it, we can enable them in the
-device tree.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
----
- arch/arm/boot/dts/sun6i-a31.dtsi | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/arch/arm/boot/dts/sun6i-a31.dtsi
-+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
-@@ -312,6 +312,17 @@
-                       status = "disabled";
-               };
-+              hstimer@01c60000 {
-+                      compatible = "allwinner,sun7i-a20-hstimer";
-+                      reg = <0x01c60000 0x1000>;
-+                      interrupts = <0 51 4>,
-+                                   <0 52 4>,
-+                                   <0 53 4>,
-+                                   <0 54 4>;
-+                      clocks = <&ahb1_gates 19>;
-+                      resets = <&ahb1_rst 19>;
-+              };
-+
-               gic: interrupt-controller@01c81000 {
-                       compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
-                       reg = <0x01c81000 0x1000>,
diff --git a/target/linux/sunxi/patches-3.13/150-1-dt-sun7i-add-gmac-clock-node.patch b/target/linux/sunxi/patches-3.13/150-1-dt-sun7i-add-gmac-clock-node.patch
deleted file mode 100644 (file)
index 16c0aa0..0000000
+++ /dev/null
@@ -1,56 +0,0 @@
-From bc7a0478e6dac1304fdfdb6f3056f438b632da62 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:48 +0800
-Subject: [PATCH] ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI
-
-The GMAC uses 1 of 2 sources for its transmit clock, depending on the
-PHY interface mode. Add both sources as dummy clocks, and as parents
-to the GMAC clock node.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
-index cefd7ac..7d98edc 100644
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -322,6 +322,34 @@
-               };
-               /*
-+               * The following two are dummy clocks, placeholders used in the gmac_tx
-+               * clock. The gmac driver will choose one parent depending on the PHY
-+               * interface mode, using clk_set_rate auto-reparenting.
-+               * The actual TX clock rate is not controlled by the gmac_tx clock.
-+               */
-+              mii_phy_tx_clk: clk@2 {
-+                      #clock-cells = <0>;
-+                      compatible = "fixed-clock";
-+                      clock-frequency = <25000000>;
-+                      clock-output-names = "mii_phy_tx";
-+              };
-+
-+              gmac_int_tx_clk: clk@3 {
-+                      #clock-cells = <0>;
-+                      compatible = "fixed-clock";
-+                      clock-frequency = <125000000>;
-+                      clock-output-names = "gmac_int_tx";
-+              };
-+
-+              gmac_tx_clk: clk@01c20164 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun7i-a20-gmac-clk";
-+                      reg = <0x01c20164 0x4>;
-+                      clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
-+                      clock-output-names = "gmac_tx";
-+              };
-+
-+              /*
-                * Dummy clock used by output clocks
-                */
-               osc24M_32k: clk@1 {
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/150-2-dt-sun7i-add-gmac-ctrler-node.patch b/target/linux/sunxi/patches-3.13/150-2-dt-sun7i-add-gmac-ctrler-node.patch
deleted file mode 100644 (file)
index 5d68104..0000000
+++ /dev/null
@@ -1,39 +0,0 @@
-From 7584e81f6d9fecf0ad6e2854654b183432adb918 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:49 +0800
-Subject: [PATCH] ARM: dts: sun7i: Add GMAC controller node to sun7i DTSI
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
-index 7d98edc..87eab0d 100644
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -645,6 +645,21 @@
-                       status = "disabled";
-               };
-+              gmac: ethernet@01c50000 {
-+                      compatible = "allwinner,sun7i-a20-gmac";
-+                      reg = <0x01c50000 0x10000>;
-+                      interrupts = <0 85 4>;
-+                      interrupt-names = "macirq";
-+                      clocks = <&ahb_gates 49>, <&gmac_tx_clk>;
-+                      clock-names = "stmmaceth", "allwinner_gmac_tx";
-+                      snps,pbl = <2>;
-+                      snps,fixed-burst;
-+                      snps,force_sf_dma_mode;
-+                      status = "disabled";
-+                      #address-cells = <1>;
-+                      #size-cells = <0>;
-+              };
-+
-               hstimer@01c60000 {
-                       compatible = "allwinner,sun7i-a20-hstimer";
-                       reg = <0x01c60000 0x1000>;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/150-3-dt-sun7i-gmac-add-pinmuxing.patch b/target/linux/sunxi/patches-3.13/150-3-dt-sun7i-gmac-add-pinmuxing.patch
deleted file mode 100644 (file)
index 01523f0..0000000
+++ /dev/null
@@ -1,53 +0,0 @@
-From 249ac8d24efdc07f521b796b96796ffa55abe0a5 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:50 +0800
-Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for the GMAC
-
-The A20 has EMAC and GMAC muxed on the same pins.
-Add pin sets with gmac function for MII and RGMII mode to the DTSI.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
-index 87eab0d..9bb6fdf 100644
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -484,6 +484,32 @@
-                               allwinner,drive = <0>;
-                               allwinner,pull = <0>;
-                       };
-+
-+                      gmac_pins_mii_a: gmac_mii@0 {
-+                              allwinner,pins = "PA0", "PA1", "PA2",
-+                                              "PA3", "PA4", "PA5", "PA6",
-+                                              "PA7", "PA8", "PA9", "PA10",
-+                                              "PA11", "PA12", "PA13", "PA14",
-+                                              "PA15", "PA16";
-+                              allwinner,function = "gmac";
-+                              allwinner,drive = <0>;
-+                              allwinner,pull = <0>;
-+                      };
-+
-+                      gmac_pins_rgmii_a: gmac_rgmii@0 {
-+                              allwinner,pins = "PA0", "PA1", "PA2",
-+                                              "PA3", "PA4", "PA5", "PA6",
-+                                              "PA7", "PA8", "PA10",
-+                                              "PA11", "PA12", "PA13",
-+                                              "PA15", "PA16";
-+                              allwinner,function = "gmac";
-+                              /*
-+                               * data lines in RGMII mode use DDR mode
-+                               * and need a higher signal drive strength
-+                               */
-+                              allwinner,drive = <3>;
-+                              allwinner,pull = <0>;
-+                      };
-               };
-               timer@01c20c00 {
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-0-stmmac-fixup-0.patch b/target/linux/sunxi/patches-3.13/151-0-stmmac-fixup-0.patch
deleted file mode 100644 (file)
index 2c908ac..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-From 33ba4079ea8c611c1aeca34f2d6d53a8214c14c5 Mon Sep 17 00:00:00 2001
-From: Rashika Kheria <rashika.kheria@gmail.com>
-Date: Thu, 19 Dec 2013 14:19:44 +0530
-Subject: [PATCH] drivers: net: Mark functions as static in stmmac_platform.c
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This patch marks the function stmmac_pltfr_freeze() and
-stmmac_pltfr_restore() in stmmac_platform.c as static because they are
-not used outside this file.
-
-Thus, it also removes the following warnings in
-ethernet/stmicro/stmmac/stmmac_platform.c:
-
-drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c:222:5: warning: no previous prototype for ‘stmmac_pltfr_freeze’ [-Wmissing-prototypes]
-drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c:236:5: warning: no previous prototype for ‘stmmac_pltfr_restore’ [-Wmissing-prototypes]
-
-Signed-off-by: Rashika Kheria <rashika.kheria@gmail.com>
-Reviewed-by: Josh Triplett <josh@joshtriplett.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index 51c9069..38bd1f4 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -219,7 +219,7 @@ static int stmmac_pltfr_resume(struct device *dev)
-       return stmmac_resume(ndev);
- }
--int stmmac_pltfr_freeze(struct device *dev)
-+static int stmmac_pltfr_freeze(struct device *dev)
- {
-       int ret;
-       struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
-@@ -233,7 +233,7 @@ int stmmac_pltfr_freeze(struct device *dev)
-       return ret;
- }
--int stmmac_pltfr_restore(struct device *dev)
-+static int stmmac_pltfr_restore(struct device *dev)
- {
-       struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
-       struct net_device *ndev = dev_get_drvdata(dev);
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-1-stmmac-fixup-1.patch b/target/linux/sunxi/patches-3.13/151-1-stmmac-fixup-1.patch
deleted file mode 100644 (file)
index efd7aff..0000000
+++ /dev/null
@@ -1,77 +0,0 @@
-From 9cbadf094d9d479413dc8cfa77dff9e732184337 Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:51:43 +0000
-Subject: [PATCH] net: stmmac: support max-speed device tree property
-
-This patch adds support to "max-speed" property which is a standard
-Ethernet device tree property. max-speed specifies maximum speed
-(specified in megabits per second) supported the device.
-
-Depending on the clocking schemes some of the boards can only support
-few link speeds, so having a way to limit the link speed in the mac
-driver would allow such setups to work reliably.
-
-Without this patch there is no way to tell the driver to limit the
-link speed.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c     | 4 +++-
- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ++++
- include/linux/stmmac.h                                | 1 +
- 3 files changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index ecdc8ab..15192c0 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -776,6 +776,7 @@ static int stmmac_init_phy(struct net_device *dev)
-       char phy_id_fmt[MII_BUS_ID_SIZE + 3];
-       char bus_id[MII_BUS_ID_SIZE];
-       int interface = priv->plat->interface;
-+      int max_speed = priv->plat->max_speed;
-       priv->oldlink = 0;
-       priv->speed = 0;
-       priv->oldduplex = -1;
-@@ -800,7 +801,8 @@ static int stmmac_init_phy(struct net_device *dev)
-       /* Stop Advertising 1000BASE Capability if interface is not GMII */
-       if ((interface == PHY_INTERFACE_MODE_MII) ||
--          (interface == PHY_INTERFACE_MODE_RMII))
-+          (interface == PHY_INTERFACE_MODE_RMII) ||
-+              (max_speed < 1000 &&  max_speed > 0))
-               phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
-                                        SUPPORTED_1000baseT_Full);
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index 38bd1f4..9377ee6 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -42,6 +42,10 @@ static int stmmac_probe_config_dt(struct platform_device *pdev,
-       *mac = of_get_mac_address(np);
-       plat->interface = of_get_phy_mode(np);
-+      /* Get max speed of operation from device tree */
-+      if (of_property_read_u32(np, "max-speed", &plat->max_speed))
-+              plat->max_speed = -1;
-+
-       plat->bus_id = of_alias_get_id(np, "ethernet");
-       if (plat->bus_id < 0)
-               plat->bus_id = 0;
-diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
-index bb5deb0..33ace71 100644
---- a/include/linux/stmmac.h
-+++ b/include/linux/stmmac.h
-@@ -110,6 +110,7 @@ struct plat_stmmacenet_data {
-       int force_sf_dma_mode;
-       int force_thresh_dma_mode;
-       int riwt_off;
-+      int max_speed;
-       void (*fix_mac_speed)(void *priv, unsigned int speed);
-       void (*bus_setup)(void __iomem *ioaddr);
-       int (*init)(struct platform_device *pdev);
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-2-stmmac-fixup-2.patch b/target/linux/sunxi/patches-3.13/151-2-stmmac-fixup-2.patch
deleted file mode 100644 (file)
index 0f2527f..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 984203ceff27e9d6d94fbae4b043fc9afb658121 Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:51:58 +0000
-Subject: [PATCH] net: stmmac: mdio: remove reset gpio free
-
-This patch removes gpio_free for reset line of the phy, driver stores
-the gpio number in its private data-structure to use in future. As the
-driver uses this pin in future this pin should not be freed.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
-index fe7bc99..aab12d2 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
-@@ -166,7 +166,6 @@ static int stmmac_mdio_reset(struct mii_bus *bus)
-                       udelay(data->delays[1]);
-                       gpio_set_value(reset_gpio, active_low ? 1 : 0);
-                       udelay(data->delays[2]);
--                      gpio_free(reset_gpio);
-               }
-       }
- #endif
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-3-stmmac-fixup-3.patch b/target/linux/sunxi/patches-3.13/151-3-stmmac-fixup-3.patch
deleted file mode 100644 (file)
index d9c843a..0000000
+++ /dev/null
@@ -1,223 +0,0 @@
-From 09f8d6960b69e474eef9d2aebdd0d536d00af0c8 Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:52:06 +0000
-Subject: [PATCH] net: stmmac: move dma allocation to new function
-
-This patch moves dma resource allocation to a new function
-alloc_dma_desc_resources, the reason for moving this to a new function
-is to keep the memory allocations in a separate function. One more reason
-it to get suspend and hibernation cases working without releasing and
-allocating these resources during suspend-resume and freeze-restore
-cases.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 169 +++++++++++-----------
- 1 file changed, 85 insertions(+), 84 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index 15192c0..532f2b4 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -996,66 +996,6 @@ static int init_dma_desc_rings(struct net_device *dev)
-               pr_debug("%s: txsize %d, rxsize %d, bfsize %d\n", __func__,
-                        txsize, rxsize, bfsize);
--      if (priv->extend_desc) {
--              priv->dma_erx = dma_alloc_coherent(priv->device, rxsize *
--                                                 sizeof(struct
--                                                        dma_extended_desc),
--                                                 &priv->dma_rx_phy,
--                                                 GFP_KERNEL);
--              if (!priv->dma_erx)
--                      goto err_dma;
--
--              priv->dma_etx = dma_alloc_coherent(priv->device, txsize *
--                                                 sizeof(struct
--                                                        dma_extended_desc),
--                                                 &priv->dma_tx_phy,
--                                                 GFP_KERNEL);
--              if (!priv->dma_etx) {
--                      dma_free_coherent(priv->device, priv->dma_rx_size *
--                                      sizeof(struct dma_extended_desc),
--                                      priv->dma_erx, priv->dma_rx_phy);
--                      goto err_dma;
--              }
--      } else {
--              priv->dma_rx = dma_alloc_coherent(priv->device, rxsize *
--                                                sizeof(struct dma_desc),
--                                                &priv->dma_rx_phy,
--                                                GFP_KERNEL);
--              if (!priv->dma_rx)
--                      goto err_dma;
--
--              priv->dma_tx = dma_alloc_coherent(priv->device, txsize *
--                                                sizeof(struct dma_desc),
--                                                &priv->dma_tx_phy,
--                                                GFP_KERNEL);
--              if (!priv->dma_tx) {
--                      dma_free_coherent(priv->device, priv->dma_rx_size *
--                                      sizeof(struct dma_desc),
--                                      priv->dma_rx, priv->dma_rx_phy);
--                      goto err_dma;
--              }
--      }
--
--      priv->rx_skbuff_dma = kmalloc_array(rxsize, sizeof(dma_addr_t),
--                                          GFP_KERNEL);
--      if (!priv->rx_skbuff_dma)
--              goto err_rx_skbuff_dma;
--
--      priv->rx_skbuff = kmalloc_array(rxsize, sizeof(struct sk_buff *),
--                                      GFP_KERNEL);
--      if (!priv->rx_skbuff)
--              goto err_rx_skbuff;
--
--      priv->tx_skbuff_dma = kmalloc_array(txsize, sizeof(dma_addr_t),
--                                          GFP_KERNEL);
--      if (!priv->tx_skbuff_dma)
--              goto err_tx_skbuff_dma;
--
--      priv->tx_skbuff = kmalloc_array(txsize, sizeof(struct sk_buff *),
--                                      GFP_KERNEL);
--      if (!priv->tx_skbuff)
--              goto err_tx_skbuff;
--
-       if (netif_msg_probe(priv)) {
-               pr_debug("(%s) dma_rx_phy=0x%08x dma_tx_phy=0x%08x\n", __func__,
-                        (u32) priv->dma_rx_phy, (u32) priv->dma_tx_phy);
-@@ -1123,30 +1063,6 @@ static int init_dma_desc_rings(struct net_device *dev)
- err_init_rx_buffers:
-       while (--i >= 0)
-               stmmac_free_rx_buffers(priv, i);
--      kfree(priv->tx_skbuff);
--err_tx_skbuff:
--      kfree(priv->tx_skbuff_dma);
--err_tx_skbuff_dma:
--      kfree(priv->rx_skbuff);
--err_rx_skbuff:
--      kfree(priv->rx_skbuff_dma);
--err_rx_skbuff_dma:
--      if (priv->extend_desc) {
--              dma_free_coherent(priv->device, priv->dma_tx_size *
--                                sizeof(struct dma_extended_desc),
--                                priv->dma_etx, priv->dma_tx_phy);
--              dma_free_coherent(priv->device, priv->dma_rx_size *
--                                sizeof(struct dma_extended_desc),
--                                priv->dma_erx, priv->dma_rx_phy);
--      } else {
--              dma_free_coherent(priv->device,
--                              priv->dma_tx_size * sizeof(struct dma_desc),
--                              priv->dma_tx, priv->dma_tx_phy);
--              dma_free_coherent(priv->device,
--                              priv->dma_rx_size * sizeof(struct dma_desc),
--                              priv->dma_rx, priv->dma_rx_phy);
--      }
--err_dma:
-       return ret;
- }
-@@ -1182,6 +1098,85 @@ static void dma_free_tx_skbufs(struct stmmac_priv *priv)
-       }
- }
-+static int alloc_dma_desc_resources(struct stmmac_priv *priv)
-+{
-+      unsigned int txsize = priv->dma_tx_size;
-+      unsigned int rxsize = priv->dma_rx_size;
-+      int ret = -ENOMEM;
-+
-+      priv->rx_skbuff_dma = kmalloc_array(rxsize, sizeof(dma_addr_t),
-+                                          GFP_KERNEL);
-+      if (!priv->rx_skbuff_dma)
-+              return -ENOMEM;
-+
-+      priv->rx_skbuff = kmalloc_array(rxsize, sizeof(struct sk_buff *),
-+                                      GFP_KERNEL);
-+      if (!priv->rx_skbuff)
-+              goto err_rx_skbuff;
-+
-+      priv->tx_skbuff_dma = kmalloc_array(txsize, sizeof(dma_addr_t),
-+                                          GFP_KERNEL);
-+      if (!priv->tx_skbuff_dma)
-+              goto err_tx_skbuff_dma;
-+
-+      priv->tx_skbuff = kmalloc_array(txsize, sizeof(struct sk_buff *),
-+                                      GFP_KERNEL);
-+      if (!priv->tx_skbuff)
-+              goto err_tx_skbuff;
-+
-+      if (priv->extend_desc) {
-+              priv->dma_erx = dma_alloc_coherent(priv->device, rxsize *
-+                                                 sizeof(struct
-+                                                        dma_extended_desc),
-+                                                 &priv->dma_rx_phy,
-+                                                 GFP_KERNEL);
-+              if (!priv->dma_erx)
-+                      goto err_dma;
-+
-+              priv->dma_etx = dma_alloc_coherent(priv->device, txsize *
-+                                                 sizeof(struct
-+                                                        dma_extended_desc),
-+                                                 &priv->dma_tx_phy,
-+                                                 GFP_KERNEL);
-+              if (!priv->dma_etx) {
-+                      dma_free_coherent(priv->device, priv->dma_rx_size *
-+                                      sizeof(struct dma_extended_desc),
-+                                      priv->dma_erx, priv->dma_rx_phy);
-+                      goto err_dma;
-+              }
-+      } else {
-+              priv->dma_rx = dma_alloc_coherent(priv->device, rxsize *
-+                                                sizeof(struct dma_desc),
-+                                                &priv->dma_rx_phy,
-+                                                GFP_KERNEL);
-+              if (!priv->dma_rx)
-+                      goto err_dma;
-+
-+              priv->dma_tx = dma_alloc_coherent(priv->device, txsize *
-+                                                sizeof(struct dma_desc),
-+                                                &priv->dma_tx_phy,
-+                                                GFP_KERNEL);
-+              if (!priv->dma_tx) {
-+                      dma_free_coherent(priv->device, priv->dma_rx_size *
-+                                      sizeof(struct dma_desc),
-+                                      priv->dma_rx, priv->dma_rx_phy);
-+                      goto err_dma;
-+              }
-+      }
-+
-+      return 0;
-+
-+err_dma:
-+      kfree(priv->tx_skbuff);
-+err_tx_skbuff:
-+      kfree(priv->tx_skbuff_dma);
-+err_tx_skbuff_dma:
-+      kfree(priv->rx_skbuff);
-+err_rx_skbuff:
-+      kfree(priv->rx_skbuff_dma);
-+      return ret;
-+}
-+
- static void free_dma_desc_resources(struct stmmac_priv *priv)
- {
-       /* Release the DMA TX/RX socket buffers */
-@@ -1623,6 +1618,12 @@ static int stmmac_open(struct net_device *dev)
-       priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
-       priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
-+      alloc_dma_desc_resources(priv);
-+      if (ret < 0) {
-+              pr_err("%s: DMA descriptors allocation failed\n", __func__);
-+              goto dma_desc_error;
-+      }
-+
-       ret = init_dma_desc_rings(dev);
-       if (ret < 0) {
-               pr_err("%s: DMA descriptors initialization failed\n", __func__);
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-4-stmmac-fixup-4.patch b/target/linux/sunxi/patches-3.13/151-4-stmmac-fixup-4.patch
deleted file mode 100644 (file)
index e006fda..0000000
+++ /dev/null
@@ -1,214 +0,0 @@
-From 523f11b5d4fd72efb72b04cd7006bfd1d1d4f341 Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:52:14 +0000
-Subject: [PATCH] net: stmmac: move hardware setup for stmmac_open to new
- function
-
-This patch moves hardware setup part of the code in stmmac_open to a new
-function stmmac_hw_setup, the reason for doing this is to make hw
-initialization independent function so that PM functions can re-use it to
-re-initialize the IP after returning from low power state.
-This will also avoid code duplication across stmmac_resume/restore and
-stmmac_open.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 155 ++++++++++++----------
- 1 file changed, 88 insertions(+), 67 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index 532f2b4..341c8dc3 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -1586,6 +1586,86 @@ static void stmmac_init_tx_coalesce(struct stmmac_priv *priv)
- }
- /**
-+ * stmmac_hw_setup: setup mac in a usable state.
-+ *  @dev : pointer to the device structure.
-+ *  Description:
-+ *  This function sets up the ip in a usable state.
-+ *  Return value:
-+ *  0 on success and an appropriate (-)ve integer as defined in errno.h
-+ *  file on failure.
-+ */
-+static int stmmac_hw_setup(struct net_device *dev)
-+{
-+      struct stmmac_priv *priv = netdev_priv(dev);
-+      int ret;
-+
-+      ret = init_dma_desc_rings(dev);
-+      if (ret < 0) {
-+              pr_err("%s: DMA descriptors initialization failed\n", __func__);
-+              return ret;
-+      }
-+      /* DMA initialization and SW reset */
-+      ret = stmmac_init_dma_engine(priv);
-+      if (ret < 0) {
-+              pr_err("%s: DMA engine initialization failed\n", __func__);
-+              return ret;
-+      }
-+
-+      /* Copy the MAC addr into the HW  */
-+      priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
-+
-+      /* If required, perform hw setup of the bus. */
-+      if (priv->plat->bus_setup)
-+              priv->plat->bus_setup(priv->ioaddr);
-+
-+      /* Initialize the MAC Core */
-+      priv->hw->mac->core_init(priv->ioaddr);
-+
-+      /* Enable the MAC Rx/Tx */
-+      stmmac_set_mac(priv->ioaddr, true);
-+
-+      /* Set the HW DMA mode and the COE */
-+      stmmac_dma_operation_mode(priv);
-+
-+      stmmac_mmc_setup(priv);
-+
-+      ret = stmmac_init_ptp(priv);
-+      if (ret)
-+              pr_warn("%s: failed PTP initialisation\n", __func__);
-+
-+#ifdef CONFIG_STMMAC_DEBUG_FS
-+      ret = stmmac_init_fs(dev);
-+      if (ret < 0)
-+              pr_warn("%s: failed debugFS registration\n", __func__);
-+#endif
-+      /* Start the ball rolling... */
-+      pr_debug("%s: DMA RX/TX processes started...\n", dev->name);
-+      priv->hw->dma->start_tx(priv->ioaddr);
-+      priv->hw->dma->start_rx(priv->ioaddr);
-+
-+      /* Dump DMA/MAC registers */
-+      if (netif_msg_hw(priv)) {
-+              priv->hw->mac->dump_regs(priv->ioaddr);
-+              priv->hw->dma->dump_regs(priv->ioaddr);
-+      }
-+      priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
-+
-+      priv->eee_enabled = stmmac_eee_init(priv);
-+
-+      stmmac_init_tx_coalesce(priv);
-+
-+      if ((priv->use_riwt) && (priv->hw->dma->rx_watchdog)) {
-+              priv->rx_riwt = MAX_DMA_RIWT;
-+              priv->hw->dma->rx_watchdog(priv->ioaddr, MAX_DMA_RIWT);
-+      }
-+
-+      if (priv->pcs && priv->hw->mac->ctrl_ane)
-+              priv->hw->mac->ctrl_ane(priv->ioaddr, 0);
-+
-+      return 0;
-+}
-+
-+/**
-  *  stmmac_open - open entry point of the driver
-  *  @dev : pointer to the device structure.
-  *  Description:
-@@ -1613,6 +1693,10 @@ static int stmmac_open(struct net_device *dev)
-               }
-       }
-+      /* Extra statistics */
-+      memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
-+      priv->xstats.threshold = tc;
-+
-       /* Create and initialize the TX/RX descriptors chains. */
-       priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
-       priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
-@@ -1624,28 +1708,14 @@ static int stmmac_open(struct net_device *dev)
-               goto dma_desc_error;
-       }
--      ret = init_dma_desc_rings(dev);
-+      ret = stmmac_hw_setup(dev);
-       if (ret < 0) {
--              pr_err("%s: DMA descriptors initialization failed\n", __func__);
--              goto dma_desc_error;
--      }
--
--      /* DMA initialization and SW reset */
--      ret = stmmac_init_dma_engine(priv);
--      if (ret < 0) {
--              pr_err("%s: DMA engine initialization failed\n", __func__);
-+              pr_err("%s: Hw setup failed\n", __func__);
-               goto init_error;
-       }
--      /* Copy the MAC addr into the HW  */
--      priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
--
--      /* If required, perform hw setup of the bus. */
--      if (priv->plat->bus_setup)
--              priv->plat->bus_setup(priv->ioaddr);
--
--      /* Initialize the MAC Core */
--      priv->hw->mac->core_init(priv->ioaddr);
-+      if (priv->phydev)
-+              phy_start(priv->phydev);
-       /* Request the IRQ lines */
-       ret = request_irq(dev->irq, stmmac_interrupt,
-@@ -1678,55 +1748,6 @@ static int stmmac_open(struct net_device *dev)
-               }
-       }
--      /* Enable the MAC Rx/Tx */
--      stmmac_set_mac(priv->ioaddr, true);
--
--      /* Set the HW DMA mode and the COE */
--      stmmac_dma_operation_mode(priv);
--
--      /* Extra statistics */
--      memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
--      priv->xstats.threshold = tc;
--
--      stmmac_mmc_setup(priv);
--
--      ret = stmmac_init_ptp(priv);
--      if (ret)
--              pr_warn("%s: failed PTP initialisation\n", __func__);
--
--#ifdef CONFIG_STMMAC_DEBUG_FS
--      ret = stmmac_init_fs(dev);
--      if (ret < 0)
--              pr_warn("%s: failed debugFS registration\n", __func__);
--#endif
--      /* Start the ball rolling... */
--      pr_debug("%s: DMA RX/TX processes started...\n", dev->name);
--      priv->hw->dma->start_tx(priv->ioaddr);
--      priv->hw->dma->start_rx(priv->ioaddr);
--
--      /* Dump DMA/MAC registers */
--      if (netif_msg_hw(priv)) {
--              priv->hw->mac->dump_regs(priv->ioaddr);
--              priv->hw->dma->dump_regs(priv->ioaddr);
--      }
--
--      if (priv->phydev)
--              phy_start(priv->phydev);
--
--      priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
--
--      priv->eee_enabled = stmmac_eee_init(priv);
--
--      stmmac_init_tx_coalesce(priv);
--
--      if ((priv->use_riwt) && (priv->hw->dma->rx_watchdog)) {
--              priv->rx_riwt = MAX_DMA_RIWT;
--              priv->hw->dma->rx_watchdog(priv->ioaddr, MAX_DMA_RIWT);
--      }
--
--      if (priv->pcs && priv->hw->mac->ctrl_ane)
--              priv->hw->mac->ctrl_ane(priv->ioaddr, 0);
--
-       napi_enable(&priv->napi);
-       netif_start_queue(dev);
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-5-stmmac-fixup-5.patch b/target/linux/sunxi/patches-3.13/151-5-stmmac-fixup-5.patch
deleted file mode 100644 (file)
index 1a60574..0000000
+++ /dev/null
@@ -1,45 +0,0 @@
-From 073752aa59b3db120b2508d5bdd0598ada25fd25 Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:52:27 +0000
-Subject: [PATCH] net: stmmac: make stmmac_mdio_reset non-static
-
-This patch promotes stmmac_mdio_reset function from static to
-non-static, so that power management functions can decide to reset if
-the IP comes out from lowe power state specially hibernation cases.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac.h      | 1 +
- drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 2 +-
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-index 92be6b3..5a568015 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-@@ -110,6 +110,7 @@ struct stmmac_priv {
- int stmmac_mdio_unregister(struct net_device *ndev);
- int stmmac_mdio_register(struct net_device *ndev);
-+int stmmac_mdio_reset(struct mii_bus *mii);
- void stmmac_set_ethtool_ops(struct net_device *netdev);
- extern const struct stmmac_desc_ops enh_desc_ops;
- extern const struct stmmac_desc_ops ndesc_ops;
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
-index aab12d2..a468eb1 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
-@@ -128,7 +128,7 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
-  * @bus: points to the mii_bus structure
-  * Description: reset the MII bus
-  */
--static int stmmac_mdio_reset(struct mii_bus *bus)
-+int stmmac_mdio_reset(struct mii_bus *bus)
- {
- #if defined(CONFIG_STMMAC_PLATFORM)
-       struct net_device *ndev = bus->priv;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-6-stmmac-fixup-6.patch b/target/linux/sunxi/patches-3.13/151-6-stmmac-fixup-6.patch
deleted file mode 100644 (file)
index 25564c6..0000000
+++ /dev/null
@@ -1,57 +0,0 @@
-From 623997fb90eab7a135c2c68a332c8450a488baca Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:52:35 +0000
-Subject: [PATCH] net: stmmac: fix power management suspend-resume case
-
-The driver PM resume assumes that the IP is still powered up and the
-all the register contents are not disturbed when it comes out of low
-power suspend case. This assumption is wrong, basically the driver
-should not consider any state of registers after it comes out of low
-power. However driver can keep the part of the IP powered up if its a
-wake up source. But it can not assume the register state of the IP. Also
-its possible that SOC glue layer can take the power off the IP if its
-not wake-up source to reduce the power consumption.
-
-This patch re initializes hardware by calling stmmac_hw_setup function in
-resume case.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 13 +++++++------
- 1 file changed, 7 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index 341c8dc3..742a83f 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -2887,18 +2887,19 @@ int stmmac_resume(struct net_device *ndev)
-        * this bit because it can generate problems while resuming
-        * from another devices (e.g. serial console).
-        */
--      if (device_may_wakeup(priv->device))
-+      if (device_may_wakeup(priv->device)) {
-               priv->hw->mac->pmt(priv->ioaddr, 0);
--      else
-+      } else {
-               /* enable the clk prevously disabled */
-               clk_prepare_enable(priv->stmmac_clk);
-+              /* reset the phy so that it's ready */
-+              if (priv->mii)
-+                      stmmac_mdio_reset(priv->mii);
-+      }
-       netif_device_attach(ndev);
--      /* Enable the MAC and DMA */
--      stmmac_set_mac(priv->ioaddr, true);
--      priv->hw->dma->start_tx(priv->ioaddr);
--      priv->hw->dma->start_rx(priv->ioaddr);
-+      stmmac_hw_setup(ndev);
-       napi_enable(&priv->napi);
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-7-stmmac-fixup-7.patch b/target/linux/sunxi/patches-3.13/151-7-stmmac-fixup-7.patch
deleted file mode 100644 (file)
index 67e0c5b..0000000
+++ /dev/null
@@ -1,146 +0,0 @@
-From 33a23e223749c45ff8099ff9baa235301a3ad07f Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:52:44 +0000
-Subject: [PATCH] net: stmmac: use suspend functions for hibernation
-
-In hibernation freeze case the driver just releases the resources like
-dma buffers, irqs, unregisters the drivers and during restore it does
-register, request the resources. This is not really necessary, as part
-of power management all the data structures are intact, all the
-previously allocated resources can be used after coming out of low
-power.
-
-This patch uses the suspend and resume callbacks for freeze and
-restore which initializes the hardware correctly without unregistering
-or releasing the resources, this should also help in reducing the time
-to restore.
-
-Also this patch fixes a bug in stmmac_pltfr_restore and
-stmmac_pltfr_freeze where it tries to get hold of platform data via
-dev_get_platdata call, which would return NULL in device tree cases and
-the next if statement would crash as there is no NULL check.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac.h       |  2 -
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  | 16 --------
- .../net/ethernet/stmicro/stmmac/stmmac_platform.c  | 44 ++++++----------------
- 3 files changed, 12 insertions(+), 50 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-index 5a568015..027f1dd 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-@@ -117,8 +117,6 @@ struct stmmac_priv {
- extern const struct stmmac_hwtimestamp stmmac_ptp;
- int stmmac_ptp_register(struct stmmac_priv *priv);
- void stmmac_ptp_unregister(struct stmmac_priv *priv);
--int stmmac_freeze(struct net_device *ndev);
--int stmmac_restore(struct net_device *ndev);
- int stmmac_resume(struct net_device *ndev);
- int stmmac_suspend(struct net_device *ndev);
- int stmmac_dvr_remove(struct net_device *ndev);
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index 742a83f..c1298a0 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -2912,22 +2912,6 @@ int stmmac_resume(struct net_device *ndev)
-       return 0;
- }
--
--int stmmac_freeze(struct net_device *ndev)
--{
--      if (!ndev || !netif_running(ndev))
--              return 0;
--
--      return stmmac_release(ndev);
--}
--
--int stmmac_restore(struct net_device *ndev)
--{
--      if (!ndev || !netif_running(ndev))
--              return 0;
--
--      return stmmac_open(ndev);
--}
- #endif /* CONFIG_PM */
- /* Driver can be configured w/ and w/ both PCI and Platf drivers
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index 9377ee6..6d0bf22 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -211,55 +211,35 @@ static int stmmac_pltfr_remove(struct platform_device *pdev)
- #ifdef CONFIG_PM
- static int stmmac_pltfr_suspend(struct device *dev)
- {
--      struct net_device *ndev = dev_get_drvdata(dev);
--
--      return stmmac_suspend(ndev);
--}
--
--static int stmmac_pltfr_resume(struct device *dev)
--{
--      struct net_device *ndev = dev_get_drvdata(dev);
--
--      return stmmac_resume(ndev);
--}
--
--static int stmmac_pltfr_freeze(struct device *dev)
--{
-       int ret;
--      struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
-       struct net_device *ndev = dev_get_drvdata(dev);
-+      struct stmmac_priv *priv = netdev_priv(ndev);
-       struct platform_device *pdev = to_platform_device(dev);
--      ret = stmmac_freeze(ndev);
--      if (plat_dat->exit)
--              plat_dat->exit(pdev);
-+      ret = stmmac_suspend(ndev);
-+      if (priv->plat->exit)
-+              priv->plat->exit(pdev);
-       return ret;
- }
--static int stmmac_pltfr_restore(struct device *dev)
-+static int stmmac_pltfr_resume(struct device *dev)
- {
--      struct plat_stmmacenet_data *plat_dat = dev_get_platdata(dev);
-       struct net_device *ndev = dev_get_drvdata(dev);
-+      struct stmmac_priv *priv = netdev_priv(ndev);
-       struct platform_device *pdev = to_platform_device(dev);
--      if (plat_dat->init)
--              plat_dat->init(pdev);
-+      if (priv->plat->init)
-+              priv->plat->init(pdev);
--      return stmmac_restore(ndev);
-+      return stmmac_resume(ndev);
- }
--static const struct dev_pm_ops stmmac_pltfr_pm_ops = {
--      .suspend = stmmac_pltfr_suspend,
--      .resume = stmmac_pltfr_resume,
--      .freeze = stmmac_pltfr_freeze,
--      .thaw = stmmac_pltfr_restore,
--      .restore = stmmac_pltfr_restore,
--};
--#else
--static const struct dev_pm_ops stmmac_pltfr_pm_ops;
- #endif /* CONFIG_PM */
-+static SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops,
-+                      stmmac_pltfr_suspend, stmmac_pltfr_resume);
-+
- static const struct of_device_id stmmac_dt_ids[] = {
-       { .compatible = "st,spear600-gmac"},
-       { .compatible = "snps,dwmac-3.610"},
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-8-stmmac-fixup-8.patch b/target/linux/sunxi/patches-3.13/151-8-stmmac-fixup-8.patch
deleted file mode 100644 (file)
index b4ffecb..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-From db88f10ad6a84c5bcb71bf51f0988a4bb1733bea Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:52:52 +0000
-Subject: [PATCH] net: stmmac: restore pinstate in pm resume.
-
-This patch adds code to restore default pinstate of the pins when it
-comes back from low power state. Without this patch the state of the
-pins would be unknown and the driver would not work.
-
-This patch also adds code to put the pins in to sleep state when the
-driver enters low power state.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index c1298a0..df7d8d6 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -43,6 +43,7 @@
- #include <linux/dma-mapping.h>
- #include <linux/slab.h>
- #include <linux/prefetch.h>
-+#include <linux/pinctrl/consumer.h>
- #ifdef CONFIG_STMMAC_DEBUG_FS
- #include <linux/debugfs.h>
- #include <linux/seq_file.h>
-@@ -2864,6 +2865,7 @@ int stmmac_suspend(struct net_device *ndev)
-               priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
-       else {
-               stmmac_set_mac(priv->ioaddr, false);
-+              pinctrl_pm_select_sleep_state(priv->device);
-               /* Disable clock in case of PWM is off */
-               clk_disable_unprepare(priv->stmmac_clk);
-       }
-@@ -2890,6 +2892,7 @@ int stmmac_resume(struct net_device *ndev)
-       if (device_may_wakeup(priv->device)) {
-               priv->hw->mac->pmt(priv->ioaddr, 0);
-       } else {
-+              pinctrl_pm_select_default_state(priv->device);
-               /* enable the clk prevously disabled */
-               clk_prepare_enable(priv->stmmac_clk);
-               /* reset the phy so that it's ready */
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/151-9-stmmac-fixup-9.patch b/target/linux/sunxi/patches-3.13/151-9-stmmac-fixup-9.patch
deleted file mode 100644 (file)
index 5d6e6a5..0000000
+++ /dev/null
@@ -1,73 +0,0 @@
-From 89f7f2cfdd7ade55d5230501c21271690790ceda Mon Sep 17 00:00:00 2001
-From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Date: Thu, 16 Jan 2014 10:53:00 +0000
-Subject: [PATCH] net: stmmac: notify the PM core of a wakeup event.
-
-In PM_SUSPEND_FREEZE and WOL(Wakeup On Lan) case, when the driver gets a
-wakeup event, either the driver or platform specific PM code should notify
-the pm core about it, so that the system can wakeup from low power.
-
-In cases where there is no involvement of platform specific PM, it
-becomes driver responsibility to notify the PM core to wakeup the
-system.
-
-Without this WOL with PM_SUSPEND_FREEZE does not work on STi based SOCs.
-
-Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
-Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac.h      | 1 +
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 9 +++++++--
- 2 files changed, 8 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-index 027f1dd..73709e9 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-@@ -105,6 +105,7 @@ struct stmmac_priv {
-       unsigned int default_addend;
-       u32 adv_ts;
-       int use_riwt;
-+      int irq_wake;
-       spinlock_t ptp_lock;
- };
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index df7d8d6..cddcf76 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -2320,6 +2320,9 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
-       struct net_device *dev = (struct net_device *)dev_id;
-       struct stmmac_priv *priv = netdev_priv(dev);
-+      if (priv->irq_wake)
-+              pm_wakeup_event(priv->device, 0);
-+
-       if (unlikely(!dev)) {
-               pr_err("%s: invalid dev pointer\n", __func__);
-               return IRQ_NONE;
-@@ -2861,9 +2864,10 @@ int stmmac_suspend(struct net_device *ndev)
-       stmmac_clear_descriptors(priv);
-       /* Enable Power down mode by programming the PMT regs */
--      if (device_may_wakeup(priv->device))
-+      if (device_may_wakeup(priv->device)) {
-               priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
--      else {
-+              priv->irq_wake = 1;
-+      } else {
-               stmmac_set_mac(priv->ioaddr, false);
-               pinctrl_pm_select_sleep_state(priv->device);
-               /* Disable clock in case of PWM is off */
-@@ -2891,6 +2895,7 @@ int stmmac_resume(struct net_device *ndev)
-        */
-       if (device_may_wakeup(priv->device)) {
-               priv->hw->mac->pmt(priv->ioaddr, 0);
-+              priv->irq_wake = 0;
-       } else {
-               pinctrl_pm_select_default_state(priv->device);
-               /* enable the clk prevously disabled */
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/152-1-dt-sun7i-enable-gmac-cubietruck.patch b/target/linux/sunxi/patches-3.13/152-1-dt-sun7i-enable-gmac-cubietruck.patch
deleted file mode 100644 (file)
index 323f861..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-From 957f00fbab201f429ad81cc87ee3177e4289567d Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:51 +0800
-Subject: [PATCH] ARM: dts: sun7i: cubietruck: Enable the GMAC
-
-The CubieTruck uses the GMAC with an RGMII phy.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
-index f9dcb61..025ce52 100644
---- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
-+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
-@@ -51,6 +51,18 @@
-                       pinctrl-0 = <&i2c2_pins_a>;
-                       status = "okay";
-               };
-+
-+              gmac: ethernet@01c50000 {
-+                      pinctrl-names = "default";
-+                      pinctrl-0 = <&gmac_pins_rgmii_a>;
-+                      phy = <&phy1>;
-+                      phy-mode = "rgmii";
-+                      status = "okay";
-+
-+                      phy1: ethernet-phy@1 {
-+                              reg = <1>;
-+                      };
-+              };
-       };
-       leds {
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/152-2-dt-sun7i-enable-gmac-cubieboard2.patch b/target/linux/sunxi/patches-3.13/152-2-dt-sun7i-enable-gmac-cubieboard2.patch
deleted file mode 100644 (file)
index 0f1471a..0000000
+++ /dev/null
@@ -1,61 +0,0 @@
-From 7405ae68d251191677e51aadb4308d6ce5212bbe Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:52 +0800
-Subject: [PATCH] ARM: dts: sun7i: cubieboard2: Enable GMAC instead of EMAC
-
-GMAC has better performance and fewer hardware issues.
-Use the GMAC in MII mode for ethernet instead of the EMAC.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 27 ++++++++++++---------------
- 1 file changed, 12 insertions(+), 15 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
-index 5c51cb8..7bf4935 100644
---- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
-+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
-@@ -19,21 +19,6 @@
-       compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
-       soc@01c00000 {
--              emac: ethernet@01c0b000 {
--                      pinctrl-names = "default";
--                      pinctrl-0 = <&emac_pins_a>;
--                      phy = <&phy1>;
--                      status = "okay";
--              };
--
--              mdio@01c0b080 {
--                      status = "okay";
--
--                      phy1: ethernet-phy@1 {
--                              reg = <1>;
--                      };
--              };
--
-               pinctrl@01c20800 {
-                       led_pins_cubieboard2: led_pins@0 {
-                               allwinner,pins = "PH20", "PH21";
-@@ -60,6 +45,18 @@
-                       pinctrl-0 = <&i2c1_pins_a>;
-                       status = "okay";
-               };
-+
-+              gmac: ethernet@01c50000 {
-+                      pinctrl-names = "default";
-+                      pinctrl-0 = <&gmac_pins_mii_a>;
-+                      phy = <&phy1>;
-+                      phy-mode = "mii";
-+                      status = "okay";
-+
-+                      phy1: ethernet-phy@1 {
-+                              reg = <1>;
-+                      };
-+              };
-       };
-       leds {
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/152-3-dt-sun7i-enable-gmac-a20-micro.patch b/target/linux/sunxi/patches-3.13/152-3-dt-sun7i-enable-gmac-a20-micro.patch
deleted file mode 100644 (file)
index d58dccb..0000000
+++ /dev/null
@@ -1,62 +0,0 @@
-From e401b86036245d2d62d825f0e3e12286c111b281 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:53 +0800
-Subject: [PATCH] ARM: dts: sun7i: a20-olinuxino-micro: Enable GMAC instead of
- EMAC
-
-GMAC has better performance and fewer hardware issues.
-Use the GMAC in MII mode for ethernet instead of the EMAC.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 27 +++++++++++--------------
- 1 file changed, 12 insertions(+), 15 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
-index ead3013..b02a796 100644
---- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
-+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
-@@ -19,21 +19,6 @@
-       compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
-       soc@01c00000 {
--              emac: ethernet@01c0b000 {
--                      pinctrl-names = "default";
--                      pinctrl-0 = <&emac_pins_a>;
--                      phy = <&phy1>;
--                      status = "okay";
--              };
--
--              mdio@01c0b080 {
--                      status = "okay";
--
--                      phy1: ethernet-phy@1 {
--                              reg = <1>;
--                      };
--              };
--
-               pinctrl@01c20800 {
-                       led_pins_olinuxino: led_pins@0 {
-                               allwinner,pins = "PH2";
-@@ -78,6 +63,18 @@
-                       pinctrl-0 = <&i2c2_pins_a>;
-                       status = "okay";
-               };
-+
-+              gmac: ethernet@01c50000 {
-+                      pinctrl-names = "default";
-+                      pinctrl-0 = <&gmac_pins_mii_a>;
-+                      phy = <&phy1>;
-+                      phy-mode = "mii";
-+                      status = "okay";
-+
-+                      phy1: ethernet-phy@1 {
-+                              reg = <1>;
-+                      };
-+              };
-       };
-       leds {
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/153-1-stmmac-enable-main-clock-when-probing.patch b/target/linux/sunxi/patches-3.13/153-1-stmmac-enable-main-clock-when-probing.patch
deleted file mode 100644 (file)
index e8137fb..0000000
+++ /dev/null
@@ -1,96 +0,0 @@
-From 62866e98737e77c87f9dec99edea76ab54360770 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 17 Jan 2014 21:24:40 +0800
-Subject: [PATCH] net: stmmac: Enable stmmac main clock when probing hardware
-
-The stmmac driver does not enable the main clock during the probe phase.
-If the clock was not enabled by the boot loader or was disabled by the
-kernel, hardware features and the MDIO bus would not be probed properly.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 26 +++++++++++------------
- 1 file changed, 13 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index cddcf76..0d2c4cb 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -1680,8 +1680,6 @@ static int stmmac_open(struct net_device *dev)
-       struct stmmac_priv *priv = netdev_priv(dev);
-       int ret;
--      clk_prepare_enable(priv->stmmac_clk);
--
-       stmmac_check_ether_addr(priv);
-       if (priv->pcs != STMMAC_PCS_RGMII && priv->pcs != STMMAC_PCS_TBI &&
-@@ -1819,7 +1817,6 @@ static int stmmac_release(struct net_device *dev)
- #ifdef CONFIG_STMMAC_DEBUG_FS
-       stmmac_exit_fs();
- #endif
--      clk_disable_unprepare(priv->stmmac_clk);
-       stmmac_release_ptp(priv);
-@@ -2727,10 +2724,18 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
-       if ((phyaddr >= 0) && (phyaddr <= 31))
-               priv->plat->phy_addr = phyaddr;
-+      priv->stmmac_clk = devm_clk_get(priv->device, STMMAC_RESOURCE_NAME);
-+      if (IS_ERR(priv->stmmac_clk)) {
-+              dev_warn(priv->device, "%s: warning: cannot get CSR clock\n",
-+                       __func__);
-+              goto error_clk_get;
-+      }
-+      clk_prepare_enable(priv->stmmac_clk);
-+
-       /* Init MAC and get the capabilities */
-       ret = stmmac_hw_init(priv);
-       if (ret)
--              goto error_free_netdev;
-+              goto error_hw_init;
-       ndev->netdev_ops = &stmmac_netdev_ops;
-@@ -2768,12 +2773,6 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
-               goto error_netdev_register;
-       }
--      priv->stmmac_clk = clk_get(priv->device, STMMAC_RESOURCE_NAME);
--      if (IS_ERR(priv->stmmac_clk)) {
--              pr_warn("%s: warning: cannot get CSR clock\n", __func__);
--              goto error_clk_get;
--      }
--
-       /* If a specific clk_csr value is passed from the platform
-        * this means that the CSR Clock Range selection cannot be
-        * changed at run-time and it is fixed. Viceversa the driver'll try to
-@@ -2801,12 +2800,12 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
-       return priv;
- error_mdio_register:
--      clk_put(priv->stmmac_clk);
--error_clk_get:
-       unregister_netdev(ndev);
- error_netdev_register:
-       netif_napi_del(&priv->napi);
--error_free_netdev:
-+error_hw_init:
-+      clk_disable_unprepare(priv->stmmac_clk);
-+error_clk_get:
-       free_netdev(ndev);
-       return NULL;
-@@ -2833,6 +2832,7 @@ int stmmac_dvr_remove(struct net_device *ndev)
-               stmmac_mdio_unregister(ndev);
-       netif_carrier_off(ndev);
-       unregister_netdev(ndev);
-+      clk_disable_unprepare(priv->stmmac_clk);
-       free_netdev(ndev);
-       return 0;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/153-2-stmmac-add-support-for-optional-reset-control.patch b/target/linux/sunxi/patches-3.13/153-2-stmmac-add-support-for-optional-reset-control.patch
deleted file mode 100644 (file)
index 188eaf0..0000000
+++ /dev/null
@@ -1,158 +0,0 @@
-From c5e4ddbdfa1134a36589c1466ed4abb85fe6f976 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 17 Jan 2014 21:24:41 +0800
-Subject: [PATCH] net: stmmac: Add support for optional reset control
-
-The DWMAC has a reset assert line, which is used on some SoCs. Add an
-optional reset control to stmmac driver core.
-
-To support reset control deferred probing, this patch changes the driver
-probe function to return the actual error, instead of just -EINVAL.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- Documentation/devicetree/bindings/net/stmmac.txt      |  3 +++
- drivers/net/ethernet/stmicro/stmmac/Kconfig           |  1 +
- drivers/net/ethernet/stmicro/stmmac/stmmac.h          |  2 ++
- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c     | 19 ++++++++++++++++++-
- drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c      |  4 ++--
- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c |  4 ++--
- 6 files changed, 28 insertions(+), 5 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
-index eba0e5e..d132513 100644
---- a/Documentation/devicetree/bindings/net/stmmac.txt
-+++ b/Documentation/devicetree/bindings/net/stmmac.txt
-@@ -30,6 +30,9 @@ Required properties:
- Optional properties:
- - mac-address: 6 bytes, mac address
-+- resets: Should contain a phandle to the STMMAC reset signal, if any
-+- reset-names: Should contain the reset signal name "stmmaceth", if a
-+      reset phandle is given
- Examples:
-diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
-index 6e52c0f..b59d1ef 100644
---- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
-+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
-@@ -5,6 +5,7 @@ config STMMAC_ETH
-       select PHYLIB
-       select CRC32
-       select PTP_1588_CLOCK
-+      select RESET_CONTROLLER
-       ---help---
-         This is the driver for the Ethernet IPs are built around a
-         Synopsys IP Core and only tested on the STMicroelectronics
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-index 73709e9..c1c141f 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
-@@ -32,6 +32,7 @@
- #include <linux/pci.h>
- #include "common.h"
- #include <linux/ptp_clock_kernel.h>
-+#include <linux/reset.h>
- struct stmmac_priv {
-       /* Frequently used values are kept adjacent for cache effect */
-@@ -91,6 +92,7 @@ struct stmmac_priv {
-       int wolopts;
-       int wol_irq;
-       struct clk *stmmac_clk;
-+      struct reset_control *stmmac_rst;
-       int clk_csr;
-       struct timer_list eee_ctrl_timer;
-       int lpi_irq;
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-index 0d2c4cb..0c5c120 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -51,6 +51,7 @@
- #include <linux/net_tstamp.h>
- #include "stmmac_ptp.h"
- #include "stmmac.h"
-+#include <linux/reset.h>
- #define STMMAC_ALIGN(x)       L1_CACHE_ALIGN(x)
- #define JUMBO_LEN     9000
-@@ -2728,10 +2729,24 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
-       if (IS_ERR(priv->stmmac_clk)) {
-               dev_warn(priv->device, "%s: warning: cannot get CSR clock\n",
-                        __func__);
-+              ret = PTR_ERR(priv->stmmac_clk);
-               goto error_clk_get;
-       }
-       clk_prepare_enable(priv->stmmac_clk);
-+      priv->stmmac_rst = devm_reset_control_get(priv->device,
-+                                                STMMAC_RESOURCE_NAME);
-+      if (IS_ERR(priv->stmmac_rst)) {
-+              if (PTR_ERR(priv->stmmac_rst) == -EPROBE_DEFER) {
-+                      ret = -EPROBE_DEFER;
-+                      goto error_hw_init;
-+              }
-+              dev_info(priv->device, "no reset control found\n");
-+              priv->stmmac_rst = NULL;
-+      }
-+      if (priv->stmmac_rst)
-+              reset_control_deassert(priv->stmmac_rst);
-+
-       /* Init MAC and get the capabilities */
-       ret = stmmac_hw_init(priv);
-       if (ret)
-@@ -2808,7 +2823,7 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
- error_clk_get:
-       free_netdev(ndev);
--      return NULL;
-+      return ERR_PTR(ret);
- }
- /**
-@@ -2832,6 +2847,8 @@ int stmmac_dvr_remove(struct net_device *ndev)
-               stmmac_mdio_unregister(ndev);
-       netif_carrier_off(ndev);
-       unregister_netdev(ndev);
-+      if (priv->stmmac_rst)
-+              reset_control_assert(priv->stmmac_rst);
-       clk_disable_unprepare(priv->stmmac_clk);
-       free_netdev(ndev);
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
-index 37ba2e0..2916089 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
-@@ -100,9 +100,9 @@ static int stmmac_pci_probe(struct pci_dev *pdev,
-       stmmac_default_data();
-       priv = stmmac_dvr_probe(&(pdev->dev), &plat_dat, addr);
--      if (!priv) {
-+      if (IS_ERR(priv)) {
-               pr_err("%s: main driver probe failed", __func__);
--              ret = -ENODEV;
-+              ret = PTR_ERR(priv);
-               goto err_out;
-       }
-       priv->dev->irq = pdev->irq;
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index 6d0bf22..cc6b89a7 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -152,9 +152,9 @@ static int stmmac_pltfr_probe(struct platform_device *pdev)
-       }
-       priv = stmmac_dvr_probe(&(pdev->dev), plat_dat, addr);
--      if (!priv) {
-+      if (IS_ERR(priv)) {
-               pr_err("%s: main driver probe failed", __func__);
--              return -ENODEV;
-+              return PTR_ERR(priv);
-       }
-       /* Get MAC address if available (DT) */
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/153-3-stmmac-allocate-pass-board-specific-data-to-callbacks.patch b/target/linux/sunxi/patches-3.13/153-3-stmmac-allocate-pass-board-specific-data-to-callbacks.patch
deleted file mode 100644 (file)
index 2c477c5..0000000
+++ /dev/null
@@ -1,124 +0,0 @@
-From 938dfdaa3c0f92e9a490d324f3bce43bbaef7632 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 17 Jan 2014 21:24:42 +0800
-Subject: [PATCH] net: stmmac: Allocate and pass soc/board specific data to
- callbacks
-
-The current .init and .exit callbacks requires access to driver
-private data structures. This is not a good seperation and abstraction.
-
-Instead, we add a new .setup callback for allocating private data, and
-pass the returned pointer to the other callbacks.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- Documentation/networking/stmmac.txt                   | 12 ++++++++----
- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 18 ++++++++++++++----
- include/linux/stmmac.h                                |  6 ++++--
- 3 files changed, 26 insertions(+), 10 deletions(-)
-
-diff --git a/Documentation/networking/stmmac.txt b/Documentation/networking/stmmac.txt
-index cdd916d..2090895 100644
---- a/Documentation/networking/stmmac.txt
-+++ b/Documentation/networking/stmmac.txt
-@@ -127,8 +127,9 @@ struct plat_stmmacenet_data {
-       int riwt_off;
-       void (*fix_mac_speed)(void *priv, unsigned int speed);
-       void (*bus_setup)(void __iomem *ioaddr);
--      int (*init)(struct platform_device *pdev);
--      void (*exit)(struct platform_device *pdev);
-+      void *(*setup)(struct platform_device *pdev);
-+      int (*init)(struct platform_device *pdev, void *priv);
-+      void (*exit)(struct platform_device *pdev, void *priv);
-       void *custom_cfg;
-       void *custom_data;
-       void *bsp_priv;
-@@ -169,10 +170,13 @@ Where:
-  o bus_setup: perform HW setup of the bus. For example, on some ST platforms
-            this field is used to configure the AMBA  bridge to generate more
-            efficient STBus traffic.
-- o init/exit: callbacks used for calling a custom initialization;
-+ o setup/init/exit: callbacks used for calling a custom initialization;
-            this is sometime necessary on some platforms (e.g. ST boxes)
-            where the HW needs to have set some PIO lines or system cfg
--           registers.
-+           registers. setup should return a pointer to private data,
-+           which will be stored in bsp_priv, and then passed to init and
-+           exit callbacks. init/exit callbacks should not use or modify
-+           platform data.
-  o custom_cfg/custom_data: this is a custom configuration that can be passed
-                          while initializing the resources.
-  o bsp_priv: another private pointer.
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index cc6b89a7..704a5e0 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -144,9 +144,16 @@ static int stmmac_pltfr_probe(struct platform_device *pdev)
-               }
-       }
-+      /* Custom setup (if needed) */
-+      if (plat_dat->setup) {
-+              plat_dat->bsp_priv = plat_dat->setup(pdev);
-+              if (IS_ERR(plat_dat->bsp_priv))
-+                      return PTR_ERR(plat_dat->bsp_priv);
-+      }
-+
-       /* Custom initialisation (if needed)*/
-       if (plat_dat->init) {
--              ret = plat_dat->init(pdev);
-+              ret = plat_dat->init(pdev, plat_dat->bsp_priv);
-               if (unlikely(ret))
-                       return ret;
-       }
-@@ -203,7 +210,10 @@ static int stmmac_pltfr_remove(struct platform_device *pdev)
-       int ret = stmmac_dvr_remove(ndev);
-       if (priv->plat->exit)
--              priv->plat->exit(pdev);
-+              priv->plat->exit(pdev, priv->plat->bsp_priv);
-+
-+      if (priv->plat->free)
-+              priv->plat->free(pdev, priv->plat->bsp_priv);
-       return ret;
- }
-@@ -218,7 +228,7 @@ static int stmmac_pltfr_suspend(struct device *dev)
-       ret = stmmac_suspend(ndev);
-       if (priv->plat->exit)
--              priv->plat->exit(pdev);
-+              priv->plat->exit(pdev, priv->plat->bsp_priv);
-       return ret;
- }
-@@ -230,7 +240,7 @@ static int stmmac_pltfr_resume(struct device *dev)
-       struct platform_device *pdev = to_platform_device(dev);
-       if (priv->plat->init)
--              priv->plat->init(pdev);
-+              priv->plat->init(pdev, priv->plat->bsp_priv);
-       return stmmac_resume(ndev);
- }
-diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
-index 33ace71..0a5a7ac 100644
---- a/include/linux/stmmac.h
-+++ b/include/linux/stmmac.h
-@@ -113,8 +113,10 @@ struct plat_stmmacenet_data {
-       int max_speed;
-       void (*fix_mac_speed)(void *priv, unsigned int speed);
-       void (*bus_setup)(void __iomem *ioaddr);
--      int (*init)(struct platform_device *pdev);
--      void (*exit)(struct platform_device *pdev);
-+      void *(*setup)(struct platform_device *pdev);
-+      void (*free)(struct platform_device *pdev, void *priv);
-+      int (*init)(struct platform_device *pdev, void *priv);
-+      void (*exit)(struct platform_device *pdev, void *priv);
-       void *custom_cfg;
-       void *custom_data;
-       void *bsp_priv;
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/153-4-stmmac-honor-dt-parameter-to-dma-store-and-fwd.patch b/target/linux/sunxi/patches-3.13/153-4-stmmac-honor-dt-parameter-to-dma-store-and-fwd.patch
deleted file mode 100644 (file)
index 17caee3..0000000
+++ /dev/null
@@ -1,31 +0,0 @@
-From 6aedb8c06df732625cf998c1428396914f3139b4 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 17 Jan 2014 21:24:44 +0800
-Subject: [PATCH] net: stmmac: Honor DT parameter to force DMA store and
- forward mode
-
-"snps,force_sf_dma_mode" is documented in stmmac device tree bindings,
-but is never handled by the driver.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index 704a5e0..634260e 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -56,6 +56,8 @@ static int stmmac_probe_config_dt(struct platform_device *pdev,
-                                          sizeof(struct stmmac_mdio_bus_data),
-                                          GFP_KERNEL);
-+      plat->force_sf_dma_mode = of_property_read_bool(np, "snps,force_sf_dma_mode");
-+
-       /*
-        * Currently only the properties needed on SPEAr600
-        * are provided. All other properties should be added
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/153-5-stmmac-deprecate-snps-phy-addr.patch b/target/linux/sunxi/patches-3.13/153-5-stmmac-deprecate-snps-phy-addr.patch
deleted file mode 100644 (file)
index 5b9b09c..0000000
+++ /dev/null
@@ -1,55 +0,0 @@
-From 436f7ecdcc08f71ddc106b7bbe3bcbf1785f3bff Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 17 Jan 2014 21:24:45 +0800
-Subject: [PATCH] net: stmmac: Deprecate snps, phy-addr and auto-detect PHY
- address
-
-The snps,phy-addr device tree property is non-standard, and should be
-removed in favor of proper phy node support. Remove it from the binding
-documents and warn if the property is still used.
-
-Most PHYs respond to address 0, but a few don't, so auto-detect PHY
-address by default, to make up for the lack of explicit address selection.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- Documentation/devicetree/bindings/net/stmmac.txt      | 1 -
- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 ++++++++-
- 2 files changed, 8 insertions(+), 2 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
-index d132513..aefb639 100644
---- a/Documentation/devicetree/bindings/net/stmmac.txt
-+++ b/Documentation/devicetree/bindings/net/stmmac.txt
-@@ -12,7 +12,6 @@ Required properties:
-   property
- - phy-mode: String, operation mode of the PHY interface.
-   Supported values are: "mii", "rmii", "gmii", "rgmii".
--- snps,phy-addr               phy address to connect to.
- - snps,reset-gpio     gpio number for phy reset.
- - snps,reset-active-low boolean flag to indicate if phy reset is active low.
- - snps,reset-delays-us  is triplet of delays
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index 634260e..82110f1 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -50,7 +50,14 @@ static int stmmac_probe_config_dt(struct platform_device *pdev,
-       if (plat->bus_id < 0)
-               plat->bus_id = 0;
--      of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr);
-+      /* Default to phy auto-detection */
-+      plat->phy_addr = -1;
-+
-+      /* "snps,phy-addr" is not a standard property. Mark it as deprecated
-+       * and warn of its use. Remove this when phy node support is added.
-+       */
-+      if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
-+              dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
-       plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
-                                          sizeof(struct stmmac_mdio_bus_data),
--- 
-1.8.5.5
-
diff --git a/target/linux/sunxi/patches-3.13/153-6-stmmac-use-drvdata-callback-with-compat-strings.patch b/target/linux/sunxi/patches-3.13/153-6-stmmac-use-drvdata-callback-with-compat-strings.patch
deleted file mode 100644 (file)
index 99ccd34..0000000
+++ /dev/null
@@ -1,123 +0,0 @@
-From 022066f50f53000679d31eb407693085f37b3f14 Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Fri, 17 Jan 2014 21:24:46 +0800
-Subject: [PATCH] net: stmmac: Use driver data and callbacks tied with
- compatible strings
-
-The stmmac driver core allows passing feature flags and callbacks via
-platform data. Add a similar stmmac_of_data to pass flags and callbacks
-tied to compatible strings. This allows us to extend stmmac with glue
-layers for different SoCs.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- .../net/ethernet/stmicro/stmmac/stmmac_platform.c  | 44 +++++++++++++++++-----
- include/linux/stmmac.h                             | 18 +++++++++
- 2 files changed, 52 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-index 82110f1..bf119db 100644
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -26,8 +26,20 @@
- #include <linux/io.h>
- #include <linux/of.h>
- #include <linux/of_net.h>
-+#include <linux/of_device.h>
- #include "stmmac.h"
-+static const struct of_device_id stmmac_dt_ids[] = {
-+      /* SoC specific glue layers should come before generic bindings */
-+      { .compatible = "st,spear600-gmac"},
-+      { .compatible = "snps,dwmac-3.610"},
-+      { .compatible = "snps,dwmac-3.70a"},
-+      { .compatible = "snps,dwmac-3.710"},
-+      { .compatible = "snps,dwmac"},
-+      { /* sentinel */ }
-+};
-+MODULE_DEVICE_TABLE(of, stmmac_dt_ids);
-+
- #ifdef CONFIG_OF
- static int stmmac_probe_config_dt(struct platform_device *pdev,
-                                 struct plat_stmmacenet_data *plat,
-@@ -35,10 +47,32 @@ static int stmmac_probe_config_dt(struct platform_device *pdev,
- {
-       struct device_node *np = pdev->dev.of_node;
-       struct stmmac_dma_cfg *dma_cfg;
-+      const struct of_device_id *device;
-       if (!np)
-               return -ENODEV;
-+      device = of_match_device(stmmac_dt_ids, &pdev->dev);
-+      if (!device)
-+              return -ENODEV;
-+
-+      if (device->data) {
-+              const struct stmmac_of_data *data = device->data;
-+              plat->has_gmac = data->has_gmac;
-+              plat->enh_desc = data->enh_desc;
-+              plat->tx_coe = data->tx_coe;
-+              plat->rx_coe = data->rx_coe;
-+              plat->bugged_jumbo = data->bugged_jumbo;
-+              plat->pmt = data->pmt;
-+              plat->riwt_off = data->riwt_off;