oxnas: also reset GPIO B registers on boot
authorJohn Crispin <john@openwrt.org>
Sun, 20 Mar 2016 14:41:21 +0000 (14:41 +0000)
committerJohn Crispin <john@openwrt.org>
Sun, 20 Mar 2016 14:41:21 +0000 (14:41 +0000)
Clear both, SYS_CTRL_*_SEL and SEC_CTRL_*_SEL on boot instead of
writing to SYS_CTRL_*_SEL twice which looks like a copy-paste error.
Thanks to anonymous to bring this up in #21892!

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
SVN-Revision: 49042

target/linux/oxnas/files/arch/arm/mach-oxnas/mach-ox820.c

index 2a8ada8..1e3b12d 100644 (file)
@@ -152,12 +152,12 @@ void ox820_assert_system_reset(enum reboot_mode mode, const char *cmd)
        writel(0, SYS_CTRL_ALTERNATIVE_SEL);
        writel(0, SYS_CTRL_PULLUP_SEL);
 
-       writel(0, SYS_CTRL_SECONDARY_SEL);
-       writel(0, SYS_CTRL_TERTIARY_SEL);
-       writel(0, SYS_CTRL_QUATERNARY_SEL);
-       writel(0, SYS_CTRL_DEBUG_SEL);
-       writel(0, SYS_CTRL_ALTERNATIVE_SEL);
-       writel(0, SYS_CTRL_PULLUP_SEL);
+       writel(0, SEC_CTRL_SECONDARY_SEL);
+       writel(0, SEC_CTRL_TERTIARY_SEL);
+       writel(0, SEC_CTRL_QUATERNARY_SEL);
+       writel(0, SEC_CTRL_DEBUG_SEL);
+       writel(0, SEC_CTRL_ALTERNATIVE_SEL);
+       writel(0, SEC_CTRL_PULLUP_SEL);
 
        /* No need to save any state, as the ROM loader can determine whether
         * reset is due to power cycling or programatic action, just hit the