# copyright 2007 john crispin <blogic@openwrt.org>
-menu "Danube built-in"
+menu "IFXMips built-in"
config IFXMIPS_ASC_UART
- bool "Danube asc uart"
+ bool "IFXMips asc uart"
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
default y
config MTD_IFXMIPS
- bool "Danube flash map"
+ bool "IFXMips flash map"
default y
config IFXMIPS_WDT
- bool "Danube watchdog"
+ bool "IFXMips watchdog"
default y
config IFXMIPS_LED
- bool "Danube led"
+ bool "IFXMips led"
default y
config IFXMIPS_GPIO
- bool "Danube gpio"
+ bool "IFXMips gpio"
default y
config IFXMIPS_SSC
- bool "Danube ssc"
+ bool "IFXMips ssc"
default y
config IFXMIPS_EEPROM
- bool "Danube eeprom"
+ bool "IFXMips eeprom"
default y
endmenu
-#
-# Copyright 2007 openwrt.org
-# John Crispin <blogic@openwrt.org>
-#
-# Makefile for Infineon Danube
-#
obj-y := reset.o prom.o setup.o interrupt.o dma-core.o pmu.o
obj-$(CONFIG_PCI) += pci.o
#include <linux/errno.h>
#include <asm/io.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_irq.h>
-#include <asm/danube/danube_dma.h>
-#include <asm/danube/danube_pmu.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
+#include <asm/ifxmips/ifxmips_dma.h>
+#include <asm/ifxmips/ifxmips_pmu.h>
/*25 descriptors for each dma channel,4096/8/20=25.xx*/
#define IFXMIPS_DMA_DESCRIPTOR_OFFSET 25
#define DMA_INT_BUDGET 100 /*budget for interrupt handling */
#define DMA_POLL_COUNTER 4 /*fix me, set the correct counter value here! */
-extern void mask_and_ack_danube_irq (unsigned int irq_nr);
-extern void enable_danube_irq (unsigned int irq_nr);
-extern void disable_danube_irq (unsigned int irq_nr);
+extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr);
+extern void enable_ifxmips_irq (unsigned int irq_nr);
+extern void disable_ifxmips_irq (unsigned int irq_nr);
u64 *g_desc_list;
_dma_device_info dma_devs[MAX_DMA_DEVICE_NUM];
};
_dma_chan_map *chan_map = default_dma_map;
-volatile u32 g_danube_dma_int_status = 0;
-volatile int g_danube_dma_in_process = 0;/*0=not in process,1=in process*/
+volatile u32 g_ifxmips_dma_int_status = 0;
+volatile int g_ifxmips_dma_in_process = 0;/*0=not in process,1=in process*/
void do_dma_tasklet (unsigned long);
DECLARE_TASKLET (dma_tasklet, do_dma_tasklet, 0);
writel(0x4a, IFXMIPS_DMA_CIE);
writel(readl(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
local_irq_restore(flag);
- enable_danube_irq(pCh->irq);
+ enable_ifxmips_irq(pCh->irq);
}
void
int chan_no = (int) (pCh - dma_chan);
local_irq_save(flag);
- g_danube_dma_int_status &= ~(1 << chan_no);
+ g_ifxmips_dma_int_status &= ~(1 << chan_no);
writel(chan_no, IFXMIPS_DMA_CS);
writel(0, IFXMIPS_DMA_CIE);
writel(readl(IFXMIPS_DMA_IRNEN) & ~(1 << chan_no), IFXMIPS_DMA_IRNEN);
local_irq_restore(flag);
- mask_and_ack_danube_irq(pCh->irq);
+ mask_and_ack_ifxmips_irq(pCh->irq);
}
void
writel(chan_no, IFXMIPS_DMA_CS);
writel(readl(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS);
writel(tmp, IFXMIPS_DMA_CS);
- g_danube_dma_int_status &= ~(1 << chan_no);
+ g_ifxmips_dma_int_status &= ~(1 << chan_no);
local_irq_restore(flag);
- enable_danube_irq(dma_chan[chan_no].irq);
+ enable_ifxmips_irq(dma_chan[chan_no].irq);
}
}
writel(chan_no, IFXMIPS_DMA_CS);
writel(readl(IFXMIPS_DMA_CIS) | 0x7e, IFXMIPS_DMA_CIS);
writel(tmp, IFXMIPS_DMA_CS);
- g_danube_dma_int_status &= ~(1 << chan_no);
+ g_ifxmips_dma_int_status &= ~(1 << chan_no);
local_irq_restore(flag);
pDev->current_tx_chan = pCh->rel_chan_no;
if (pDev->intr_handler)
int weight = 0;
int flag;
- while (g_danube_dma_int_status)
+ while (g_ifxmips_dma_int_status)
{
if (budget-- < 0)
{
weight = 0;
for (i = 0; i < MAX_DMA_CHANNEL_NUM; i++)
{
- if ((g_danube_dma_int_status & (1 << i)) && dma_chan[i].weight > 0)
+ if ((g_ifxmips_dma_int_status & (1 << i)) && dma_chan[i].weight > 0)
{
if (dma_chan[i].weight > weight)
{
}
local_irq_save(flag);
- g_danube_dma_in_process = 0;
- if (g_danube_dma_int_status)
+ g_ifxmips_dma_in_process = 0;
+ if (g_ifxmips_dma_int_status)
{
- g_danube_dma_in_process = 1;
+ g_ifxmips_dma_in_process = 1;
tasklet_schedule(&dma_tasklet);
}
local_irq_restore(flag);
tmp = readl(IFXMIPS_DMA_IRNEN);
writel(0, IFXMIPS_DMA_IRNEN);
- g_danube_dma_int_status |= 1 << chan_no;
+ g_ifxmips_dma_int_status |= 1 << chan_no;
writel(tmp, IFXMIPS_DMA_IRNEN);
- mask_and_ack_danube_irq(irq);
+ mask_and_ack_ifxmips_irq(irq);
- if (!g_danube_dma_in_process)
+ if (!g_ifxmips_dma_in_process)
{
- g_danube_dma_in_process = 1;
+ g_ifxmips_dma_in_process = 1;
tasklet_schedule(&dma_tasklet);
}
writel(readl(IFXMIPS_DMA_IRNEN) | (1 << chan_no), IFXMIPS_DMA_IRNEN);
writel(0x30000, IFXMIPS_DMA_CCTRL);
local_irq_restore(flag);
- enable_danube_irq(dma_chan[chan_no].irq);
+ enable_ifxmips_irq(dma_chan[chan_no].irq);
}
}
}
{
pCh = dev->rx_chan[i];
chan_no = (int)(dev->rx_chan[i] - dma_chan);
- disable_danube_irq(pCh->irq);
+ disable_ifxmips_irq(pCh->irq);
local_irq_save(flag);
- g_danube_dma_int_status &= ~(1 << chan_no);
+ g_ifxmips_dma_int_status &= ~(1 << chan_no);
pCh->curr_desc = 0;
pCh->prev_desc = 0;
pCh->control = IFXMIPS_DMA_CH_OFF;
int i;
// enable DMA from PMU
- danube_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
// reset DMA
writel(readl(IFXMIPS_DMA_CTRL) | 1, IFXMIPS_DMA_CTRL);
}
int
-danube_dma_init (void)
+ifxmips_dma_init (void)
{
int i;
return 0;
}
-arch_initcall(danube_dma_init);
+arch_initcall(ifxmips_dma_init);
void
dma_cleanup(void)
/*
- * arch/mips/danube/interrupt.c
+ * arch/mips/ifxmips/interrupt.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*
* Copyright (C) 2005 Wu Qi Ming infineon
*
- * Rewrite of Infineon Danube code, thanks to infineon for the support,
+ * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware
*
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
#include <asm/bootinfo.h>
#include <asm/irq.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_irq.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
#include <asm/irq_cpu.h>
void
-disable_danube_irq (unsigned int irq_nr)
+disable_ifxmips_irq (unsigned int irq_nr)
{
int i;
- u32 *danube_ier = IFXMIPS_ICU_IM0_IER;
+ u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
irq_nr -= INT_NUM_IRQ0;
for (i = 0; i <= 4; i++)
{
if (irq_nr < INT_NUM_IM_OFFSET){
- writel(readl(danube_ier) & ~(1 << irq_nr ), danube_ier);
+ writel(readl(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier);
return;
}
- danube_ier += IFXMIPS_ICU_OFFSET;
+ ifxmips_ier += IFXMIPS_ICU_OFFSET;
irq_nr -= INT_NUM_IM_OFFSET;
}
}
-EXPORT_SYMBOL (disable_danube_irq);
+EXPORT_SYMBOL (disable_ifxmips_irq);
void
-mask_and_ack_danube_irq (unsigned int irq_nr)
+mask_and_ack_ifxmips_irq (unsigned int irq_nr)
{
int i;
- u32 *danube_ier = IFXMIPS_ICU_IM0_IER;
- u32 *danube_isr = IFXMIPS_ICU_IM0_ISR;
+ u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
+ u32 *ifxmips_isr = IFXMIPS_ICU_IM0_ISR;
irq_nr -= INT_NUM_IRQ0;
for (i = 0; i <= 4; i++)
{
if (irq_nr < INT_NUM_IM_OFFSET)
{
- writel(readl(danube_ier) & ~(1 << irq_nr ), danube_ier);
- writel((1 << irq_nr ), danube_isr);
+ writel(readl(ifxmips_ier) & ~(1 << irq_nr ), ifxmips_ier);
+ writel((1 << irq_nr ), ifxmips_isr);
return;
}
- danube_ier += IFXMIPS_ICU_OFFSET;
- danube_isr += IFXMIPS_ICU_OFFSET;
+ ifxmips_ier += IFXMIPS_ICU_OFFSET;
+ ifxmips_isr += IFXMIPS_ICU_OFFSET;
irq_nr -= INT_NUM_IM_OFFSET;
}
}
-EXPORT_SYMBOL (mask_and_ack_danube_irq);
+EXPORT_SYMBOL (mask_and_ack_ifxmips_irq);
void
-enable_danube_irq (unsigned int irq_nr)
+enable_ifxmips_irq (unsigned int irq_nr)
{
int i;
- u32 *danube_ier = IFXMIPS_ICU_IM0_IER;
+ u32 *ifxmips_ier = IFXMIPS_ICU_IM0_IER;
irq_nr -= INT_NUM_IRQ0;
for (i = 0; i <= 4; i++)
{
if (irq_nr < INT_NUM_IM_OFFSET)
{
- writel(readl(danube_ier) | (1 << irq_nr ), danube_ier);
+ writel(readl(ifxmips_ier) | (1 << irq_nr ), ifxmips_ier);
return;
}
- danube_ier += IFXMIPS_ICU_OFFSET;
+ ifxmips_ier += IFXMIPS_ICU_OFFSET;
irq_nr -= INT_NUM_IM_OFFSET;
}
}
-EXPORT_SYMBOL (enable_danube_irq);
+EXPORT_SYMBOL (enable_ifxmips_irq);
static unsigned int
-startup_danube_irq (unsigned int irq)
+startup_ifxmips_irq (unsigned int irq)
{
- enable_danube_irq (irq);
+ enable_ifxmips_irq (irq);
return 0;
}
static void
-end_danube_irq (unsigned int irq)
+end_ifxmips_irq (unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- enable_danube_irq (irq);
+ enable_ifxmips_irq (irq);
}
-static struct hw_interrupt_type danube_irq_type = {
+static struct hw_interrupt_type ifxmips_irq_type = {
"IFXMIPS",
- .startup = startup_danube_irq,
- .enable = enable_danube_irq,
- .disable = disable_danube_irq,
- .unmask = enable_danube_irq,
- .ack = end_danube_irq,
- .mask = disable_danube_irq,
- .mask_ack = mask_and_ack_danube_irq,
- .end = end_danube_irq,
+ .startup = startup_ifxmips_irq,
+ .enable = enable_ifxmips_irq,
+ .disable = disable_ifxmips_irq,
+ .unmask = enable_ifxmips_irq,
+ .ack = end_ifxmips_irq,
+ .mask = disable_ifxmips_irq,
+ .mask_ack = mask_and_ack_ifxmips_irq,
+ .end = end_ifxmips_irq,
};
static inline int
}
void
-danube_hw_irqdispatch (int module)
+ifxmips_hw_irqdispatch (int module)
{
u32 irq;
{
if (pending & (CAUSEF_IP2 << i))
{
- danube_hw_irqdispatch(i);
+ ifxmips_hw_irqdispatch(i);
goto out;
}
}
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
#endif
- set_irq_chip_and_handler(i, &danube_irq_type, handle_level_irq);
+ set_irq_chip_and_handler(i, &ifxmips_irq_type, handle_level_irq);
}
set_c0_status (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5);
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/mm.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_irq.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
#include <asm/addrspace.h>
#include <linux/vmalloc.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
-static int danube_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
-static int danube_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
+static int ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
+static int ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
-struct pci_ops danube_pci_ops = {
- .read = danube_pci_read_config_dword,
- .write = danube_pci_write_config_dword
+struct pci_ops ifxmips_pci_ops = {
+ .read = ifxmips_pci_read_config_dword,
+ .write = ifxmips_pci_write_config_dword
};
static struct resource pci_io_resource = {
.flags = IORESOURCE_MEM
};
-static struct pci_controller danube_pci_controller = {
- .pci_ops = &danube_pci_ops,
+static struct pci_controller ifxmips_pci_controller = {
+ .pci_ops = &ifxmips_pci_ops,
.mem_resource = &pci_mem_resource,
.mem_offset = 0x00000000UL,
.io_resource = &pci_io_resource,
.io_offset = 0x00000000UL,
};
-static u32 danube_pci_mapped_cfg;
+static u32 ifxmips_pci_mapped_cfg;
static int
-danube_pci_config_access(unsigned char access_type,
+ifxmips_pci_config_access(unsigned char access_type,
struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data)
{
unsigned long cfg_base;
u32 temp;
- /* Danube support slot from 0 to 15 */
- /* dev_fn 0&0x68 (AD29) is danube itself */
+ /* IFXMips support slot from 0 to 15 */
+ /* dev_fn 0&0x68 (AD29) is ifxmips itself */
if ((bus->number != 0) || ((devfn & 0xf8) > 0x78)
|| ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68))
return 1;
local_irq_save(flags);
- cfg_base = danube_pci_mapped_cfg;
+ cfg_base = ifxmips_pci_mapped_cfg;
cfg_base |= (bus->number << IFXMIPS_PCI_CFG_BUSNUM_SHF) | (devfn <<
IFXMIPS_PCI_CFG_FUNNUM_SHF) | (where & ~0x3);
wmb();
/* clean possible Master abort */
- cfg_base = (danube_pci_mapped_cfg | (0x0 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
+ cfg_base = (ifxmips_pci_mapped_cfg | (0x0 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
temp = readl(((u32*)(cfg_base)));
#ifdef CONFIG_IFXMIPS_PCI_HW_SWAP
temp = swab32 (temp);
#endif
- cfg_base = (danube_pci_mapped_cfg | (0x68 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
+ cfg_base = (ifxmips_pci_mapped_cfg | (0x68 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
writel(temp, ((u32*)cfg_base));
local_irq_restore(flags);
return 0;
}
-static int danube_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
+static int ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
u32 data = 0;
- if (danube_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+ if (ifxmips_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1)
return PCIBIOS_SUCCESSFUL;
}
-static int danube_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
+static int ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
u32 data = 0;
{
data = val;
} else {
- if (danube_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+ if (ifxmips_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
if (size == 1)
(val << ((where & 3) << 3));
}
- if (danube_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
+ if (ifxmips_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return PCIBIOS_DEVICE_NOT_FOUND;
return PCIBIOS_SUCCESSFUL;
return 0;
}
-static void __init danube_pci_startup (void){
- /*initialize the first PCI device--danube itself */
+static void __init ifxmips_pci_startup (void){
+ /*initialize the first PCI device--ifxmips itself */
u32 temp_buffer;
/*TODO: trigger reset */
writel(readl(IFXMIPS_CGU_IFCCR) & ~0xf00000, IFXMIPS_CGU_IFCCR);
pci_probe_only = 0;
printk ("PCI: Probing PCI hardware on host bus 0.\n");
- danube_pci_startup ();
+ ifxmips_pci_startup ();
// IFXMIPS_PCI_REG32(PCI_CR_CLK_CTRL_REG) &= (~8);
- danube_pci_mapped_cfg = ioremap_nocache(0x17000000, 0x800 * 16);
- printk("Danube PCI mapped to 0x%08X\n", (unsigned long)danube_pci_mapped_cfg);
+ ifxmips_pci_mapped_cfg = ioremap_nocache(0x17000000, 0x800 * 16);
+ printk("IFXMips PCI mapped to 0x%08X\n", (unsigned long)ifxmips_pci_mapped_cfg);
- danube_pci_controller.io_map_base = (unsigned long)ioremap(IFXMIPS_PCI_IO_BASE, IFXMIPS_PCI_IO_SIZE - 1);
+ ifxmips_pci_controller.io_map_base = (unsigned long)ioremap(IFXMIPS_PCI_IO_BASE, IFXMIPS_PCI_IO_SIZE - 1);
- printk("Danube PCI I/O mapped to 0x%08X\n", (unsigned long)danube_pci_controller.io_map_base);
+ printk("IFXMips PCI I/O mapped to 0x%08X\n", (unsigned long)ifxmips_pci_controller.io_map_base);
- register_pci_controller(&danube_pci_controller);
+ register_pci_controller(&ifxmips_pci_controller);
return 0;
}
/*
- * arch/mips/danube/pmu.c
+ * arch/mips/ifxmips/pmu.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
-#include <asm/danube/danube.h>
+#include <asm/ifxmips/ifxmips.h>
void
-danube_pmu_enable (unsigned int module)
+ifxmips_pmu_enable (unsigned int module)
{
int err = 1000000;
if (!err)
panic("activating PMU module failed!");
}
-EXPORT_SYMBOL(danube_pmu_enable);
+EXPORT_SYMBOL(ifxmips_pmu_enable);
void
-danube_pmu_disable (unsigned int module)
+ifxmips_pmu_disable (unsigned int module)
{
writel(readl(IFXMIPS_PMU_PWDCR) | module, IFXMIPS_PMU_PWDCR);
}
-EXPORT_SYMBOL(danube_pmu_disable);
+EXPORT_SYMBOL(ifxmips_pmu_disable);
/*
- * arch/mips/danube/prom.c
+ * arch/mips/ifxmips/prom.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*
* Copyright (C) 2005 Wu Qi Ming infineon
*
- * Rewrite of Infineon Danube code, thanks to infineon for the support,
+ * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware
*
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <asm/bootinfo.h>
-#include <asm/danube/danube.h>
+#include <asm/ifxmips/ifxmips.h>
static char buf[1024];
/*
- * arch/mips/danube/prom.c
+ * arch/mips/ifxmips/prom.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*
* Copyright (C) 2005 infineon
*
- * Rewrite of Infineon Danube code, thanks to infineon for the support,
+ * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware
*
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/io.h>
-#include <asm/danube/danube.h>
+#include <asm/ifxmips/ifxmips.h>
static void
-danube_machine_restart (char *command)
+ifxmips_machine_restart (char *command)
{
printk (KERN_NOTICE "System restart\n");
local_irq_disable ();
}
static void
-danube_machine_halt (void)
+ifxmips_machine_halt (void)
{
printk (KERN_NOTICE "System halted.\n");
local_irq_disable ();
}
static void
-danube_machine_power_off (void)
+ifxmips_machine_power_off (void)
{
printk (KERN_NOTICE "Please turn off the power now.\n");
local_irq_disable ();
}
void
-danube_reboot_setup (void)
+ifxmips_reboot_setup (void)
{
- _machine_restart = danube_machine_restart;
- _machine_halt = danube_machine_halt;
- pm_power_off = danube_machine_power_off;
+ _machine_restart = ifxmips_machine_restart;
+ _machine_halt = ifxmips_machine_halt;
+ pm_power_off = ifxmips_machine_power_off;
}
/*
- * arch/mips/danube/setup.c
+ * arch/mips/ifxmips/setup.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*
* Copyright (C) 2004 peng.liu@infineon.com
*
- * Rewrite of Infineon Danube code, thanks to infineon for the support,
+ * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware
*
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
#include <asm/traps.h>
#include <asm/cpu.h>
#include <asm/irq.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_irq.h>
-#include <asm/danube/danube_pmu.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
+#include <asm/ifxmips/ifxmips_pmu.h>
static unsigned int r4k_offset; /* Amount to increment compare reg each time */
static unsigned int r4k_cur; /* What counter should be at next timer irq */
-extern void danube_reboot_setup (void);
+extern void ifxmips_reboot_setup (void);
void prom_printf (const char * fmt, ...);
void
}
unsigned int
-danube_get_ddr_hz (void)
+ifxmips_get_ddr_hz (void)
{
switch (readl(IFXMIPS_CGU_SYS) & 0x3)
{
}
return CLOCK_83M;
}
-EXPORT_SYMBOL(danube_get_ddr_hz);
+EXPORT_SYMBOL(ifxmips_get_ddr_hz);
unsigned int
-danube_get_cpu_hz (void)
+ifxmips_get_cpu_hz (void)
{
- unsigned int ddr_clock = danube_get_ddr_hz();
+ unsigned int ddr_clock = ifxmips_get_ddr_hz();
switch (readl(IFXMIPS_CGU_SYS) & 0xc)
{
case 0:
}
return ddr_clock << 1;
}
-EXPORT_SYMBOL(danube_get_cpu_hz);
+EXPORT_SYMBOL(ifxmips_get_cpu_hz);
unsigned int
-danube_get_fpi_hz (void)
+ifxmips_get_fpi_hz (void)
{
- unsigned int ddr_clock = danube_get_ddr_hz();
+ unsigned int ddr_clock = ifxmips_get_ddr_hz();
if (readl(IFXMIPS_CGU_SYS) & 0x40)
{
return ddr_clock >> 1;
}
return ddr_clock;
}
-EXPORT_SYMBOL(danube_get_fpi_hz);
+EXPORT_SYMBOL(ifxmips_get_fpi_hz);
unsigned int
-danube_get_cpu_ver (void)
+ifxmips_get_cpu_ver (void)
{
return readl(IFXMIPS_MCD_CHIPID) & 0xFFFFF000;
}
-EXPORT_SYMBOL(danube_get_cpu_ver);
+EXPORT_SYMBOL(ifxmips_get_cpu_ver);
void
-danube_time_init (void)
+ifxmips_time_init (void)
{
- mips_hpt_frequency = danube_get_cpu_hz() / 2;
+ mips_hpt_frequency = ifxmips_get_cpu_hz() / 2;
r4k_offset = mips_hpt_frequency / HZ;
printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
printk("r4k_offset: %08x(%d)\n", r4k_offset, r4k_offset);
}
int
-danube_be_handler(struct pt_regs *regs, int is_fixup)
+ifxmips_be_handler(struct pt_regs *regs, int is_fixup)
{
/*TODO*/
printk(KERN_ERR "TODO: BUS error\n");
/* ISR GPTU Timer 6 for high resolution timer */
static irqreturn_t
-danube_timer6_interrupt(int irq, void *dev_id)
+ifxmips_timer6_interrupt(int irq, void *dev_id)
{
timer_interrupt(IFXMIPS_TIMER6_INT, NULL);
}
static struct irqaction hrt_irqaction = {
- .handler = danube_timer6_interrupt,
+ .handler = ifxmips_timer6_interrupt,
.flags = IRQF_DISABLED,
.name = "hrt",
};
r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur);
- danube_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
writel(0x100, IFXMIPS_GPTU_GPT_CLC);
plat_mem_setup (void)
{
u32 status;
- prom_printf("This %s has a cpu rev of 0x%X\n", BOARD_SYSTEM_TYPE, danube_get_cpu_ver());
+ prom_printf("This %s has a cpu rev of 0x%X\n", BOARD_SYSTEM_TYPE, ifxmips_get_cpu_ver());
//TODO WHY ???
/* clear RE bit*/
status &= (~(1<<25));
write_c0_status(status);
- danube_reboot_setup();
- board_time_init = danube_time_init;
- board_be_handler = &danube_be_handler;
+ ifxmips_reboot_setup();
+ board_time_init = ifxmips_time_init;
+ board_be_handler = &ifxmips_be_handler;
ioport_resource.start = IOPORT_RESOURCE_START;
ioport_resource.end = IOPORT_RESOURCE_END;
#include <linux/kernel.h>
#include <linux/version.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_irq.h>
-#include <asm/danube/ifx_ssc_defines.h>
-#include <asm/danube/ifx_ssc.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
+#include <asm/ifxmips/ifx_ssc_defines.h>
+#include <asm/ifxmips/ifx_ssc.h>
/* allow the user to set the major device number */
-static int danube_eeprom_maj = 0;
+static int ifxmips_eeprom_maj = 0;
extern int ifx_ssc_init (void);
extern int ifx_ssc_open (struct inode *inode, struct file *filp);
}
int
-danube_eeprom_open (struct inode *inode, struct file *filp)
+ifxmips_eeprom_open (struct inode *inode, struct file *filp)
{
filp->f_pos = 0;
return 0;
}
int
-danube_eeprom_close (struct inode *inode, struct file *filp)
+ifxmips_eeprom_close (struct inode *inode, struct file *filp)
{
return 0;
}
int
-danube_eeprom_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data)
+ifxmips_eeprom_ioctl (struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data)
{
return 0;
}
ssize_t
-danube_eeprom_read (char *buf, size_t len, unsigned int addr)
+ifxmips_eeprom_read (char *buf, size_t len, unsigned int addr)
{
int ret = 0;
unsigned int data;
if ((ret = ifx_ssc_open((struct inode *) 0, NULL)))
{
- printk("danube_eeprom_open fails\n");
+ printk("ifxmips_eeprom_open fails\n");
goto out;
}
out:
if (ifx_ssc_close((struct inode *) 0, NULL))
- printk("danube_eeprom_close fails\n");
+ printk("ifxmips_eeprom_close fails\n");
return len;
}
-EXPORT_SYMBOL(danube_eeprom_read);
+EXPORT_SYMBOL(ifxmips_eeprom_read);
static ssize_t
-danube_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
+ifxmips_eeprom_fops_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
{
int ret = 0;
unsigned char ssc_rx_buf[EEPROM_SIZE];
local_irq_save(flag);
- if ((ret = danube_eeprom_read(ssc_rx_buf, len, *off)) < 0)
+ if ((ret = ifxmips_eeprom_read(ssc_rx_buf, len, *off)) < 0)
{
printk("read fails, err=%x\n", ret);
local_irq_restore(flag);
}
ssize_t
-danube_eeprom_write (char *buf, size_t len, unsigned int addr)
+ifxmips_eeprom_write (char *buf, size_t len, unsigned int addr)
{
int ret = 0;
unsigned int data;
if ((ret = ifx_ssc_open ((struct inode *) 0, NULL)))
{
- printk ("danube_eeprom_open fails\n");
+ printk ("ifxmips_eeprom_open fails\n");
goto out;
}
out:
if (ifx_ssc_close ((struct inode *) 0, NULL))
- printk ("danube_eeprom_close fails\n");
+ printk ("ifxmips_eeprom_close fails\n");
return ret;
}
-EXPORT_SYMBOL(danube_eeprom_write);
+EXPORT_SYMBOL(ifxmips_eeprom_write);
static ssize_t
-danube_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff_t * off)
+ifxmips_eeprom_fops_write (struct file *filp, const char *ubuf, size_t len, loff_t * off)
{
int ret = 0;
unsigned char ssc_tx_buf[EEPROM_SIZE];
if ((ret = copy_from_user (ssc_tx_buf, ubuf, len)))
return EFAULT;
- ret = danube_eeprom_write (ssc_tx_buf, len, *off);
+ ret = ifxmips_eeprom_write (ssc_tx_buf, len, *off);
if (ret > 0)
*off = ret;
}
loff_t
-danube_eeprom_llseek (struct file * filp, loff_t off, int whence)
+ifxmips_eeprom_llseek (struct file * filp, loff_t off, int whence)
{
loff_t newpos;
switch (whence) {
return newpos;
}
-static struct file_operations danube_eeprom_fops = {
+static struct file_operations ifxmips_eeprom_fops = {
owner:THIS_MODULE,
- llseek:danube_eeprom_llseek,
- read:danube_eeprom_fops_read,
- write:danube_eeprom_fops_write,
- ioctl:danube_eeprom_ioctl,
- open:danube_eeprom_open,
- release:danube_eeprom_close,
+ llseek:ifxmips_eeprom_llseek,
+ read:ifxmips_eeprom_fops_read,
+ write:ifxmips_eeprom_fops_write,
+ ioctl:ifxmips_eeprom_ioctl,
+ open:ifxmips_eeprom_open,
+ release:ifxmips_eeprom_close,
};
int __init
-danube_eeprom_init (void)
+ifxmips_eeprom_init (void)
{
int ret = 0;
- danube_eeprom_maj = register_chrdev(0, "eeprom", &danube_eeprom_fops);
+ ifxmips_eeprom_maj = register_chrdev(0, "eeprom", &ifxmips_eeprom_fops);
- if (danube_eeprom_maj < 0)
+ if (ifxmips_eeprom_maj < 0)
{
printk("failed to register eeprom device\n");
ret = -EINVAL;
goto out;
}
- printk("danube_eeprom : /dev/eeprom mayor %d\n", danube_eeprom_maj);
+ printk("ifxmips_eeprom : /dev/eeprom mayor %d\n", ifxmips_eeprom_maj);
out:
return ret;
}
void __exit
-danube_eeprom_cleanup_module (void)
+ifxmips_eeprom_cleanup_module (void)
{
- /*if (unregister_chrdev (danube_eeprom_maj, "eeprom")) {
+ /*if (unregister_chrdev (ifxmips_eeprom_maj, "eeprom")) {
printk ("Unable to unregister major %d for the EEPROM\n",
maj);
}*/
}
-module_exit (danube_eeprom_cleanup_module);
-module_init (danube_eeprom_init);
+module_exit (ifxmips_eeprom_cleanup_module);
+module_init (ifxmips_eeprom_init);
MODULE_LICENSE ("GPL");
MODULE_AUTHOR ("Peng Liu");
MODULE_DESCRIPTION ("IFAP EEPROM driver");
-MODULE_SUPPORTED_DEVICE ("danube_eeprom");
+MODULE_SUPPORTED_DEVICE ("ifxmips_eeprom");
#include <linux/ioctl.h>
#include <asm/semaphore.h>
#include <asm/uaccess.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_ioctl.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_ioctl.h>
#define MAX_PORTS 2
#define PINS_PER_PORT 16
-static unsigned int danube_gpio_major = 0;
+static unsigned int ifxmips_gpio_major = 0;
/* TODO do we need this ? */
static struct semaphore port_sem;
#define IFXMIPS_GPIO_SANITY {if (port > MAX_PORTS || pin > PINS_PER_PORT) return -EINVAL; }
int
-danube_port_reserve_pin (unsigned int port, unsigned int pin)
+ifxmips_port_reserve_pin (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__);
return 0;
}
-EXPORT_SYMBOL(danube_port_reserve_pin);
+EXPORT_SYMBOL(ifxmips_port_reserve_pin);
int
-danube_port_free_pin (unsigned int port, unsigned int pin)
+ifxmips_port_free_pin (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
printk("%s : call to obseleted function\n", __func__);
return 0;
}
-EXPORT_SYMBOL(danube_port_free_pin);
+EXPORT_SYMBOL(ifxmips_port_free_pin);
int
-danube_port_set_open_drain (unsigned int port, unsigned int pin)
+ifxmips_port_set_open_drain (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OD);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_open_drain);
+EXPORT_SYMBOL(ifxmips_port_set_open_drain);
int
-danube_port_clear_open_drain (unsigned int port, unsigned int pin)
+ifxmips_port_clear_open_drain (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OD + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OD);
return 0;
}
-EXPORT_SYMBOL(danube_port_clear_open_drain);
+EXPORT_SYMBOL(ifxmips_port_clear_open_drain);
int
-danube_port_set_pudsel (unsigned int port, unsigned int pin)
+ifxmips_port_set_pudsel (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDSEL);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_pudsel);
+EXPORT_SYMBOL(ifxmips_port_set_pudsel);
int
-danube_port_clear_pudsel (unsigned int port, unsigned int pin)
+ifxmips_port_clear_pudsel (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDSEL + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDSEL);
return 0;
}
-EXPORT_SYMBOL(danube_port_clear_pudsel);
+EXPORT_SYMBOL(ifxmips_port_clear_pudsel);
int
-danube_port_set_puden (unsigned int port, unsigned int pin)
+ifxmips_port_set_puden (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_PUDEN);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_puden);
+EXPORT_SYMBOL(ifxmips_port_set_puden);
int
-danube_port_clear_puden (unsigned int port, unsigned int pin)
+ifxmips_port_clear_puden (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_PUDEN + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_PUDEN);
return 0;
}
-EXPORT_SYMBOL(danube_port_clear_puden);
+EXPORT_SYMBOL(ifxmips_port_clear_puden);
int
-danube_port_set_stoff (unsigned int port, unsigned int pin)
+ifxmips_port_set_stoff (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_STOFF);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_stoff);
+EXPORT_SYMBOL(ifxmips_port_set_stoff);
int
-danube_port_clear_stoff (unsigned int port, unsigned int pin)
+ifxmips_port_clear_stoff (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_STOFF + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_STOFF);
return 0;
}
-EXPORT_SYMBOL(danube_port_clear_stoff);
+EXPORT_SYMBOL(ifxmips_port_clear_stoff);
int
-danube_port_set_dir_out (unsigned int port, unsigned int pin)
+ifxmips_port_set_dir_out (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_DIR);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_dir_out);
+EXPORT_SYMBOL(ifxmips_port_set_dir_out);
int
-danube_port_set_dir_in (unsigned int port, unsigned int pin)
+ifxmips_port_set_dir_in (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_DIR + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_DIR);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_dir_in);
+EXPORT_SYMBOL(ifxmips_port_set_dir_in);
int
-danube_port_set_output (unsigned int port, unsigned int pin)
+ifxmips_port_set_output (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_OUT);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_output);
+EXPORT_SYMBOL(ifxmips_port_set_output);
int
-danube_port_clear_output (unsigned int port, unsigned int pin)
+ifxmips_port_clear_output (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_OUT + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_OUT);
return 0;
}
-EXPORT_SYMBOL(danube_port_clear_output);
+EXPORT_SYMBOL(ifxmips_port_clear_output);
int
-danube_port_get_input (unsigned int port, unsigned int pin)
+ifxmips_port_get_input (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
else
return 1;
}
-EXPORT_SYMBOL(danube_port_get_input);
+EXPORT_SYMBOL(ifxmips_port_get_input);
int
-danube_port_set_altsel0 (unsigned int port, unsigned int pin)
+ifxmips_port_set_altsel0 (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL0);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_altsel0);
+EXPORT_SYMBOL(ifxmips_port_set_altsel0);
int
-danube_port_clear_altsel0 (unsigned int port, unsigned int pin)
+ifxmips_port_clear_altsel0 (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL0);
return 0;
}
-EXPORT_SYMBOL(danube_port_clear_altsel0);
+EXPORT_SYMBOL(ifxmips_port_clear_altsel0);
int
-danube_port_set_altsel1 (unsigned int port, unsigned int pin)
+ifxmips_port_set_altsel1 (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) | (1 << pin), IFXMIPS_GPIO_P0_ALTSEL1);
return 0;
}
-EXPORT_SYMBOL(danube_port_set_altsel1);
+EXPORT_SYMBOL(ifxmips_port_set_altsel1);
int
-danube_port_clear_altsel1 (unsigned int port, unsigned int pin)
+ifxmips_port_clear_altsel1 (unsigned int port, unsigned int pin)
{
IFXMIPS_GPIO_SANITY;
writel(readl(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0x30)) & ~(1 << pin), IFXMIPS_GPIO_P0_ALTSEL1);
return 0;
}
-EXPORT_SYMBOL(danube_port_clear_altsel1);
+EXPORT_SYMBOL(ifxmips_port_clear_altsel1);
-long danube_port_read_procmem_helper(char* tag, u32* in_reg, char *buf)
+long ifxmips_port_read_procmem_helper(char* tag, u32* in_reg, char *buf)
{
u32 reg, bit = 0;
unsigned int len, t;
}
int
-danube_port_read_procmem (char *buf, char **start, off_t offset, int count,
+ifxmips_port_read_procmem (char *buf, char **start, off_t offset, int count,
int *eof, void *data)
{
- long len = sprintf (buf, "\nDanube Port Settings\n");
+ long len = sprintf (buf, "\nIFXMips Port Settings\n");
len += sprintf (buf + len,
" 3 2 1 0\n");
len += sprintf (buf + len,
"----------------------------------------\n");
- len += danube_port_read_procmem_helper("P0-OUT", IFXMIPS_GPIO_P0_OUT, &buf[len]);
- len += danube_port_read_procmem_helper("P1-OUT", IFXMIPS_GPIO_P1_OUT, &buf[len]);
- len += danube_port_read_procmem_helper("P0-IN ", IFXMIPS_GPIO_P0_IN, &buf[len]);
- len += danube_port_read_procmem_helper("P1-IN ", IFXMIPS_GPIO_P1_IN, &buf[len]);
- len += danube_port_read_procmem_helper("P0-DIR", IFXMIPS_GPIO_P0_DIR, &buf[len]);
- len += danube_port_read_procmem_helper("P1-DIR", IFXMIPS_GPIO_P1_DIR, &buf[len]);
- len += danube_port_read_procmem_helper("P0-STO ", IFXMIPS_GPIO_P0_STOFF, &buf[len]);
- len += danube_port_read_procmem_helper("P1-STO ", IFXMIPS_GPIO_P1_STOFF, &buf[len]);
- len += danube_port_read_procmem_helper("P0-PUDE", IFXMIPS_GPIO_P0_PUDEN, &buf[len]);
- len += danube_port_read_procmem_helper("P1-PUDE", IFXMIPS_GPIO_P1_PUDEN, &buf[len]);
- len += danube_port_read_procmem_helper("P0-OD ", IFXMIPS_GPIO_P0_OD, &buf[len]);
- len += danube_port_read_procmem_helper("P1-OD ", IFXMIPS_GPIO_P1_OD, &buf[len]);
- len += danube_port_read_procmem_helper("P0-PUDS", IFXMIPS_GPIO_P0_PUDSEL, &buf[len]);
- len += danube_port_read_procmem_helper("P1-PUDS", IFXMIPS_GPIO_P1_PUDSEL, &buf[len]);
- len += danube_port_read_procmem_helper("P0-ALT0", IFXMIPS_GPIO_P0_ALTSEL0, &buf[len]);
- len += danube_port_read_procmem_helper("P1-ALT0", IFXMIPS_GPIO_P1_ALTSEL0, &buf[len]);
- len += danube_port_read_procmem_helper("P0-ALT1", IFXMIPS_GPIO_P0_ALTSEL1, &buf[len]);
- len += danube_port_read_procmem_helper("P1-ALT1", IFXMIPS_GPIO_P1_ALTSEL1, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-OUT", IFXMIPS_GPIO_P0_OUT, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-OUT", IFXMIPS_GPIO_P1_OUT, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-IN ", IFXMIPS_GPIO_P0_IN, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-IN ", IFXMIPS_GPIO_P1_IN, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-DIR", IFXMIPS_GPIO_P0_DIR, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-DIR", IFXMIPS_GPIO_P1_DIR, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-STO ", IFXMIPS_GPIO_P0_STOFF, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-STO ", IFXMIPS_GPIO_P1_STOFF, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-PUDE", IFXMIPS_GPIO_P0_PUDEN, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-PUDE", IFXMIPS_GPIO_P1_PUDEN, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-OD ", IFXMIPS_GPIO_P0_OD, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-OD ", IFXMIPS_GPIO_P1_OD, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-PUDS", IFXMIPS_GPIO_P0_PUDSEL, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-PUDS", IFXMIPS_GPIO_P1_PUDSEL, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-ALT0", IFXMIPS_GPIO_P0_ALTSEL0, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-ALT0", IFXMIPS_GPIO_P1_ALTSEL0, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P0-ALT1", IFXMIPS_GPIO_P0_ALTSEL1, &buf[len]);
+ len += ifxmips_port_read_procmem_helper("P1-ALT1", IFXMIPS_GPIO_P1_ALTSEL1, &buf[len]);
len = len + sprintf (buf + len, "\n\n");
*eof = 1;
}
static int
-danube_port_open (struct inode *inode, struct file *filep)
+ifxmips_port_open (struct inode *inode, struct file *filep)
{
return 0;
}
static int
-danube_port_release (struct inode *inode, struct file *filelp)
+ifxmips_port_release (struct inode *inode, struct file *filelp)
{
return 0;
}
static int
-danube_port_ioctl (struct inode *inode, struct file *filp,
+ifxmips_port_ioctl (struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
int ret = 0;
- volatile struct danube_port_ioctl_parm parm;
+ volatile struct ifxmips_port_ioctl_parm parm;
if (_IOC_TYPE (cmd) != IFXMIPS_PORT_IOC_MAGIC)
return -EINVAL;
if (_IOC_DIR (cmd) & _IOC_WRITE) {
if (!access_ok
(VERIFY_READ, arg,
- sizeof (struct danube_port_ioctl_parm)))
+ sizeof (struct ifxmips_port_ioctl_parm)))
return -EFAULT;
ret = copy_from_user ((void *) &parm, (void *) arg,
- sizeof (struct danube_port_ioctl_parm));
+ sizeof (struct ifxmips_port_ioctl_parm));
}
if (_IOC_DIR (cmd) & _IOC_READ) {
if (!access_ok
(VERIFY_WRITE, arg,
- sizeof (struct danube_port_ioctl_parm)))
+ sizeof (struct ifxmips_port_ioctl_parm)))
return -EFAULT;
}
switch (cmd) {
case IFXMIPS_PORT_IOCOD:
if (parm.value == 0x00)
- danube_port_clear_open_drain(parm.port, parm.pin);
+ ifxmips_port_clear_open_drain(parm.port, parm.pin);
else
- danube_port_set_open_drain(parm.port, parm.pin);
+ ifxmips_port_set_open_drain(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCPUDSEL:
if (parm.value == 0x00)
- danube_port_clear_pudsel(parm.port, parm.pin);
+ ifxmips_port_clear_pudsel(parm.port, parm.pin);
else
- danube_port_set_pudsel(parm.port, parm.pin);
+ ifxmips_port_set_pudsel(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCPUDEN:
if (parm.value == 0x00)
- danube_port_clear_puden(parm.port, parm.pin);
+ ifxmips_port_clear_puden(parm.port, parm.pin);
else
- danube_port_set_puden(parm.port, parm.pin);
+ ifxmips_port_set_puden(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCSTOFF:
if (parm.value == 0x00)
- danube_port_clear_stoff(parm.port, parm.pin);
+ ifxmips_port_clear_stoff(parm.port, parm.pin);
else
- danube_port_set_stoff(parm.port, parm.pin);
+ ifxmips_port_set_stoff(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCDIR:
if (parm.value == 0x00)
- danube_port_set_dir_in(parm.port, parm.pin);
+ ifxmips_port_set_dir_in(parm.port, parm.pin);
else
- danube_port_set_dir_out(parm.port, parm.pin);
+ ifxmips_port_set_dir_out(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCOUTPUT:
if (parm.value == 0x00)
- danube_port_clear_output(parm.port, parm.pin);
+ ifxmips_port_clear_output(parm.port, parm.pin);
else
- danube_port_set_output(parm.port, parm.pin);
+ ifxmips_port_set_output(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCALTSEL0:
if (parm.value == 0x00)
- danube_port_clear_altsel0(parm.port, parm.pin);
+ ifxmips_port_clear_altsel0(parm.port, parm.pin);
else
- danube_port_set_altsel0(parm.port, parm.pin);
+ ifxmips_port_set_altsel0(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCALTSEL1:
if (parm.value == 0x00)
- danube_port_clear_altsel1(parm.port, parm.pin);
+ ifxmips_port_clear_altsel1(parm.port, parm.pin);
else
- danube_port_set_altsel1(parm.port, parm.pin);
+ ifxmips_port_set_altsel1(parm.port, parm.pin);
break;
case IFXMIPS_PORT_IOCINPUT:
- parm.value = danube_port_get_input(parm.port, parm.pin);
+ parm.value = ifxmips_port_get_input(parm.port, parm.pin);
copy_to_user((void*)arg, (void*)&parm,
- sizeof(struct danube_port_ioctl_parm));
+ sizeof(struct ifxmips_port_ioctl_parm));
break;
default:
}
static struct file_operations port_fops = {
- .open = danube_port_open,
- .release = danube_port_release,
- .ioctl = danube_port_ioctl
+ .open = ifxmips_port_open,
+ .release = ifxmips_port_release,
+ .ioctl = ifxmips_port_ioctl
};
int __init
-danube_gpio_init (void)
+ifxmips_gpio_init (void)
{
int retval = 0;
sema_init (&port_sem, 1);
- danube_gpio_major = register_chrdev(0, "danube_gpio", &port_fops);
- if (!danube_gpio_major)
+ ifxmips_gpio_major = register_chrdev(0, "ifxmips_gpio", &port_fops);
+ if (!ifxmips_gpio_major)
{
- printk("danube-port: Error! Could not register port device. #%d\n", danube_gpio_major);
+ printk("ifxmips-port: Error! Could not register port device. #%d\n", ifxmips_gpio_major);
retval = -EINVAL;
goto out;
}
- create_proc_read_entry("danube_gpio", 0, NULL,
- danube_port_read_procmem, NULL);
+ create_proc_read_entry("ifxmips_gpio", 0, NULL,
+ ifxmips_port_read_procmem, NULL);
- printk("registered danube gpio driver\n");
+ printk("registered ifxmips gpio driver\n");
out:
return retval;
}
void __exit
-danube_gpio_exit (void)
+ifxmips_gpio_exit (void)
{
- unregister_chrdev(danube_gpio_major, "danube_gpio");
- remove_proc_entry("danube_gpio", NULL);
+ unregister_chrdev(ifxmips_gpio_major, "ifxmips_gpio");
+ remove_proc_entry("ifxmips_gpio", NULL);
}
-module_init(danube_gpio_init);
-module_exit(danube_gpio_exit);
+module_init(ifxmips_gpio_init);
+module_exit(ifxmips_gpio_exit);
#include <asm/uaccess.h>
#include <asm/unistd.h>
#include <linux/errno.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_gpio.h>
-#include <asm/danube/danube_pmu.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_gpio.h>
+#include <asm/ifxmips/ifxmips_pmu.h>
#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_FALLING
//#define IFXMIPS_LED_CLK_EDGE IFXMIPS_LED_RISING
#define IFXMIPS_LED_GPIO_PORT 0
-static int danube_led_major;
+static int ifxmips_led_major;
void
-danube_led_set (unsigned int led)
+ifxmips_led_set (unsigned int led)
{
led &= 0xffffff;
writel(readl(IFXMIPS_LED_CPU0) | led, IFXMIPS_LED_CPU0);
}
-EXPORT_SYMBOL(danube_led_set);
+EXPORT_SYMBOL(ifxmips_led_set);
void
-danube_led_clear (unsigned int led)
+ifxmips_led_clear (unsigned int led)
{
led = ~(led & 0xffffff);
writel(readl(IFXMIPS_LED_CPU0) & led, IFXMIPS_LED_CPU0);
}
-EXPORT_SYMBOL(danube_led_clear);
+EXPORT_SYMBOL(ifxmips_led_clear);
void
-danube_led_blink_set (unsigned int led)
+ifxmips_led_blink_set (unsigned int led)
{
led &= 0xffffff;
writel(readl(IFXMIPS_LED_CON0) | led, IFXMIPS_LED_CON0);
}
-EXPORT_SYMBOL(danube_led_blink_set);
+EXPORT_SYMBOL(ifxmips_led_blink_set);
void
-danube_led_blink_clear (unsigned int led)
+ifxmips_led_blink_clear (unsigned int led)
{
led = ~(led & 0xffffff);
writel(readl(IFXMIPS_LED_CON0) & led, IFXMIPS_LED_CON0);
}
-EXPORT_SYMBOL(danube_led_blink_clear);
+EXPORT_SYMBOL(ifxmips_led_blink_clear);
void
-danube_led_setup_gpio (void)
+ifxmips_led_setup_gpio (void)
{
int i = 0;
/* we need to setup pins SH,D,ST (4,5,6) */
for (i = 4; i < 7; i++)
{
- danube_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i);
- danube_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i);
- danube_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i);
- danube_port_set_open_drain(IFXMIPS_LED_GPIO_PORT, i);
+ ifxmips_port_set_altsel0(IFXMIPS_LED_GPIO_PORT, i);
+ ifxmips_port_clear_altsel1(IFXMIPS_LED_GPIO_PORT, i);
+ ifxmips_port_set_dir_out(IFXMIPS_LED_GPIO_PORT, i);
+ ifxmips_port_set_open_drain(IFXMIPS_LED_GPIO_PORT, i);
}
}
return 0;
}
-static struct file_operations danube_led_fops = {
+static struct file_operations ifxmips_led_fops = {
.owner = THIS_MODULE,
.ioctl = led_ioctl,
.open = led_open,
int __init
-danube_led_init (void)
+ifxmips_led_init (void)
{
int ret = 0;
- danube_led_setup_gpio();
+ ifxmips_led_setup_gpio();
writel(0, IFXMIPS_LED_AR);
writel(0, IFXMIPS_LED_CPU0);
writel(readl(IFXMIPS_LED_CON0) | IFXMIPS_LED_ADSL_SRC, IFXMIPS_LED_CON0);
/* per default, the leds are turned on */
- danube_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_LED);
- danube_led_major = register_chrdev(0, "danube_led", &danube_led_fops);
+ ifxmips_led_major = register_chrdev(0, "ifxmips_led", &ifxmips_led_fops);
- if (!danube_led_major)
+ if (!ifxmips_led_major)
{
- printk("danube_led: Error! Could not register device. %d\n", danube_led_major);
+ printk("ifxmips_led: Error! Could not register device. %d\n", ifxmips_led_major);
ret = -EINVAL;
goto out;
}
- printk(KERN_INFO "danube_led : device registered on major %d\n", danube_led_major);
+ printk(KERN_INFO "ifxmips_led : device registered on major %d\n", ifxmips_led_major);
out:
return ret;
}
void __exit
-danube_led_exit (void)
+ifxmips_led_exit (void)
{
- unregister_chrdev(danube_led_major, "danube_led");
+ unregister_chrdev(ifxmips_led_major, "ifxmips_led");
}
-module_init(danube_led_init);
-module_exit(danube_led_exit);
+module_init(ifxmips_led_init);
+module_exit(ifxmips_led_exit);
#include <linux/kernel.h>
#include <linux/version.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_irq.h>
-#include <asm/danube/ifx_ssc_defines.h>
-#include <asm/danube/ifx_ssc.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
+#include <asm/ifxmips/ifx_ssc_defines.h>
+#include <asm/ifxmips/ifx_ssc.h>
#ifdef SSC_FRAME_INT_ENABLE
#undef SSC_FRAME_INT_ENABLE
static void tx_int (struct ifx_ssc_port *);
static int ifx_ssc1_read_proc (char *, char **, off_t, int, int *, void *);
-extern unsigned int danube_get_fpi_hz (void);
-extern void mask_and_ack_danube_irq (unsigned int irq_nr);
+extern unsigned int ifxmips_get_fpi_hz (void);
+extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr);
static struct file_operations ifx_ssc_fops = {
.owner = THIS_MODULE,
printk ("ifx_ssc_get_kernel_clk rmc==0 \n");
return 0;
}
- return danube_get_fpi_hz () / rmc;
+ return ifxmips_get_fpi_hz () / rmc;
}
#ifndef not_yet
wake_up_interruptible (&info->rwait);
// clear pending int's
- mask_and_ack_danube_irq(info->rxirq);
- mask_and_ack_danube_irq(info->txirq);
- mask_and_ack_danube_irq(info->errirq);
+ mask_and_ack_ifxmips_irq(info->rxirq);
+ mask_and_ack_ifxmips_irq(info->txirq);
+ mask_and_ack_ifxmips_irq(info->errirq);
// clear error flags
WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR, info->mapbase + IFX_SSC_WHBSTATE);
WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR, info->mapbase + IFX_SSC_WHBSTATE);
// clear pending interrupts
- mask_and_ack_danube_irq(info->rxirq);
- mask_and_ack_danube_irq(info->txirq);
- mask_and_ack_danube_irq(info->errirq);
+ mask_and_ack_ifxmips_irq(info->rxirq);
+ mask_and_ack_ifxmips_irq(info->txirq);
+ mask_and_ack_ifxmips_irq(info->errirq);
WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_ENABLE, info->mapbase + IFX_SSC_WHBSTATE);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
-MODULE_DESCRIPTION("danube ssc driver");
+MODULE_DESCRIPTION("ifxmips ssc driver");
#include <linux/proc_fs.h>
#include <linux/ioctl.h>
#include <linux/module.h>
-#include <asm-mips/danube/danube_wdt.h>
-#include <asm-mips/danube/danube.h>
+#include <asm-mips/ifxmips/ifxmips_wdt.h>
+#include <asm-mips/ifxmips/ifxmips.h>
// TODO remove magic numbers and weirdo macros
-extern unsigned int danube_get_fpi_hz (void);
+extern unsigned int ifxmips_get_fpi_hz (void);
-static int danube_wdt_inuse = 0;
-static int danube_wdt_major = 0;
+static int ifxmips_wdt_inuse = 0;
+static int ifxmips_wdt_major = 0;
int
-danube_wdt_enable (unsigned int timeout)
+ifxmips_wdt_enable (unsigned int timeout)
{
unsigned int wdt_cr = 0;
unsigned int wdt_reload = 0;
}
void
-danube_wdt_disable (void)
+ifxmips_wdt_disable (void)
{
writel(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW1), IFXMIPS_BIU_WDT_CR);
writel(IFXMIPS_BIU_WDT_CR_PW_SET(IFXMIPS_WDT_PW2), IFXMIPS_BIU_WDT_CR);
/* passed LPEN or DSEN */
void
-danube_wdt_enable_feature (int en, int type)
+ifxmips_wdt_enable_feature (int en, int type)
{
unsigned int wdt_cr = 0;
}
void
-danube_wdt_prewarning_limit (int pwl)
+ifxmips_wdt_prewarning_limit (int pwl)
{
unsigned int wdt_cr = 0;
}
void
-danube_wdt_set_clkdiv (int clkdiv)
+ifxmips_wdt_set_clkdiv (int clkdiv)
{
unsigned int wdt_cr = 0;
}
static int
-danube_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
+ifxmips_wdt_ioctl (struct inode *inode, struct file *file, unsigned int cmd,
unsigned long arg)
{
int result = 0;
switch (cmd)
{
case IFXMIPS_WDT_IOC_START:
- if ((result = danube_wdt_enable(user_arg)) < 0)
+ if ((result = ifxmips_wdt_enable(user_arg)) < 0)
timeout = -1;
else
timeout = user_arg;
case IFXMIPS_WDT_IOC_STOP:
printk("disable watch dog timer\n");
- danube_wdt_disable();
+ ifxmips_wdt_disable();
break;
case IFXMIPS_WDT_IOC_PING:
if (timeout < 0)
result = -EIO;
else
- result = danube_wdt_enable(timeout);
+ result = ifxmips_wdt_enable(timeout);
break;
case IFXMIPS_WDT_IOC_GET_STATUS:
break;
case IFXMIPS_WDT_IOC_SET_PWL:
- danube_wdt_prewarning_limit(user_arg);
+ ifxmips_wdt_prewarning_limit(user_arg);
break;
case IFXMIPS_WDT_IOC_SET_DSEN:
- danube_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_DSEN);
+ ifxmips_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_DSEN);
break;
case IFXMIPS_WDT_IOC_SET_LPEN:
- danube_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_LPEN);
+ ifxmips_wdt_enable_feature(user_arg, IFXMIPS_BIU_WDT_CR_LPEN);
break;
case IFXMIPS_WDT_IOC_SET_CLKDIV:
- danube_wdt_set_clkdiv(user_arg);
+ ifxmips_wdt_set_clkdiv(user_arg);
break;
default:
}
static int
-danube_wdt_open (struct inode *inode, struct file *file)
+ifxmips_wdt_open (struct inode *inode, struct file *file)
{
- if (danube_wdt_inuse)
+ if (ifxmips_wdt_inuse)
return -EBUSY;
- danube_wdt_inuse = 1;
+ ifxmips_wdt_inuse = 1;
return 0;
}
static int
-danube_wdt_release (struct inode *inode, struct file *file)
+ifxmips_wdt_release (struct inode *inode, struct file *file)
{
- danube_wdt_inuse = 0;
+ ifxmips_wdt_inuse = 0;
return 0;
}
int
-danube_wdt_register_proc_read (char *buf, char **start, off_t offset, int count,
+ifxmips_wdt_register_proc_read (char *buf, char **start, off_t offset, int count,
int *eof, void *data)
{
int len = 0;
static struct file_operations wdt_fops = {
.owner = THIS_MODULE,
- .ioctl = danube_wdt_ioctl,
- .open = danube_wdt_open,
- .release = danube_wdt_release,
+ .ioctl = ifxmips_wdt_ioctl,
+ .open = ifxmips_wdt_open,
+ .release = ifxmips_wdt_release,
};
int __init
-danube_wdt_init_module (void)
+ifxmips_wdt_init_module (void)
{
- danube_wdt_major = register_chrdev(0, "wdt", &wdt_fops);
+ ifxmips_wdt_major = register_chrdev(0, "wdt", &wdt_fops);
- if (danube_wdt_major < 0)
+ if (ifxmips_wdt_major < 0)
{
printk("cannot register watchdog device\n");
return -EINVAL;
}
- create_proc_read_entry("danube_wdt", 0, NULL, danube_wdt_register_proc_read, NULL);
+ create_proc_read_entry("ifxmips_wdt", 0, NULL, ifxmips_wdt_register_proc_read, NULL);
- printk("danube watchdog loaded\n");
+ printk("ifxmips watchdog loaded\n");
return 0;
}
void
-danube_wdt_cleanup_module (void)
+ifxmips_wdt_cleanup_module (void)
{
- unregister_chrdev(danube_wdt_major, "wdt");
- remove_proc_entry("danube_wdt", NULL);
+ unregister_chrdev(ifxmips_wdt_major, "wdt");
+ remove_proc_entry("ifxmips_wdt", NULL);
}
-module_init(danube_wdt_init_module);
-module_exit(danube_wdt_cleanup_module);
+module_init(ifxmips_wdt_init_module);
+module_exit(ifxmips_wdt_cleanup_module);
/*
- * drivers/net/danube_mii0.c
+ * drivers/net/ifxmips_mii0.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*
* Copyright (C) 2005 Infineon
*
- * Rewrite of Infineon Danube code, thanks to infineon for the support,
+ * Rewrite of Infineon IFXMips code, thanks to infineon for the support,
* software and hardware
*
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
#include <asm/checksum.h>
#include <linux/init.h>
#include <asm/delay.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_mii0.h>
-#include <asm/danube/danube_dma.h>
-#include <asm/danube/danube_pmu.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_mii0.h>
+#include <asm/ifxmips/ifxmips_dma.h>
+#include <asm/ifxmips/ifxmips_pmu.h>
-static struct net_device danube_mii0_dev;
+static struct net_device ifxmips_mii0_dev;
static unsigned char u_boot_ethaddr[MAX_ADDR_LEN];
void
-danube_write_mdio (u32 phy_addr, u32 phy_reg, u16 phy_data)
+ifxmips_write_mdio (u32 phy_addr, u32 phy_reg, u16 phy_data)
{
u32 val = MDIO_ACC_REQUEST |
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
}
unsigned short
-danube_read_mdio (u32 phy_addr, u32 phy_reg)
+ifxmips_read_mdio (u32 phy_addr, u32 phy_reg)
{
u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ |
((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) |
}
int
-danube_switch_open (struct net_device *dev)
+ifxmips_switch_open (struct net_device *dev)
{
struct switch_priv* priv = (struct switch_priv*)dev->priv;
struct dma_device_info* dma_dev = priv->dma_device;
switch (status)
{
case RCV_INT:
- switch_hw_receive(&danube_mii0_dev, dma_dev);
+ switch_hw_receive(&ifxmips_mii0_dev, dma_dev);
break;
case TX_BUF_FULL_INT:
printk("tx buffer full\n");
- netif_stop_queue(&danube_mii0_dev);
+ netif_stop_queue(&ifxmips_mii0_dev);
for (i = 0; i < dma_dev->max_tx_chan_num; i++)
{
if ((dma_dev->tx_chan[i])->control==IFXMIPS_DMA_CH_ON)
for (i = 0; i < dma_dev->max_tx_chan_num; i++)
dma_dev->tx_chan[i]->disable_irq(dma_dev->tx_chan[i]);
- netif_wake_queue(&danube_mii0_dev);
+ netif_wake_queue(&ifxmips_mii0_dev);
break;
}
}
unsigned char*
-danube_etop_dma_buffer_alloc (int len, int *byte_offset, void **opt)
+ifxmips_etop_dma_buffer_alloc (int len, int *byte_offset, void **opt)
{
unsigned char *buffer = NULL;
struct sk_buff *skb = NULL;
}
void
-danube_etop_dma_buffer_free (unsigned char *dataptr, void *opt)
+ifxmips_etop_dma_buffer_free (unsigned char *dataptr, void *opt)
{
struct sk_buff *skb = NULL;
}
static struct net_device_stats*
-danube_get_stats (struct net_device *dev)
+ifxmips_get_stats (struct net_device *dev)
{
return (struct net_device_stats *)dev->priv;
}
printk("%s up\n", dev->name);
- dev->open = danube_switch_open;
+ dev->open = ifxmips_switch_open;
dev->stop = switch_release;
dev->hard_start_xmit = switch_tx;
- dev->get_stats = danube_get_stats;
+ dev->get_stats = ifxmips_get_stats;
dev->tx_timeout = switch_tx_timeout;
dev->watchdog_timeo = 10 * HZ;
dev->priv = kmalloc(sizeof(struct switch_priv), GFP_KERNEL);
return -ENODEV;
}
- priv->dma_device->buffer_alloc = &danube_etop_dma_buffer_alloc;
- priv->dma_device->buffer_free = &danube_etop_dma_buffer_free;
+ priv->dma_device->buffer_alloc = &ifxmips_etop_dma_buffer_alloc;
+ priv->dma_device->buffer_free = &ifxmips_etop_dma_buffer_free;
priv->dma_device->intr_handler = &dma_intr_handler;
priv->dma_device->max_rx_chan_num = 4;
}
static void
-danube_sw_chip_init (int mode)
+ifxmips_sw_chip_init (int mode)
{
- danube_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
- danube_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_DMA);
+ ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_PPE);
if(mode == REV_MII_MODE)
writel((readl(IFXMIPS_PPE32_CFG) & PPE32_MII_MASK) | PPE32_MII_REVERSE, IFXMIPS_PPE32_CFG);
{
int result = 0;
- danube_mii0_dev.init = switch_init;
+ ifxmips_mii0_dev.init = switch_init;
- strcpy(danube_mii0_dev.name, "eth%d");
+ strcpy(ifxmips_mii0_dev.name, "eth%d");
SET_MODULE_OWNER(dev);
- result = register_netdev(&danube_mii0_dev);
+ result = register_netdev(&ifxmips_mii0_dev);
if (result)
{
- printk("error %i registering device \"%s\"\n", result, danube_mii0_dev.name);
+ printk("error %i registering device \"%s\"\n", result, ifxmips_mii0_dev.name);
goto out;
}
- /* danube eval kit connects the phy/switch in REV mode */
- danube_sw_chip_init(REV_MII_MODE);
- printk("danube MAC driver loaded!\n");
+ /* ifxmips eval kit connects the phy/switch in REV mode */
+ ifxmips_sw_chip_init(REV_MII_MODE);
+ printk("ifxmips MAC driver loaded!\n");
out:
return result;
static void __exit
switch_cleanup(void)
{
- struct switch_priv *priv = (struct switch_priv*)danube_mii0_dev.priv;
+ struct switch_priv *priv = (struct switch_priv*)ifxmips_mii0_dev.priv;
- printk("danube_mii0 cleanup\n");
+ printk("ifxmips_mii0 cleanup\n");
dma_device_unregister(priv->dma_device);
dma_device_release(priv->dma_device);
kfree(priv->dma_device);
- kfree(danube_mii0_dev.priv);
- unregister_netdev(&danube_mii0_dev);
+ kfree(ifxmips_mii0_dev.priv);
+ unregister_netdev(&ifxmips_mii0_dev);
return;
}
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/bitops.h>
-#include <asm/danube/danube.h>
-#include <asm/danube/danube_irq.h>
-#include <asm/danube/danube_serial.h>
+#include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
+#include <asm/ifxmips/ifxmips_serial.h>
#define PORT_IFXMIPSASC 111
#define UART_DUMMY_UER_RX 1
-static void danubeasc_tx_chars(struct uart_port *port);
+static void ifxmipsasc_tx_chars(struct uart_port *port);
extern void prom_printf(const char * fmt, ...);
-static struct uart_port danubeasc_port;
-static struct uart_driver danubeasc_reg;
+static struct uart_port ifxmipsasc_port;
+static struct uart_driver ifxmipsasc_reg;
static unsigned int uartclk = 0;
-extern unsigned int danube_get_fpi_hz(void);
+extern unsigned int ifxmips_get_fpi_hz(void);
static void
-danubeasc_stop_tx (struct uart_port *port)
+ifxmipsasc_stop_tx (struct uart_port *port)
{
/* fifo underrun shuts up after firing once */
return;
}
static void
-danubeasc_start_tx (struct uart_port *port)
+ifxmipsasc_start_tx (struct uart_port *port)
{
unsigned long flags;
local_irq_save(flags);
- danubeasc_tx_chars(port);
+ ifxmipsasc_tx_chars(port);
local_irq_restore(flags);
return;
}
static void
-danubeasc_stop_rx (struct uart_port *port)
+ifxmipsasc_stop_rx (struct uart_port *port)
{
/* clear the RX enable bit */
writel(ASCWHBSTATE_CLRREN, IFXMIPS_ASC1_WHBSTATE);
}
static void
-danubeasc_enable_ms (struct uart_port *port)
+ifxmipsasc_enable_ms (struct uart_port *port)
{
/* no modem signals */
return;
}
static void
-danubeasc_rx_chars (struct uart_port *port)
+ifxmipsasc_rx_chars (struct uart_port *port)
{
struct tty_struct *tty = port->info->tty;
unsigned int ch = 0, rsr = 0, fifocnt;
static void
-danubeasc_tx_chars (struct uart_port *port)
+ifxmipsasc_tx_chars (struct uart_port *port)
{
struct circ_buf *xmit = &port->info->xmit;
if (uart_tx_stopped(port)) {
- danubeasc_stop_tx(port);
+ ifxmipsasc_stop_tx(port);
return;
}
}
static irqreturn_t
-danubeasc_tx_int (int irq, void *port)
+ifxmipsasc_tx_int (int irq, void *port)
{
writel(ASC_IRNCR_TIR, IFXMIPS_ASC1_IRNCR);
- danubeasc_start_tx(port);
- mask_and_ack_danube_irq(irq);
+ ifxmipsasc_start_tx(port);
+ mask_and_ack_ifxmips_irq(irq);
return IRQ_HANDLED;
}
static irqreturn_t
-danubeasc_er_int (int irq, void *port)
+ifxmipsasc_er_int (int irq, void *port)
{
/* clear any pending interrupts */
writel(readl(IFXMIPS_ASC1_WHBSTATE) | ASCWHBSTATE_CLRPE |
}
static irqreturn_t
-danubeasc_rx_int (int irq, void *port)
+ifxmipsasc_rx_int (int irq, void *port)
{
writel(ASC_IRNCR_RIR, IFXMIPS_ASC1_IRNCR);
- danubeasc_rx_chars((struct uart_port *) port);
- mask_and_ack_danube_irq(irq);
+ ifxmipsasc_rx_chars((struct uart_port *) port);
+ mask_and_ack_ifxmips_irq(irq);
return IRQ_HANDLED;
}
static unsigned int
-danubeasc_tx_empty (struct uart_port *port)
+ifxmipsasc_tx_empty (struct uart_port *port)
{
int status;
}
static unsigned int
-danubeasc_get_mctrl (struct uart_port *port)
+ifxmipsasc_get_mctrl (struct uart_port *port)
{
return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
}
static void
-danubeasc_set_mctrl (struct uart_port *port, u_int mctrl)
+ifxmipsasc_set_mctrl (struct uart_port *port, u_int mctrl)
{
return;
}
static void
-danubeasc_break_ctl (struct uart_port *port, int break_state)
+ifxmipsasc_break_ctl (struct uart_port *port, int break_state)
{
return;
}
static void
-danubeasc1_hw_init (void)
+ifxmipsasc1_hw_init (void)
{
/* this setup was probably already done in ROM/u-boot but we do it again*/
/* TODO: GPIO pins are multifunction */
}
static int
-danubeasc_startup (struct uart_port *port)
+ifxmipsasc_startup (struct uart_port *port)
{
unsigned long flags;
int retval;
/* this assumes: CON.BRS = CON.FDE = 0 */
if (uartclk == 0)
- uartclk = danube_get_fpi_hz();
+ uartclk = ifxmips_get_fpi_hz();
- danubeasc_port.uartclk = uartclk;
+ ifxmipsasc_port.uartclk = uartclk;
- danubeasc1_hw_init();
+ ifxmipsasc1_hw_init();
local_irq_save(flags);
- retval = request_irq(IFXMIPSASC1_RIR, danubeasc_rx_int, IRQF_DISABLED, "asc_rx", port);
+ retval = request_irq(IFXMIPSASC1_RIR, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
if (retval){
- printk("failed to request danubeasc_rx_int\n");
+ printk("failed to request ifxmipsasc_rx_int\n");
return retval;
}
- retval = request_irq(IFXMIPSASC1_TIR, danubeasc_tx_int, IRQF_DISABLED, "asc_tx", port);
+ retval = request_irq(IFXMIPSASC1_TIR, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
if (retval){
- printk("failed to request danubeasc_tx_int\n");
+ printk("failed to request ifxmipsasc_tx_int\n");
goto err1;
}
- retval = request_irq(IFXMIPSASC1_EIR, danubeasc_er_int, IRQF_DISABLED, "asc_er", port);
+ retval = request_irq(IFXMIPSASC1_EIR, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
if (retval){
- printk("failed to request danubeasc_er_int\n");
+ printk("failed to request ifxmipsasc_er_int\n");
goto err2;
}
}
static void
-danubeasc_shutdown (struct uart_port *port)
+ifxmipsasc_shutdown (struct uart_port *port)
{
free_irq(IFXMIPSASC1_RIR, port);
free_irq(IFXMIPSASC1_TIR, port);
writel(readl(IFXMIPS_ASC1_TXFCON) & ~ASCTXFCON_TXFEN, IFXMIPS_ASC1_TXFCON);
}
-static void danubeasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
+static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
{
unsigned int cflag;
unsigned int iflag;
}
static const char*
-danubeasc_type (struct uart_port *port)
+ifxmipsasc_type (struct uart_port *port)
{
return port->type == PORT_IFXMIPSASC ? "IFXMIPSASC" : NULL;
}
static void
-danubeasc_release_port (struct uart_port *port)
+ifxmipsasc_release_port (struct uart_port *port)
{
return;
}
static int
-danubeasc_request_port (struct uart_port *port)
+ifxmipsasc_request_port (struct uart_port *port)
{
return 0;
}
static void
-danubeasc_config_port (struct uart_port *port, int flags)
+ifxmipsasc_config_port (struct uart_port *port, int flags)
{
if (flags & UART_CONFIG_TYPE) {
port->type = PORT_IFXMIPSASC;
- danubeasc_request_port(port);
+ ifxmipsasc_request_port(port);
}
}
static int
-danubeasc_verify_port (struct uart_port *port, struct serial_struct *ser)
+ifxmipsasc_verify_port (struct uart_port *port, struct serial_struct *ser)
{
int ret = 0;
if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
return ret;
}
-static struct uart_ops danubeasc_pops = {
- .tx_empty = danubeasc_tx_empty,
- .set_mctrl = danubeasc_set_mctrl,
- .get_mctrl = danubeasc_get_mctrl,
- .stop_tx = danubeasc_stop_tx,
- .start_tx = danubeasc_start_tx,
- .stop_rx = danubeasc_stop_rx,
- .enable_ms = danubeasc_enable_ms,
- .break_ctl = danubeasc_break_ctl,
- .startup = danubeasc_startup,
- .shutdown = danubeasc_shutdown,
- .set_termios = danubeasc_set_termios,
- .type = danubeasc_type,
- .release_port = danubeasc_release_port,
- .request_port = danubeasc_request_port,
- .config_port = danubeasc_config_port,
- .verify_port = danubeasc_verify_port,
+static struct uart_ops ifxmipsasc_pops = {
+ .tx_empty = ifxmipsasc_tx_empty,
+ .set_mctrl = ifxmipsasc_set_mctrl,
+ .get_mctrl = ifxmipsasc_get_mctrl,
+ .stop_tx = ifxmipsasc_stop_tx,
+ .start_tx = ifxmipsasc_start_tx,
+ .stop_rx = ifxmipsasc_stop_rx,
+ .enable_ms = ifxmipsasc_enable_ms,
+ .break_ctl = ifxmipsasc_break_ctl,
+ .startup = ifxmipsasc_startup,
+ .shutdown = ifxmipsasc_shutdown,
+ .set_termios = ifxmipsasc_set_termios,
+ .type = ifxmipsasc_type,
+ .release_port = ifxmipsasc_release_port,
+ .request_port = ifxmipsasc_request_port,
+ .config_port = ifxmipsasc_config_port,
+ .verify_port = ifxmipsasc_verify_port,
};
-static struct uart_port danubeasc_port = {
+static struct uart_port ifxmipsasc_port = {
membase: (void *)IFXMIPS_ASC1_BASE_ADDR,
mapbase: IFXMIPS_ASC1_BASE_ADDR,
iotype: SERIAL_IO_MEM,
fifosize: 16,
unused: {IFXMIPSASC1_TIR, IFXMIPSASC1_EIR},
type: PORT_IFXMIPSASC,
- ops: &danubeasc_pops,
+ ops: &ifxmipsasc_pops,
flags: ASYNC_BOOT_AUTOCONF,
};
static void
-danubeasc_console_write (struct console *co, const char *s, u_int count)
+ifxmipsasc_console_write (struct console *co, const char *s, u_int count)
{
int i, fifocnt;
unsigned long flags;
}
static int __init
-danubeasc_console_setup (struct console *co, char *options)
+ifxmipsasc_console_setup (struct console *co, char *options)
{
struct uart_port *port;
int baud = 115200;
int flow = 'n';
if (uartclk == 0)
- uartclk = danube_get_fpi_hz();
+ uartclk = ifxmips_get_fpi_hz();
co->index = 0;
- port = &danubeasc_port;
- danubeasc_port.uartclk = uartclk;
- danubeasc_port.type = PORT_IFXMIPSASC;
+ port = &ifxmipsasc_port;
+ ifxmipsasc_port.uartclk = uartclk;
+ ifxmipsasc_port.type = PORT_IFXMIPSASC;
if (options){
uart_parse_options(options, &baud, &parity, &bits, &flow);
return uart_set_options(port, co, baud, parity, bits, flow);
}
-static struct uart_driver danubeasc_reg;
-static struct console danubeasc_console = {
+static struct uart_driver ifxmipsasc_reg;
+static struct console ifxmipsasc_console = {
name: "ttyS",
- write: danubeasc_console_write,
+ write: ifxmipsasc_console_write,
device: uart_console_device,
- setup: danubeasc_console_setup,
+ setup: ifxmipsasc_console_setup,
flags: CON_PRINTBUFFER,
index: -1,
- data: &danubeasc_reg,
+ data: &ifxmipsasc_reg,
};
static int __init
-danubeasc_console_init (void)
+ifxmipsasc_console_init (void)
{
- register_console(&danubeasc_console);
+ register_console(&ifxmipsasc_console);
return 0;
}
-console_initcall(danubeasc_console_init);
+console_initcall(ifxmipsasc_console_init);
-static struct uart_driver danubeasc_reg = {
+static struct uart_driver ifxmipsasc_reg = {
.owner = THIS_MODULE,
.driver_name = "serial",
.dev_name = "ttyS",
.major = TTY_MAJOR,
.minor = 64,
.nr = 1,
- .cons = &danubeasc_console,
+ .cons = &ifxmipsasc_console,
};
static int __init
-danubeasc_init (void)
+ifxmipsasc_init (void)
{
unsigned char res;
- uart_register_driver(&danubeasc_reg);
- res = uart_add_one_port(&danubeasc_reg, &danubeasc_port);
+ uart_register_driver(&ifxmipsasc_reg);
+ res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port);
return res;
}
static void __exit
-danubeasc_exit (void)
+ifxmipsasc_exit (void)
{
- uart_unregister_driver(&danubeasc_reg);
+ uart_unregister_driver(&ifxmipsasc_reg);
}
-module_init(danubeasc_init);
-module_exit(danubeasc_exit);
+module_init(ifxmipsasc_init);
+module_exit(ifxmipsasc_exit);
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
-MODULE_DESCRIPTION("MIPS Danube serial port driver");
+MODULE_DESCRIPTION("MIPS IFXMips serial port driver");
MODULE_LICENSE("GPL");
#ifndef _IFXMIPS_GPIO_H__
#define _IFXMIPS_GPIO_H__
-extern int danube_port_reserve_pin (unsigned int port, unsigned int pin);
-extern int danube_port_free_pin (unsigned int port, unsigned int pin);
-extern int danube_port_set_open_drain (unsigned int port, unsigned int pin);
-extern int danube_port_clear_open_drain (unsigned int port, unsigned int pin);
-extern int danube_port_set_pudsel (unsigned int port, unsigned int pin);
-extern int danube_port_clear_pudsel (unsigned int port, unsigned int pin);
-extern int danube_port_set_puden (unsigned int port, unsigned int pin);
-extern int danube_port_clear_puden (unsigned int port, unsigned int pin);
-extern int danube_port_set_stoff (unsigned int port, unsigned int pin);
-extern int danube_port_clear_stoff (unsigned int port, unsigned int pin);
-extern int danube_port_set_dir_out (unsigned int port, unsigned int pin);
-extern int danube_port_set_dir_in (unsigned int port, unsigned int pin);
-extern int danube_port_set_output (unsigned int port, unsigned int pin);
-extern int danube_port_clear_output (unsigned int port, unsigned int pin);
-extern int danube_port_get_input (unsigned int port, unsigned int pin);
-extern int danube_port_set_altsel0 (unsigned int port, unsigned int pin);
-extern int danube_port_clear_altsel0 (unsigned int port, unsigned int pin);
-extern int danube_port_set_altsel1 (unsigned int port, unsigned int pin);
-extern int danube_port_clear_altsel1 (unsigned int port, unsigned int pin);
+extern int ifxmips_port_reserve_pin (unsigned int port, unsigned int pin);
+extern int ifxmips_port_free_pin (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_open_drain (unsigned int port, unsigned int pin);
+extern int ifxmips_port_clear_open_drain (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_pudsel (unsigned int port, unsigned int pin);
+extern int ifxmips_port_clear_pudsel (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_puden (unsigned int port, unsigned int pin);
+extern int ifxmips_port_clear_puden (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_stoff (unsigned int port, unsigned int pin);
+extern int ifxmips_port_clear_stoff (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_dir_out (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_dir_in (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_output (unsigned int port, unsigned int pin);
+extern int ifxmips_port_clear_output (unsigned int port, unsigned int pin);
+extern int ifxmips_port_get_input (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_altsel0 (unsigned int port, unsigned int pin);
+extern int ifxmips_port_clear_altsel0 (unsigned int port, unsigned int pin);
+extern int ifxmips_port_set_altsel1 (unsigned int port, unsigned int pin);
+extern int ifxmips_port_clear_altsel1 (unsigned int port, unsigned int pin);
#endif
/*------------ LED */
-struct danube_port_ioctl_parm
+struct ifxmips_port_ioctl_parm
{
int port;
int pin;
};
#define IFXMIPS_PORT_IOC_MAGIC 0xbf
-#define IFXMIPS_PORT_IOCOD _IOW(IFXMIPS_PORT_IOC_MAGIC,0,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCPUDSEL _IOW(IFXMIPS_PORT_IOC_MAGIC,1,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCPUDEN _IOW(IFXMIPS_PORT_IOC_MAGIC,2,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCSTOFF _IOW(IFXMIPS_PORT_IOC_MAGIC,3,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCDIR _IOW(IFXMIPS_PORT_IOC_MAGIC,4,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCOUTPUT _IOW(IFXMIPS_PORT_IOC_MAGIC,5,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCINPUT _IOWR(IFXMIPS_PORT_IOC_MAGIC,6,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCALTSEL0 _IOW(IFXMIPS_PORT_IOC_MAGIC,7,struct danube_port_ioctl_parm)
-#define IFXMIPS_PORT_IOCALTSEL1 _IOW(IFXMIPS_PORT_IOC_MAGIC,8,struct danube_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCOD _IOW(IFXMIPS_PORT_IOC_MAGIC,0,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCPUDSEL _IOW(IFXMIPS_PORT_IOC_MAGIC,1,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCPUDEN _IOW(IFXMIPS_PORT_IOC_MAGIC,2,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCSTOFF _IOW(IFXMIPS_PORT_IOC_MAGIC,3,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCDIR _IOW(IFXMIPS_PORT_IOC_MAGIC,4,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCOUTPUT _IOW(IFXMIPS_PORT_IOC_MAGIC,5,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCINPUT _IOWR(IFXMIPS_PORT_IOC_MAGIC,6,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCALTSEL0 _IOW(IFXMIPS_PORT_IOC_MAGIC,7,struct ifxmips_port_ioctl_parm)
+#define IFXMIPS_PORT_IOCALTSEL1 _IOW(IFXMIPS_PORT_IOC_MAGIC,8,struct ifxmips_port_ioctl_parm)
#endif
#define IFXMIPS_DMA_CH18_INT (INT_NUM_IM2_IRL0 + 16)
#define IFXMIPS_DMA_CH19_INT (INT_NUM_IM2_IRL0 + 21)
-extern void mask_and_ack_danube_irq (unsigned int irq_nr);
+extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr);
#endif
/******************************************************************************
**
-** FILE NAME : danube_sw.h
-** PROJECT : Danube
+** FILE NAME : ifxmips_sw.h
+** PROJECT : IFXMips
** MODULES : ETH Interface (MII0)
**
** DATE : 11 AUG 2005
#define IFXMIPS_PMU_PWDCR_PPE 0x2000
#define IFXMIPS_PMU_PWDCR_FPI 0x4000
-void danube_pmu_enable (unsigned int module);
-void danube_pmu_disable (unsigned int module);
+void ifxmips_pmu_enable (unsigned int module);
+void ifxmips_pmu_disable (unsigned int module);
#endif
/******************************************************************************
**
** FILE NAME : serial.c
-** PROJECT : Danube
+** PROJECT : IFXMips
** MODULES : ASC/UART
**
** DATE : 27 MAR 2006
#ifndef IFXMIPS_WDT_H
#define IFXMIPS_WDT_H
-/* Danube wdt ioctl control */
+/* IFXMips wdt ioctl control */
#define IFXMIPS_WDT_IOC_MAGIC 0xc0
#define IFXMIPS_WDT_IOC_START _IOW(IFXMIPS_WDT_IOC_MAGIC, 0, int)
#define IFXMIPS_WDT_IOC_STOP _IO(IFXMIPS_WDT_IOC_MAGIC, 1)
#ifndef __IFX_SSC_H
#define __IFX_SSC_H
#ifdef __KERNEL__
-#include <asm/danube/ifx_ssc_defines.h>
+#include <asm/ifxmips/ifx_ssc_defines.h>
#endif //__KERNEL__
#define PORT_CNT 1 // assume default value
select GENERIC_HARDIRQS_NO__DO_IRQ
+config IFXMIPS
-+ bool "Danube support"
++ bool "IFXMips support"
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SYS_HAS_CPU_MIPS32_R1
source "arch/mips/tx4927/Kconfig"
source "arch/mips/tx4938/Kconfig"
source "arch/mips/vr41xx/Kconfig"
-+source "arch/mips/danube/Kconfig"
++source "arch/mips/ifxmips/Kconfig"
endmenu
+#
+# Infineon IFXMIPS
+#
-+core-$(CONFIG_IFXMIPS) += arch/mips/danube/
-+cflags-$(CONFIG_IFXMIPS) += -Iinclude/asm-mips/mach-danube
++core-$(CONFIG_IFXMIPS) += arch/mips/ifxmips/
++cflags-$(CONFIG_IFXMIPS) += -Iinclude/asm-mips/mach-ifxmips
+load-$(CONFIG_IFXMIPS) += 0xffffffff80002000
+
#
others can easily be added.
+config SERIAL_IFXMIPS
-+ bool "Danube serial driver"
++ bool "IFXMips serial driver"
+ depends on IFXMIPS
+ help
-+ Driver for the danubes built in ASC hardware
++ Driver for the ifxmipss built in ASC hardware
+
endmenu
Index: linux-2.6.23/drivers/serial/Makefile
obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
-+obj-$(CONFIG_SERIAL_IFXMIPS) += danube_asc.o
++obj-$(CONFIG_SERIAL_IFXMIPS) += ifxmips_asc.o
Index: linux-2.6.23/drivers/mtd/maps/Makefile
===================================================================
--- linux-2.6.23.orig/drivers/mtd/maps/Makefile 2007-12-13 20:41:42.000000000 +0100
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
-+obj-$(CONFIG_MTD_IFXMIPS) += danube.o
++obj-$(CONFIG_MTD_IFXMIPS) += ifxmips.o
Index: linux-2.6.23/drivers/net/Kconfig
===================================================================
--- linux-2.6.23.orig/drivers/net/Kconfig 2007-12-13 20:41:42.000000000 +0100
source "drivers/net/arm/Kconfig"
+config IFXMIPS_MII0
-+ tristate "Infineon Danube eth0 driver"
++ tristate "Infineon IFXMips eth0 driver"
+ depends on IFXMIPS
+ help
-+ Support for the MII0 inside the Danube SOC
++ Support for the MII0 inside the IFXMips SOC
+
+config IFXMIPS_MII1
-+ tristate "Infineon Danube eth1 driver"
++ tristate "Infineon IFXMips eth1 driver"
+ depends on IFXMIPS
+ help
-+ Support for the MII1 inside the Danube SOC
++ Support for the MII1 inside the IFXMips SOC
+
config AX88796
tristate "ASIX AX88796 NE2000 clone support"
obj-$(CONFIG_FEC_8XX) += fec_8xx/
obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o
obj-$(CONFIG_MLX4_CORE) += mlx4/
-+obj-$(CONFIG_IFXMIPS_MII0) += danube_mii0.o
++obj-$(CONFIG_IFXMIPS_MII0) += ifxmips_mii0.o
obj-$(CONFIG_MACB) += macb.o
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
-+obj-$(CONFIG_IFXMIPS_WDT) += danube_wdt.o
++obj-$(CONFIG_IFXMIPS_WDT) += ifxmips_wdt.o
# PARISC Architecture
endif
+
-+obj-$(CONFIG_IFXMIPS_LED) += danube_led.o
-+obj-$(CONFIG_IFXMIPS_GPIO) += danube_gpio.o
-+obj-$(CONFIG_IFXMIPS_SSC) += danube_ssc.o
-+obj-$(CONFIG_IFXMIPS_EEPROM) += danube_eeprom.o
++obj-$(CONFIG_IFXMIPS_LED) += ifxmips_led.o
++obj-$(CONFIG_IFXMIPS_GPIO) += ifxmips_gpio.o
++obj-$(CONFIG_IFXMIPS_SSC) += ifxmips_ssc.o
++obj-$(CONFIG_IFXMIPS_EEPROM) += ifxmips_eeprom.o
projects / openwrt / openwrt.git / commitdiff