ltq-vdsl-app: do not set the reserved bit 4 in the xTSE 8
authorFelix Fietkau <nbd@openwrt.org>
Mon, 7 Mar 2016 11:03:41 +0000 (11:03 +0000)
committerFelix Fietkau <nbd@openwrt.org>
Mon, 7 Mar 2016 11:03:41 +0000 (11:03 +0000)
I do not know if this causes any problems now, but we should not set
it, because it is reserved. Some more recent versions of the Lantiq DSL
API driver and Control is checking if only valid bits are set.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SVN-Revision: 48948

package/network/config/ltq-vdsl-app/files/dsl_control

index 6d254da..5ca1b12 100644 (file)
@@ -21,14 +21,14 @@ EXTRA_HELP="        status  Get DSL status information
 # G.992.5 Annex A / M
 # G.993.2 Annex A/B/C
 # G.993.5 Annex A/B/C
-xtse_xdsl_a="05_01_04_00_4C_01_04_0F"
+xtse_xdsl_a="05_01_04_00_4C_01_04_07"
 
 # G.992.1 Annex B
 # G.992.3 Annex B
 # G.992.5 Annex B
 # G.993.2 Annex A/B/C
 # G.993.5 Annex A/B/C
-xtse_xdsl_b="10_00_10_00_00_04_00_0F"
+xtse_xdsl_b="10_00_10_00_00_04_00_07"
 
 # G.992.1 Annex B
 # G.992.3 Annex B
@@ -37,7 +37,7 @@ xtse_xdsl_b="10_00_10_00_00_04_00_0F"
 # G.992.5 Annex J
 # G.993.2 Annex A/B/C
 # G.993.5 Annex A/B/C
-xtse_xdsl_j="10_00_10_40_00_04_01_0F"
+xtse_xdsl_j="10_00_10_40_00_04_01_07"
 
 # G.992.1 Annex B
 xtse_xdsl_bdmt="10_00_00_00_00_00_00_00"